ELEC 1202 Digital Circuits and Microprocessors - Problem Sheet 2

Note that more than one answer might be correct; there are positive and negative marks.

The Feedback Session for this Problem Sheet is 1/11/21.

Please check the time now as we want to know how long this took.

NAME ___________________________________ STUDENT No. _____________________________

1) What is the output of the following circuit? (Correct: 2 marks/ incorrect: -32768 marks)

i) ‘1’ ii) ‘0’ iii) “Output”

2) Why is the wrong answer to question 1) worth -32768 marks? (Correct: 2 mark/ incorrect: -1 mark)

i) It’s a heinous crime ii) The lecturer wanted harsh marks to make the students think more carefully about such a
difficult question iii) Given that in binary integers the first bit can represent the number's sign, then it's something to
do with 16-bit integers.

3) Converting 18710 to hexadecimal gives? (2 marks/ -1 mark)

i) 1111 ii) BB iii) AB iv) 10112

4) What is the function of the following circuit? (2 marks/ -1 mark)

i) A NOR B ii) A NAND B iii) A OR B iv) A AND B

5) Which can be used to derive the AND function in CMOS? (2 marks/ -1 mark)

i) invert the inputs to NOR ii) invert the output of NAND iii) invert the inputs to NAND

ELEC 1202 Digital Circuits and Microprocessors - Problem Sheet 2 1

6) Which statement correctly describes the performance of a CMOS gate? (2/-1)
i) NMH is related to IOH ii) the fanout is high since the gain is large iii) it’s much slower than other logic families

7) Given the truth table below, which correctly describes the outputs? (4 / -2)
A B ̅
𝑼/𝑫 A+ B+
0 0 0 1 1
0 0 1 0 1
0 1 0 0 0
0 1 1 1 0
1 0 0 0 1
1 0 1 1 1
1 1 0 1 0
1 1 1 0 0

i) B+ = ̅
𝐵 ii) A+ = ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐴⨁𝐵⨁𝑈/𝐷 ̅ iii) A+ = ∑𝐴𝐵𝑈/𝐷̅(0,3,5,7) iv) B+ = ̅̅̅̅
𝐴̅𝐵 ⋅ ̅̅̅̅
𝐴𝐵

8) When implementing A+ from 7) using a 2-1 line multiplexer (given inverted inputs are available), what more is
required? (4 / -2)
i) luck ii) a 2-input AND gate and a 2-input OR gate iii) a 2-4 line decoder
iv) two more 2-1 line multiplexers v) none of these

̅ 𝑫 ∙ ̅̅̅̅̅̅̅
9) When minimising 𝒇 = 𝑨 𝑩⨁𝑪 + 𝑨 ̅ ∙ ̅̅̅̅̅̅̅̅
̅+𝑫
𝑪 ̅ +𝑨
̅ 𝑩𝑪𝑫
̅ + 𝑨𝑩
̅𝑫̅ using AND/ OR or NOT gates only (6/-3)

i) 𝑓 = 𝐴̅𝐵̅𝐷 + 𝐴𝐵̅𝐷
̅ + 𝐴̅𝐵𝐶 ii) 𝑓 = 𝐴̅𝐷 + 𝐴𝐵̅𝐶 + 𝐴𝐵̅𝐷
̅

̅𝑪
10) Is it possible to minimise the function 𝒇 = 𝑨𝑩 ̅+𝑨
̅𝑩̅𝑪 + 𝑨 ̅ + 𝑨𝑩𝑪? (4/-2)
̅ 𝑩𝑪

i) yes ii) no

11) Using a decoder and any additional logic, is the implementation of f from 10 (4)

i) ii) iii)

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ELEC 1202 Digital Circuits and Microprocessors - Problem Sheet 2 2