Synopsis of Mini Project-II

Electronic Voting Machine

Submitted by
Shubham Rai (201300033)
Abhishek Rathour (201500022)

Under the Guidance of

Dr. Manish Kumar
( Assistant Professor )

Project In-charge
Dr. Divya Singh
(Assistant Professor)
Department of Electronics and Communication Engineering
GLA University, Mathura, Uttar Pradesh (281406)
Abstract
Electronic Voting machine is a simple electronic device used to record votes automatically without the need
of manual operation of ballot papers.Fundamental right to vote forms the basis of any Democracy.In all
earlier elections,voters casted their votes to their favourite candidates by putting the stamp against his/her
name.This is a long time consuming process and is prone to errors and can at times be an unfair process.To
overcome all these difficulties and make the electoral process a fair one,implementation of electronic voting
machine in digital domain is presented.

Objective
To design electronic voting machine using the concept of FSM in HDL Verilog.
User friendly specification

Methodology
Polling by Electronic mechanical device (EVM) may be a straightforward, safe and secure
methodology that takes minimum of your time.The proposed digital EVM was designed
using Verilog HDL.The above proposed method can be implemented on FPGA as it has the
advantage that it can be reprogrammed over and over for different tasks, making them very
cost efficient by avoiding recurring expenses.

Fig.1 Flow Chart of Proposed EVM

Resources
Language Required : Verilog HDL (Hardware Descriptive Language ) for designing purpose of the article.
Tools Required : Xilinx Vivado Design Suite Software for Simulation and Synthesis.

Schedule
Division of the Sep 2022 Oct 2022 Nov 2022 Dec 2022
work
Review of
literature
Design
specification
Module and
testbench
implementation
Simulation and
Verification

References

1]Hossain, T., Uddin, S.S.S., Rokon, I.R., Salam, K.M.A. and Abdul, M., 2014. Proficient FPGA Execution of Secured and Appa
Using Verilog HDL. International Journal of Envirnment41, pp.18-24.

2]Tripathi, R. and Kumari, A., 2020. FPGA Implementation of Biometric EVM using AADHAAR Authentication.  Journal of
Communication Engineering, 10(2), pp.7-10.