Unit 1

Vivekananda Institute of Professional Studies
BCA-301
Operating System
Unit-1
Evolution of OS
Ms. Swati Jain, Assistant Professor,
VSIT, VIPS
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Swati Jain, Assistant Professor,
VIPS
What is an Operating System?
➢ A program that acts as an intermediary between a user of

a computer and the computer hardware
➢ Operating system goals:
z Execute user programs and make solving user problems
easier.
z Make the computer system convenient to use
➢ Use the computer hardware in an efficient manner
Swati Jain, Assistant

Professor, VIPS
Computer System Components
1. Hardware - provides basic computing resources (CPU, memory,
I/O devices)
2. Operating system - controls and coordinates the use of the
hardware among the various application programs for the various
users
3. Applications programs - define the ways in which the system
resources are used to solve the computing problems of the users
(compilers, database systems, video games, business programs)
4. Users (people, machines, other computers)
Swati Jain, Assistant

Professor, VIPS
Abstract View of System Components

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Operating System Definitions
➢ Resource allocator - manages and allocates

resources
➢ Control program - controls the execution of user
programs and operations of I/O devices
➢Kernel - the one program running at all times (all
else
being application programs)

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Batch Systems(Contd.)
• Some computer systems only did one thing at a time. They had a list of the computer
programs and system may be dedicated to a single program until its completion, or they
may be dynamically reassigned among a collection of active programs in different
stages of execution.
• Batch operating system is one where programs and data are collected together in a
batch before processing starts. A job is predefined sequence of commands, programs
and data that are combined in to a single unit called job.
• Fig. 1 shows the memory layout for a simple batch system. Memory management in
batch system is very simple. Memory is usually divided into two areas : Operating
system and user program area.
• Scheduling is also simple in batch system. Jobs are processed in the order of submission
i.e first come first served fashion.
Fig 1 Memory Layout for a Simple Batch System

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Batch Systems(Contd.)
• When job completed execution, its memory is released and the output for the job gets copied into
an output spool for later printing.
• Batch system often provides simple forms of file management. Access to file is serial. Batch
systems do not require any time critical device management.
• Batch systems are inconvenient for users because users can not interact with their jobs to fix
problems. There may also be long turn around times. Example of this system is generating monthly
bank statement.
• Advantages of Batch System
• Move much of the work of the operator to the computer.
• Increased performance since it was possible for job to start as soon as the previous job finished.
• Disadvantages of Batch System
• Turn around time can be large from user standpoint.
• Difficult to debug program.
• A job could enter an infinite loop.
• A job could corrupt the monitor, thus affecting pending jobs.
• Due to lack of protection scheme, one batch job can affect pending jobs.

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Multiprogramming System(Contd.)
• Two or more programs in memory at the same time, sharing the processor is referred to the
multiprogramming operating system. Multiprogramming system has a single processor that is being
shared
• It increases CPU utilization by organizing jobs so that the CPU always has one to execute.
• The operating system keeps several jobs in memory at a time. This set of jobs is a subset of the jobs kept
in the job pool. The operating system picks and begins to execute one of the job in the memory.
• Multi-programmed system provide an environment in which the various system resources are utilized
effectively, but they do not provide for user interaction with the computer system.
• Jobs entering into the system are kept into the memory. Operating system picks the job and begins to
execute one of the job in the memory. Having several programs in memory at the same time requires
some form of memory management.
• Multiprogramming operating system monitors the state of all active programs and system resources. This
ensures that the CPU is never idle unless there are no jobs
• Advantages
• 1. High CPU utilization.
• 2. It appears that many programs are allotted CPU almost simultaneously.
• Disadvantages
• 1. CPU scheduling is required.
• 2. To accommodate many jobs in memory, memory management is required.
Swati Jain, Assistant Professor, VIPS

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Timesharing OS (Contd.)
• Multi-programmed batched systems provide an environment where the various
system resources (for example, CPU, memory, peripheral devices) are utilized
effectively.
• Time sharing, or multitasking, is a logical extension of multiprogramming. Multiple
jobs are executed by the CPU switching between them, but the switches occur so
frequently that the users may interact with each program while it is running.
• An interactive, or hands-on, computer system provides on- line communication
between the user and the system. The user gives instructions to the operating
system or to a program directly, and receives an immediate response. Usually, a
keyboard is used to provide input, and a display screen (such as a cathode-ray tube
(CRT) or monitor) is used to provide output.
• If users are to be able to access both data and code conveniently, an on-line file
system must be available. A file is a collection of related information defined by its
creator. Batch systems are appropriate for executing large jobs that need little
interaction.

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Timesharing OS (Contd.)
• Time-sharing systems were developed to provide interactive use of a computer system
at a reasonable cost. A time- shared operating system uses CPU scheduling and
multiprogramming to provide each user with a small portion of a time-shared
computer. Each user has at least one separate program in memory. A program that is
loaded into memory and is executing is commonly referred to as a process. When a
process executes, it typically executes for only a short time before it either finishes or
needs to perform I/O. I/O may be interactive; that is, output is to a display for the user
and input is from a user keyboard. Since interactive I/O typically runs at people speeds,
it may take a long time to completed.
• A time-shared operating system allows the many users to share the computer
simultaneously. Since each action or command in a time-shared system tends to be
short, only a little CPU time is needed for each user. As the system switches rapidly
from one user to the next, each user is given the impression that she has her own
computer, whereas actually one computer is being shared among many users.
• Time-sharing operating systems are even more complex than are multi-programmed
operating systems. As in multiprogramming, several jobs must be kept simultaneously
in memory, which requires some form of memory management and protection.

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Distributed Systems
Distribute the computation among several physical

processors
Loosely coupled system - each processor has its own
local memory; processors communicate with one another through various communications
lines, such as high- speed buses or telephone lines
Requires networking infrastructure
Local area networks (LAN) or Wide area networks (WAN)
May be either client-server or peer-to-peer systems
Advantages of distributed systems
z Resources Sharing
z Computation speed up - load sharing
z Reliability
z Communications

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Types of OS - Summary
• 1. Batch : Jobs with similar needs are batched together and run through the computer as a group by
an operator or automatic job sequencer. Performance is increased by attempting to keep CPU and
I/O devices busy at all times through buffering , off line operation, spooling and multiprogramming.
A Batch system is good for executing large jobs that need little interaction, it can be submitted and
picked up latter.
• 2. Time sharing : Uses CPU scheduling and multiprogramming to provide economical & interactive
use of a system. The CPU switches rapidly from one user to another i.e. the CPU is shared between
a number of interactive users. Instead of having a job defined by spooled card images, each
program reads its next control instructions from the terminal and output is normally printed
immediately on the screen.
• 3. Interactive : User is on line with computer system and interacts with it via an interface. It is
typically composed of many short transactions where the result of the next transaction may be
unpredictable. Response time needs to be short since the user submits and waits for the result.
• 4. Real time system : Real time systems are usually dedicated, embedded systems. They typically
read from and react to sensor data. The system must guarantee response to events within fixed
periods of time to ensure correct performance.
• 5. Distributed : Distributes computation among several physical processors. The processors do not
share memory or a clock. Instead, each processor has its own local memory. They communicate
with each other through various communication lines

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SPOOLING
• SPOOL is an acronym for simultaneous peripheral operations on-line.
• It is a kind of buffering mechanism or a process in which data is temporarily held
to be used and executed by a device, program or the system. Data is sent to and
stored in memory or other volatile storage until the program or computer
requests it for execution.
• In a computer system peripheral equipment, such as printers and punch card
readers, etc. (batch processing), are very slow relative to the performance of the
rest of the system. Getting input and output from the system was quickly seen to
be a bottleneck. Here comes the need for spool.
• Spooling works like a typical request queue where data, instructions and
processes from multiple sources are accumulated for execution later on.
Generally, it is maintained on computer’s physical memory, buffers or the I/O
device-specific interrupts. The spool is processed in FIFO manner i.e. whatever
first instruction is there in the queue will be popped and executed.

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Applications/Implementations of Spool:
• 1) The most common can be found in I/O devices like keyboard printers and mouse. For
example, In printer, the documents/files that are sent to the printer are first stored in
the memory or the printer spooler. Once the printer is ready, it fetches the data from
the spool and prints it.
• Even experienced a situation when suddenly for some seconds your mouse or keyboard
stops working? Meanwhile, we usually click again and again here and there on the
screen to check if its working or not. When it actually starts working, what and
wherever we pressed during its hang state gets executed very fast because all the
instructions got stored in the respective device’s spool.
• 2) A batch processing system uses spooling to maintain a queue of ready-to-run jobs
which can be started as soon as the system has the resources to process them.
• 3) Spooling is capable of overlapping I/O operation for one job with processor
operations for another job. i.e. multiple processes can write documents to a print
queue without waiting and resume with their work.
• 4) E-mail: an email is delivered by a MTA (Mail Transfer Agent) to a temporary storage
area where it waits to be picked up by the MA (Mail User Agent)

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BCA-301
Operating System
Unit-1
Memory Management
Ms. Swati Jain, Assistant Professor, VSIT, VIPS
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Memory Management
• Background
• Address Binding
• Swapping
• Contiguous Memory Allocation
• Segmentation
• Paging

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Objectives
• To provide a detailed description of various
ways of organizing memory hardware
• To discuss on address space management
• To discuss various memory-management

techniques, including paging and
segmentation

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Memory
• Memory is central to the operation of a modern computer
system.
• Memory is a large array of words or bytes, each with its own
address.
• A program resides on a disk as a binary executable file that
must be brought into memory and placed within a process for
it to be executed
• Depending on the memory management in use, the process
may be moved between disk and memory during its
execution.
• The collection of processes on the disk that are waiting to be
brought into memory for execution forms the input queue. i.e.
select one of the process in the input queue and to load that
process into memory.
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Memory Background
• Program must be brought (from disk) into memory and placed
within a process for it to be run
• Main memory and registers are only storage CPU can access directly
• Memory unit only sees a stream of addresses + read requests, or

address + data and write requests
• Register access in one CPU clock (or less)
• Main memory can take many cycles, causing a stall
• Cache sits between main memory and CPU registers
• Protection of memory required to ensure correct operation

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Base and Limit Registers
• MMU is made up of two registers
• A pair of base and limit
registers define the logical
address space
• the base register holds the
smallest legal physical memory
address; the limit register
specifies the size of the range.
• For example, if the base register
holds 300040 and the limit
register is 120900, then the
program can legally access all
addresses from 300040 through
420939 (inclusive).

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Hardware Address Protection
CPU must check every memory access
generated in user mode to be sure it is
between base and limit for that user

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Address Binding
• Address binding is the process of mapping from one address space to another
address space.
• Logical address is an address generated by the CPU during execution, whereas
Physical Address refers to the location in the memory unit(the one that is loaded
into memory).
• The logical address undergoes translation by the MMU or address translation unit in
particular.
• The output of this process is the appropriate physical address or the location of
code/data in RAM.
• Further, addresses are represented in different ways at different stages of a
program’s life
– Source code addresses usually symbolic
– Compiled code addresses bind to relocatable addresses
• i.e. “14 bytes from beginning of this module”
– Linker or loader will bind relocatable addresses to absolute addresses
• i.e. 74014
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Address Binding
• The binding of instructions and data to memory addresses can be done
at any step along the way:
• Compile time: If it is known at compile time where the process will
reside in memory, then absolute code can be generated i. e., The
physical address is embedded to the executable of the program during
compilation.
• Load time: If it is not known at compile time where the process will
reside in memory, then the compiler must generate re-locatable code.
The loader translates the relocatable address to an absolute address.
The base address of the process in main memory is added to all logical
addresses by the loader to generate an absolute address. In this, if the
base address of the process changes, then we need to reload the
process again.
• Execution time: If the process can be moved during its execution from
one memory segment to another, then binding must be delayed until
run time.
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Multistep
Processing of a
User Program

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Logical vs. Physical Address Space
Logical address space is the set of all logical addresses generated by a
program also referred to as virtual address
Physical address space is the set of all physical addresses generated by a
program and address seen by the memory unit
• Logical and physical addresses are the same in compile-time and load-time
address-binding schemes; and differ in execution-time address-binding
scheme
• The base register is called a relocation register. The value in the relocation
register is added to every address generated by a user process at the time it
is sent to memory. For example, if the base is at 13000, then an attempt by
the user to address location 0 dynamically relocated to location 13,000; an
access to location 347 is mapped to location 13347.
• The user program never sees the real physical addresses. The program can
create a pointer to location 347 store it memory, manipulate it, compare it to
other addresses all as the number 347.

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Memory-Management Unit (MMU)
• The run time mapping between Virtual address and Physical Address is
done by a hardware device known as MMU.
• In memory management, the OS will handle the processes and move the
processes between disk and memory for execution . It keeps track of
available and used memory.
• To start, consider simple scheme where the value in the relocation
register is added to every address generated by a user process at the time
it is sent to memory
– Base register now called relocation register
– MS-DOS on Intel 80x86 used 4 relocation registers
• The user program deals with logical addresses; it never sees the real
physical addresses
– Execution-time binding occurs when reference is made to location in
memory
– Logical address bound to physical addresses

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Dynamic Relocation using a relocation register
1. CPU will generate logical address for eg. : 346

2. MMU will generate a relocation register (base register)
for eg. : 14000
3. In memory, the physical address is located eg.
:(346+14000= 14346)

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Dynamic Loading
• Better memory-space utilization can be done by dynamic loading.
• With dynamic loading, a routine is not loaded until it is called.
• All routines are kept on disk in a re-locatable load format. The main
program is loaded into memory and is executed.
• The advantage of dynamic loading is that an unused routine is never
loaded thus Better memory-space utilization takes place
• Useful when large amounts of code are needed to handle infrequently
occurring cases
No special support from the operating system is required
Implemented through program design
OS can help by providing libraries to implement dynamic loading

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Dynamic Linking
• Static linking – system libraries and program code combined by the
loader into the binary program image
• Dynamic linking –linking postponed until execution time
• Most operating systems support only static linking, in which system
language libraries are treated like any other object module and are
combined by the loader into the binary program image.
• The concept of dynamic linking is similar to that of dynamic loading.
Rather than loading being postponed until execution time, linking is
postponed. This feature is usually used with system libraries, such as
language subroutine libraries.
• With dynamic linking, a stub is included in the image for each library-
routine reference. This stub is a small piece of code that indicates how
to locate the appropriate memory-resident library routing.

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Swapping
• A process can be swapped temporarily out of memory to a backing
store, and then brought back into memory for continued execution
• This is how total physical memory space of processes can exceed
physical memory space
• Assume a multiprogramming environment with a round robin CPU-
scheduling algorithm.
– When a quantum expires, the memory manager will start to swap
out the process that just finished, and to swap in another process
to the memory space that has been freed.
– When each process finishes its quantum, it will be swapped with
another process
• Backing store – fast disk large enough to accommodate copies of all

memory images for all users; must provide direct access to these
memory images

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Schematic View of Swapping

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Swapping
• A variant of the round-robin swapping policy is used for priority-based
scheduling algorithms - If a higher-priority process arrives and wants
service, the memory manager can swap out the lower-priority process
so that it can load and execute the higher priority process.
• When the higher priority process finishes, the lower-priority process
can be swapped back in and continued. This variant of swapping is
sometimes called rollout, roll in.
• A process that is swapped out will be swapped back into the same
memory space that it occupies previously.
• If binding is done at assembly or load time, then the process cannot
be moved to different location. If execution-time binding is being
used, then it is possible to swap a process into a different memory
space.
• Roll out, roll in – swapping variant used for priority-based scheduling
algorithms; lower-priority process is swapped out so higher-priority
process can be loaded and executed

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Context Switch Time including Swapping
• System maintains a ready queue of ready-to-run processes which have
memory images on disk
• If next processes to be put on CPU is not in memory, need to swap out a
process and swap in target process
• Major part of swap time is transfer time; total transfer time is directly
proportional to the amount of memory swapped
• Context switch time can then be very high
• Consider 100MB process swapping to hard disk with transfer rate of 50MB/sec
– Swap out time of 2000 ms
– Plus swap in of same sized process
– Total context switch swapping component time of 4000ms (4 seconds)
• Can be reduced if we reduce size of memory swapped – by knowing how
much memory really being used
– System calls to inform OS of memory use via request_memory() and
release_memory()

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Contiguous Allocation
• The main memory must accommodate both the operating
system and the various user processes.
• The memory is usually divided into two partitions, one for the
resident operating system, and one for the user processes.
• The operating system is placed in the low memory.
• User processes then held in high memory
• Each process contained in single contiguous section of memory

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Contiguous Allocation - Single Partition
• If the operating system is residing in low memory, and the user
processes are executing in high memory. And operating- system
code and data are protected from changes by the user processes.
We also need protect the user processes from one another. We
can provide this protection by using a relocation registers.
• Two Relocation registers used to protect user processes from
each other, and from changing operating-system code and data
– Base register contains value of smallest physical address
– Limit register contains range of logical addresses – each logical
address must be less than the limit register
– MMU maps logical address dynamically

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Hardware Support for Relocation and Limit Registers

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Contiguous Allocation - Multiple Partition
Allocation
• The simplest scheme for memory allocation is to divide memory into a
number of fixed-sized partitions. Each partition may contain exactly one
process.
• Thus, the degree of multiprogramming is bound by the number of
partitions.
• When a partition is free, a process is selected from the input queue and is
loaded into the free partition. When the process terminates, the partition
becomes available for another process.
• The operating system keeps a table indicating which parts of memory are
available and which are occupied. Initially, all memory is available for user
processes, and is considered as one large block, of available memory, a
hole. When a process arrives and needs memory, we search for a hole
large enough for this process.

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Multiple-partition allocation
– Variable-partition sizes for efficiency (sized to a given process’ needs)
– Hole – block of available memory; holes of various size are scattered
throughout memory
– When a process arrives, it is allocated memory from a hole large enough
to accommodate it
– Process exiting frees its partition, adjacent free partitions combined
– Operating system maintains information about:
a) allocated partitions b) free partitions (hole)

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Dynamic Storage-Allocation Problem
How to satisfy a request of size n from a list of free holes?
• First-fit: Allocate the first partition hole that is big enough
• Best-fit: Allocate the smallest partition hole that is big enough;

must search entire list, unless ordered by size
– Produces the smallest leftover hole
• Worst-fit: Allocate the largest partition hole; must also search

entire list
– Produces the largest leftover hole
First-fit and best-fit algorithms are better than worst-fit in terms of

speed and storage utilization

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Dynamic Allocation - Problem 1
• Consider six memory partitions of size 200 KB, 400 KB, 600 KB, 500 KB, 300
KB and 250 KB. These partitions need to be allocated to four processes of
sizes 357 KB, 210 KB, 468 KB and 491 KB in that order. Perform the
allocation of processes using- a) First Fit Algorithm b) Best Fit Algorithm
c) Worst Fit Algorithm
Sol. Let us say the given processes are-

• Process P1 = 357 KB Process P2 = 210 KB Process P3 = 468 KB
• Process P4 = 491 KB

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First Fit Algorithm

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Best Fit Algorithm

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Worst Fit Algorithm

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Fragmentation
• As processes are loaded and removed from memory, the free
memory space is broken into little pieces.
• External Fragmentation – exists when enough memory space
exists to satisfy a request, but it is not contiguous; storage is
fragmented into a large number of small holes.
• Internal Fragmentation – allocated memory may be slightly
larger than requested memory; this size difference is memory
internal to a partition, but not being used
• First fit analysis reveals that given N blocks allocated, 0.5 N
blocks lost to fragmentation
– 1/3 may be unusable -> 50-percent rule

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Fragmentation (Cont.)
• Reduce external fragmentation by compaction
– Shuffle memory contents to place all free memory
together in one large block
– Compaction is possible only if relocation is
dynamic, and is done at execution time
– I/O problem
• Latch job in memory while it is involved in I/O
• Do I/O only into OS buffers
• Now consider that backing store has same
fragmentation problems

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Non-Contiguous Memory Allocation
• Non-contiguous memory allocation is a memory allocation technique.
• It allows to store parts of a single process in a non-contiguous fashion.
• Thus, different parts of the same process can be stored at different
places in the main memory.
• There are two popular techniques used for non-contiguous memory
allocation:

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Non-Contiguous MA-Paging
• Paging is a memory management scheme that eliminates the
need for contiguous allocation of physical memory. This scheme
permits the physical address space of a process to be non –
contiguous.
• Paging is a fixed size partitioning scheme where secondary
memory and main memory are divided into equal fixed size
partitions.
• The Physical Address Space(Main Memory) is conceptually
divided into a number of fixed-size blocks, called frames.
• The Logical address Space(Secondary Memory) is also split into
fixed-size blocks, called pages.
• Page Size = Frame Size

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Paging Model of Logical and Physical Memory
page table is used to translate

logical to physical addresses
Paging – Example
• Let us consider the main memory size 16 Kb and Frame size is 1 KB
therefore the main memory will be divided into the collection of 16
frames of 1 KB each.
• There are 4 processes in the system that is P1, P2, P3 and P4 of 4 KB each.
Each process is divided into pages of 1 KB each so that one page can be
stored in one frame.
• Initially, all the frames are empty therefore pages of the processes will get
stored in the contiguous way.
• Frames, pages and the mapping between the two is shown in the image
below.

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Paging - Example

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Paging – Example
• Let us consider that, P2 and P4 are moved to waiting state after
some time. Now, 8 frames become empty and therefore other
pages can be loaded in that empty place. The process P5 of size 8
KB (8 pages) is waiting inside the ready queue.
• Given the fact that, we have 8 non contiguous frames available in
the memory and paging provides the flexibility of storing the
process at the different places. Therefore, we can load the pages of
process P5 in the place of P2 and P4.

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Paging - Example

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Address Translation Scheme
• Address generated by CPU is divided into:
– Page number (p) – used as an index into a page table
• which contains base address of each page in physical memory
– Page offset (d) – offset within a page
• combined with base address to define the physical memory address that
is sent to the memory unit
offse
t page
page number page offset
p d
m-n n
– For given logical address space 2m and page size 2n
Paging Hardware
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Segmentation
• A process is divided into Segments. The chunks that a program is divided into
which are not necessarily all of the same sizes are called segments.
• Segmentation gives user’s view of the process which paging does not give.
• Here the user’s view is mapped to physical memory.
User’s View of a Program

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Segmentation
• There are types of segmentation:
1. Virtual memory segmentation –
Each process is divided into a number of segments, not all of which are
resident at any one point in time.
2. Simple segmentation –
Each process is divided into a number of segments, all of which are loaded
into memory at run time, though not necessarily contiguously.
• There is no simple relationship between logical addresses and physical
addresses in segmentation. A table stores the information about all such
segments and is called Segment Table.
• Segment Table – It maps two-dimensional Logical address into one-
dimensional Physical address. It’s each table entry has:
• Base Address: It contains the starting physical address where the segments
reside in memory.
• Limit: It specifies the length of the segment
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User’s View of a Program
User specifies each
address by two
quantities
(a)Segment name
(b)Segment offset
Logical address
contains the tuple
<segment#, offset>
• Variable size segments

without order
• Length=> purpose of the
program
• Elements are identified by
offset
Logical View of Segmentation
Logical address
<segment-number, offset>
4
1
3 2
4
Logical
address
space user space physical memory space
• Long term scheduler finds and allocates memory for all segments
of a program
• Variable size partition scheme
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Segmentation Hardware
Address generated by the CPU is divided into:
•Segment number (s): Number of bits required to represent the segment.
•Segment offset (d): Number of bits required to represent the size of the
segment.

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Segmentation
• Advantages of Segmentation –
• No Internal fragmentation.
• Segment Table consumes less space in comparison to Page table in paging.
• Disadvantage of Segmentation –
• As processes are loaded and removed from the memory, the free memory
space is broken into little pieces, causing External fragmentation.

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BCA-301
Operating System
Unit-1
Virtual Memory
Ms. Swati Jain, Assistant Professor, VSIT, VIPS
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Virtual Memory
• A computer can address more memory than the amount physically memory
installed on the system. This extra memory is actually called as Virtual
Memory and it is a section of a hard disk that's set up for emulating the
computer's RAM memory.
• Virtual Memory is a storage allocation scheme in which secondary memory
can be addressed as though it were part of main memory.
• The size of virtual storage is limited by the addressing scheme of the
computer system and amount of secondary memory is available not by the
actual number of the main storage locations.
• The main visible advantage of this scheme is that programs can be larger
than physical memory.
• .

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Virtual Memory
• Virtual memory is a technique that allows the execution of process that may
not be completely in memory.
• Virtual memory serves two purposes.
– First, it allows us to extend the use of physical memory by using disk.
– Second, it allows us to have memory protection, because each virtual
address is translated to a physical address
• Virtual memory is the separation of user logical memory from physical memory.
This separation allows an extremely large virtual memory to be provided for
programmers when only a smaller physical memory is available
• Following are the situations, when entire program is not required to load fully.
– 1. User written error handling routines are used only when an error occurs
in the data or computation.
– Many tables are assigned a fixed amount of address space even though only
a small amount of the table is actually used.
– Certain options and features of a program may be used rarely.
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Virtual Memory
• The ability to execute a program that is only partially in memory would
counter many benefits.
• 1. Less number of I/O would be needed to load or swap each user

program into memory.
• 2. A program would no longer be constrained by the amount of physical
memory that is available.
• 3. Each user program could take less physical memory, more programs
could be run the same time, with a corresponding increase in CPU
utilization and throughput.
• Virtual memory is commonly implemented by demand paging. It can also

be implemented in a segmentation system. Demand segmentation can
also be used to provide virtual memory

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Virtual Memory
Fig 1: Diagram showing virtual memory that is larger than physical

memory. Ms. Swati Jain, Assistant Professor,
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Demand Paging
• Demand paging is similar to a paging system with swapping. With
virtual memory, in order to execute some process, only a part of
process needs to be present in the main memory. Which means
only few pages need to be in main memory.
• However, deciding, which pages need to be kept in the main
memory and which need to be kept in the secondary memory, is
going to be difficult because we cannot say in advance that a
process will require a particular page at particular time.
• Therefore, to overcome this problem, there is a concept called
Demand Paging is introduced.

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Demand Paging
• It suggests keeping all pages of the frames in the secondary
memory until they are required. In other words, it says that do not
load any page in the main memory until it is required.
• Thus demand paging is the process that solves the above problem
only by swapping the pages on Demand. This is also known as lazy
swapper( It never swaps the page into the memory unless it is
needed).
• Swapper that deals with the individual pages of a process are
referred to as Pager.
• Whenever any page is referred for the first time in the main
memory, then that page will be found in the secondary memory.
• After that, it may or may not be present in the main memory
depending upon the page replacement algorithm.
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How Does Demand Paging Working
• Demand paging system is totally dependent on the page table implementation
because page table helps to maps logical memory to physical memory.
• Some form of hardware support is used to distinguish between the pages that
are in the memory and the pages that are on the disk. Thus for this purpose
Valid-Invalid scheme is used:
• With each page table entry, a valid-invalid bit is associated( where 1 indicates in
the memory and 0 indicates not in the memory)
• Initially, the valid-invalid bit is set to 0 for all table entries.
• If the bit is set to "valid", then the associated page is both legal and is in
memory.
• If the bit is set to "invalid" then it indicates that the page is either not valid or
the page is valid but is currently not on the disk.
• For the pages that are brought into the memory, the page table is set as usual.
• But for the pages that are not currently in the memory, the page table is
either simply marked as invalid or it contains the address of the page on the
disk.
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How Does Demand Paging Working
• Now all process go ahead to access all pages, then some things will
be happened. Such as –
• Attempt to currently access page
• If page is ok (Valid but=1), then all processing instructions work as
normal.
• If, anyone page is found as invalid, then page- fault issue arises.
• If the reference is invalid then abort it
• During the translation of address, if the valid-invalid bit in the
page table entry is 0 then it leads to page fault.
• Now disk operations are implemented to fetch the required page
into primary memory.

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Demand Paging

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Page Fault Trap
• Page fault dominates more like an error. It mainly occurs when any program
tries to access the data or the code that is in the address space of the
program, but that data is not currently located in the RAM of the system.
• So basically when the page referenced by the CPU is not found in the main
memory then the situation is termed as Page Fault.
• Whenever any page fault occurs, then the required page has to be fetched
from the secondary memory into the main memory.
• In case if the required page is not loaded into the memory, then a page fault
trap arises
• The page fault mainly generates an exception, which is used to notify the
operating system that it must have to retrieve the "pages" from the virtual
memory in order to continue the execution. Once all the data is moved into
the physical memory the program continues its execution normally. The Page
fault process takes place in the background and thus goes unnoticed by the
user.
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Page Fault Trap

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Demand Paging
• The advantages of using the Demand Paging technique are as
follows:
• With the help of Demand Paging, memory is utilized efficiently.
• Demand paging avoids External Fragmentation.
• Less Input/Output is needed for Demand Paging.
• This process is not constrained by the size of physical memory.
• With Demand Paging it becomes easier to share the pages.
• With this technique, portions of the process that are never called
are never loaded.
• No compaction is required in demand Paging.
• Disadvantages:
• There is an increase in overheads due to interrupts and page tables.
• Memory access time in demand paging is longer.

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Pure Demand Paging
• In some cases when initially no pages are loaded into the memory, pages
in such cases are only loaded when are demanded by the process by
generating page faults. It is then referred to as Pure Demand Paging.
• In the case of pure demand paging, there is not even a single page that is
loaded into the memory initially. Thus pure demand paging causes the
page fault.
• When the execution of the process starts with no pages in the memory,
then the operating system sets the instruction pointer to the first
instruction of the process and that is on a non-memory resident page and
then in this case the process immediately faults for the page.
• After that when this page is brought into the memory then the process
continues its execution, page fault is necessary until every page that it
needs is in the memory.
• And at this point, it can execute with no more faults.
• This scheme is referred to as Pure Demand Paging: means never bring a
page into the memory until it is required.

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Page Replacement Algorithms
• First In First Out (FIFO) algorithm
– Oldest page in main memory is the one which will be selected for replacement.
– Easy to implement, keep a list, replace pages from the tail and add new pages
at the head.
– FIFO is not a stack algorithm. In certain cases, the number of page faults can
actually increase when more frames are allocated to the process.
• Optimal Page Replacement (OPR) algorithm
– An optimal page-replacement algorithm has the lowest page-fault rate of all
algorithms. An optimal page-replacement algorithm exists, and has been called
OPT or MIN.
– Replace the page that will not be used for the longest period of time. Use the
time when a page is to be used.
• Least Recently Used (LRU) algorithm
– Page which has not been used for the longest time in main memory is the one
which will be selected for replacement.
– Easy to implement, keep a list, replace pages by looking back into time.
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FIFO
• Initially all slots are empty, so when
1, 3, 0 came they are allocated to
the empty slots —> 3 Page Faults.
• when 3 comes, it is already
in memory so —> 0 Page Faults.
• Then 5 comes, it is not available
in memory so it replaces the oldest
page slot i.e 1. —>1 Page Fault.
• 6 comes, it is also not available in
memory so it replaces the oldest
page slot i.e 3 —>1 Page Fault.
• Finally when 3 come it is not
available so it replaces 0 1 page
fault
Belady’s anomaly – Belady’s anomaly proves that it is possible to have

more page faults when increasing the number of page frames while
using the First in First Out (FIFO) page replacement algorithm. For
example, if we consider reference string 3, 2, 1, 0, 3, 2, 4, 3, 2, 1, 0, 4
and 3 slots, we get 9 total page faults, but if we increase slots to 4, we
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get 10 page faults. VSIT, VIPS
Optimal Page Replacement
Initially all slots are empty, so when 7 0 1 2 are allocated to the empty slots —> 4 Page faults
0 is already there so —> 0 Page fault.
when 3 came it will take the place of 7 because it is not used for the longest duration of time
in the future.—>1 Page fault.
0 is already there so —> 0 Page fault..
4 will takes place of 1 —> 1 Page Fault.
Now for the further page reference string —> 0 Page fault because they are already available
in the memory.
Optimal page replacement is perfect, but not possible in practice as the operating system
cannot know future requests. TheMs. use of Optimal
Swati PageProfessor,
Jain, Assistant replacement is to set up a benchmark
97
so that other replacement algorithms can be VSIT, VIPS
analyzed against it.
Least Recently Used Replacement
• Initially all slots are empty, so when 7 0 1 2 are allocated to the empty slots —> 4
Page faults
0 is already their so —> 0 Page fault.
when 3 came it will take the place of 7 because it is least recently used —>1 Page
fault
0 is already in memory so —> 0 Page fault.
4 will takes place of 1 —> 1 Page Fault
Now for the further page reference string —> 0 Page fault because they are
already available in the memory.Ms. Swati Jain, Assistant Professor,
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Translation Lookaside Buffer (TLB).
• Translation Lookaside Buffer (TLB) is nothing but a special
cache used to keep track of recently used transactions.
• TLB contains page table entries that have been most recently
used.
• Given a virtual address, the processor examines the TLB if a
page table entry is present (TLB hit), the frame number is
retrieved and the real address is formed.
• If a page table entry is not found in the TLB (TLB miss), the
page number is used as index while processing page table.
• TLB first checks if the page is already in main memory, if not in
main memory a page fault is issued then the TLB is updated to
include the new page entry.

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TLB

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Effective Access Time
• TLB hit is a condition where the desired entry is found in translation look aside
buffer. If this happens then the CPU simply access the actual location in the
main memory.
• However, if the entry is not found in TLB (TLB miss) then CPU has to access
page table in the main memory and then access the actual frame in the main
memory.
• Therefore, in the case of TLB hit, the effective access time will be lesser as
compare to the case of TLB miss.
• If the probability of TLB hit is P% (TLB hit rate) then the probability of TLB
miss (TLB miss rate) will be (1-P) %.
• EAT = P (t + m) + (1 - p) (t + k.m + m)
• Where, p → TLB hit rate, t → time taken to access TLB, m → time taken to
access main memory k = 1, if the single level paging has been implemented.
• Effective access time will be decreased if the TLB hit rate is increased.
• Effective access time will be increased in the case of multilevel paging.
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Practice Question
Q1- If TLB hit ratio = 0.6
• Therefore, TLB miss ratio = 0.4
• Time taken to access TLB (t) = 10 ms
• Time taken to access main memory (m) = 80 ms
Sol. Effective Access Time (EAT)

= 0.6 ( 10 + 80 ) + 0.4 ( 10 + 80 + 80 )
= 90 X 0.6 + 0.4 X 170
= 122

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Thrashing
• We know that swapping is a process out means removing all
of its pages from memory, or marking them so that they will
be removed by the normal page replacement process.
• Suspending a process ensures that it is not runnable while it
is swapped out. At some later time, the system swaps back
the process from the secondary storage to main memory.
• When a process is busy swapping pages in and out then this
situation is called thrashing.

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Thrashing Curve
• In this diagram, initial degree
of multi programming upto
some extent of point(lamda),
the CPU utilization is very
high and the system
resources are utilized 100%.
• But if further increase the
degree of multi programming
the CPU utilization will
drastically fall down and the
system will spent more time
only in the page replacement
and the time taken to
complete the execution of
the process will increase.
• This situation in the system
is called as thrashing.

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Causes of Thrashing
1. High degree of multiprogramming : If the number of processes keeps on increasing in
the memory than number of frames allocated to each process will be decreased. So,
less number of frames will be available to each process. Due to this, page fault will
occur more frequently and more CPU time will be wasted in just swapping in and out
of pages and the utilization will keep on decreasing.
Let free frames = 400
• Case 1: Number of process = 100
Then, each process will get 4 frames.
• Case 2: Number of process = 400
Each process will get 1 frame.
Case 2 is a condition of thrashing, as the number of processes are increased, frames per
process are decreased. Hence CPU time will be consumed in just swapping pages.
2. Lacks of Frames: If a process has less number of frames then less pages of that process
will be able to reside in memory and hence more frequent swapping in and out will be
required. This may lead to thrashing. Hence sufficient amount of frames must be
allocated to each process in order to prevent thrashing.
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Recovery of Thrashing
• Do not allow the system to go into thrashing by
instructing the long term scheduler not to bring the
processes into memory after the threshold.
• If the system is already in thrashing then instruct the

mid term scheduler to suspend some of the
processes so that we can recover the system from
thrashing.

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Vivekananda Institute of Professional Studies

➢ A program that acts as an intermediary between a user of

Swati Jain, Assistant

Swati Jain, Assistant

Swati Jain, Assistant Professor,

➢ Resource allocator - manages and allocates

Swati Jain, Assistant Professor,

Fig 1 Memory Layout for a Simple Batch System

Swati Jain, Assistant Professor,

Swati Jain, Assistant Professor,

Swati Jain, Assistant Professor, VIPS

Swati Jain, Assistant Professor,

Swati Jain, Assistant Professor,

Distribute the computation among several physical

Swati Jain, Assistant Professor,

Swati Jain, Assistant Professor,

Swati Jain, Assistant Professor,

Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor, VSIT, VIPS

Ms. Swati Jain, Assistant Professor,

• To discuss on address space management

• To discuss various memory-management

Ms. Swati Jain, Assistant Professor,

• Memory unit only sees a stream of addresses + read requests, or

• Register access in one CPU clock (or less)

• Main memory can take many cycles, causing a stall

• Cache sits between main memory and CPU registers

• Protection of memory required to ensure correct operation

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

1. CPU will generate logical address for eg. : 346

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

• Backing store – fast disk large enough to accommodate copies of all

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

• Best-fit: Allocate the smallest partition hole that is big enough;

• Worst-fit: Allocate the largest partition hole; must also search

First-fit and best-fit algorithms are better than worst-fit in terms of

Ms. Swati Jain, Assistant Professor,

Sol. Let us say the given processes are-

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

Ms. Swati Jain, Assistant Professor,

page table is used to translate

Ms. Swati Jain, Assistant Professor,