Chapter 1

Digital Design and Computer Architecture, 2nd Edition

David Money Harris and Sarah L. Harris

Chapter 1 <1>
 Chapter 1 :: Topics
• Background
• The Game Plan
• The Art of Managing Complexity
• The Digital Abstraction
• Number Systems
• Logic Gates
• Logic Levels
• CMOS Transistors
• Power Consumption

Chapter 1 <2>
 Background
• Microprocessors have revolutionized our world
– Cell phones, Internet, rapid advances in medicine, etc.
• The semiconductor industry has grown from $21
billion in 1985 to $306 billion in 2016

Chapter 1 <3>
 The Game Plan
• Purpose of course:
– Understand what’s under the hood of a computer
– Learn the principles of digital design
– Learn to systematically debug increasingly
complex designs
– Design and build a microprocessor

Chapter 1 <4>
 The Art of Managing Complexity
• Abstraction
• Discipline
• The Three –y’s
– Hierarchy
– Modularity
– Regularity

Chapter 1 <5>
 Abstraction
• What is abstraction?
– Hiding details when
they are not

Increasing Abstraction
important

• Electronic computer
abstraction

Chapter 1 <6>
 Discipline
• Intentionally restrict design choices
• Example: Digital discipline
– Discrete voltages instead of continuous
– Simpler to design than analog circuits – can build
more sophisticated systems
– Digital systems replacing analog predecessors:
• i.e., digital cameras, digital television, cell
phones, CDs

Chapter 1 <7>
 The Three -y’s
• Hierarchy

• Modularity

• Regularity

Chapter 1 <8>
 The Three -y’s
• Hierarchy
– A system divided into modules and submodules
• Modularity
– Having well-defined functions and interfaces
• Regularity
– Encouraging uniformity, so modules can be easily reused

Chapter 1 <9>
 Example: The Flintlock Rifle
• Hierarchy
– Three main
modules: lock,
stock, and barrel
– Submodules of
lock: hammer, flint,
frizzen, etc.

Chapter 1 <10>
 Example: The Flintlock Rifle
• Modularity
– Function of stock:
mount barrel and
lock
– Interface of stock:
length and location
of mounting pins
• Regularity
– Interchangeable
parts

Chapter 1 <11>
 The Digital Abstraction
• Most physical variables are continuous
– Voltage on a wire
– Frequency of an oscillation
– Position of a mass
• Digital abstraction considers discrete
subset of values

Chapter 1 <12>
 The Analytical Engine
• Designed by Charles
Babbage from 1834 –
1871
• Considered to be the
first digital computer
• Built from mechanical
gears, where each gear
represented a discrete
value (0-9)
• Babbage died before it
was finished
Chapter 1 <13>
 Digital Discipline: Binary Values
• Digital abstraction considers discrete subset of
values
• Two discrete values:
– 1’s and 0’s
– 1 = TRUE = HIGH
– 0 = FALSE = LOW
• How to represent 1 and 0:
– voltage levels, rotating gears, fluid levels, etc.
• Digital circuits use voltage levels to represent 1
and 0
• Bit: Binary digit

Chapter 1 <14>
 Why Digital Systems?
• Easier to design
• Fast
• Can overcome noise
• Error detection/correction

Chapter 1 <15>
 George Boole, 1815-1864
• Born to working class parents
• Taught himself mathematics
and joined the faculty of
Queen’s College in Ireland
• Wrote An Investigation of the
Laws of Thought (1854)
• Introduced binary variables
• Introduced the three
fundamental logic operations:
AND, OR, and NOT

Chapter 1 <16>
 George Boole, 1815-1864
• Born to working class parents
• Taught himself mathematics
and joined the faculty of
Queen’s College in Ireland
• Wrote An Investigation of the
Laws of Thought (1854)
• Introduced binary variables
• Introduced the three
fundamental logic operations:
AND, OR, and NOT

Chapter 1 <17>
 Number Systems
• Decimal
– Base 10
• Binary
– Base 2
• Hexadecimal
– Base 16

Chapter 1 <18>
 Review: Decimal Numbers
• Base 10 (our everyday number system)

1000's column

10's column
1's column
100's column

537410 =

Base 10

Chapter 1 <19>
 Review: Decimal Numbers
• Base 10 (our everyday number system)

1000's column

10's column
1's column
100's column

537410 = 5 × 103 + 3 × 102 + 7 × 101 + 4 × 100

five three seven four
thousands hundreds tens ones

Base 10

Chapter 1 <20>
 Decimal and Binary Numbers
• Base 10 (our everyday number system)

1000's column

10's column
1's column
100's column

537410 = 5 × 103 + 3 × 102 + 7 × 101 + 4 × 100

five three seven four
thousands hundreds tens ones

• Base 2: Binary numbers

8's column

2's column
1's column
4's column

11012 =

Base 2
Chapter 1 <21>
 Decimal and Binary Numbers
• Base 10 (our everyday number system)

1000's column

10's column
1's column
100's column

537410 = 5 × 103 + 3 × 102 + 7 × 101 + 4 × 100

five three seven four
thousands hundreds tens ones

• Base 2: Binary numbers

8's column

2's column
1's column
4's column

11012 = 1 × 23 + 1 × 22 + 0 × 21 + 1 × 20 = 1310
one one no one
eight four two one

Base 2
Chapter 1 <22>
Powers of Two
• 20 = • 28 =
• 21 = • 29 =
• 22 = • 210 =
• 23 = • 211 =
• 24 = • 212 =
• 25 = • 213 =
• 26 = • 214 =
• 27 = • 215 =

Chapter 1 <23>
Powers of Two
• 20 = 1 • 28 = 256
• 21 = 2 • 29 = 512
• 22 = 4 • 210 = 1024
• 23 = 8 • 211 = 2048
• 24 = 16 • 212 = 4096
• 25 = 32 • 213 = 8192
• 26 = 64 • 214 = 16384
• 27 = 128 • 215 = 32768
• Handy to memorize up to 29
Chapter 1 <24>
Powers of Two
• 20 = 1 • 28 = 256
• 21 = 2 • 29 = 512
• 22 = 4 • 210 = 1024
• 23 = 8 • 211 = 2048
• 24 = 16 • 212 = 4096
• 25 = 32 • 213 = 8192
• 26 = 64 • 214 = 16384
• 27 = 128 • 215 = 32768
• Handy to memorize up to 29
Chapter 1 <25>
 Binary to Decimal Conversion
• Binary to decimal conversion:
– Convert 100112 to decimal

Chapter 1 <26>
 Binary to Decimal Conversion
• Binary to decimal conversion:
– Convert 100112 to decimal
– 16×1 + 8×0 + 4×0 + 2×1 + 1×1 = 1910

Chapter 1 <27>
Decimal to Binary Conversion
• Two methods:
– Method 1: Find the largest power of 2 that fits,
subtract and repeat. (Recommended method)
– Method 2: Repeatedly divide by 2, remainder
goes in next most significant bit

Chapter 1 <28>
 Decimal to Binary Conversion
Method 1: Find the largest power of 2 that fits, subtract and repeat.
5310

Method 2: Repeatedly divide by 2, remainder goes in next most significant

bit.

Chapter 1 <29>
 Decimal to Binary Conversion
Method 1: Find the largest power of 2 that fits, subtract and repeat.
5310 32×1
53-32 = 21 16×1
21-16 = 5 4×1
5-4 = 1 1×1
= 1101012
Method 2: Repeatedly divide by 2, remainder goes in next most significant
bit.
5310 = 53/2 = 26 R1
26/2 = 13 R0
13/2 = 6 R1
6/2 = 3 R0
3/2 = 1 R1
1/2 = 0 R1 = 1101012
Chapter 1 <30>
 Number Conversion
• Binary to decimal conversion:
– Convert 111012 to decimal

• Decimal to binary conversion:

– Convert 4710 to binary

Chapter 1 <31>
 Number Conversion
• Binary to decimal conversion:
– Convert 111012 to decimal
– 16×1 + 8×1 + 4×1 + 2×0 + 1×1 = 2910

• Decimal to binary conversion:

– Convert 4710 to binary
– 32×1 + 16×0 + 8×1 + 4×1 + 2×1 + 1×1 = 1011112

Chapter 1 <32>
 Binary Values and Range
• N-digit decimal number
– How many values?
– Range?
– Example: 3-digit decimal number:

• N-bit binary number

– How many values?
– Range:
– Example: 3-digit binary number:

Chapter 1 <33>
 Binary Values and Range
• N-digit decimal number
– How many values? 10N
– Range? [0, 10N - 1]
– Example: 3-digit decimal number:
• 103 = 1000 possible values
• Range: [0, 999]

• N-bit binary number

– How many values? 2N
– Range: [0, 2N - 1]
– Example: 3-digit binary number:
• 23 = 8 possible values
• Range: [0, 7] = [0002 to 1112]

Chapter 1 <34>
Binary Numbers
𝐴𝐴: {𝑎𝑎𝑁𝑁−1 , 𝑎𝑎𝑁𝑁−2 , … 𝑎𝑎1 , 𝑎𝑎0 }
𝑁𝑁−1

𝐴𝐴 = � 𝑎𝑎𝑖𝑖 2𝑖𝑖
𝑖𝑖=0

Example:
11012 = 1 × 23 + 1 × 22 + 0 × 21 + 1 × 20
=8 + 4 + 0 + 1
= 13

Chapter 1 <35>
Hexadecimal Numbers
Hex Digit Decimal Equivalent Binary Equivalent
0 0
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
A 10
B 11
C 12
D 13
E 14
F 15

Chapter 1 <36>
Hexadecimal Numbers
Hex Digit Decimal Equivalent Binary Equivalent
0 0 0000
1 1 0001
2 2 0010
3 3 0011
4 4 0100
5 5 0101
6 6 0110
7 7 0111
8 8 1000
9 9 1001
A 10 1010
B 11 1011
C 12 1100
D 13 1101
E 14 1110
F 15 1111

Chapter 1 <37>
 Hexadecimal Numbers
• Base 16
• Shorthand for binary

Chapter 1 <38>
 Hexadecimal to Binary Conversion
• Hexadecimal to binary conversion:
– Convert 4AF16 (also written 0x4AF) to binary

• Hexadecimal to decimal conversion:

– Convert 4AF16 to decimal

Chapter 1 <39>
 Hexadecimal to Binary Conversion
• Hexadecimal to binary conversion:
– Convert 4AF16 (also written 0x4AF) to binary
– 0100 1010 11112

• Hexadecimal to decimal conversion:

– Convert 4AF16 to decimal
– 4 × 162 + A × 161 + F × 160
– 4 × 162 + 10 × 161 + 15 × 160 = 119910

Chapter 1 <40>
Bits, Bytes, Nibbles…
• Bits 10010110
– msb: most significant bit most least
significant significant
– lsb: least significant bit bit bit

byte

• Bytes & Nibbles 10010110

nibble

• Bytes
– MSB: most significant byte
1010001011100101
most least
– LSB: least significant byte significant significant
byte byte

Chapter 1 <41>
Bits, Bytes, Nibbles…
• Bits 10010110
– msb: most significant bit most least
significant significant
– lsb: least significant bit bit bit

byte

• Bytes & Nibbles 10010110

nibble

• Bytes
– MSB: most significant byte CEBF9AD7
– LSB: least significant byte most least
– Each hex digit represents significant significant
byte byte
a nibble (4 bits)

Chapter 1 <42>
Large Powers of Two
• 210 = 1 kilo ≈ thousand (1024)
• 220 = 1 mega ≈ million (1,048,576)
• 230 = 1 giga ≈ billion (1,073,741,824)
• 240 = 1 tera ≈ trillion (1,099,511,627,776)
• 250 = 1 peta ≈ 1015
• 260 = 1 exa ≈ 1018

Chapter 1 <43>
Large Powers of Two
• 210 = 1 kilo (kibi) ≈ 103 (1024)
• 220 = 1 mega (mebi) ≈ 106 (1,048,576)
• 230 = 1 giga (gibi) ≈ 109 (1,073,741,824)
• 240 = 1 tera (tebi) ≈ 1012
• 250 = 1 peta (pebi) ≈ 1015
• 260 = 1 exa (exbi) ≈ 1018

Chapter 1 <44>
Large Powers of Two: Abbreviations
• 210 = 1 kilo ≈ 1000 (1024)
kibibyte = 1 Ki
for example: 1 KiB = 1024 Bytes
1 Kib = 1024 bits
• 220 = 1 mega ≈ 1 million (1,048,576)
mebibyte= 1 Mi
for example: 1 MiB, 1 Mib (1 megabit)
• 230 = 1 giga ≈ 1 billion (1,073,741,824)
gibibyte = 1 Gi
for example: 1 GiB, 1 Gib

Chapter 1 <45>
Estimating Powers of Two
• What is the approximate value of 224?

• Approximately how many values can a 32-bit

variable represent?

Chapter 1 <46>
Estimating Powers of Two
• What is the approximate value of 224?
24 × 220 ≈ 16 million

• Approximately how many values can a 32-bit

variable represent?
22 × 230 ≈ 4 billion
First factor out the largest 210x. Then estimate.

Chapter 1 <47>
 Addition
• Decimal
3734
+ 5168

• Binary
1011
+ 0011

Chapter 1 <48>
 Addition
• Decimal 11 carries
3734
+ 5168
8902

• Binary 11 carries
1011
+ 0011
1110

Chapter 1 <49>
 Binary Addition Examples
• Add the following
4-bit binary 1001
+ 0101
numbers

• Add the following 1011

4-bit binary + 0110
numbers

Chapter 1 <50>
 Binary Addition Examples
• Add the following 1
1001
4-bit binary
+ 0101
numbers
1110

111
• Add the following 1011
4-bit binary + 0110
numbers 10001
Overflow!
Chapter 1 <51>
Binary Addition: Number of Bits
• The addition of two 4-bit 1
values (inputs) gives a 4-bit 1001
result (output). + 0101
• Any additional bits on the 1110
left are ignored
(overflow!) 111
• Generally, addition of two n- 1011
bit numbers gives an n-bit + 0110
result.
10001
Overflow!
Chapter 1 <52>
 Overflow
• Digital systems operate on a fixed number of
bits
• Overflow: when result is too big to fit in the
available number of bits
• See previous example of 11 + 6
111
1011
+ 0110
10001
Overflow!
Chapter 1 <53>
 Signed Binary Numbers
• Sign/Magnitude Numbers
• Two’s Complement Numbers

Chapter 1 <54>
 Sign/Magnitude Numbers
• 1 sign bit, N-1 magnitude bits
• Sign bit is the most significant (left-most) bit
– Positive number: sign bit = 0
– Negative number: sign bit = 1

• Example, 4-bit sign/mag representations of ± 6:

+6 =
-6=

• Range of an N-bit sign/magnitude number:

Chapter 1 <55>
 Sign/Magnitude Numbers
• 1 sign bit, N-1 magnitude bits
• Sign bit is the most significant (left-most) bit
– Positive number: sign bit = 0
– Negative number: sign bit = 1

• Example, 4-bit sign/mag representations of ± 6:

+6 = 0110
- 6 = 1110

• Range of an N-bit sign/magnitude number:

[-(2N-1-1), 2N-1-1]

Chapter 1 <56>
 Sign/Magnitude Numbers
• 1 sign bit, N-1 magnitude bits
• Sign bit is the most significant (left-most) bit
– Positive number: sign bit = 0
𝑨𝑨: {𝒂𝒂𝑵𝑵−𝟏𝟏 , 𝒂𝒂𝑵𝑵−𝟐𝟐 , … 𝒂𝒂𝟏𝟏 , 𝒂𝒂𝟎𝟎 )
– Negative number: sign bit = 1 𝑵𝑵−𝟐𝟐

𝑨𝑨 = (−𝟏𝟏)𝒂𝒂𝑵𝑵−𝟏𝟏 � 𝒂𝒂𝒊𝒊 𝟐𝟐𝒊𝒊

𝒊𝒊=𝟎𝟎

• Example, 4-bit sign/mag representations of ± 6:

+6 = 0110
- 6 = 1110

• Range of an N-bit sign/magnitude number:

[-(2N-1-1), 2N-1-1]

Chapter 1 <57>
Unsigned Binary Numbers
𝐴𝐴: {𝑎𝑎𝑁𝑁−1 , 𝑎𝑎𝑁𝑁−2 , … 𝑎𝑎1 , 𝑎𝑎0 }
𝑁𝑁−1

𝐴𝐴 = � 𝑎𝑎𝑖𝑖 2𝑖𝑖
𝑖𝑖=0

Example:
11012 = 1 × 23 + 1 × 22 + 0 × 21 + 1 × 20
=8 + 4 + 0 + 1
= 13

Chapter 1 <58>
Sign/Magnitude Numbers
𝐴𝐴: {𝑎𝑎𝑁𝑁−1 , 𝑎𝑎𝑁𝑁−2 , … 𝑎𝑎1 , 𝑎𝑎0 }
𝑁𝑁−2

𝐴𝐴 = (−1)𝑎𝑎𝑁𝑁−1 � 𝑎𝑎𝑖𝑖 2𝑖𝑖

𝑖𝑖=0

Example:
11012 = (-1)1 × (1 × 22 + 0 × 21 + 1 × 20)
= -1 × (4 + 0 + 1)
= -5

Chapter 1 <59>
 Sign/Magnitude Numbers
• Problems:
– Addition doesn’t work, for example -6 + 6:
1110
+ 0110
10100 (wrong!)

– Two representations of 0 (± 0):

1000
0000
Chapter 1 <60>
 Two’s Complement Numbers
• Don’t have same problems as
sign/magnitude numbers:
– Addition works
– Single representation for 0

Chapter 1 <61>
 Two’s Complement Numbers
• Most significant bit (msb) has value of -2N-1
• For example, a 4-bit 2’s complement number:

-23 22 21 20

-8 4 2 1

Chapter 1 <62>
 Two’s Complement Numbers
• Most significant bit (msb) has value of -2N-1
• For example, a 4-bit 2’s complement number:

Value = -8 + 2 + 1 = -5
(We’ll show another way to find this value in a moment.)

Chapter 1 <63>
 Two’s Complement Numbers
• msb has value of -2N-1
• Most positive 4-bit number:
• Most negative 4-bit number:
• The most significant bit still indicates the sign
(1 = negative, 0 = positive)
• Range of an N-bit two’s complement number:

Chapter 1 <64>
 Two’s Complement Numbers
• msb has value of -2N-1
• Most positive 4-bit number: 0111
• Most negative 4-bit number: 1000
• The most significant bit still indicates the sign
(1 = negative, 0 = positive)
• Range of an N-bit two’s complement number:
[-(2N-1), 2N-1-1]

Chapter 1 <65>
Unsigned Binary Numbers
𝐴𝐴: {𝑎𝑎𝑁𝑁−1 , 𝑎𝑎𝑁𝑁−2 , … 𝑎𝑎1 , 𝑎𝑎0 }
𝑁𝑁−1

𝐴𝐴 = � 𝑎𝑎𝑖𝑖 2𝑖𝑖
𝑖𝑖=0

Example:
11012 = 1 × 23 + 1 × 22 + 0 × 21 + 1 × 20
=8 + 4 + 0 + 1
= 13

Chapter 1 <66>
Two’s Complement Numbers
𝐴𝐴: {𝑎𝑎𝑁𝑁−1 , 𝑎𝑎𝑁𝑁−2 , … 𝑎𝑎1 , 𝑎𝑎0 }
𝑁𝑁−2

𝐴𝐴 = 𝑎𝑎𝑁𝑁−1 −2𝑁𝑁−1 + � 𝑎𝑎𝑖𝑖 2𝑖𝑖

𝑖𝑖=0

Example:
11012 = 1 × (-23) + 1 × 22 + 0 × 21 + 1 × 20
= -8 + 4 + 0 + 1
= -3

Chapter 1 <67>
“Taking the Two’s Complement”
• Flips the sign of a two’s complement
number.
o It makes a positive number negative.
o It makes a negative number positive.
• Method:
1. Invert the bits
2. Add 1

Chapter 1 <68>
“Taking the Two’s Complement”
• Flips the sign of a two’s complement
number.
• Method:
1. Invert the bits
2. Add 1
• Example: Flip the sign of 310 = 00112
1. 1100
2. + 1
1101 = -310

Chapter 1 <69>
 Two’s Complement Examples
Take the two’s complement of 610 = 01102

Chapter 1 <70>
 Two’s Complement Examples
Take the two’s complement of 610 = 01102
1. 1001
2. + 1
10102 = -610

Chapter 1 <71>
 Two’s Complement Examples
What is the decimal value of the two’s
complement number 10012?

Chapter 1 <72>
 Two’s Complement Examples
What is the decimal value of the two’s
complement number 10012?
• We know it’s negative (msb = 1)
• Figure out magnitude by flipping the sign (i.e., “taking
the two’s complement”)
1. 0110
2. + 1
01112 = 710
• So, we know it’s a negative number with magnitude 7.
• Thus, 10012 = -710
Taking the two’s complement is the second (and recommended)
way of figuring out the value of a negative two’s complement
number.
Chapter 1 <73>
 Two’s Complement Addition
• Add 6 + (-6) using two’s complement
numbers
0110
+ 1010

• Add -2 + 3 using two’s complement numbers

1110
+ 0011

Chapter 1 <74>
 Two’s Complement Addition
• Add 6 + (-6) using two’s complement
numbers 111
0110
+ 1010
10000
• Add -2 + 3 using two’s complement numbers
111
1110
+ 0011
10001
Chapter 1 <75>
 Increasing Bit Width
• Extend number from N to M bits (M > N) :
– Sign-extension
– Zero-extension

Copyright © 2012 Elsevier

Chapter 1 <76>
 Sign-Extension
• Sign bit copied to msb’s
• Number value is same

• Example 1:
– 4-bit representation of 3 = 0011
– 8-bit sign-extended value: 00000011
• Example 2:
– 4-bit representation of -5 = 1011
– 8-bit sign-extended value: 11111011

Chapter 1 <77>
 Zero-Extension
• Zeros copied to msb’s
• Value changes for negative numbers

• Example 1:
– 4-bit value = 00112 = 310
– 8-bit zero-extended value: 00000011 = 310
• Example 2:
– 4-bit value = 1011 = -510
– 8-bit zero-extended value: 00001011 = 1110

Chapter 1 <78>
 Number System Comparison
Number System Range
Unsigned [0, 2N-1]
Sign/Magnitude [-(2N-1-1), 2N-1-1]
Two’s Complement [-2N-1, 2N-1-1]

For example, 4-bit representation:

-8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Unsigned 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111

1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111 Two's Complement

0000
1111 1110 1101 1100 1011 1010 1001
1000
0001 0010 0011 0100 0101 0110 0111 Sign/Magnitude

Chapter 1 <79>
 George Boole, 1815-1864
• Born to working class parents
• Taught himself mathematics
and joined the faculty of
Queen’s College in Ireland
• Wrote An Investigation of the
Laws of Thought (1854)
• Introduced binary variables
• Introduced the three
fundamental logic operations:
AND, OR, and NOT

Chapter 1 <80>
 Logic Gates

• Perform logic functions:

– inversion (NOT), AND, OR, NAND, NOR, etc.
• Single-input:
– NOT gate, buffer
• Two-input:
– AND, OR, XOR, NAND, NOR, XNOR
• Multiple-input

Chapter 1 <81>
Single-Input Logic Gates

NOT BUF
A Y A Y

Y=A Y=A

A Y A Y
0 0
1 1

Chapter 1 <82>
Single-Input Logic Gates

NOT BUF
A Y A Y

Y=A Y=A

A Y A Y
0 1 0 0
1 0 1 1

Chapter 1 <83>
Two-Input Logic Gates

AND OR
A A
Y Y
B B

Y = AB Y=A+B

A B Y A B Y
0 0 0 0
0 1 0 1
1 0 1 0
1 1 1 1

Chapter 1 <84>
Two-Input Logic Gates

AND OR
A A
Y Y
B B

Y = AB Y=A+B

A B Y A B Y
0 0 0 0 0 0
0 1 0 0 1 1
1 0 0 1 0 1
1 1 1 1 1 1

Chapter 1 <85>
More Two-Input Logic Gates

XOR NAND NOR XNOR

A A A A
Y Y Y Y
B B B B

Y=A⊕B Y = AB Y=A+B Y=A⊕B

A B Y A B Y A B Y A B Y
0 0 0 0 0 0 0 0
0 1 0 1 0 1 0 1
1 0 1 0 1 0 1 0
1 1 1 1 1 1 1 1

Chapter 1 <86>
More Two-Input Logic Gates

XOR NAND NOR XNOR

A A A A
Y Y Y Y
B B B B

Y=A⊕B Y = AB Y=A+B Y=A⊕B

A B Y A B Y A B Y A B Y
0 0 0 0 0 1 0 0 1 0 0 1
0 1 1 0 1 1 0 1 0 0 1 0
1 0 1 1 0 1 1 0 0 1 0 0
1 1 0 1 1 0 1 1 0 1 1 1

Chapter 1 <87>
Multiple-Input Logic Gates
NOR3 AND3
A A
B Y B
C
Y
C
Y = A+B+C Y = ABC

A B C Y A B C Y
0 0 0 0 0 0
0 0 1 0 0 1
0 1 0 0 1 0
0 1 1 0 1 1
1 0 0 1 0 0
1 0 1 1 0 1
1 1 0 1 1 0
1 1 1 1 1 1

Chapter 1 <88>
Multiple-Input XOR
XOR3
A
B Y
C
Y = A⊕B⊕C

A B C Y • Multi-input XOR: Odd

0 0 0 0 parity – the output is 1
0 0 1 1
0 1 0 1 when an odd number of
0 1 1 0 inputs is 1.
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1

Chapter 1 <89>
 Logic Levels
• Discrete voltages represent 1 and 0
• For example:
– 0 = ground (GND) or 0 volts
– 1 = VDD or 5 volts
• What about 4.99 volts? Is that a 0 or a 1?
• What about 3.2 volts?

Chapter 1 <90>
 Logic Levels
• Range of voltages for 1 and 0
• Different ranges for inputs and outputs to
allow for noise

Chapter 1 <91>
What is Noise?

Chapter 1 <92>
 What is Noise?
• Anything that degrades the signal
– E.g., resistance, power supply noise, coupling
to neighboring wires, etc.
• Example: a gate (driver) outputs 5 V but,
because of resistance in a long wire,
receiver gets 4.5 V
Noise
Driver Receiver

5V 4.5 V

Chapter 1 <93>
 The Static Discipline
• With logically valid inputs, every circuit
element must produce logically valid
outputs

• Use limited ranges of voltages to

represent discrete values

Chapter 1 <94>
Logic Levels
Driver Receiver

Output Characteristics Input Characteristics

VDD
Logic High
Output Range Logic High
VO H Input Range
NMH
Forbidden VIH
Zone VIL
VO L NML
Logic Low
Logic Low Input Range
Output Range
GND

Chapter 1 <95>
 Noise Margins
Driver Receiver

Output Characteristics Input Characteristics

VDD
Logic High
Output Range Logic High
VO H Input Range
NMH
Forbidden VIH
Zone VIL
VO L NML
Logic Low
Logic Low Input Range
Output Range
GND

NMH = VOH – VIH

NML = VIL – VOL
Chapter 1 <96>
 DC Transfer Characteristics
Ideal Buffer: Real Buffer:
V(Y) V(Y)
A Y

VOH VDD VDD

VOH

Unity Gain
Points
VOL Slope = 1

VOL 0 V(A) V(A)

0
VDD / 2 VDD VIL VIH VDD
VIL, VIH

NMH = NML = VDD/2 NMH , NML < VDD/2

Chapter 1 <97>
 DC Transfer Characteristics
A Y

V(Y)
Output Characteristics Input Characteristics
VDD VDD
VOH
VO H
NMH
Forbidden VIH
Zone VIL

Unity Gain NML

Points VO L
VOL Slope = 1

V(A)
0
VIL VIH VDD GND

Chapter 1 <98>
 VDD Scaling
• In 1970’s and 1980’s, VDD = 5 V
• VDD has dropped
– Avoid frying tiny transistors
– Save power
• 3.3 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V, 1.0 V, …
• Be careful connecting chips with
different supply voltages
Chips operate because they contain magic
smoke.
Proof: if the magic smoke is let out, the chip
stops working
Chapter 1 <99>
Logic Family Examples

Logic Family VDD VIL VIH VOL VOH

TTL 5 (4.75 - 5.25) 0.8 2.0 0.4 2.4

CMOS 5 (4.5 - 6) 1.35 3.15 0.33 3.84

LVTTL 3.3 (3 - 3.6) 0.8 2.0 0.4 2.4

LVCMOS 3.3 (3 - 3.6) 0.9 1.8 0.36 2.7

Chapter 1 <100>
 Transistors
• Logic gates built from transistors
• 3-ported voltage-controlled switch
– 2 ports connected depending on voltage of 3rd
– d and s are connected (ON) when g is 1

g=0 g=1
d d d

g OFF ON
s s s

Chapter 1 <101>
Robert Noyce, 1927-1990
• Nicknamed “Mayor of Silicon
Valley”
• Cofounded Fairchild
Semiconductor in 1957
• Cofounded Intel in 1968
• Co-invented the integrated
circuit

Chapter 1 <102>
 Silicon
• Transistors built from silicon, a semiconductor
• Pure silicon is a poor conductor (no free charges)
• Doped silicon is a good conductor (free charges)
– n-type (free negative charges, electrons)
– p-type (free positive charges, holes)
Free electron Free hole

Si Si Si Si Si Si Si Si Si
- +

+ -
Si Si Si Si As Si Si B Si

Si Si Si Si Si Si Si Si Si

Silicon Lattice n-Type p-Type

Chapter 1 <103>
 MOS Transistors
• Metal oxide silicon (MOS) transistors:
– Polysilicon (used to be metal) gate
– Oxide (silicon dioxide) insulator
– Doped silicon source gate drain
Polysilicon
SiO2

n n

p substrate

gate

source drain

nMOS

Chapter 1 <104>
 Transistors: nMOS
Gate = 0 Gate = 1
OFF (no connection ON (channel between
between source and source and drain)
drain)
source drain source gate drain
gate VDD
GND

+++++++
-------
n n n n
channel
p substrate p substrate

GND GND

Chapter 1 <105>
 Transistors: pMOS
• pMOS transistor is opposite
– ON when Gate = 0
– OFF when Gate = 1

source gate drain

Polysilicon
SiO2

p p

n
substrate

gate

source drain

Chapter 1 <106>
Transistor Function

g=0 g=1

d d d
nMOS g OFF
ON
s s s

s s s

pMOS g OFF
ON
d d d

Chapter 1 <107>
Transistor Function
• nMOS: pass good 0’s, so connect source to
GND
• pMOS: pass good 1’s, so connect source to
VDD
pMOS
pull-up
network
inputs
output

nMOS
pull-down
network

Chapter 1 <108>
CMOS Gates: NOT Gate
NOT VDD
A Y
P1
Y=A A Y
N1
A Y
0 1
1 0
GND

A P1 N1 Y
0
1

Chapter 1 <109>
CMOS Gates: NOT Gate
NOT VDD
A Y
P1
Y=A A Y
N1
A Y
0 1
GND
1 0

A P1 N1 Y
0 ON OFF 1
1 OFF ON 0

Chapter 1 <110>
CMOS Gates: NAND Gate
NAND
A
Y
B P2 P1
Y
Y = AB
A N1
A B Y
0 0 1 B N2
0 1 1
1 0 1
1 1 0

A B P1 P2 N1 N2 Y
0 0
0 1
1 0
1 1
Chapter 1 <111>
CMOS Gates: NAND Gate
NAND
A
Y
B P2 P1
Y
Y = AB
A N1
A B Y
0 0 1 B N2
0 1 1
1 0 1
1 1 0

A B P1 P2 N1 N2 Y
0 0 ON ON OFF OFF 1
0 1 ON OFF OFF ON 1
1 0 OFF ON ON OFF 1
1 1 OFF OFF ON ON 0
Chapter 1 <112>
CMOS Gate Structure

pMOS
pull-up
network
inputs
output

nMOS
pull-down
network

Chapter 1 <113>
 NOR Gate
How do you build a three-input NOR gate?

Chapter 1 <114>
NOR3 Gate

A
B
C
Y

Chapter 1 <115>
 Other CMOS Gates
How do you build a two-input AND gate?

Chapter 1 <116>
AND2 Gate

A
Y
B
• CMOS is better at
P2 P1 P3 building inverting
Y gates (i.e., NAND,
NOR, etc.)
A N1 N3
B N2 • They require fewer
transistors

Chapter 1 <117>
 Transmission Gates
• nMOS pass 1’s poorly
EN
• pMOS pass 0’s poorly
• Transmission gate is a better switch A B
– passes both 0 and 1 well
EN
• When EN = 1, the switch is ON:
– EN = 0 and A is connected to B
• When EN = 0, the switch is OFF:
– A is not connected to B

Chapter 1 <118>
 Pseudo-nMOS Gates
• Replace pull-up network with weak pMOS
transistor that is always on
• pMOS transistor: pulls output HIGH only
when nMOS network not pulling it LOW
weak

Y
inputs nMOS
pull-down
network

Chapter 1 <119>
 Pseudo-nMOS Example
Pseudo-nMOS NOR4

weak

Y
A B C D

Chapter 1 <120>
Gordon Moore, 1929-
• Cofounded Intel in
1968 with Robert
Noyce.
• Moore’s Law: number
of transistors on a
computer chip
doubles every year
(observed in 1965)
• Since 1975, transistor
counts have doubled
every two years.
Chapter 1 <121>
 Moore’s Law

• “If the automobile had followed the same development cycle as the
computer, a Rolls-Royce would today cost $100, get one million
miles to the gallon, and explode once a year . . .”
– Robert Cringley
Chapter 1 <122>
 Power Consumption

• Power = Energy consumed per unit time

– Dynamic power consumption
– Static power consumption

Chapter 1 <123>
Dynamic Power Consumption
• Power to charge transistor gate
capacitances
– Energy required to charge a capacitance, C, to
VDD is CVDD2
– Circuit running at frequency f: transistors
switch (from 1 to 0 or vice versa) at that
frequency
– Capacitor is charged f/2 times per second
(discharging from 1 to 0 is free)
• Dynamic power consumption:
Pdynamic = ½CVDD2f
Chapter 1 <124>
 Static Power Consumption
• Power consumed when no gates are
switching
• Caused by the quiescent supply current, IDD
(also called the leakage current)
• Static power consumption:
Pstatic = IDDVDD

Chapter 1 <125>
 Total Power Consumption
• Dynamic power + static power
Ptotal = Pstatic + Pdynamic

Chapter 1 <126>
 Power Consumption Example
• Estimate the power consumption of a
wireless handheld computer
– VDD = 1.2 V
– C = 20 nF
– f = 1 GHz
– IDD = 20 mA

Chapter 1 <127>
 Power Consumption Example
• Estimate the power consumption of a
wireless handheld computer
– VDD = 1.2 V
– C = 20 nF
– f = 1 GHz
– IDD = 20 mA

P = ½CVDD2f + IDDVDD
= ½(20 nF)(1.2 V)2(1 GHz) +
(20 mA)(1.2 V)
= (14.4 + 0.024) W ≈ 14.4 W
Chapter 1 <128>