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BANNARI AMMAN INSTITUTE OF

TECHNOLOGY

18CS502 COMPUTER ARCHITECTURE


Class: III CSE

Academic Year:2022-2023 (Odd Sem)


Module 2: ARITHMETIC OPERATIONS
Course handling faculty: Dr.Venkateshkumar U

Department of ECE
18CS502 COMPUTER ARCHITECTURE 2

COURSE OUTCOME
• CO1 Identify the basic structure of a digital computer and instruction
sets with addressing modes.

• CO2 Comprehend the arithmetic operations of binary number system.

• CO3 Recognize the organization of the basic processing unit and

examine the basic concepts of pipelining .

• CO4 Explicate the standard I/O interfaces and peripheral devices.

• CO5 Determine the standard I/0 interfaces and peripheral devices

Department of ECE
18CS502 COMPUTER ARCHITECTURE 3

Module contents
Structure of Computers: Addition and subtraction of signed numbers-
Design of fast adders- Multiplication of positive numbers-

Signed operand multiplication and fast multiplication-Integer division.

Module I Department of ECE


18CS502 COMPUTER ARCHITECTURE 4

FAST MULTIPLIER
• Methods
• 1. Bit pair recoding of Multipliers.
• 2. Carry-save addition of summands
Bit pair recoding of Multipliers.
• Consider the Multiplier 111010
• Add imaginary zero to the RIGHT of LSB
• Group into three bits
• Refer the truth table
• Identify the Multiplicand
• Append the previous group MSB to the next Group of three
bits.
• Refer the Truth table
• Identify the Multiplicand.

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Department of ECE
18CS502 COMPUTER ARCHITECTURE 6

FAST MULTIPLIER – Bit pair recoding

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FAST MULTIPLIER – Bit pair recoding


• Example : 13 x (-6)
• 13 – Multiplicand (M)
• (-6) – Multiplier (Q)

• Binary equivalent of 13 – 1101


• Binary equivalent of (-6) – 1110 (2’s complement)

• Find the bit pair recoding for the multiplier (-6) using the
truth table given in previous slide.? (Ans : slide no:5)

Department of ECE
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Department of ECE
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FAST MULTIPLIER – Bit pair recoding


• Step 1
• Multiply with -2
• Take 2’s complement of Multiplicand and multiply with -2

• So 10011 x 10
• Since -2, sign extension is 1
• Summand should be shifted two positions
• Step 2
• Multiply with -1
• Take 2’s complement of Multiplicand and multiply with -1
• So 10011 x 01

Department of ECE
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18CS502 COMPUTER ARCHITECTURE 11

Carry save addition method


• From the above example identify the summands and
show the schematic representation of the carry-save
addition operation.

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18CS502 COMPUTER ARCHITECTURE 12

DIVISION
• Two methods
• Restoring division
• Nonrestoring division

• Restoring Division
• Accumulator value will be restored to the previous value.

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18CS502 COMPUTER ARCHITECTURE 13

Division

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18CS502 COMPUTER ARCHITECTURE 14

Restoring division

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18CS502 COMPUTER ARCHITECTURE 15

Restoring division

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18CS502 COMPUTER ARCHITECTURE 16

Non restoring division

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18CS502 COMPUTER ARCHITECTURE 17

Non restoring method


• Using the non-restoring method algorithm given in
previous slide, divide 8 ÷ 2.

• Ans : next slide.

Department of ECE
18CS502 COMPUTER ARCHITECTURE 18

Non restoring division

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Module I Back Department of ECE

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