Backchannel Modeling and Simulation Using

Recent Enhancements to the IBIS Standard

By Ken Willis, Product Engineering Architect; Ambrish Varma, Senior Principal Software Engineer;
Dr. Kumar Keshavan, Senior Software Architect; Cadence

Recent enhancements to the upcoming IBIS standard now support backchannel training, enabling IBIS-
AMI models to emulate this real-world SerDes behavior. AMI modelers now can incorporate backchannel
algorithms into their IBIS-AMI models, automating the optimization of transmitter and receiver equalization
settings in the same manner as their actual SerDes hardware devices. This saves system designers significant
time by avoiding a multitude of computationally intensive sweeping to determine optimum equalization
settings for their link, while at the same time yielding more realistic and higher quality results that are more
consistent with the hardware they seek to model.

Contents
Backchannel Basics.............................1
How Backchannel
Simulations Work...............................3
Simulation Testbench Setup...............6
Conclusion.......................................13
References........................................13
Backchannel Basics
Backchannel capability, also called “link training” in the context of serial
links, is the ability of the serial link receiver (RX) to automatically tune the
equalization settings of the serial link transmitter (TX) to optimize signal
integrity (SI) and bit error rate (BER). This capability exists in popular serial
link standards such as InfiniBand, Fibre Channel, SAS, 10GBASE-KR, and PCI
Express® Gen 3 and 4 [1], [2]. Backchannel training enables the equalization
settings of the RX and TX to be optimized in combination. This produces better
BER margins than just the TX or RX being optimized individually, which is
critical as margins tighten up at higher data rates. This also enables simulation
to better mimic the behavior of the actual hardware, and enables engineers to
make better design decisions based on their simulation results.

In hardware, the TX and RX enter a training mode in which the TX is open to

suggestion from the RX as to how to adjust its feed forward equalization (FFE)
settings.
IN -1 -1
Z Z

W0 W1
OUT
+

Figure 1: Feed-forward equalization

 Backchannel Modeling and Simulation Using Recent Enhancements to the IBIS Standard

FFE is configured with several “taps”, or boost drivers, that help to emphasize the high frequency (or de-emphasize
the low frequency) aspects of the transmitted signal. These taps have coefficients to control their drive strength,
and these coefficients have practical limits that must be observed.

During backchannel training, the TX sends a test pattern to the RX. The RX then evaluates the signal quality of
the transmitted signals, and communicates back through the physical channel (i.e., backchannel) to the TX, telling
it how to adjust its FFE settings. The settings are adjusted, a new pattern sent to the RX for evaluation, and the
process continues until either the RX is satisfied with the signal quality, or the time or cycle limit is reached for the
training process. When the TX FFE settings are locked in, then the actual data transmission occurs. This process is
illustrated in the figure below.

Start

Tx Sends
Tx Adjusts EQ
Test Pattern

Rx Evaluates
End Test Pattern

Standard Serial Training Phase Rx Recommends

SI OK?
Link SI Flow Complete Yes No EQ Adjustments

Figure 2: Backchannel process

Backchannel Enhancements to the IBIS Standard

I/O buffer information specification, or IBIS(3), was ratified in 1993 to serve as a device modeling standard to
enable SI simulation. In 2007, an algorithmic modeling interface (AMI) section was added to the specification to
accommodate the equalization functionality found in modern Serializer/Deserializer (SerDes) devices, which brought
a whole new level of simulation functionality to the industry. Recently, a buffer issue resolution document (BIRD
147) (4) that adds backchannel support was approved to go into the next revision of the IBIS specification. This is
currently targeted for release in the spring of 2018. Cadence has implemented early support for this functionality
based on both internal and external customer requests.

The IBIS implementation of backchannel support is defined as a simple file interface, and consists of the addition
of five new Reserved _ Parameters to go into the .ami files of the associated IBIS-AMI models. The following
Reserved _ Parameters should be present in both TX and RX models that support backchannel training:
• BCI _ Protocol. The name of the standard protocol being used.
Both the TX and RX need to be pointing to the same protocol for link training to be enabled. A model can
support more than a single protocol. In the current version of the specification, only private protocols can be
defined. There is provision in the specification to make IBIS-approved protocols public for backchannel training
that the models may support in the future.
• BCI _ ID. The prefix to be used for the file passed between the TX and RX.
The rules for BCI _ ID and associated files are protocol-dependent and described in the BCI _ Protocol. The
private protocol used for this study requires that the TX and RX read and write the same file with the BCI _ ID
of cdns _ bci.
• BCI _ State. The state of the model.
The acceptable parameter values are off, training, converged, failed and error. Both the TX and RX can update
the BCI _ State parameter. The EDA tool can terminate training and continue with the traditional channel
simulation if the BCI _ State is converged.

The receiver AMI model requires two additional parameters to support backchannel:
• BCI _ Message _ Interval _ UI. Suggested AMI _ GetWave block size to use for waveform passing between
the TX and RX AMI models.
• BCI _ Training _ UI. Maximum number of UIs to evaluate for backchannel training. The EDA tool uses this
parameter value to terminate link training if both the models have not come to a mutual state of convergence.
This is important to limit any runaway routines or infinite loops during training.
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 Backchannel Modeling and Simulation Using Recent Enhancements to the IBIS Standard

The IBIS-AMI models for both the TX and the RX must contain the associated AMI Reserved _ Parameters to
be backchannel-capable.

How Backchannel Simulations Work

For backchannel training to be enabled in an IBIS-compliant channel simulator, a few simple prerequisites must be
met:
• Both the TX and RX have IBIS-AMI models assigned
• In those IBIS-AMI models, both TX and RX models have the BCI _ State set for Training
• Both TX and RX models have identical BCI _ Protocol settings

When the above conditions are in place, backchannel training is enabled, allowing the TX FFE settings to be tuned
and set. When training is complete, channel simulation runs with the FFE settings in place, and the data trans-
mission is simulated.

The sections below describe the sequence of events in a five-step process that occurs at simulation time when
a backchannel is initiated, using the PCI Express Gen 4 model that Cadence developed with the new IBIS-based
backchannel capability as an example. To enable an IBIS-AMI model with backchannel training capability, code
modifications are required to perform each of these five steps.

1. The transmitter initiates the process

With backchannel enabled, the TX sends a pattern of 1s and 0s to the receiver through the defined channel as a
test pattern. This test pattern can be pre-defined by the BCI _ Protocol or can be run with any PRBS stimulus
pattern set up in the simulation tool. In the models used for this study, the TX accepts the PRBS pattern generated
by the simulation tool (Cadence ® Sigrity™ SystemSI™ technology) and does not require any specific pattern for link
training.

Next, the TX communicates to the RX what its capabilities are. This is done through a file interface. The TX writes
out this file initially, using the BCI _ ID prefix defined in both AMI models. This file is read by the RX model to
find out the status of the TX taps. The RX model opens the file because both models support the same BCI _
Protocol and the protocol determines the rules for reading and writing the file and its contents.

Following is an example of the initial BCI file written out by the Cadence TX AMI model:
(amitx
(tapincdec
(-1 0)
(0 0 )
(1 0 )))

This simple two-column format is set up with number pairs in each line for <tap _ id><tap _ state>, which
indicates the following:

Tap Number What it Means

tap _ id –1 Precursor tap
tap _ id 0 Main tap
tap _ id 1 Post-cursor post tap
tap _ state 0 the tap is open for adjustment
tap _ state 1 the tap is at its maximum limit
tap _ state –1 the tap is at its minimum limit
Table 1: tap_id and tap_state

The TX writes out a text file that tells the RX how many taps it has, the tap configuration (i.e., how many pre-cursor
and post-cursor taps exist), and whether they are open for adjustment up or down in strength. In the example file
shown above, all three taps are open for adjustment in either direction.

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 Backchannel Modeling and Simulation Using Recent Enhancements to the IBIS Standard

The rules for tap adjustment must be documented with the TX AMI model as the RX model needs to know the
limits of the TX model. (In this case, as both the TX and RX models were Cadence AMI models, this was not a
concern.)

2. The receiver evaluates the waveforms

The receiver then evaluates the signal quality of the waveforms it receives. There is no pre-defined method to
do this; the RX AMI model is simply a black box. It accepts the received waveforms, applies its AMI equalization
functionality, outputs those equalized waveforms, and then evaluates the resulting signal quality using its own
algorithm, however it is defined.

One example algorithm that SerDes receivers may apply is based on error sampling (figure 3). The receiver may
monitor the median of the voltage distribution of the eye density, and can measure the delta between where the
actual waveform voltages fall at the sampling point vs. the median value. That delta is considered the “error” value,
and can be either positive, meaning above the median value, or negative, meaning it falls below the median value.

Figure 3: Signal quality evaluation by the receiver

The error sampling algorithm in the DFE corrects the post-cursor taps only in the RX, but the sampler has enough
information from previous samples about the contribution to the overall error from the pre-cursor taps as well. It
then uses this information to decide which direction the correction needs to be done, and conveys this information
to the TX. This correction must be averaged over a period of time to provide stability and reduce dithering in the
tap values.

A typical sampler algorithm is based on the following equation:

UP_DN n = ƒn ( ε0 ,S n )

Where

UP_DNn is the up- or down-correction for the nth tap;

ε0 is the error at the current location based on the median of the desired distribution (b0 in the figure above);
Sn is the state of the nth tap (e.g.,–1 or 1 for NRZ).

For a simple implementation of the function, the possible values of UP_DN are –1, 0 and 1, indicating to the TX to
decrease, keep constant, or increase the nth tap value.

This is just one method of determining the signal quality of the waveform processed by the RX. For backchannel
training, each RX must analyze the waveform and determine whether the TX taps should be modified further to
improve the quality of the signal.

3. The receiver requests TX FFE adjustments

Based on the evaluation and knowing the current state of the TX’s FFE settings, the RX then writes out the
adjustments it wants the TX to make to its FFE settings for the next training transaction. In the models used for this
study, the RX model does this by overwriting the same file it originally got from the TX, with a slightly different
meaning for the second column.

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 Backchannel Modeling and Simulation Using Recent Enhancements to the IBIS Standard

Here is an example of the initial BCI file written out by the Cadence RX AMI model:
(amirx
(tapincdec
(-1 1)
(0 0 )
(1 -1 )))

Again, a simple two-column format is set up with number pairs in each line for
<tap _ id><tap _ equalization _ directive>, which indicates the following:

Tap Number What it Means

tap_id –1 Precursor tap
tap_id 0 Main tap
tap_id 1 Post-cursor post tap
tap_equalization_directive 0 Make no adjustment
tap_equalization_directive 1 Increase equalization
tap_equalization_directive –1 Decrease equalization
Table 2: tap_id and tap_equalization_directive

The RX overwrites the original BCI file, indicating what FFE adjustments it wants the TX to make. Because both
the TX and RX support the same BCI _ Protocol, the RX understands how much the TX tap values will go up or
down when it requests a change in equalization.

4. The transmitter adjusts and re-transmits

The TX reads the newly-written BCI file, adjusts its FFE tap settings, and sends a new pattern for evaluation by the RX.

5. Backchannel Training Completes

This overall process described above occurs multiple times until one of two things happen:
• The RX writes out a BCI file that indicates no further adjustments are needed (i.e., all tap _ equalization _
directives in the BCI file are written out as 0) and changes the Reserved _ Parameter BCI _ State to
converged.
• The BCI _ Training _ UI limit is reached

In either case, when one of the two conditions above are met, backchannel training terminates, the FFE settings in
the TX are locked down, and the full channel simulation is run by the simulation tool.

Backchannel Simulation Example

To study the impact of backchannel training on signal quality, the following testbench was constructed (figure 4).

AMI AMI no BC

PCIe Gen 4 Single Channel Topology

AMI AMI BC

TX_Primary TP1 Channel TP2 RX_Primary

Figure 4: Simulation testbench

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 Backchannel Modeling and Simulation Using Recent Enhancements to the IBIS Standard

Simulation Testbench Setup

The channel block was populated with a family of scattering parameters, or S-parameters, ranging in physical
length from 2 to 40 inches, and representing insertion losses of –1.4dB to –21.7dB at 8GHz, which is the Nyquist
frequency for PCI Express Gen4 data rates of 16Gbps. These S-parameters are plotted in the figure below.

Figure 5: Channel S-parameters

Two sets of IBIS-AMI models are included in the testbench. They are identical; they contain the same spec-level
PCI-Express Gen 4 functionality. The one difference is that one set is enabled with IBIS-based backchannel
functionality, while the other is not.

Shown below are the step responses for the channel models in the topology.

Figure 6: Channel step responses

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 Backchannel Modeling and Simulation Using Recent Enhancements to the IBIS Standard

The associated impulse responses are also shown in the figure below.

Figure 7: Channel impulse responses

As can be observed from the previous plots, the shorter channels exhibit significant reflection behavior, while the
longer channels are almost entirely dominated by loss, and the magnitude of the reflections are largely attenuated
by the time they reach the receiver.

Sweep Results

Two sets of channel model sweeps were set up for the testbench. Both sets of sweeps had adaptive, 2-tap decision
feedback equalization (DFE) at the receiver. For the first set of sweeps, the TX FFE was allowed to self-optimize its
tap coefficients based on the impulse response of the channel. This employs a least mean square (LMS) algorithm
to calculate the optimum tap coefficients to open up the eye for the given channel. This is done strictly from the
standpoint of the TX, without any knowledge of the RX equalization functionality. This produced the following
results:

Figure 8: Sweep results, no backchannel

For the second set of sweeps, backchannel is enabled. Rather than having the TX self-optimize its coefficients
without any knowledge of the receiver, the RX is allowed to evaluate the training patterns sent through the
channel by the TX, and direct the TX to make adjustments to its equalization.

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 Backchannel Modeling and Simulation Using Recent Enhancements to the IBIS Standard

Figure 9: Sweep results, with backchannel enabled

The results with backchannel enabled were universally better than without across the metrics of eye height, jitter,
and normalized jitter and noise (NJN). NJN is a signal quality metric defined as the normalized jitter and noise, and
is computed by dividing the noise and jitter regions within one unit interval (UI) by the total eye area (figure 10).

Figure 10: NJN

The plots below (figures 11-12) show the percentage improvement of the three metrics (eye height and width, NJN)
across the spectrum of channel insertion loss.

NJN Improvement vs. Insertion Loss

45
40
35
% Improvement

30
25
20
15
10
5

0 5 10 15 20 25
IL (dB)
Eye height improvement with backchannel enabled
Eye width improvement with backchannel enabled

Figure 11: Eye height and width improvement vs. insertion loss

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 Backchannel Modeling and Simulation Using Recent Enhancements to the IBIS Standard

NJN Improvement vs. Insertion Loss

4.5
4.0
3.5

% Improvement
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0 5 10 15 20 25
IL (dB)
Figure 12: NJN improvement vs. insertion loss

The improvement is substantial; all metrics improved for each case. To give a “composite” picture of the
improvement, the percentage of improvement for each metric were averaged together for each case. That plot is
shown below.
Composite Improvement vs. Insertion Loss
18.0
16.0
14.0
% Improvement

12.0
10.0
8.0
6.0
4.0
2.0

0 5 10 15 20 25
IL (dB)
Figure 14: Composite improvement vs. insertion loss

The general trend looks to be that improvement from backchannel seems to increase as the channels get more
lossy and less reflective, up to the point at which the equalization starts to reach its limits in compensating for the
loss. This makes some intuitive sense, as equalization is designed to compensate for channel loss, and is generally
less effective in counteracting reflection.

FFE Adaptation
To understand more about the effect of backchannel training, we will examine one of these cases more closely.
Looking at the 31-inch channel, we saw eye height improvement of 39%, jitter improvement of 9%, and NJN
improvement of 4%.

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 Backchannel Modeling and Simulation Using Recent Enhancements to the IBIS Standard

Figure 15: Eye contours for 31” channel, with (blue) and without (red) backchannel

In both the self-optimized and backchannel cases, the FFE tap coefficients for this case began at the same values.
But while the “non-backchannel” case kept those coefficients throughout the channel simulation, they changed
significantly when backchannel training was enabled. These FFE tap coefficients are plotted below. Note that the
pre- and post-cursor FFE tap coefficients are actually negative values, but are plotted here as absolute values to
facilitate comparisons in the plot.

FFE Tap Adaption

0.9
0.8
0.7
0.6
Tap Coefficient

0.5
0.4
0.3
0.2
0.1

0 2.00 4.00 6.00 8.00 10.00

Time (usec)
Pre (abs) Main (abs) Post (abs)

Figure 16: Adapted FFE tap coefficients

The magnitude of coefficients for both the pre- and post-cursor FFE taps decreased by about 34% and 13%
respectively, meaning that the FFE was essentially “turned down” during the backchannel training process, leaving
more of the equalization work to the RX and its DFE functionality.

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 Backchannel Modeling and Simulation Using Recent Enhancements to the IBIS Standard

DFE Adaptation
The DFE coefficients were plotted out for the same 31-inch channel case, with backchannel both off and on.
Below is the result with backchannel turned off.

Figure 17: DFE adaptation, with backchannel off; Tap 1 is blue and tap 2 is green

Below is the plot of the DFE adaptation with backchannel enabled.

Figure 18: DFE adaptation with backchannel on; Tap 1 is blue and tap 2 is green

Note how with backchannel training enabled in Figure 17, the first DFE tap coefficient starts out low, increases to a
higher level, then drops down to a lower level. This is an interesting behavior; initially the FFE post-cursor tap was
actually over-equalizing the signal, and the first DFE tap was trying to compensate for it. Once it communicated to
the FFE to turn down its post-cursor equalization, this DFE tap stabilized at a lower level. This contrasts with
Figure 18, where the DFE tap goes high and stays high, fighting the FFE post-cursor over-equalization throughout
the simulation.

The final DFE coefficients reported for both cases are shown below.

Case DFE tap 1 DFE tap 2

31” channel, BC off 0.0125 0.015
31” channel, BC on 0.0025 0.0175
% difference -80.0 16.7
Table 2: Final DFE coefficients with backchannel on and off

For this case, while the FFE was turned down slightly, the first DFE tap was turned down significantly, and the
second DFE tap was increased by almost 17%.

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 Backchannel Modeling and Simulation Using Recent Enhancements to the IBIS Standard

Pre- and Post-Cursor Roles Regarding ISI

The fundamental goal of equalization such as FFE and DFE is to help cancel inter-symbol interference, or ISI. The
transmitter’s FFE has the ability to cancel both pre- and post-cursor ISI, while the receiver’s DFE, quite powerful
with its adaptive capability, is limited to addressing post-cursor ISI. With this in mind, it was interesting to look at
what would happen if we focused the FFE exclusively on pre-cursor ISI, and left all of the post-cursor ISI to the DFE.
To enable this, the FFE was configured to enable only its pre-cursor tap, and the simulation for the 31-inch channel
was re-run with backchannel enabled, allowing the RX to direct the pre-cursor setting of the TX. This improved the
result even further than the original backchannel-enabled simulation, as shown below.

Figure 19: Eye opening improvement with FFE focused on pre-cursor tap

Eye height improved from 82mV to 95mV, eye jitter improved from 0.37 to 0.31UI, and NJN improved from 0.82 to
0.81. The pre-cursor FFE tap adaptation from this simulation is plotted below.

FFE Tap Adaption

0.2
0.18
0.16
0.14
0.12
Tap Coeffcient

0.1
0.08
0.06
0.04
0.02
0
0.00 2.00 4.00 6.00 8.00 10.00 12.00

Time (usec)
Figure 20: “Pre-cursor only” FFE tap adaptation

In this case, the pre-cursor FFE tap adapted to a value of –0.13, as opposed to the value of –0.094 that occurred
when both pre- and post-cursor taps were enabled. So the FFE is doing more pre-cursor equalization work than
before. Figure 21 shows the plot of the DFE adaptation for this case.

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 Backchannel Modeling and Simulation Using Recent Enhancements to the IBIS Standard

Figure 21: “Pre-cursor only” DFE adaptation

The first DFE tap adapted to a higher value of between 25mv and 30mV, about an order of magnitude higher
than with the FFE post-cursor tap being actively used. This shows how the DFE is doing significantly more of the
post-cursor equalization work. The second DFE tap then stabilizes at a lower value than before, around 12.5mV, vs.
approximately 16mV in the previous case, a decrease of about 28%. This shows that equalization is doing a better
job, and the second DFE tap essentially has less work to do. Having the FFE focus exclusively on the pre-cursor ISI
and having the DFE do all the post-cursor equalization produced the best overall results in this case.

Conclusion
This paper provided an overview of backchannel training functionality in modern high-speed serial link interfaces,
and the recent enhancements to the IBIS specification that enable backchannel capability to be incorporated
into channel simulations using IBIS-AMI models. Multiple simulation results were presented that incorporated
backchannel training, all of which showed significant improvement over cases where the transmitter self-optimized
its equalization settings, absent of communication with the receiver. The roles of pre- and post-cursor equalization
by feed forward and decision feedback equalizers were explored. Guidance on how to utilize the new IBIS
functionality to incorporate backchannel training into IBIS-AMI models was also provided, to enable more accurate
representation of the behavior of SerDes devices that have backchannel capability.

References
1. Mohammad S. Mobin et al., TX back channel adaptation algorithm and protocol emulation with application to
PCIe, SAS, FC, and 10GBASE-KR, DesignCon 2012.

2. PCI Express Base Specification Revision 4.0 Version 1.0 September 27, 2017.

3. http://ibis.org/ver6.1/

4. http://ibis.org/birds/bird147.6.docx

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