Preface

Notebook Computer

C4800/C4801/C4805/C4801M

Service Manual

Preface
I
 Preface

Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.

This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.

Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Preface

Version 1.0
January 2010

Trademarks
Intel, and Intel Core are trademarks/registered trademarks of Intel Corporation.
Other brand and product names are trademarks and./or registered trademarks of their respective companies.

II
 Preface

About this Manual

This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.

It is organized to allow you to look up basic information for servicing and/or upgrading components of the C4800/C4801/
C4805/C4801M series notebook PC.

The following information is included:

Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.

Appendix A, Part Lists

Preface
Appendix B, Schematic Diagrams

III
 Preface

IMPORTANT SAFETY INSTRUCTIONS

Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:

1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit (Full Range AC/DC Adapter - AC Input 100 - 240V,
50 - 60Hz/ DC Output 19V, 3.42A or 18.5V, 3.5A (65W) minimum).
Preface

CAUTION
Always disconnect all telephone lines from the wall outlet before servicing or disassembling this equipment.

TO REDUCE THE RISK OF FIRE, USE ONLY NO. 26 AWG OR LARGER,

TELECOMMUNICATION LINE CORD

This Computer’s Optical Device is a Laser Class I Product

IV
 Preface

Instructions for Care and Operation

The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:

1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer Do not place it on an unstable Do not place anything heavy
to any shock or vibration. surface. on the computer.

2. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive Do not leave it in a place Don’t use or store the com- Do not place the computer on

Preface
heat or direct sunlight. where foreign matter or mois- puter in a humid environment. any surface which will block
ture may affect the system. the vents.

3. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power Do not turn off any peripheral Do not disassemble the com- Perform routine maintenance
until you properly shut down devices when the computer is puter by yourself. on your computer.
all programs. on.

V
 Preface

4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
5. Take care when using peripheral devices.

Use only approved brands of Unplug the power cord before

peripherals. attaching peripheral devices.

Power Safety
Preface

The computer has specific power requirements:

• Only use a power adapter approved for use with this computer.
• Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
 unsure of your local power specifications, consult your service representative or local power company.
Power Safety • The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
Warning not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
Before you undertake • When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
any upgrade proce- • Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
dures, make sure that • Before cleaning the computer, make sure it is disconnected from any external power supplies (i.e. AC/DC adapter or car
you have turned off the adapter).
power, and discon-
nected all peripherals
and cables (including Do not plug in the power Do not use the power cord if Do not place heavy objects
telephone lines). It is cord if you are wet. it is broken. on the power cord.
advisable to also re-
move your battery in
order to prevent acci-
dentally turning the
machine on.

VI
 Preface

Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.

Battery Guidelines
The following can also apply to any backup batteries you may have.

Preface
• If you do not use the battery for an extended period, then remove the battery from the computer for storage.
• Before removing the battery for storage charge it to 60% - 70%.
• Check stored batteries at least every 3 months and charge them to 60% - 70%.


Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under var-
ious state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste
officials for details in your area for recycling options or proper disposal.

Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer.
Discard used battery according to the manufacturer’s instructions.

Battery Level
Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10%
will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.

VII
 Preface
Preface

VIII

Contents
Introduction ..............................................1-1
Overview .........................................................................................1-1
Specifications ..................................................................................1-2
External Locator - Front View with LCD Panel Open ....................1-4
External Locator - Front and Rear View .........................................1-5
External Locator - Left & Right Side View ...................................1-6
External Locator - Bottom View .....................................................1-7
Mainboard Overview - Top (Key Parts) .........................................1-8
Mainboard Overview - Bottom (Key Parts) ....................................1-9
Mainboard Overview - Top (Connectors) .....................................1-10
Mainboard Overview - Bottom (Connectors) ...............................1-11
Disassembly ...............................................2-1
Overview .........................................................................................2-1
Maintenance Tools ..........................................................................2-2
Connections .....................................................................................2-2
Maintenance Precautions .................................................................2-3
Disassembly Steps ...........................................................................2-4
Removing the Battery ......................................................................2-5
Removing the Hard Disk Drive .......................................................2-6
Removing the Optical (CD/DVD) Device ......................................2-8
Removing the System Memory (RAM) ..........................................2-9
Removing and Installing a Processor ............................................2-10
Removing the 3G Module .............................................................2-13
Removing the Wireless LAN Module ...........................................2-14
Removing the Bluetooth Module ..................................................2-15
Removing the Modem ...................................................................2-16
Removing the LCD Back Cover ...................................................2-17
Removing the LCD Front Cover ...................................................2-19
Removing the Inverter Board ........................................................2-20
Preface
Removing the Keyboard ............................................................... 2-21
Part Lists ..................................................A-1
Part List Illustration Location ........................................................ A-2
Top (C4800/C4801) ....................................................................... A-3
Top (C4805) ................................................................................... A-4
Bottom (C4800/C4801/C4805/C4801M) ...................................... A-5
LCD (C4800/C4801) ..................................................................... A-6
LCD (C4805) ................................................................................. A-7
LCD (C4801M) ............................................................................. A-8
HDD ............................................................................................... A-9
SATA-DVD-SUPER MULTI ..................................................... A-10
Schematic Diagrams................................. B-1
Preface
SYSTEM BLOCK DIAGRAM ......................................................B-2
Penryn 1/2 .......................................................................................B-3
Penryn 2/2 .......................................................................................B-4
SiS672_HOST_PCIE 1/5 ................................................................B-5
SiS672_DRAM 2/5 .........................................................................B-6
SiS672_MuTITOL_VGA 3/5 .........................................................B-7
SiSM672 PWR 4/5 .........................................................................B-8
SiSM672_5/5 ..................................................................................B-9
DRII SO-DIMM_1 .......................................................................B-10
DDRII SO-DIMM_2 ....................................................................B-11
SiS307ELV ...................................................................................B-12
PANEL, CRT ................................................................................B-13
INVERTER, BLURTOOTH, FAN ..............................................B-14
968_PCIE_IDE_MuTIOL_SPI 1/4 ..............................................B-15
968_PCIE_LAN_GPIO 2/4 ..........................................................B-16
968_USB_SATA 3/4 ....................................................................B-17
968_PWR_GND 4/4 .....................................................................B-18
IX
 Preface

CLK_GEN & CLK_BUTTER ..................................................... B-19

KBC-ITE IT8512E ....................................................................... B-20
JMC261 CAED READER/LAN .................................................. B-21
AUDIO CODEC ALC272 ........................................................... B-22
AUDIO AMP TPA6017 ............................................................... B-23
SATA HDD, POWER GOOD & SW .......................................... B-24
ODD, MDC, TP Conn, 3G ........................................................... B-25
NEW CARD, USB, MINI PCIE .................................................. B-26
LED, PC BEEP, CCD, Audio Conn ............................................. B-27
SYSTEM POWER ....................................................................... B-28
AC_IN, CHARGER ..................................................................... B-29
VCORE ........................................................................................ B-30
VDD3, VDD5 ............................................................................... B-31
1.05VS,1.2V,1.5V ........................................................................ B-32
Preface

1.8V/0.9VS ................................................................................... B-33

CLICK BOARD ........................................................................... B-34
AUDIO/ USB/ RJ11 BOARD ...................................................... B-35
POWER SWITCH & LID BOARD ............................................. B-36

X
 Introduction

1: Introduction
Overview
This manual covers the information you need to service or upgrade the C4800/C4801/C4805/C4801M series notebook
computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual.
Information about drivers (e.g. VGA & audio) is also found in User’s Manual. That manual is shipped with the computer.

Operating systems (e.g. Windows Vista/ Window 7, etc.) have their own manuals as do application software (e.g. word
processing and database programs). If you have questions about those programs, you should consult those manuals.

The C4800/C4801/C4805/C4801M series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a

1.Introduction
detailed description of the upgrade procedures for each specific component. Please note the warning and safety informa-
tion indicated by the “” symbol.

The balance of this chapter reviews the computer’s technical specifications and features.

Overview 1 - 1
 Introduction

Specifications Processor Options BIOS

Intel® Core™2 Duo Processor One 8Mb SPI Flash ROM

P8800 (2.66GHz), P8700 (2.53GHz), P8600 (2.4GHz) Phoenix™ BIOS

 3MB On-die L2 Cache & 1066MHz FSB

Latest Specification Information
The specifications listed in this here are correct
at the time of going to press. Certain items (par-
ticularly processor types/speeds) may be
changed, delayed or updated due to the manu-
facturer's release schedule. Check with your
service center for details.
1.Introduction
Security
P7550 (2.26GHz), P7450 (2.13GHz), P7350 (2.0GHz)
3MB On-die L2 Cache & 1066MHz FSB Security (Kensington® Type) Lock Slot
BIOS Password
T6600 (2.2GHz), T6500 (2.1GHz),
T6400 (2.0GHz)
Storage
2MB On-die L2 Cache & 800MHz FSB
Intel® Pentium® Processor (Factory Option) One Changeable 12.7mm(h) Optical
Device Type Drive
T4400 (2.2GHz), T4300 (2.1GHz),
(Super Multi Drive Module)
T4200 (2.0GHz)
One Changeable 2.5" 9.5 mm (h) SATA (Serial) HDD
1MB On-die L2 Cache & 800MHz FSB

Audio
 Intel® Celeron Processor
900 (2.2GHz), T3100 (1.9GHz),
CPU High Definition Audio Compliant Interface
T3300 (1.8GHz)
The CPU is not a user serviceable part. Ac- 2 * Built-In Speakers
1MB On-die L2 Cache & 800MHz FSB
cessing the CPU in any way may violate your Built-In Microphone
warranty. LCD
Keyboard
14" HD TFT LCD
“WinKey” keyboard (with embedded numeric keypad)
Core Logic
Pointing Device
SiS M672 + SiS968
Built-in Touchpad
Memory
Interface
Two 200 Pin SO-DIMM Sockets Supporting DDR2 667/
800MHz Memory Three USB 2.0 Ports
Memory Expandable up to 4GB One Headphone-Out Jack
One Microphone-In Jack
Video Adapter One RJ-45 LAN Jack
SiS M672 Integrated Video One RJ-11 Modem Jack
Shared Memory Architecture of up to 256MB One DC-in Jack
MS DirectX® 9 compatible One External Monitor Port
One ExpressCard/34 Slot

1 - 2 Specifications
 Introduction

Communication

10Mb/100Mb Ethernet LAN

56K MDC Modem - V.90 & V.92 Compliant
(Factory Option) 802.11b/g/n Wireless LAN Half Mini-Card
Module
(Factory Option) 1.3M Pixel USB PC Camera Module
(Factory Option) Bluetooth 2.1 + EDR Module
(Factory Option) 3.75G/HSPA Mini-Card Module

Card Reader

Embedded 7-in-1 Card Reader (MS/ MS Pro/ SD/ Mini SD/

MMC/ RS MMC/ MS Duo)
Note: MS Duo/ Mini SD/ RS MMC Cards require a PC
adapter

1.Introduction
Power

6 Cell Smart Lithium-Ion Battery Pack, 48.84WH

Full Range AC/DC Adapter

AC Input: 100 - 240V, 50 - 60Hz
DC Output: 19V, 3.42A or 18.5V, 3.5A (65W)

Environmental Spec

Temperature
Operating: 5°C - 35°C
Non-Operating: -20°C - 60°C
Relative Humidity
Operating: 20% - 80%
Non-Operating: 10% - 90%

Dimensions & Weight

340mm (w) * 238mm (d) * 13.9 - 31.8mm (h)

2.2 kg With 6 Cell Battery and ODD

Specifications 1 - 3
 Introduction

Figure 1 External Locator - Front View with LCD Panel Open

Front View with LCD Pan-
el Open

1. Built-In PC Camera
(Optional) 1
2. LCD
3. Power Button
4. Hot-Key Buttons
5. LED Status
Indicators
6. Keyboard 2
7. Built-In Microphone
1.Introduction

8. Touchpad &
Buttons

5 4 3

1 - 4 External Locator - Front View with LCD Panel Open

 Introduction

External Locator - Front and Rear View

Figure 2
Front View
1. LED Power
Indicators

1.Introduction
Figure 3
Rear View
1. Battery

External Locator - Front and Rear View 1 - 5

 Introduction

Figure 4 External Locator - Left & Right Side View

Left Side View
1. DC-In Jack
2. External Monitor
Port
3. RJ-45 LAN Jack 3 4 4 6
4. 2 * USB 2.0 Ports 2 5 7
5. Vent 1
6. ExpressCard/34
Slot
7. 7-in-1 Card
Reader
1.Introduction

Figure 5
Right Side View

1. Microphone-In
1 2 3 5
Jack 4 6 7
2. Headphone-Out
Jack
3. USB 2.0 Port
4. RJ-11 Modem
Jack
5. Optical Device
Drive Bay
6. Emergency Eject
Hole
7. Security Lock Slot

1 - 6 External Locator - Left & Right Side View

 Introduction

External Locator - Bottom View

Figure 6
Bottom View
1. Vent
4 5 2. Component Bay
Cover
4 3. Hard Disk Bay
Cover
1 4. Battery Release
Latch
5. Battery

1.Introduction
1
2

3 1


Overheating

To prevent your com-

puter from overheating
make sure nothing
blocks the vent/fan in-
takes while the com-
puter is in use.

External Locator - Bottom View 1 - 7

 Introduction

Figure 7 Mainboard Overview - Top (Key Parts)

Mainboard Top
Key Parts

1. Realtek RTL820ICL
2. JMB385
3. ITE IT8502E
4. ICS9LPR600
1.Introduction

1 - 8 Mainboard Overview - Top (Key Parts)

 Introduction

Mainboard Overview - Bottom (Key Parts) Figure 8

Mainboard Bottom
Key Parts

1. CPU Socket (no

CPU installed)
2. SiS 307ELV
3. SiS M672
1 Integrated Video
2 4. Mini-PCIe Socket
4 (Wireless Lan
Module)
5. Memory Slots

1.Introduction
3
DDR2 SO-DIMM
6. Realtek ALC272
7. NorthBridge
8. ICS9P935
8

Mainboard Overview - Bottom (Key Parts) 1 - 9

 Introduction

Figure 9 Mainboard Overview - Top (Connectors)

Mainboard Top
Connectors

1. USB Ports
2. ExpressCard/34
Slot
3. Microphone Cable
Connector
4. Keyboard Cable 7
Connector
5. TouchPad Cable
Connector
1.Introduction

6. Audio Cable
Connector
7. Swith Cable
Connector 1

4
3
5

2 6

1 - 10 Mainboard Overview - Top (Connectors)

 Introduction

Mainboard Overview - Bottom (Connectors) Figure 10

Mainboard Bottom
3 Connectors

1. RJ-45 Jack
5 4 2 2. DVI-Out Port
6 3. DC-In Jack
4. CCD Cable
Connector
1 5. LCD Cable
Connector
6. Battery Connector
7. ODD Connector

1.Introduction
8. HDD Connector
9. 3G Module
Connector
10. SIMLOCK
11. MDC Cable
Connector
7
12. Fan Cable
Connector
13. 7-in-1 Card Reader

11 12

9
8 10
13

Mainboard Overview - Bottom (Connectors) 1 - 11

 Introduction
1.Introduction

1 - 12 Mainboard Overview - Bottom (Connectors)

 Disassembly

2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the C4800/C4801/C4805/C4801M series notebook’s
parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated).

We suggest you completely review any procedure before you take the computer apart.

Procedures such as upgrading/replacing the RAM, CD device and hard disk are included in the User’s Manual but are
repeated here for your convenience.

2.Disassembly
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a  
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-
Information
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.

A box with a  will also provide any possible helpful information. A box with a  contains warnings.

An example of these types of boxes are shown in the sidebar. 

Warning

Overview 2 - 1
 Disassembly

NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).

Maintenance Tools
The following tools are recommended when working on the notebook PC:

• M3 Philips-head screwdriver
• M2.5 Philips-head screwdriver (magnetized)
• M2 Philips-head screwdriver
• Small flat-head screwdriver
• Pair of needle-nose pliers
• Anti-static wrist-strap
2.Disassembly

Connections
Connections within the computer are one of four types:

Locking collar sockets for ribbon connectors
Pressure sockets for multi-wire connectors
Pressure sockets for ribbon connectors
Board-to-board or multi-pin sockets
To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replac-
ing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
To release these connectors, use a small pair of needle-nose pli-
ers to gently lift the connector away from its socket. When re-
placing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.

2 - 2 Overview
 Disassembly

Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a re- 
moval and/or replacement job, take the following precautions: Power Safety
Warning
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
Before you undertake
components could be damaged. any upgrade proce-
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. dures, make sure that
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong mag- you have turned off the
netic fields. These can hinder proper performance and damage components and/or data. You should also monitor power, and discon-
the position of magnetized tools (i.e. screwdrivers). nected all peripherals
and cables (including
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly telephone lines). It is
damaged. advisable to also re-
5. Be careful with power. Avoid accidental shocks, discharges or explosions. move your battery in

2.Disassembly
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. order to prevent acci-
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. dentally turning the
machine on.
6. Peripherals – Turn off and detach any peripherals.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands pro-
duce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.

Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.

Overview 2 - 3
 Disassembly

Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.

To remove the Battery: To remove the Bluetooth Module:

1. Remove the battery page 2 - 5 1. Remove the battery page 2 - 5
2. Remove the Bluetooth Module page 2 - 15
To remove the HDD:
1. Remove the battery page 2 - 5 To remove the Modem:
2. Remove the HDD page 2 - 6 1. Remove the battery page 2 - 5
2. Remove the Modem page 2 - 16
To remove the Optical Device:
2.Disassembly

1. Remove the battery page 2 - 5 To remove the LCD Back Cover:

2. Remove the Optical device page 2 - 8 1. Remove the battery page 2 - 5
2. Remove the LCD Back Cover page 2 - 17
To remove the System Memory:
1. Remove the battery page 2 - 5 To remove the LCD Front Cover:
2. Remove the system memory page 2 - 9 1. Remove the battery page 2 - 5
2. Remove the LCD Front Cover page 2 - 19
To remove and install a Processor:
1. Remove the battery page 2 - 5 To remove the Inverter Board:
2. Remove the processor page 2 - 10 1. Remove the battery page 2 - 5
3. Install the processor page 2 - 12 2. Remove the LCD Front Cover page 2 - 19
3. Remove the inverter board page 2 - 20
To remove the 3G Module:
1. Remove the battery page 2 - 5 To remove the Keyboard:
2. Remove the 3G module page 2 - 13 1. Remove the battery page 2 - 5
2. Remove the keyboard page 2 - 21
To remove the Wireless LAN Module:
1. Remove the battery page 2 - 5
2. Remove the WLAN module page 2 - 14

2 - 4 Disassembly Steps
 Disassembly

Removing the Battery Figure 1

1. Turn the computer off, and turn it over. Battery Removal
2. Slide the latch 1 in the direction of the arrow.
a. Slide latch at point 1 to-
3. Slide the latch 2 in the direction of the arrow, and hold it in place. wards the unlock symbol
4. Slide the battery 63 in the direction of the arrow 4 . and hold it in place.
b. Slide the battery in the di-
rection of the arrow.
a. b.

2 3
1

2.Disassembly
4


2. Battery

Removing the Battery 2 - 5

 Disassembly

Removing the Hard Disk Drive

Figure 2 The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm
HDD Assembly (h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in
Removal Chapter 4 of the User’s Manual) when setting up a new hard disk.

a. Locate the HDD bay Hard Disk Upgrade Process

cover and remove th
screw(s).
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Locate the hard disk bay cover and remove screw 1 & 2 .


2.Disassembly

a.
HDD System Warning

New HDD’s are blank. Before you

begin make sure:

You have backed up any data

you want to keep from your old
HDD.

You have all the CD-ROMs and

FDDs required to install your op-
erating system and programs.
1 2
If you have access to the internet,
download the latest application
and hardware driver updates for
 the operating system you plan to
install. Copy these to a remov-
able medium.
• 2 Screws

2 - 6 Removing the Hard Disk Drive

 Disassembly

3. Remove the hard disk bay cover 63 .

4. Grip the tab and slide the hard disk in the direction of arrow 4 . Figure 3
HDD Assembly
5. Lift the hard disk out of the bay 5 .
Removal (cont’d.)
6. Remove the screw 6 - 9 and the adhesive cover 10 from the hard disk 11 .
7. Reverse the process to install a new hard disk (do not forget to replace all the screws and covers).
b. Remove the HDD bay
cover.
b. d. c. Grip the tab and slide the
HDD in the direction of
the arrow.
d. Lift the HDD assembly
out of the bay.
e. Remove the screws and
adhesive cover.

2.Disassembly
e.

3 5

e.
c. 7

6 9 3. HDD Bay Cover
10. Adhesive Cover
10
4 11. HDD
8
• 4 Screws
11

Removing the Hard Disk Drive 2 - 7

 Disassembly

Figure 4 Removing the Optical (CD/DVD) Device

Optical Device
Removal
a. Remove the screws.
b. Remove the cover.
c. Remove the screw.
d. Slide the optical device
out of the computer at
point 9.
1. Turn off the computer, remove the battery (page 2 - 5).
2. Locate the component bay cover 1 , and remove screws 2 - 5 .
3. Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover.
4. Carefully disconnect the fan cable 6 , and remove the cover 1 .
5. Remove the screw at point 7 , and use a screwdriver to carefully push out the optical device 8 at point 9 .
6. Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
screw holes should line up).
7. Restart the computer to allow it to automatically detect the new device.

a. b.

2.Disassembly

2
Fan Cable 3
1
Make sure you recon-
nect the fan cable 6 1
before screwing down
the bay cover. 5
4
6

d.
c.


1. Component Bay
Cover
8. Optical Device 7 9
8

• 5 Screws

2 - 8 Removing the Optical (CD/DVD) Device

 Disassembly

Removing the System Memory (RAM) Figure 5

The computer has two memory sockets for 200 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting RAM Module
DDRII (DDR2) Up to 667/800 MHz. The main memory can be expanded up to 4GB. The SO-DIMM modules supported Removal
are 1024MB and 2048MB DDRIII Modules. The total memory size is automatically detected by the POST routine once
you turn on your computer. a. Locate the memory
socket.
Memory Upgrade Process b. Pull the release
latch(es).
1. Turn off the computer, turn it over and remove the battery (page 2 - 5) and the component bay cover (page 2 - 8).
c. Remove the mod-
2. The RAM module(s) will be visible at point 1 on the mainboard. ule(s).
3. Gently pull the two release latches ( 2 & 3 ) on the sides of the memory socket in the direction indicated by the
arrows (Figure 5b).
a. c. 

2.Disassembly
b. Contact Warning

Be careful not to touch

the metal pins on the
2 3 module’s connecting
4
edge. Even the cleanest
hands have oils which
can attract particles, and
1 degrade the module’s
performance.

4.
5.
The RAM module(s) 4 will pop-up (Figure 5c), and you can then remove it.
Pull the latches to release the second module if necessary.

6. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot. 4. RAM Module
7. The module will only fit one way as defined by its pin alignment. Make sure the module is seated as far into the slot
as it will go. DO NOT FORCE IT; it should fit without much pressure.
8. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
9. Replace the component bay cover and the screws (see page 2 - 8).
10. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.

Removing the System Memory (RAM) 2 - 9

 Disassembly

Removing and Installing a Processor

Figure 6 Processor Removal Procedure
Processor Removal 1. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 8).
2. Locate the heat sink.
a. Locate the heat sink. 3. Loosen the CPU heat sink screws in the order 4 , 3 , 2 & 1 (the reverse order as indicated on the label).
b. Remove the screws from 4. Carefully lift up the heat sink 5 (Figure 6c) off the computer.
the CPU heatsink.
c. Remove the CPU heat
sink. a. c.

A 5
2.Disassembly

b.
4 2

3
1


5. Heat Sink

• 4 Screws

2 - 10 Removing and Installing a Processor

 Disassembly

5. Turn the release latch 6 towards the unlock symbol to release the CPU.
6. Carefully (it may be hot) lift the CPU 7 up and out of the socket (Figure 7e). Figure 7
7. Reverse the process to install a new CPU. Processor Removal
8. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!). (cont’d)

d. Turn the release latch to

d. unlock the CPU.
e. Lift the CPU out of the
socket.

2.Disassembly
9

Unlock Lock

e.


Caution
7
The heat sink, and CPU area in
general, contains parts which are
subject to high temperatures. Allow
the area time to cool before remov-
ing these parts.

7. CPU

Removing and Installing a Processor 2 - 11

 Disassembly

Figure 8 Processor Installation Procedure

Processor 1. Insert the CPU A , pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!), and turn
Installation the release latch B towards the lock symbol (Figure 8b).
2. Remove the sticker C (Figure 8c) from the heat sink.
a. Insert the CPU. 3. Insert the heat sink D as indicated in Figure 8d.
b. Turn the release latch to- 4. Tighten the CPU heat sink screws in the order 1 , 2 , 3 & 4 (the order as indicated on the label and Figure
wards the lock symbol.
8d).
c. Remove the sticker from
the heat sink and insert 5. Replace the component bay cover and tighten the screws (page 2 - 8).
the heat sink.
d. Tighten the screws. a. c.

A
2.Disassembly

b. d.
2
4
D
3

 B 1
A. CPU
D. Heat Sink Note:
Tighten the screws in
• 3 Screws the order as indicated
on the label.

2 - 12 Removing and Installing a Processor

 Disassembly

Removing the 3G Module Figure 9

3G Module Removal
1. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 8).
2. The 3G module will be visible at point 1 on the mainboard.
a. Locate the 3G module.
3. Carefully disconnect the cable 2 , and then remove the screw 3 . b. Disconnect the cable
4. The 3G module 4 (Figure 10c) will pop-up, and you can remove it off the computer. and remove the screw.
c. Remove the 3G module.

a. c.
Note: Make sure you
reconnect the antenna
cable to socket (Fig-
ure 9b).

2.Disassembly
1

b.
4


4. 3G Module
2
3
• 1 Screw

Removing the 3G Module 2 - 13

 Disassembly

Figure 10 Removing the Wireless LAN Module

Wireless LAN
1. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 8).
Module Removal
2. The wireless LAN module will be visible at point 1 on the mainboard.
3. Carefully disconnect the cables 2 - 3 , and then remove the screw 4 .
a. Locate the WLAN.
b. Disconnect the cable
4. The wireless LAN module 5 (Figure 10c) will pop-up, and you can remove it off the computer.
and remove the screw.
c. The WLAN module will
pop up.
a. c. d.
d. Remove the Wireless
LAN module.
1
5
Note: Make sure you 5
2.Disassembly

reconnect the antenna

cable to the “1 + 2”
socket (Figure 10b).

b.

 4
2
5.Wireless LAN Module

• 1 Screw 3

2 - 14 Removing the Wireless LAN Module

 Disassembly

Removing the Bluetooth Module Figure 11

1. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 8). Bluetooth Module
2. The Bluetooth module will be visible at point 1 on the mainboard. Removal
3. Remove the screw 2 and turn the module over.
4. Carefully disconnect the cable 3 and separate the connector 4 (Figure 11b) from the Bluetooth Module. a. Locate the Bluetooth
module.
5. Lift the Bluetooth Module 5 (Figure 11c) up and off the computer.
b. Remove the screw.
c. Disconnect the cable
a. c. and the connector from
the Bluetooth module.
d. Lift the Bluetooth module
out.
3

2.Disassembly
4

b. d.

5

5. Bluetooth Module

• 1 Screw

Removing the Bluetooth Module 2 - 15

 Disassembly

Figure 12 Removing the Modem

Modem Removal 1. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 8).
2. The modem will be visible at point 1 on the mainboard.
a. Locate the modem. 3. Remove the screws 2 - 3 ,
b. Remove the screws.
4. Carefully lift the modem 5 up and off the sockets 4 .
c. Lift the modem up and
off the sockets.
a. c.

4 5
2.Disassembly

b.

3

5. Modem

• 2 Screws

2 - 16 Removing the Modem

 Disassembly

Removing the LCD Back Cover for MOFA (C4801M)

1. Turn off the computer, and turn the computer over to remove the battery (page 2 - 5).
2. Open the LCD and carefully remove the rubber screw covers 1 & 2 (2 corner rubber screw covers only) and set Figure 13
them aside. LCD Back Cover
3. Remove screw 3 & 4 from the front cover. Removal (C4801M)
4. Carefully slide the cover forward in the direction of the arrows 5 & 6 as illustrated below.
5. Remove the LCD back cover 7 . a. Remove the rubber cov-
ers and screws.
b. Slide the cover forward.
c. Remove the LCD back
a. b. cover.
1 2
5 6

3 4

2.Disassembly
c.

 
Rubber Screw Covers
7. LCD Back Cover
After removing the rubber screw covers, place them on a
7
clean dry surface (or attach them to the front cover itself) in
order to prevent loss of adhesive. • 2 Screws

Removing the LCD Back Cover for MOFA (C4801M) 2 - 17

 Disassembly

Figure 14 6. Align the replacement cover with the dotted line 8 as illustrated below (and as marked on the cover).
LCD Back Cover
Removal (cont’d)
d.
d. Align the replacement 8
cover and slide forward to
click firmly into place.

10 10
2.Disassembly

9 9

10

7. Slide the back cover forward until it clicks firmly into place 9 .
8. Run your hands around the sides and front of the cover 10 to make sure it is firmly aligned in place (carefully press
down to make sure the fit is secure).
9. Replace the screws and rubber covers.

2 - 18 Removing the LCD Back Cover for MOFA (C4801M)

 Disassembly

Removing the LCD Front Cover Figure 15

LCD Front Cover
1. Turn off the computer, and remove the battery (page 2 - 5), and remove the LCD back cover (page 2 - 17).
Removal
2. Remove the rubber covers and screws 1 - 4 (Figure 15a), then run your finger around the middle of the frame to
carefully unsnap the LCD front cover 5 from the LCD panel.
a. Remove the screws and
3. After unsnapping all four sides of the LCD front cover, carefully slide the LCD front cover downwards in the direc- unsnap the LCD front
tion of the arrow 6 (be careful of the LCD hinges at point 7 ). cover from the LCD pan-
4. You can now remove the LCD front cover. el.
b. Slide the LCD panel cov-
er in the direction of the
a. b. arrow.
2 3
5

2.Disassembly
6

1 5 4
7 7

 
Rubber Screw Covers 5. LCD Front Cover
After removing the rubber screw covers, place them on a
clean dry surface (or attach them to the front cover itself) in
order to prevent loss of adhesive. • 4 Screws

Removing the LCD Front Cover 2 - 19

 Disassembly
Figure 16
Inverter Board
Removal
a. Remove the screw from
the inverter board and lift
the board up slightly.
b. Disconnect the cables
from the inverter.
c. Remove the inverter.
2.Disassembly
 4
4. Inverter Board
2 Screws
2 - 20 Removing the Inverter Board
Removing the Inverter Board
1. Turn off the computer, remove the battery (page 2 - 5), and remove the LCD back cover (page 2 - 17), and
remove LCD front cover (page 2 - 19).
2. Discharge the remaining system power (see Inverter Power Warning below).
3. Remove screw 1 (Figure 16a) from the inverter, and carefully lift the inverter board up slightly.
4. Disconnect cables 2 & 3 (Figure 16b) from the inverter, then remove the inverter 4 (Figure 16c) from the top
case assembly.
a.

Inverter Power Warning
1
In order to prevent a short circuit
when removing the inverter it is
necessary to discharge any re-
maining system power. To do
b.
so, press the computer’s power
button for a few seconds before 2
disconnecting the inverter cable. 3
c.
 Disassembly

Removing the Keyboard Figure 17

1. Turn off the computer, and remove the battery (page 2 - 5). Keyboard Removal
2. Press the four keyboard latches at the top of the keyboard to elevate the keyboard from its normal position (you
may need to use a small screwdriver to do this). a. Press the four latches to
release the keyboard.
3. Carefully lift the keyboard up, being careful not to bend the keyboard ribbon cable 5 (Figure 17b). b. Lift the keyboard up and
4. Disconnect the keyboard ribbon cable 5 from the locking collar socket 6 . disconnect the cable
5. Carefully lift up the keyboard 7 (Figure 17c) off the computer. from the locking collar.
c. Remove the keyboard.

a. c.
1 2 3 4

2.Disassembly

Re-Inserting the
Keyboard

b. When re-inserting the

keyboard firstly align the
four keyboard tabs at the
5 bottom (Figure 17c) at
7 the bottom of the key-
board with the slots in the
case.
6


7. Keyboard
Keyboard Tabs

Removing the Keyboard 2 - 21

 Disassembly
2.Disassembly

2 - 22
 Part Lists

Appendix A:Part Lists

This appendix breaks down the C4800/C4801/C4805/C4801M series notebook’s construction into a series of illustra-
tions. The component part numbers are indicated in the tables opposite the drawings.

Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.

Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.

Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the

A.Part Lists
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.

A - 1
 Part Lists

Part List Illustration Location

The following table indicates where to find the appropriate part list illustration.
Table A - 1
Part List Illustration
Part C4800/C4801/C4805/C4801M
Location
Top (C4800/C4801) page A - 3
Top (C4805) page A - 4
Bottom (C4800/C4801/C4805/C4801M) page A - 5
LCD (C4800/C4801) page A - 6
LCD (C4805) page A - 7
A.Part Lists

LCD (C4801M) page A - 8

HDD page A - 9
SATA-DVD-SUPER-MULTI page A - 10

A - 2 Part List Illustration Location

 Part Lists

Top (C4800/C4801)

Figure A - 1

A.Part Lists
Top (C4800/C4801)
香檳銀色 無鉛

黑色 無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

(非耐落) 無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

(灰色) 無鉛

無鉛

非耐落 無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

Top (C4800/C4801) A - 3
 Part Lists

Top (C4805)

Figure A - 1
A.Part Lists

Top (C4805)

黑色 無鉛

無鉛

無鉛

(非耐落) 無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

(灰色) 無鉛

無鉛

無鉛

無鉛

非耐落 無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

A - 4 Top (C4805)
 Part Lists

Bottom (C4800/C4801/C4805/C4801M)

Figure A - 2
Bottom (C4800/

A.Part Lists
C4801/C4805/
C4801M)

Bottom (C4800/C4801/C4805/C4801M) A - 5
 Part Lists

LCD (C4800/C4801)

無鉛
無鉛

Figure A - 3 無鉛

無鉛
A.Part Lists

LCD (C4800/ 銘板 無鉛

無鉛

C4801) 非耐落 無鉛
無鉛

無鉛

無鉛

無鉛

精乘 無鉛

精乘 無鉛

(華力)無鉛

精乘 (銅箔接地)無鉛

精乘 無鉛

今皓 / 泰林 無鉛

華力 / 訊裕 無鉛

精乘 無鉛

精乘 無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

中性 電鑄薄膜鍍亮鉻(字體連結) 無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

A - 6 LCD (C4800/C4801)
 Part Lists

LCD (C4805)

Figure A - 4
LCD (C4805)

A.Part Lists
無鉛
無鉛

無鉛

無鉛

銘板 無鉛
無鉛

非耐落 無鉛
無鉛

無鉛

無鉛

無鉛

精乘 無鉛

精乘 無鉛

(華力)無鉛

精乘(銅箔接地)無鉛

精乘 無鉛

今皓 / 泰林 無鉛

華力 / 訊裕 無鉛

精乘 無鉛

精乘 無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

中性 電鑄薄膜鍍亮鉻(字體連結) 無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

LCD (C4805) A - 7
 Part Lists

LCD (C4801M)

Figure A - 5
A.Part Lists

LCD (C4801M)

無鉛
無鉛

無鉛

無鉛

銘板 無鉛
無鉛

非耐落 無鉛
無鉛

無鉛

無鉛

無鉛

精乘 無鉛

(華力)無鉛

精乘 (銅箔接地)無鉛

今皓 / 泰林 無鉛

華力 / 訊裕 無鉛

精乘 無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

無鉛

中性 電鑄薄膜鍍亮鉻(字體連結) 無鉛 ONLY FOR BACK COVER 一般漆

無鉛

無鉛 FOR MOFA
無鉛 一般漆
無鉛

無鉛

無鉛

A - 8 LCD (C4801M)
 Part Lists

HDD

Figure A - 6
HDD

A.Part Lists
無鉛

(無鉛)

HDD A - 9
 Part Lists

SATA-DVD-SUPER MULTI

Figure A - 7
A.Part Lists

SATA-DVD-SU-
PER MULTI

*(非耐落) 無鉛

無鉛

內縮 無鉛

內縮 無鉛

已內縮 無鉛

已內縮 無鉛

無鉛

無鉛

A - 10

Appendix B:Schematic Diagrams
This appendix has circuit diagrams of the C4800/C4801/C4805/C4801M notebook’s PCB’s. The following table indi-
cates where to find the appropriate schematic diagram.
Diagram - Page
SYSTEM BLOCK DIAGRAM - Page B - 2
Penryn 1/2 - Page B - 3
Penryn 2/2 - Page B - 4
SiS672_HOST_PCIE 1/5 - Page B - 5
SiS672_DRAM 2/5 - Page B - 6
SiS672_MuTITOL_VGA 3/5 - Page B - 7
SiSM672 PWR 4/5 - Page B - 8
SiSM672_5/5 - Page B - 9
DRII SO-DIMM_1 - Page B - 10
DDRII SO-DIMM_2 - Page B - 11
SiS307ELV - Page B - 12
PANEL, CRT - Page B - 13
Schematic Diagrams
Diagram - Page Diagram - Page Table B - 1
Schematic
INVERTER, BLURTOOTH, FAN - Page B - 14 NEW CARD, USB, MINI PCIE - Page B - 26
Diagrams
968_PCIE_IDE_MuTIOL_SPI 1/4 - Page B - 15 LED, PC BEEP, CCD, Audio Conn - Page B - 27
B.Schematic Diagrams
968_PCIE_LAN_GPIO 2/4 - Page B - 16 SYSTEM POWER - Page B - 28
968_USB_SATA 3/4 - Page B - 17 AC_IN, CHARGER - Page B - 29
968_PWR_GND 4/4 - Page B - 18 VCORE - Page B - 30
CLK_GEN & CLK_BUTTER - Page B - 19 VDD3, VDD5 - Page B - 31
KBC-ITE IT8512E - Page B - 20 1.05VS,1.2V,1.5V - Page B - 32

JMC261 CARD READER/LAN - Page B - 21 1.8V/0.9VS - Page B - 33
AUDIO CODEC ALC272 - Page B - 22 CLICK BOARD - Page B - 34
Version Note
AUDIO AMP TPA6017 - Page B - 23 AUDIO/ USB/ RJ11 BOARD - Page B - 35
The schematic dia-
grams in this chapter
SATA HDD, POWER GOOD & SW - Page B - 24 POWER SWITCH & LID BOARD - Page B - 36
are based upon ver-
ODD, MDC, TP Conn, 3G - Page B - 25 sion 6-7P-C4804-004.
If your mainboard (or
other boards) are a lat-
er version, please
check with the Service
Center for updated di-
agrams (if required).
B - 1
 Schematic Diagrams

SYSTEM BLOCK DIAGRAM

AC-IN,CHARGER
CLEVO C4800 System Block Diagram +VCORE

14.318 MHz
Colck Generator 1.05VS,1.2V,1.5V
ICS9LPR600 Intel Penryn Memory Termination
56pins TSSOP
17 .1 *8 .1 *1. 2m m
PROCESSOR
0.9VS,1.8V
4 79 pin s s oc ket P DDRII
Audio Board SO-DIMM0
3 5*35 *2. 7m m VDD3,VDD5,3.3V,5V
USB, SPDIF, MIC IN DDRII
HEADPHONE SO-DIMM1
B.Schematic Diagrams

FSB
Clock Buffer SYSTEM POWER
LCD CONNECTOR, 800/1066 MHz
INVERTER LVDS (TV) ICS9P935
28pins SSOP
SiS307ELV
NORTH BRIDGE 17 .1 *8. 1*1. 2m m
Sheet 1 of 35 CLICK BOARD
169balls BGA
1 3*1 3*1 .7 mm
TOUCH PAD SiSM672
SYSTEM BLOCK Synaptic 533/667(/800) MHz
RJ-11
MIC
IN
HP
OUT
810602-1703 CRT
DIAGRAM 852 balls TEBGA
3 5*35 *2. 4m m
AZALIA
32.768 KHz Azalia Codec AUDIO AMP
MDC
EC SPI MODULE Realtek N7010
ITE 8502E MuTIOL 1G ALC272
48pins LQFP 24pins TSSOP
128pins LQFP INT SPK
LPC 33 MHz MDC CON 9*9 *1 .6 mm 9 .8 *6 .4 *1. 2m m
14 *14 *1 .6 mm
SOUTH BRIDGE 24 MHz
AZALIA LINK INT MIC
SiS968
INT. K/B EC SMBUS
570balls mBGA
PCIE 100 MHz
THERMAL SMART SMART 27 *27 *2 .5 mm
SENSOR FAN BATTERY
32.768KHz
F75383M
New Card Mini PCIE CARD READER
SATA I/II 3.0Gb/s SOCKET SOCKET LAN 10/100
USB2.0 (USB0) (USB1) JMC261 RJ-45
480 Mbps

SATA HDD, SATA ODD 3G CARD USB & Phone MINI PCIE 7IN1
LID CCD Jack B'd
(USB7) USB4 (JUSB2) (JUSB1) SOCKET
SHEET 24 GOLAN
USB6 Bluetooth
USB2

B - 2 SYSTEM BLOCK DIAGRAM

 Schematic Diagrams

Penryn 1/2
J SKT1 A JS K T 1B
4 H _A #[ 35 : 3 ] H _ A# 3 J4 H 1
A [3 ]# AD S# H _A D S # 4 4 H _ D #[ 6 3 : 0 ] H _ D # [6 3 :0 ] 4

GROUP_0
ADDR
H _ A# 4 L5 E2 H _ D# 0 E2 2 Y 22 H _D #32
A [4 ]# B NR # H _B N R # 4 D [0 ]# D[3 2 ]#
H _ A# 5 L4 G5 H _ D# 1 F24 A B 24 H _D #33
H _ A# 6 K5 A [5 ]# B PR I# H _B P R I # 4 H _ D# 2 E2 6 D [1 ]# D[3 3 ]# V2 4 H _D #34
A [6 ]# D [2 ]# D[3 4 ]#

DATA GRP 0
H _ A# 7 M3 H 5 H _ D# 3 G2 2 V2 6 H _D #35
A [7 ]# D EF ER # H _D E F E R # 4 D [3 ]# D[3 5 ]#

DATA GRP 2
H _ A# 8 N2 F2 1 H _ D# 4 F23 V2 3 H _D #36
H _ A# 9 J1 A [8 ]# DR DY # E1 H _D R D Y # 4 H _ D# 5 G2 5 D [4 ]# D[3 6 ]# T2 2 H _D #37
A [9 ]# D BSY # H _D B S Y # 4 D [5 ]# D[3 7 ]#
H _ A# 1 0 N3 H _ D# 6 E2 5 U 25 H _D #38
A [1 0 ]# D [6 ]# D[3 8 ]#
H _ A# 1 1 P5 F1 H _ B R 0# H _B R 0 # 4 H _ D# 7 E2 3 U 23 H _D #39
H _ A# 1 2 P2 A [1 1 ]# B R0 # H _ D# 8 K2 4 D [7 ]# D[3 9 ]# Y 25 H _D #40
A [1 2 ]# D [8 ]# D[4 0 ]#

CONTROL
H _ A# 1 3 L2 D 20 H_ IE R R# H _ D# 9 G2 4 W 22 H _D #41
A [1 3 ]# I E RR # D [9 ]# D[4 1 ]#
H _ A# 1 4 P4 B3 H _ I N I T# H _I N I T # 15 H _ D# 1 0 J2 4 Y 23 H _D #42
H _ A# 1 5 P1 A [1 4 ]# IN IT # H _ D# 1 1 J2 3 D [1 0 ]# D[4 2 ]# W 24 H _D #43
A [1 5 ]# D [1 1 ]# D[4 3 ]#
H _ A# 1 6 R1 H 4 H _ D# 1 2 H2 2 W 25 H _D #44
A [1 6 ]# L OC K # H _L O C K # 4 D [1 2 ]# D[4 4 ]#
4 H _A D S T B # 0 M1 H _ D# 1 3 F26 A A 23 H _D #45
A D S TB [ 0] # C 1 H_ CP UR ST # H _ D #1 4 K2 2 D [1 3 ]# D[4 5 ]# A A 24 H _D #46
4 H _ R E Q# [ 4 : 0 ] RE S E T # H _C P U R S T # 4 D [1 4 ]# D[4 6 ]#
H _ R E Q# 0 K3 F3 H _ D# 1 5 H2 3 A B 25 H _D #47
H _ R E Q# 1 H2 RE Q [0 ]# R S[0 ]# F4 H _R S # 0 4 J2 6 D [1 5 ]# D[4 7 ]# Y 26
RE Q [1 ]# R S[1 ]# H _R S # 1 4 4 H_ D S T B N# 0 D S T B N [0 ]# DS T B N [2 ]# H _ DS T B N # 2 4
H _ R E Q# 2 K2 G3 H2 6 A A 26
RE Q [2 ]# R S[2 ]# H _R S # 2 4 4 H _ D S TB P # 0 D S T B P [0 ]# D ST B P[2 ]# H _ DS T B P # 2 4
H _ R E Q# 3 J3 G2 H2 5 U 22
H _ R E Q# 4 L1 RE Q [3 ]# T R DY # H _T R D Y # 4 4 H_ D INV # 0 D IN V [0 ]# DIN V [2 ]# H _ DIN V # 2 4
RE Q [4 ]# G6
4 H _ A # [3 5 :3 ] H IT # H _H I T # 4 4 H _ D #[ 6 3 : 0 ] H _ D # [6 3 :0 ] 4
H_ A # 1 7 Y2 E4 H _ D# 1 6 N2 2 AE 24 H _D #48
H_ A # 1 8 U5 A [1 7 ]# H I TM # H _H I T M# 4 H _ D# 1 7 K2 5 D [1 6 ]# D[4 8 ]# AD 24 H _D #49
H_ A # 1 9 R3 A [1 8 ]# AD 4 H_ B P M 0 # R2 9 5 1 _ 1 %_ 0 4 H _ D# 1 8 P2 6 D [1 7 ]# D[4 9 ]# AA 21 H _D #50
A [1 9 ]# BP M [0 ]# 1 . 0 5V S D [1 8 ]# D[5 0 ]#

GROUP_1
ADDR
H_ A # 2 0 W6 AD 3 H_ B P M 1 # R2 6 5 1 _ 1 %_ 0 4 H _ D# 1 9 R2 3 AB 22 H _D #51
H_ A # 2 1 U4 A [2 0 ]# BP M [1 ]# AD 1 H_ B P M 2 # R2 5 5 1 _ 1 %_ 0 4 H _ D# 2 0 L2 3 D [1 9 ]# D[5 1 ]# AB 21 H _D #52
A [2 1 ]# BP M [2 ]# D [2 0 ]# D[5 2 ]#

DATA GRP 1
H_ A # 2 2 Y5 AC 4 H_ B P M 3 # R3 1 5 1 _ 1 %_ 0 4 H _ D# 2 1 M2 4 AC 26 H _D #53
A [2 2 ]# BP M [3 ]# D [2 1 ]# D[5 3 ]#

DATA GRP 3
H_ A # 2 3 U1 AC 2 H_ P R DY # R2 8 5 6 _ 1 %_ 0 4 H _ D# 2 2 L2 2 AD 20 H _D #54

XDP/ITP SIGNALS
H_ A # 2 4 R4 A [2 3 ]# P R DY # AC 1 H _ P R E Q# H _ D# 2 3 M2 3 D [2 2 ]# D[5 4 ]# AE 22 H _D #55
A [2 4 ]# P REQ # D [2 3 ]# D[5 5 ]#
H_ A # 2 5 T5 AC 5 H_ T CK H _ D# 2 4 P2 5 AF 23 H _D #56
A [2 5 ]# TC K D [2 4 ]# D[5 6 ]#
H_ A # 2 6 T3 AA6 H_ T DI H _ D# 2 5 P2 3 AC 25 H _D #57
H_ A # 2 7 W2 A [2 6 ]# TD I AB3 H_ T DO R4 0 5 4 . 9 _ 1% _ 0 4 H _ D# 2 6 P2 2 D [2 5 ]# D[5 7 ]# AE 21 H _D #58
A [2 7 ]# T DO 1 . 0 5V S D [2 6 ]# D[5 8 ]#
H_ A # 2 8 W5 AB5 H _ T MS H _ D# 2 7 T2 4 AD 21 H _D #59
H_ A # 2 9 Y4 A [2 8 ]# TM S AB6 H_ T RST # H _ D# 2 8 R2 4 D [2 7 ]# D[5 9 ]# AC 22 H _D #60
H_ A # 3 0 U2 A [2 9 ]# TR ST# C 20 H_ DB R# H _ D# 2 9 L2 5 D [2 8 ]# D[6 0 ]# AD 23 H _D #61
A [3 0 ]# DBR # D [2 9 ]# D[6 1 ]#
H_ A # 3 1 V4 H _ D# 3 0 T2 5 AF 22 H _D #62
H_ A # 3 2 W3 A [3 1 ]# H _ D# 3 1 N2 5 D [3 0 ]# D[6 2 ]# AC 23 H _D #63

B.Schematic Diagrams
H_ A # 3 3 AA4 A [3 2 ]# L2 6 D [3 1 ]# D[6 3 ]# AE 25
A [3 3 ]# THERM AL 4 H_ D S T B N# 1 D S T B N [1 ]# DS T B N [3 ]# H _ DS T B N # 3 4
H_ A # 3 4 AB2 M2 6 AF 24
H_ A # 3 5 AA3 A [3 4 ]# D 21 H _ P R O C H OT # 4 H _ D S TB P # 1 N2 4 D S T B P [1 ]# D ST B P[3 ]# AC 20 H _ DS T B P # 3 4
A [3 5 ]# P R OC H OT # H _P R O C H OT # 1 5 4 H_ D INV # 1 D IN V [1 ]# DIN V [3 ]# H _ DIN V # 3 4
V1 A2 4 H _ TH E R MD A
4 H_ AD ST B # 1 A D S TB [ 1] # T H E RM D A
B2 5 H _ TH E R MD C AD2 6 R 26 C OM P 0
H _A 20 M # A6 T HER M DC R2 9 4 *1 K _ 0 4 Z 0 2 10 C2 3 G T L RE F C OM P [ 0 ] U 26 C OM P 1
15 H _A 20 M # A 2 0M # T E S T1
MI SC C OM P [ 1 ]
IC H

H _F E R R # A5 C 7 H _ TH R M T R I P # R2 8 9 *1 K _ 0 4 Z 0 2 11 D2 5 AA 1 C OM P 2
15 H_ F E RR # F E R R# TH E R MT R I P # H _ T H R M TR I P # 1 5 T E S T2 C OM P [ 2 ]
15 H _I GN N E # H _I G N N E # C4 Z 0 2 12 C2 4 Y 1 C OM P 3
I GN N E # C 4 2 4 * . 1 U _ 1 0 V _ X 7 R _ 0 4 Z 0 2 13 A F 2 6 T E S T3 C OM P [ 3 ]
T E S T4 H _ DP RS T P # 6 ,2 9
H _S TP C L K # D5 Z 0 2 14 AF1 E5
15 H_ ST P C L K# S T PCL K# T E S T5 DP R S T P # H _ DP S L P# 6

Sheet 2 of 35
15 H _ INT R H _I N T R C6 H CLK Z 0 2 15 A2 6 B5 H_ D P S L P #
H _N MI B4 LI N T 0 A2 2 Z 0 2 16 C3 T E S T6 D PSL P# D 24 H _ D P W R #_ R R6 7 *0 _ 0 4
15 H _ N MI LI N T 1 BC L K [0 ] H _ CL K_ CP U 1 8 T E S T7 D PW R # H _ DP W R# 4
H _S MI # A3 A2 1 C P U _ B S E L0 B2 2 D 6 H_ P W RG D
15 H _ S MI # S MI # BC L K [1 ] H _ CL K_ CP U# 1 8 18 CP U _ B S E L 0 C P U _ B S E L1 B2 3 B S EL [0 ] P W R GO OD D 7 H _ C P U S LP # H _ P W R GD 4
18 CP U _ B S E L 1 B S EL [1 ] SL P# H _ CP US L P # 1 5
Z0 20 1 M4 C P U _ B S E L2 C2 1 AE 6 P S I#
RS V D[0 1 ] 18 CP U _ B S E L 2 B S EL [2 ] P S I# P SI# 29
Z0 20 2 N5
Z0 20 3
Z0 20 4
T2
V3
RS V
RS V
RS V
D[0 2 ]
D[0 3 ]
D[0 4 ]
Layout Note: C P U _G T L R E F P e nr y n

Penryn 1/2
RESERVED

Z0 20 5 B2 C686 Close to TEST4 (Pin AF26) R2 7 7 1K _1 % _ 0 4

Z0 20 6 D2 RS V D[0 5 ] 1 .0 5 V S
Z0 20 7 D 22 RS V D[0 6 ]
RS V D[0 7 ] CPU_GRFE=0.7V
Z0 20 8 D3 C 430 C 4 25 R2 7 6
1 . 0 5V S Z0 20 9 F6 RS V D[0 8 ]
RS V D[0 9 ]
Layout Note:
1 U _ 6. 3 V _ X 5 R _0 6 .0 1 U_ 1 6 V_ X 7 R_ 0 4 2 K _ 1% _ 0 4
R 80 1 K _0 4 C PU _ BSEL 2 0.5" max, Zo= 55 Ohms
R 29 2 1 K _0 4 C PU _ BSEL 1
R 29 3 1 K _0 4 C PU _ BSEL 0
P e n ry n

R 79 68_04 H _ P R OC H O T # ( SiS Recommandation 200p) Layout note:

If PROCHOT# is routed between CPU, IMVP and MCH,
pull-up resistor has to be 68 ohm ? 5%. If not COMP0, COMP2: 0.5" Max, Zo=27.4 Ohms(20mil)
R 78 56_04 H _ T H R MT R IP #
R 82 56_04 H _ F E R R# use, pull-up resistor has to be 56 ohm ? 5% COMP1, COMP3: 0.5" Max, Zo=55 Ohms(5mil)
R 54 56_04 H _ S T P C LK # Best estimate is 18 mils wide trace for outer
R 87 56_04 H _ I N I T#
R 70 56_04 H _ I GN N E # layers and 14 mils wide trace if on internal
R 74 56_04 H _ S M I# layers.
R 77 56_04 H _ A 2 0 M#
R 83 56_04 H _ CP USL P #
R 73 56_04 H _ NM I CO M P 0
R 62 56_04 H _ INT R CO M P 1
R 88 56_04 H _ DP S L P # CO M P 2
CO M P 3
3. 3 V
CPU to SB interface
R 47 * 5 1 _0 4 H _ CP UR S T # R3 3 R 32 R2 7 8 R 279
R 55 * 3 3 0_ 0 4 H _ P W R GD

R 48 * 5 1 _0 4 H _ B R 0#
C 4 95

* .1 U_ 1 6 V _ 0 4
Thermal IC 5 4. 9_ 1 % _ 0 4 2 7 . 4 _ 1 %_ 0 4 5 4 . 9_ 1 % _ 0 4 2 7 . 4 _ 1 % _0 4

Z0225 R9 0 1 0 K_ 0 4
R 63 56_04 H _ IE R R# 3 .3 V
R 30 56_04 H _ P R E Q# U 25 R9 1 * 1 0 m li _ s ho rt - N M N P
T H E R M_ A L E R T # 1 9
R 36 1 5 0 _ 1 % _0 4 H _ T DI 1 4
R 37 3 9 . 2 _ 1 % _0 4 H _ T MS H _T H E R MD A 2 VD D T HE R M 6 Z0226 R9 2 * 0_ 0 4
R 75 1 5 0 _ 1 % _0 4 H _ DB R# D + AL ER T
R 66 * 5 6 _0 4 H _ DP W R# _ R C 4 91
1 0 0 0 P _ 50 V _ 0 4
3 7
D - S D A TA S MD _ C P U _ T H E R M 19 1 . 0 5V S 3 ,4 ,6 ,7 ,1 7 ,3 1
H _T H E R MD C 5 8 S MC _ C P U _ T H E R M 19 3 .3 V 1 2 , 1 3 , 1 5 , 16 , 1 7 , 2 0 , 2 3 , 24 , 2 5 , 3 0 , 3 1, 32
G ND S C LK
V D D3 1 3 , 1 6 , 1 9 , 25 , 2 6 , 2 7 , 2 8 , 30 , 3 2
R 65 10_04 H _ DP W R# _ R A S C 7 5 2 5 / W 8 3 L 77 1
W 8 3L 7 7 1 A W G

C 94 1 00 P _5 0 V _ 0 4 H _ P W R GD Layout Note: Layout Note:

R 34 2 7 . 4 _ 1 % _0 4 H _ T CK
R 39 680_04 H _ T RS T # Route H_THERMDA and Close to Thermal IC
H_THERMDC on same layer. ADM1032 1000p
10 mil trace on 10 mil spacing. F75383M 2200p

Penryn 1/2 B - 3
 Schematic Diagrams

Penryn 2/2

VCORE

PLACE NEAR CPU

C436 C457 C57 C437 C445 C473
JSKT1D
VCORE VCORE A4 P6 10u_
6. 3
V_X
5R_06 10u_6
.3V_X
5R_06 10u_6
.3V_X5
R_06 *1
0u_6.3V_X5R_06 10u_6
. 3V_X5
R_06 10u_6.3V_X5
R_06
JSKT1
C A8 VSS[001] VSS[ 0
82] P21
VSS[002] VSS[ 0
83]
A7 AB20 A11 P24
VCC[001
] VCC[068] VSS[003] VSS[ 0
84]
A9 AB7 A14 R2
A10 VCC[002
] VCC[069] AC7 A16 VSS[004] VSS[ 0
85] R5
A12 VCC[003
] VCC[070] AC9 A19 VSS[005] VSS[ 0
86] R22 VCORE
VCC[004
] VCC[071] VSS[006] VSS[ 0
87]
A13 AC12 A23 R25
VCC[005
] VCC[072] VSS[007] VSS[ 0
88]
A15 AC13 AF2 T1
VCC[006
] VCC[073] VSS[008] VSS[ 0
89]
A17 AC15 B6 T4
A18 VCC[007
] VCC[074] AC17 B8 VSS[009] VSS[ 0
90] T23 C31 C50 C493 C42 C421 C494
A20 VCC[008
] VCC[075] AC18 B11 VSS[010] VSS[ 0
91] T26
VCC[009
] VCC[076] VSS[011] VSS[ 0
92]
B7 AD7 B13 U3 10u_
6. 3
V_X
5R_06 10u_6
.3V_X
5R_06 *1
0u_6.3V_X5R_06 10u_6
.3V_X5
R_06 10u_6
. 3V_X5
R_06 *1
0u_6.3V_X5R_06
VCC[010
] VCC[077] VSS[012] VSS[ 0
93]
B9 AD9 B16 U6
B10 VCC[011
] VCC[078] AD10 B19 VSS[013] 94]
VSS[ 0 U21
B12 VCC[012
] VCC[079] AD12 B21 VSS[014] VSS[ 0
95] U24
VCC[013
] VCC[080] VSS[015] VSS[ 0
96]
B14 AD14 B24 V2
VCC[014
] VCC[081] VSS[016] VSS[ 0
97] VCORE
B15 AD15 C5 V5
VCC[015
] VCC[082] VSS[017] VSS[ 0
98]
B17 AD17 C8 V22
B18 VCC[016
] VCC[083] AD18 C11 VSS[018] VSS[ 0
99] V25
B20 VCC[017
] VCC[084] AE9 C14 VSS[019] VSS[ 1
00] W1
VCC[018
] VCC[085] VSS[020] VSS[ 1
01] C36 C455 C62 C438 C75 C65
C9 AE10 C16 W4
VCC[019
] VCC[086] VSS[021] VSS[ 1
02]
C10 AE12 C19 W23
C12 VCC[020
] VCC[087] AE13 C2 VSS[022] VSS[ 1
03] W26 10u_
6. 3
V_X
5R_06 10u_6
.3V_X
5R_06 10u_6
.3V_X5
R_06 10u_6
.3V_X5
R_06 10u_6
. 3V_X5
R_06 10u_6.3V_X5
R_06
C13 VCC[021
] VCC[088] AE15 C22 VSS[023] VSS[ 1
04] Y3
VCC[022
] VCC[089] VSS[024] VSS[ 1
05]
C15 AE17 C25 Y6
VCC[023
] VCC[090] VSS[025] VSS[ 1
06]
C17 AE18 D1 Y21
VCC[024
] VCC[091] VSS[026] VSS[ 1
07]
C18 AE20 D4 Y24
B.Schematic Diagrams

D9 VCC[025
] VCC[092] AF9 D8 VSS[027] VSS[ 1
08] AA2 VCORE
D10 VCC[026
] VCC[093] AF10 D11 VSS[028] VSS[ 1
09] AA5
VCC[027
] VCC[094] VSS[029] VSS[ 1
10]
D12 AF12 D13 AA8
VCC[028
] VCC[095] VSS[030] VSS[ 1
11]
D14 AF14 D16 AA11
D15 VCC[029
] VCC[096] AF15 D19 VSS[031] VSS[ 1
12] AA14 C478 C66 C6
8 C2
9 C3
0 C5
2
D17 VCC[030
] VCC[097] AF17 D23 VSS[032] VSS[ 1
13] AA16
VCC[031
] VCC[098] VSS[033] VSS[ 1
14]
D18 AF18 D26 AA19 1U_6.3V_X5R_06 *1U_6.3V_X5R_06 1U_6.3V_X5R_06 1U_6.3V_
X5R_06 1U_6.3V_
X5R_06 1U_6.3V_
X5R_06
VCC[032
] VCC[099] VSS[034] VSS[ 1
15]
E7 AF20 E3 AA22
E9
VCC[033
] VCC[100] Power Plane 2A E6
VSS[035] VSS[ 1
16]
AA25
E10 VCC[034
] G21 E8 VSS[036] VSS[ 1
17] AB1
VCC[035
] VCCP[01] 1.05VS VSS[037] VSS[ 1
18]
E12 V6 E11 AB4
VCC[036
] VCCP[02] VSS[038] VSS[ 1
19]

Sheet 3 of 35 E13 J6 E14 AB8 VCORE

VCC[037
] VCCP[03] VSS[039] VSS[ 1
20]
E15 K6 E16 AB11
E17 VCC[038
] VCCP[04] M6 E19 VSS[040] VSS[ 1
21] AB13
E18 VCC[039
] VCCP[05] J21 E21 VSS[041] VSS[ 1
22] AB16
VCC[040
] VCCP[06] VSS[042] VSS[ 1
23]
E20 K21 E24 AB19 C63 C60 C5
6 C4
79 C4
7 C7
9

Penryn 2/2
VCC[041
] VCCP[07] VSS[043] VSS[ 1
24]
F7 M21 Layout note: F5 AB23
VCC[042
] VCCP[08] VSS[044] VSS[ 1
25]
F9 N21 Near pin B26 F8 AB26 1U_6.3V_X5R_06 1U_6.3V_X5R_06 *1U_6.3V_X5R_06 1U_6.3V_
X5R_06 1U_6.3V_
X5R_06 1U_6.3V_
X5R_06
F10 VCC[043
] VCCP[09] N6 F11 VSS[045] VSS[ 1
26] AC3
F12 VCC[044
] VCCP[10] R21 L
55 F13 VSS[046] VSS[ 1
27] AC6
VCC[045
] VCCP[11] VSS[047] VSS[ 1
28]
F14 R6 HCB1608KF-121T25 F16 AC8
F15
VCC[046
] VCCP[12]
T21 130mA 1.5VS F19
VSS[048] VSS[ 1
29]
AC11
F17 VCC[047
] VCCP[13] T6 F2 VSS[049] VSS[ 1
30] AC14 VCORE
F18 VCC[048
] VCCP[14] V21 C488 C489 C486 F22 VSS[050] VSS[ 1
31] AC16
VCC[049
] VCCP[15] VSS[051] VSS[ 1
32]
F20 W21 .01U_16V_X7
R_04 F25 AC19
VCC[050
] VCCP[16] VSS[052] VSS[ 1
33]
AA7 *10U_6.3V_X5R_08 G4 AC21
VCC[051
] VSS[053] VSS[ 1
34]
AA9 B26 Z0301 1U_6.3V_X5R_06 G1 AC24 C477 C490 C4
51 C4
76 C4
80 C4
92
AA10 VCC[052
] VCCA[01] C26 G23 VSS[054] VSS[ 1
35] AD2
AA12 VCC[053
] VCCA[02] G26 VSS[055] VSS[ 1
36] AD5 .1U_10V_X7R_04 .1U_
10V_X7R_04 .1U_
10V_X7R_04 .1U_
10V_
X7R_04 .1U_
10V_
X7R_04 .1U_1
0V_
X7R_04
VCC[054
] VSS[056] VSS[ 1
37]
AA13 AD6 H_VID0 H3 AD8
VCC[055
] VID[0] VSS[057] VSS[ 1
38]
AA15 AF5 H_VID1 H6 AD11
AA17 VCC[056
] VID[1] AE5 H_VID2 H21 VSS[058] VSS[ 1
39] AD13
AA18 VCC[057
] VID[2] AF4 H_VID3 H24 VSS[059] VSS[ 1
40] AD16
AA20 VCC[058
] VID[3] AE3 H_VID4 J2 VSS[060] VSS[ 1
41] AD19
VCC[059
] VID[4] VSS[061] VSS[ 1
42]
AB9 AF3 H_VID5 J5 AD22
VCC[060
] VID[5] VSS[062] VSS[ 1
43]
AC10 AE2 H_VID6 H_VID[6:0] 29 J22 AD25
AB10 VCC[061
] VID[6] J25 VSS[063] VSS[ 1
44] AE1
AB12 VCC[062
] K1 VSS[064] VSS[ 1
45] AE4
AB14
VCC[063
]
AF7 VCCSENSE K4
VSS[065] VSS[ 1
46]
AE8 1.05VS PLACE NEAR CPU
VCC[064
] VCCSENSE VCCSENSE 29 VSS[066] VSS[ 1
47]
AB15 K23 AE11
AB17 VCC[065
] K26 VSS[067] VSS[ 1
48] AE14
AB18 VCC[066
] AE7 VSSSENSE L3 VSS[068] VSS[ 1
49] AE16
VCC[067
] VSSSENSE VSSSENSE 2
9 VSS[069] VSS[ 1
50]
L6 AE19 C454 C55 C6
1 C2
6 C3
9
VSS[070] VSS[ 1
51] +
Penry n L21 AE23
VSS[071] VSS[ 1
52]
. L24 AE26 150
U_4V_B2 .1U_
10V_X7R_04 .1U_
10V_X7R_04 .1U_
10V_
X7R_04 .1U_
10V_
X7R_04
R21 R2
0 M2 VSS[072] VSS[ 1
53] A2
Layout note: VSS[073] VSS[ 1
54]
M5 AF6
VSS[074] VSS[ 1
55]
*15mil_short- NMNP *15mil_short -NMNP M22 AF8 5/10
VSS[075] VSS[ 1
56] 1.05VS
Route VCCSENSE and M25 AF11
N1 VSS[076] VSS[ 1
57] AF13
VCORE VSSSENSE traces at 27.4 N4 VSS[077] VSS[ 1
58] AF16
ohms with 50 mils spacing. N23 VSS[078] VSS[ 1
59] AF19
VSS[079] VSS[ 1
60]
N26 AF21 C67 C58 C5
4 C6
9 C7
4 C4
1
Place PU and PD within 1 VSS[080] VSS[ 1
61]
P3 A25
inch of CPU. VSS[081] VSS[ 1
62] AF25 .1U_10V_X7R_04 .1U_
10V_X7R_04 .1U_
10V_X7R_04 .1U_
10V_
X7R_04 *. 1
U_10V_X7R_04 .1U_1
0V_
X7R_04
VSS[ 1
63]
Pen
r yn
.

VCORE 29
1.05VS 2,4,6,7,17,31
1.5VS 6,25,31

B - 4 Penryn 2/2
 Schematic Diagrams

SiS672_HOST_PCIE 1/5

1. 05VS R89 *56_04 NB_PCREQ#

U24C 1.2VS NB_PCIE_1.2VS

B16 N29 H_D#[63:0] 2
H_D#0 L11
C1XAVDD C17 C1XAVDD HD0# M30 H_D#1 HCB1005KF-121T20
C1XAVSS C1XAVSS HD1# M28 H_D#2
77mA
A17 HD2# L30 H_D#3 U24D
C4XAVDD B18 C4XAVDD HD3# L29 H_D#4 C113 C117 P7
C4XAVSS C4XAVSS HD4# PCIEAVDD
HD5# K28 H_D#5 R7 REFCLK+ T5 PCIE_CLK_NB 18
W24 K31 H_D#6 .01U_16V_X7R_04 .1U_10V_X7R_04 T7 PCIEAVDD T4
NB_GTLREF U24 HVREF HD6# K30 H_D#7 U7 PCIEAVDD REFCLK- PCIE_CLK_NB# 18
R24 HVREF HD7# H31 H_D#8 V7 PCIEAVDD
N24 HVREF HD8# G34 H_D#9 PCIEAVDD
L21 HVREF HD9# H32 H_D#10 D7
HVREF HD10# G32 H_D#11 16, 20,25 PCIE_WAKE# G16 PME#
HD11# K32 H_D#12 6,14 PCI_INT#A INTX#
NB_PCREQ# R34 HD12# F34 H_D#13 E4 G6 Z0438 C92 .1U_10V_X7R_04
Z0401 P32 PCREQ# HD13# F33 H_D#14 25 PE0RX0 E5 PERP0 PETP0 H6 Z0439 C96 .1U_10V_X7R_04 PE0TX0 25
EDRDY# HD14# F32 H_D#15 25 PE0RX0# PE0RX1 F1 PERN0 PETN0 G4 Z0440 PE0TX0# 25
E21 HD15# H28 H_D#16 PE0RX1# G1 PERP1 PETP1 G5 Z0441
2 H_DPWR# NC2 (DPWR#) HD16# PERN1 PETN1
HD17# J30 H_D#17 PE0RX2 H3 PERP2 J6 Z0442
H30 H_D#18 PE0RX2# H2 PETP2 K6 Z0443
HD18# PERN2 PETN2

PCIE
18 H_CLK_NB F18 CPUCLK HD19# G29 H_D#19 PE0RX3 H1 PERP3 PETP3 J4 Z0444
18 H_CLK_NB# G18 CPUCLK# HD20# J29 H_D#20 PE0RX3# J1 PERN3 J5 Z0445
G30 H_D#21 PE0RX4 K1 PETN3 L6 Z0446

B.Schematic Diagrams
L32 HD21# F30 H_D#22 PE0RX4# K2 PERP4 PETP4 M6 Z0447
2 H_LOCK# P30 HLOCK# HD22# D33 H_D#23 PERN4 PETN4
2 H_DEFER# DEFER# HD23# PE0RX5 L1 PERP5 PETP5 M4 Z0448
2 H_TRDY# P31 HTRDY# D34 H_D#24 PE0RX5# M1 M5 Z0449
F21 HD24# B32 H_D#25 PE0RX6 N1 PERN5 PETN5 P6 Z0450
2 H_CPURST# P28 CPURST# HD25# B33 H_D#26 N2 PERP6 PETP6 R6 Z0451
2 H_PWRGD CPUPWRGD HD26# PE0RX6# PERN6 PETN6
2 H_BPRI # N30 BPRI# C34 H_D#27 PE0RX7 P1 P4 Z0452
P33 HD27# D31 H_D#28 PE0RX7# R1 PERP7 PETP7 P5 Z0453
2 H_BR0#

2
2
H_RS#0
H_RS#1
K34
M31
BREQ0#

RS0#
HD28#
HD29#
HD30#
A32
A31
C31
H_D#29
H_D#30
H_D#31
Z0402
Z0403
Z0404
T1
T2
U1
PERN7
PERP8
PERN8
PETN7
PETP8
PETN8
V6 Z0454
W6 Z0455
W4 HDVBP2 11
Sheet 4 of 35
K33 RS1# HD31# B30 H_D#32 Z0405 V1 PERP9 PETP9(HDVBP2) W5
2

2
H_RS#2

H_ADS# M34
N34
RS2#

ADS#
HD32#
HD33#
HD34#
C30
A30
D28
H_D#33
H_D#34
H_D#35
Z0406
Z0407
Z0408
W1
W2
Y1
PERN9
PERP10
PERN10
PETN9(HDVBN2)
PETP10(HDVBP1)
PETN10(HDVBN1)
Y6
AA6
AA4
HDVBN2
HDVBP1
HDVBN1
11
11
11
SiS672_HOST_PCI
2 H_HITM# HITM# HD35# PERP11 PETP11(HDVBP0) HDVBP0 11
2
2
2
H_HIT#
H_DRDY#
H_DBSY#
N32
M33
L34
HIT#
DRDY#
DBSY#
HD36#
HD37#
HD38#
G28
C29
C28
H_D#36
H_D#37
H_D#38
Z0409
Z0410
Z0411
AA1
AB1
AB2
PERN11
PERP12
PERN12
PETN11(HDVBN0)
PETP12
PETN12
AA5
AB6 Z0462
AC6 Z0463
HDVBN0 11
E 1/5
2 H_BNR# M32 BNR# HD39# E28 H_D#39 Z0412 AC1 PERP13 PETP13(HDVAP2) AC4 HDVAP2 11
2 H_REQ#[ 4:0] HD40# E27 H_D#40 Z0413 AD1 PERN13 AC5 HDVAN2 11
H_REQ#0 T34 C27 H_D#41 Z0414 AE1 PETN13(HDVAN2) AD6
HREQ0# HD41# PERP14 PETP14(HDVAP1) HDVAP1 11
H_REQ#1 R30 G26 H_D#42 Z0415 AE2 AE6
H_REQ#2 R29 HREQ1#
HREQ2#
Ho st HD42#
HD43# E26 H_D#43 Z0416 AF1 PERN14
PERP15
PETN14(HDVAN1)
PETP15(HDVAP0)
AE4 HDVAN1
HDVAP0
11
11
H_REQ#3 R32 HREQ3# HD44# D26 H_D#44 Z0417 AG1
PERN15
AE5 HDVAN0 11
H_REQ#4 P34 B26 H_D#45 PETN15(HDVAN0)
HREQ4# HD45#
HD46# A26 H_D#46 SiSM672
HD47# C26 H_D#47
2 H_ADSTB#0 U34 HASTB0# HD48# G22 H_D#48
2 H_ADSTB#1 AA34 HASTB1# HD49# C24 H_D#49
2 H_A#[35:3] A25 H_D#50
H_A#3 T32 HD50# B24 H_D#51
H_A#4 T28 HA3# HD51# C25 H_D#52
H_A#5 T31 HA4# HD52# A24 H_D#53
H_A#6 T33 HA5# HD53# E23 H_D#54
H_A#7 T30 HA6# HD54# E25 H_D#55
H_A#8 U32 HA7# HD55# G24 H_D#56
H_A#9 U30 HA8# HD56# D22 H_D#57
H_A#10 V34 HA9# HD57# C22 H_D#58
H_A#11 U29 HA10# HD58# E22 H_D#59
H_A#12 V33 HA11# HD59# C23 H_D#60
H_A#13 V32 HA12# HD60# A23 H_D#61
H_A#14 V28 HA13# HD61# A22 H_D#62
H_A#15 V31 HA14# HD62# B22 H_D#63
H_A#16 W34 HA15# HD63#
H_A#17 Y33 HA16#
H_A#18 W32 HA17# J32
H_A#19 V30 HA18# DBI 0# E32 H_DINV#0 2
H_A#20 W30 HA19# DBI 1# F27 H_DINV#1 2
H_A#21 Y34 HA20# DBI 2# F23 H_DINV#2 2
H_A#22 Y28 HA21# DBI 3# H_DINV#3 2
H_A#23 W29 HA22# H33
H_A#24 Y32 HA23# HDSTBN0# E31 H_DSTBN#0 2
H_A#25 Y30 HA24# HDSTBN1# B28 H_DSTBN#1 2
H_A#26 Y31 HA25# HDSTBN2# D24 H_DSTBN#2 2
HA26# HDSTBN3# H_DSTBN#3 2
H_A#27 AA32
H_A#28 AA30 HA27# H34
H_A#29 AA29 HA28# HDSTBP0# D32 H_DSTBP#0 2
H_A#30 AB33 HA29# HDSTBP1# A28 H_DSTBP#1 2
HA30# HDSTBP2# H_DSTBP#2 2
H_A#31 AB34 E24 H_DSTBP#3 2
H_A#32 AB32 HA31# HDSTBP3#
H_A#33 AC34 HA32# A21 NB_COMP R287 110_1%_06
H_A#34 AB30 HA33# HPCOMP C21 NB_COMP#
HA34# HNCOMP
H_A#35 AB31
HA35# R286 10_1%_04 1.05VS
SiSM672 1.05VS

R86 C122
1.8VS C1XAVDD 1.8VS C4XAVDD 75_1%_04 .01U_16V_X7R_04
L47 HCB1005KF- 121T20 L9 HCB1005KF-121T20
NB_GTL REF=0. 7V 1.05VS 2,3,6,7, 17, 31
NB_GTLREF 1.2VS 7,27
1.8VS 5,6,7,11,12, 14,15,16,17,18,27
C448 C466 C461 C70 C76 C82 R85 C126 C108
*10U_10V_08 .1U_10V_X7R_04 .01U_16V_X
7R_04 10U_10V_08 .1U_10V_X7R_04 .01U_16V_X7R_04 150_1%_04 .01U_16V_X7R_04 .1U_10V_X7R_04

NC15 NC_04 NC1 NC_04

Plac e unde r M672

C1XAVSS C4XAVSS sold er sid e

SiS672_HOST_PCIE 1/5 B - 5
 Schematic Diagrams

SiS672_DRAM 2/5

U24B
9
,10 M_A_DQ[63: 0]
M_A_DQ0 AD31
M_A_DQ1 AD30 MD0A
M_A_DQ2 AG34 MD1A A15
MD2A D1XAVDD D1XAVDD
M_A_DQ3 AE29 B15
MD3A D1XAVSS D1XAVSS
M_A_DQ4 AE32
1.8VS D1XAVDD M_A_DQ5 AF34 MD4A AP11
MD5A D4XAVDD D4XAVDD
M_A_DQ6 AF31 AP10
MD6A D4XAVSS D4XAVSS
L48 HCB1005KF- 12
1T20 M_A_DQ7 AE30
MD7A
AD28
9
, 10 M_DM0 DQM0A
9
, 10 M_DQ S0 AF32
C442 C4
60 C465 AF33 DQS0A
9
, 10 M_DQS0# DQS0A#
9
,10 M _A_DQ[63: 0] M_A_A[17:0] 9
, 10
1
0U_10V_08 .1U_1
0V_X7R_04 .01U_16V_X7R_04 M_A_DQ8 AF28 AH24 M_A_A0
MD8A MA0A
M_A_DQ9 AJ34 AP25 M_A_A1
NC13 NC_04 M_A_DQ10 AH31 MD9A MA1A AM25 M_A_A2
M_A_DQ11 AG30 MD10A MA2A AL25 M_A_A3
MD11A MA3A
M_A_DQ12 AF30 AP26 M_A_A4
MD12A MA4A
D1XAVSS M_A_DQ13 AG32 AM26 M_A_A5
M_A_DQ14 AJ32 MD13A MA5A AN26 M_A_A6
M_A_DQ15 AJ31 MD14A MA6A AK25 M_A_A7
AH34 MD15A MA7A AP27 M_A_A8
9
, 10 M_DM1 DQM1A MA8A
AH32 AP28 M_A_A9
1.8VS D4XAVDD 9
, 10 M_DQ S1 DQS1A MA9A
9
, 10 M_DQS1# AH33 AK24 M_A_A10
DQS1A# MA10A AN24 M_A_A11
9
,10 M _A_DQ[63: 0]
B.Schematic Diagrams

L13 HCB1005KF- 12
1T20 M_A_DQ16 AK34 MA11A AP24 M_A_A12
MD16A MA12A
M_A_DQ17 AH30 AM28 M_A_A13
MD17A MA13A
M_A_DQ18 AL32 AM27 M_A_A14
C180 C1
73 C176 M_A_DQ19 AM33 MD18A
MD19A
DRAM MA14A
MA15A
AN28 M_A_A15
M_A_DQ20 AK32 AP21 M_A_A16
MD20A MA16A
*10U_10V_08 .1U_1
0V_X7R_04 .01U_16V_X7R_04 M_A_DQ21 AG29 AP29 M_A_A17
MD21A MA17A
M_A_DQ22 AM34 M_FWDSDCLKOA_D C145 *10P_50V_
04
NC2 NC_04 M_A_DQ23 AL31 MD22A AM23
MD23A RASA# M_RAS# 9,10
AJ30 AP22 M_FWDSDCLKOA_D# C144 *10P_50V_
04

Sheet 5 of 35 D4XAVSS
9
, 10
9
, 10
9
, 10
M
M_DM2
_DQ S2
M_DQS2#
AK33
AL34
DQ
DQ
DQ
M2A
S2A
S2A#
CASA#
WEA#
AJ23
M
M
_CAS#
_WE#
9,10
9,10

9
,10 M _A_DQ[63: 0]

SiS672_DRAM 2/5 1.8V

M
M
M
_A_DQ24
_A_DQ25
_A_DQ26
AM32
AP32
AP31
MD24A
MD25A
MD26A
FWDSDCLKOA
FWDSDCLKOA#
AK12
AH12
M_FWDSDCLKO
M_FWDSDCLKO
A_
D_R
A_
D#_R
R100
R99
M
*10mil_shor t-NM
M
*10mil_shor t-NM
_FW
NP DSDCLKOA_D
_FW
NP DSDCLKOA_D#
M_FWDSDCLKOA_D 18
M_FWDSDCLKOA_D# 18
M_A_DQ27 AM29
M_A_DQ28 AK30 MD27A
M_A_DQ29 AK29 MD28A AP23
MD29A CS0A# M_CS0# 9,10
M_A_DQ30 AJ27 AH22
MD30A CS1A# M_CS1# 9,10
M_A_DQ31 AK28 AM22 Place close to
R95 C143 AN32 MD31A CS2A# AM21 M_CS2# 10
9
, 10 M_DM3
AM30 DQM3A CS3A# M_CS3# 10 M672
9
, 10 M_DQ S3 DQS3A
1
K_1%_04 .1U_10
V_X
7R_04 AM31
9
, 10 M_DQS3# DQS3A#
M_DDRVREF=0.9V AK22
9
,10 M _A_DQ[63: 0] ODT0A M_ODT
0 9,10
M_DDRVREF M_A_DQ32 AK20 AP20 M_ODT
1 9,10
M_A_DQ33 AM20 MD32A ODT1A AN22
MD33A ODT2A M_ODT
2 10
M_A_DQ34 AM19 AL21
MD34A ODT3A M_ODT
3 10
R96 C142 C141 M_A_DQ35 AJ19
MD35A
M_A_DQ36 AN20
1
K_1%_04 .1U_10
V_X
7R_04 .1U_10V_X7R_04 M_A_DQ37 AJ21 MD36A AN30
MD37A CKEA0 M_CKE0 9,10
M_A_DQ38 AP19 AP30
MD38A CKEA1 M_CKE1 9,10 1.8V
M_A_DQ39 AH20 AH26
MD39A CKEA2 M_CKE2 10
AK21 AK27
9
, 10 M_DM4 AK19 DQM4A CKEA3 M_CKE3 10 M_COMP_N R93 36_1%_06
Place under M672 9
, 10 M_DQ S4 DQS4A
AL19
solder side 9
, 10 M_DQS4# DQS4A#
9
,10 M _A_DQ[63: 0]
M_A_DQ40 AK18 M_COMP_P R98 36_1%_06
M_A_DQ41 AJ17 MD40A
M_A_DQ42 AK17 MD41A
M_A_DQ43 AP16 MD42A AD1
8
MD43A DDRVREF0 M_DDRVREF
M_A_DQ44 AH18 AD2
3
MD44A DDRVREF1
M_A_DQ45 AP18
M_A_DQ46 AN18 MD45A
M_A_DQ47 AP17 MD46A 1.8V
MD47A
AM18
9
, 10 M_DM5 DQM5A
AL17 AJ25 M_COMP_P M_OCDVREF_P=0.874V R102 40.2_1%_04
9
, 10 M_DQ S5 AM17 DQS5A DDRCOMP AK26 M_COMP_N
9
, 10 M_DQS5# DQS5A# DDRCOMN M_OCDVREF_P
9
,10 M _A_DQ[63: 0]
M_A_DQ48 AN16
MD48A
M_A_DQ49 AK16 R101 36_1%_06
M_A_DQ50 AN14 MD49A AH28 M_OCDVREF_
P
M_A_DQ51 AJ15 MD50A OCDVREFP AJ29 M_OCDVREF_
N
MD51A OCDVREFN
M_A_DQ52 AP15
MD52A
M_A_DQ53 AM16
MD53A 1.8V
M_A_DQ54 AK15
M_A_DQ55 AP14 MD54A
AH16 MD55A R94 36_1%_06
9
, 10 M_DM6 DQM6A M_OCDVREF_N=0.969V
AL15
9
, 10 M_DQ S6 DQS6A
9
, 10 M_DQS6# AM15 B6 NB_S3AUXSW# 23 M_OCDVREF_N
DQS6A# S3AUXSW#
9
,10 M _A_DQ[63: 0]
M_A_DQ56 AL13 R97 40.2_1%_04
MD56A
M_A_DQ57 AM13
MD57A
M_A_DQ58 AM12
M_A_DQ59 AJ13 MD58A
M_A_DQ60 AM14 MD59A
MD60A
M_A_DQ61 AK14
MD61A
M_A_DQ62 AN12
MD62A
M_A_DQ63 AH14
AK13 MD63A
9
, 10 M_DM7 DQM7A
AP12
9
, 10 M_DQS7 DQS7A
AP13
9
, 10 M_DQS7# DQS7A#

1. 8V 7, 9,10,1
5,16,17,27,31,32
1. 8VS 4, 6,7,11
,12,14,15,16,17,18,27
SiSM672

B - 6 SiS672_DRAM 2/5
 Schematic Diagrams

SiS672_MuTITOL_VGA 3/5

3 .3 V S C3 8 5
1 . 8V S . 1 U _1 6 V _ 0 4

5
U1 6 R2 4 4
U2 4 A R3 4 4 1 33 _ 0 4
R 11 7 C 179 A H1 0 F1 5 NB _ E N T E S T 3 3 _0 4 4 Z0 6 18 D P R S TP #_ I N V
18 Z _ C LK 0 Z CL K EN TEST
Z0617 2
1 5 0 _1 % _ 0 4 . 1 U _ 10 V _ X 7 R _ 0 4 AP8 D 16 N B _ T E S T M OD E 0
14 Z D RE Q Z DR E Q T E S TM OD E 0
AN8 E1 6 N B _ T E S T M OD E 1 C3 8 3 74 L V C 1G 1 4 GW
14 Z U RE Q Z UR E Q T E S TM OD E 1
Z_ VR EF F1 6 N B _ T E S T M OD E 2

3
A M7 T E S TM OD E 2 D 17 Z 0 6 02
14 Z ST B_ D 0 Z STB0 T R AP0 *1 0 0P _5 0 V _ 0 4
AL 7 E1 7 Z 0 6 03
R 11 1 C 172 14 Z S T B _ D# 0 AP4 Z S T B 0# T R AP1 F1 7 Z 0 6 04 R2 4 3
14 Z ST B_ D 1 Z STB1 T R AP2
AP5 *3 3 _0 4
14 Z S T B _ D# 1 Z S T B 1#
4 9 . 9 _1 % _ 0 4 . 1 U _ 10 V _ X 7 R _ 0 4
14 Z A D[1 6 :0 ] ZA D0 AK1 0 AC 32 Z 0 6 05 15 S B _ D P R S L P V R 15 S B _D P R S TP #
Z A D0 T R AP3
ZA D1 A M6 AD 34 Z 0 6 06
Z A D1 T R AP4
ZA D2 AK1 1 AB 28 Z 0 6 07 3 .3 V S C 41 7
ZA D3 A J1 1 Z A D2 T R AP5 AD 32 Z 0 6 08 . 1 U _1 6 V _ 0 4
Z A D3 T R AP6
ZA D4 AP7 AD 33 Z 0 6 09
ZA D5 AJ 9 Z A D4 T R AP7 AE 34 Z 0 6 10
Z A D5 T R AP8

5
ZA D6 AP6 AC 30 Z 0 6 11 U2 1 R2 7 0
1 . 8V S Z A D6 T R AP9
ZA D7 AN6 AC 29 Z 0 6 12 R2 7 1 1 33 _ 0 4
ZA D8 AK9 Z A D7 TR A P 1 0 3 3 _0 4 4 Z0 6 20
Z A D8 P M_ D P R S L P V R 29
R1 0 7 5 6 _0 4 Z _ C OM P _ N ZA D9 A M4 Z0619 2
ZA D1 0 AK6 Z A D9
Z A D1 0

B.Schematic Diagrams
R1 0 6 5 6 _0 4 Z _ C OM P _ P ZA D1 1 AK8 C4 2 0 74 L V C 1G 1 7 GW
Z A D1 1
ZA D1 2 AN4 A5 A U X _P W R O K A U X _ P W R OK 15

3
ZA D1 3 AK7 Z A D1 2 A UX O K C 6 D EL A Y_ PW RG D
Z A D1 3 PW RO K D E L A Y _ P W R GD 2 3, 2 9 *1 0 0P _5 0 V _ 0 4
R7 1 4 . 7 K _ 04 N B _ E NT E S T ZA D1 4 AL 5 A7
ZA D1 5 A M5 Z A D1 4 P C IRS T # N B _ R S T # 1 1 , 23
C4 7 4 . 1 U _ 10 V _ X 7 R _ 0 4 A U X_ P W R O K ZA D1 6 A M8 Z A D1 5
Z A D1 6 ASL R 272 * 0_ 0 4
C8 3 . 1 U _ 10 V _ X 7 R _ 0 4 D E L A Y _ P W R G D AL 9
Z _ V RE F Z V RE F

R
R
76
81
*0 _ 04
*0 _ 04
D A C_ H S Y N C
D A C_ V S Y NC
Z _C O MP _ P
Z _C O MP _ N
AP9
A M9
Z CM P _ P
Z CM P _ N
A GP S TO P #
G 14
A GP S TO P # 1 5 3. 3 V S 3 . 3V S
Sheet 6 of 35
R 61 *0 _ 04 D A C _D D C A C L K A6 C 10 2 C 88
R
R
60
69
*0 _ 04 D A C _D D C A D A T
*0 _ 04 C L K _ 1 4M _ 67 1 M X
Z 4 XA V D D
A M1 0
A N1 0
Z 4X A V D D
Z 4X A V S S
A G P B US Y #

V B V S Y NC
V B HS Y NC
D 8
F7
A GP B U S Y # 1 5

VB VS Y NC 1 1
V B HS Y N C 1 1
* .1 U_ 1 6 V _ 0 4 *. 1 U _ 1 6 V _ 0 4
SiS672_MuTITOL_
NEAR SISM672
VGA 3/5

5
E7 U7 R6 4
V B HC L K V B HC L K 11 R 84 1 33 _ 0 4 U 4

5
D A C _ RE D D1 3 C 8 4 9 9 _ 1% _ 0 4 4 Z 0 62 3 Z 0 62 5 1
12 DA C _ RE D D A C _ GR E E N R OU T VBC L K V B CL K 11
12 D A C _G R E E N C1 2 E9 V B CA D 11 Z0 62 1 2 4 H _D P S L P # _ L S
D A C _ B LU E C1 3 G OU T V BCAD 2
3 . 3V S 12 D AC_ B L U E B OU T
D 9 C1 0 3 7 4L V C 1 G1 7 GW
F1 2 VAC L K V A CL K 11 7 4 LV C 1 G0 8 G W
12 DA C _ HS Y NC

3
G1 2 H S Y NC
For SiS VB 307 1 0 0P _5 0 V _ 0 4 6-01-74108-Q61

3
12 D A C _V S Y N C V SYN C
R 59 *4 . 7 K _ 0 4 Z 0 6 0 1 use only
D1 1
1 2 D A C_ D DC A CL K V GP I O 0
NEAR SISM672 E1 2 AH 2 Z 0 6 13
1 2 D A C_ D DC A DA T V GP I O 1 N C0
AG 3 Z 0 6 14 15 CP U _ S T P #
C9 0 * . 1 U _ 1 6 V _ 04 V C O MP D1 5 N C1 3. 3 V S C 97 3 . 3V S C 93
V C O MP
V VBW N C1 5 * .1 U_ 1 6 V _ 0 4 . 1 U _ 1 6V _0 4
C9 8 * . 1 U _ 1 6 V _ 04 R 53 12 1 _ 1 % _0 4 VR SET C1 4 V VBW N
V RSE T

5
C1 0 1 * . 1 U _ 1 6 V _ 04 4 ,1 4 P C I _I N T # A R 68 0_ 0 4 Z0 60 1 F1 3 U 5
IN T A#

5
U6 R5 7 1
C L K _ 1 4 M_ 6 7 1M X F1 1 R 72 1 33 _ 0 4 4
1 8 C L K _ 1 4 M_ 6 7 1 MX V OS C I 33_04 4 Z 0 62 4 Z 0 62 6 2 CP US T P # 1 8
A1 2 Z0 62 2 2
1 . 8V S E CL K A V DD DA C A V D D1 D A C A VDD 1
B1 2 7 4 A H C 1 G3 2 GW
5mA D ACA VS S1 D AC AVSS1
C9 1 7 4L V C 1 G1 7 GW

3
L 53 H C B 10 0 5 K F -1 2 1 T2 0 A1 3

3
DA C A V D D2 B1 3 D A C A VDD 2
D ACA VS S2 *1 0 0 P _ 5 0V _0 4
D AC AVSS2
C 47 2 C4 6 8 C 4 70 B1 0
DC L K A V D D A1 1 D CL K A V DD
D CL K A V SS
1 0 U _ 1 0 V _ 08 . 1 U _ 1 0 V _ X7 R _ 04 . 0 1 U _1 6 V _ X 7 R _ 0 4

A9
Level Shitt
E CL K A V D D E CL K AV D D
B8 1.05V <=> 3.3V
E CL K AV S S
Z 0 6 2 9 R5 2 2 00 K _ 0 4
1. 0 5 V S 3 .3 V S
SS
i M6 7 2 R4 2 1 5 0_ 1 % _ 04 U 3 R5 1 1 K _ 1% _ 0 4
R4 3 1 5 0_ 1 % _ 04 1 8 R5 0 1 K _ 1% _ 0 4
G ND EN
2 7
R 44 *1 0 mi l _ s ho rt -N MN PZ 06 2 7 3 VR EF 1 V RE F 2 6 DP R S T P # _ INV
1 . 8V S D CL K A V DD 2 , 29 H _ D P R S T P # SC L 1 SC L 2
D A C_ R E D C 81 * 1 0P _5 0 V _ 0 4 R 29 1 *1 0 mi l _ s ho rt -N MN PZ 06 2 8 4 5 H _ D P S L P # _L S
5mA 2 H_ DP S L P # SD A1 SDA 2
L 52 H C B 10 0 5 K F -1 2 1 T2 0 R3 9 7 * 1 50 _ 1 % _ 04 P C A 9 3 0 6D C U R C8 6

D A C_ G RE E N C 78 * 1 0P _5 0 V _ 0 4 . 01 U _ 16 V _ X 7 R _ 0 4
C 45 3 C4 6 3 C 4 71
R3 9 8 * 1 50 _ 1 % _ 04
1 0 U _ 1 0 V _ 08 . 1 U _ 1 0 V _ X7 R _ 04 . 0 1 U _1 6 V _ X 7 R _ 0 4
D A C_ B L U E C 73 * 1 0P _5 0 V _ 0 4 C8 5 . 1 U _ 1 0 V _ X 7R _ 04 V C OM P

R3 9 9 * 1 50 _ 1 % _ 04 C7 7 . 1 U _ 1 0 V _ X 7R _ 04 VVBW N
1 .8 V S L4 5
Reserve 150 ohm H C B 1 0 0 5 K F -1 2 1T 2 0
J20091126

1 .8 V S 1 .5 V S D A C A V DD 1 1 .0 5 V S 2 , 3 , 4 , 7 , 1 7 , 31
L46 L4 9
1 . 8V S Z4 XAVD D H C B 1 0 0 5 K F -1 2 1T 2 0 * H C B 1 00 5 K F -1 2 1 T 2 0 1 .5 V S 3 ,2 5 ,3 1
10mA 73mA 73mA 1 .8 V S 4 , 5 , 7 , 1 1 , 1 2, 1 4 , 1 5 , 1 6, 1 7 , 1 8 , 2 7
DA C A V D D2 3 .3 V S 9 , 1 0 , 1 1 , 12 , 1 3 , 1 4 , 1 5, 1 6 , 1 7 , 1 8, 1 9 , 2 0 , 2 1, 22 , 2 3 , 2 5 , 26 , 2 7 , 2 9
L 15 H C B 10 0 5 K F -1 2 1 T2 0

C 4 43 C 4 64 C4 5 9 C 59 C4 6 9 C 458
C 18 1 C1 7 8 C 1 75
* 10 U _ 10 V _ 0 8 . 1 U _ 10 V _ X 7 R _ 0 4 . 0 1U _ 1 6V _X 7 R _0 4 * 10 U _ 10 V _ 0 8 . 1 U _ 1 0 V _ X 7R _ 04 . 1 U _ 10 V _ X 7 R _ 0 4
1 0 U _ 1 0 V _ 08 . 1 U _ 1 0 V _ X7 R _ 04 . 0 1 U _1 6 V _ X 7 R _ 0 4
N C1 2 N C_ 0 4 NC 1 4 NC _ 0 4

DA CAV S S2 DAC A VS S1

SiS672_MuTITOL_VGA 3/5 B - 7
 Schematic Diagrams

SiSM672 PWR 4/5

U24E

1.8V
664m A 1.2VS
W2 3
Y2 3 VCCM M13 2024m A
C128 C135 C1 55 C154 AA2 3 VCCM IVDD M14
AB2 3 VCCM IVDD M15 C110 C146 C1 27
10U_ 10V_0 8 10U_10V_08 *1U_10 V_06 1U_10 V_06 AC2 3 VCCM IVDD M16
AC1 8 VCCM IVDD M17 10 U_ 10V_0 8 10U_10V_08 10U_10V_08
AC2 0 VCCM IVDD M18
AC1 6 VCCM IVDD M19
1.8V AD1 6 VCCM IVDD N16
AD1 7 VCCM IVDD N17
66 4mA AD1 9 VCCM IVDD N18 1.2VS
AD2 0 VCCM IVDD N20
C131 C139 C165 C129 AD2 1 VCCM IVDD R22 2024 mA
AD2 2 VCCM IVDD N22
1U_10V_06 1U_10V_06 . 1U_10V_X7R_04 .1U_10V_X7R_04 AJ2 2 VCCM IVDD N13 C140 C156 C1 05
AJ2 4 VCCM IVDD P13
AL2 3 VCCM IVDD Y13 1U_1 0V_06 1U_10V_06 1U_10V_ 06
AL2 6 VCCM IVDD Y22
AN2 1 VCCM IVDD T13
B.Schematic Diagrams

VCCM IVDD
AN2 3 IVDD U13
AN2 5 VCCM U22
VCCM IVDD 1. 2VS
AN2 7 V13
1 .8VS AN2 9 VCCM IVDD W13
VCCM IVDD
W22
2024 mA
39 2mA AP3 PWR IVDD
AA1 3
AB1 2 VCC1. 8 IVDD AA2 2 C125 C159 C121

Sheet 7 of 35 C166

10U_ 10V_0 8
C160

1U_10V_06
C1 47

1 U_10V_ 06
C115

1U_10 V_06
AB1 3
AC1 2
AC1 3
VCC1. 8
VCC1. 8
VCC1. 8
IVDD
IVDD
IVDD
AB1 4
AB1 5
AB1 6
1U_1 0V_06 .1U_10 V_X7R_ 04 .1U_1 0V_X7 R_04

AC1 4 VCC1. 8 IVDD AB1 8

SiSM672 PWR 4/5 AC1 5
AH6
VCC1. 8
VCC1. 8
VCC1. 8
IVDD
IVDD
IVDD
AB2 0
AB2 2
1 .8VS AH7 AF6
AJ 4 VCC1. 8 IVDD AF7 1. 2VS
392m A AJ 5 VCC1. 8 IVDD AK3
AJ 6 VCC1. 8 IVDD AG4 202 4mA
C114 C112 C12 0 AJ 7 VCC1. 8 IVDD AG5
AN2 VCC1. 8 IVDD AG6 C162 C133
*.1U_10 V_X7R_ 04 . 1U_10V_X7R_04 . 1U_10V_X7R_04 AK4 VCC1. 8 IVDD AG7
AK5 VCC1. 8 IVDD R13 10 U_ 10V_0 8 10U_10V_08
AL 1 VCC1. 8 IVDD AH3
VCC1. 8 IVDD
AL 2 VCC1. 8 AH4
AL 3 IVDD AH5
VCC1. 8 IVDD FOREMI
AL 4 AJ1
AM1 VCC1. 8 IVDD AJ2
VCC1. 8 IVDD
AM2 AJ3
VCC1. 8 IVDD
AM3 AK1
AN3 VCC1. 8 IVDD AK2
AN5 VCC1. 8 IVDD AC22
AN7 VCC1. 8 IVDD AC21 1. 8VS 1. 8VS
AN9 VCC1. 8 IVDD AC19
VCC1. 8 IVDD AC17 1.05 VS
3 92mA E8 IVDD C158 C157
1. 8VS F9 VDDVB1. 8 A19 80mA
C148 C1 11 C107 F8 VDDVB1. 8 VTT A20 .1U_1 0V_X7 R_ 04 *.1U_10V_X7R_04
VDDVB1. 8 VTT B19 C118 C104 C1 00
1U_10V_06 .1U_10V_X7R_04 .1U_10V_X7R_04 E1 0 VTT B20
F1 0 VDD1. 8 VTT C19 1U_1 0V_06 1U_10V_06 10U_10V_08
VDD1. 8 VTT C20
VTT D19
392m A N1 9 VTT D20
1. 8VS N2 1 PVDDH VTT E19 1.05VS
C119 C1 24 C106 P2 0 PVDDH VTT E20
P2 2 PVDDH VTT F19 80mA
R2 1 PVDDH VTT F20
1U_10V_06 1U_10V_ 06 .1 U_10V_ X7R_04
T2 2 PVDDH VTT G19 C87 C12 3 1 .8V 1.8V 1.8V 1.8V
U2 1 PVDDH VTT G20
V2 2 PVDDH VTT L 18 . 1U_10V_X7R_04
PVDDH VTT . 1U_10V_X7R_04
L 19 C137 C170 C169 C168
876mA M1 1 VTT L 20
1.2VS VDDPEX VTT
N1 1 M20 .1U_1 0V_X7 R_ 04 .1U_1 0V_X7 R_04 *.1U_10 V_X7R_0 4 *.1U_10 V_X7R_ 04
C153 C136 C132 P1 1 VDDPEX VTT M21
R1 1 VDDPEX VTT M22
10U_1 0V_08 *. 1U_10V_X7R_04 1U_10 V_06 T1 1 VDDPEX VTT M23
U1 1 VDDPEX VTT N23
V1 1 VDDPEX VTT P23
876mA W1 1 VDDPEX VTT R23
1.2VS VDDPEX VTT
Y1 1 T23
AA1 1 VDDPEX VTT U23 1.8 VS
C116 C134 C109
AB1 1 VDDPEX VTT V23
VDDPEX VTT M12
392m A
1U_10 V_06 .1U_10V_X7R_0 4 *1U_10V_06 VTTP N12
B5 VTTP P12 C149 C161 C130
C5 AUX_I VDD VTTP R12
9 2mA D6 AUX_I VDD VTTP T12 1U_1 0V_06 .1U_10V_X7R_04 .1U_10V_X7R_0 4
AUX_I VDD VTTP U12
VTTP V12
1mA G8 VTTP W12
1. 2V 1 .8V AUX1. 8 VTTP Y12
C71 C84 VTTP AA1 2
C89 C9 5 C99 VTTP
1U_10 V_06 1.05VS 2,3 ,4,6, 17,31
1U_10V_06 . 1U_10V_X7R_04 . 1U_10V_X7R_04 .01U_16V_X7R_04 1.2V 27, 31
SiSM672
1.2VS 4,2 7
1.8V 5,9 ,10,15 ,16,17 ,27,31 ,32
1.8VS 4,5 ,6,11, 12,14, 15,16, 17,18, 27

B - 8 SiSM672 PWR 4/5

 Schematic Diagrams

SiSM672_5/5

H8 H15 H13 H9 H22 H7 H20

C276D186 C276D1
86 C276D1
86 C276D186 2 9 2 9 2 9
3 8 3 8 3 8
4 1 7 4 1 7 4 1 7
5 6 5 6 5 6

MTH315D111 MTH315D111 MTH315D1

11

H26 H10 H14 H11 H6 H18

H3_5B5_0D2
_2 H3_5B5_0D2_2 2 9 2 9
AA18
AA19
AA20

AC31
AC33

AD29

AG31
33

AH29

AJ16

AK31

AL16

AN11
AN13
AN15
AN17
AA16
AA17

AA21
AA31
AA33

AB29

1
AE33

AJ10
AJ12
AJ14

AJ18
AJ20
AJ26
AJ28
AJ33

AL10
AL12
AL14

8
AL20

AL28
AL30
AL33
H4_7B6_0D3
_7 H4_0B6_0D2_8 3 8 3 8
AB3
AB4
AB5
AB7

AC2
AC3

AD2
AD3
AD4
AD5
AD7

AE3
AE3

AF3
AF4
AF5
AF2
AG2

AH1

AL6

AL1
AG
AF2

AJ8

AL8
4 1 7 4 1 7
U24F 5 6 5 6
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS

VSS
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS

VSS
VSS

VSS
VSS
VSS

VSS
VSS
VSS

VSS
VSS

VSS
VSS
VSS

VSS
VSS

VSS
VSS

VSS
VSS
VSS
A3 MTH315D111 MTH315D1
11
VSS
B2 T29
B3 VSS VSS U2
B4 VSS VSS U3
VSS VSS
U4
VSS
B21 U5

B.Schematic Diagrams
VSS VSS
B23 U6 H27 H28 H29 H25 H16 H19 H30
VSS VSS
B25 U14 H4_7B6_0D3
_7 H4_7B6_0D3_7 2 9 2 9 2 9
B27 VSS VSS U15 H4_7B6_0D3
_7 H4_7B6_0D3_7 3 8 3 8 3 8
B29 VSS VSS U16 4 1 7 4 1 7 4 1 7
B31 VSS VSS U17 5 6 5 6 5 6
VSS VSS
C1 U18
VSS VSS
C2 U19 MTH315D111 MTH315D111 MTH315D1
11
VSS VSS
C3
C4 VSS
VSS
VSS
VSS
VSS
U20
U31
U33
V2
Sheet 8 of 35
VSS
C9
C10
C11
VSS
VSS
VSS
VSS
VSS
VSS
V3
V4
V5
H24
C158D158
H23
C158D1
58
H2
C158D1
58
H1
C158D158 2
H4
9 2
H3
9 2
H12
9
SiSM672_5/5
C16 V14 3 8 3 8 3 8
C18 VSS VSS V15 4 1 7 4 1 7 4 1 7
C32 VSS VSS V16 5 6 5 6 5 6
VSS VSS
C33 V17
VSS VSS
D1 V18 MTH315D111 MTH315D111 MTH315D1
11
VSS VSS
D2 V19
D3 VSS VSS V20
D4 VSS VSS V29
D5 VSS VSS AN33
VSS VSS
D10 AN31 H17 H21 H5
VSS VSS
D12 AN19 C236D150 C67D67 C67D67
D21
VSS
VSS
GN D VSS
VSS
W3
D23 W14
D25 VSS VSS W15
D27 VSS VSS W16
VSS VSS
D29 W17
VSS VSS
E1 W18
VSS VSS
E2 W19
VSS VSS
E3 W20
E6 VSS VSS W21
E11 VSS VSS W31
VSS VSS
E13 W33
VSS VSS
E14 Y2
VSS VSS
E18 Y3
VSS VSS
E29 Y4
E30 VSS VSS Y5
E33 VSS VSS Y7
F2 VSS VSS Y14
VSS VSS
F3 Y15
VSS VSS
F4 Y16
VSS VSS
F5 Y17
F6 VSS VSS Y18
F14 VSS VSS Y19
F22 VSS VSS Y20
VSS VSS
F24 Y21
VSS VSS
F26 Y29
VSS VSS
F28 AA2
G 2 VSS VSS AA3 M9 M2 M6 M7 M8 M10 M1
G 3 VSS VSS AA14 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1
G 7 VSS VSS AA15
VSS VSS
G10 AB17
VSS VSS
P21 AB19
VSS VSS
T
21 AB21
V21 VSS VSS P19
VSS VSS
M11 M13 M5 M3 M14 M4 M12
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS
VSS
VSS

VSS
VSS

VSS
VSS
VSS

VSS
VSS
VSS

VSS
VSS

VSS
VSS
VSS

VSS
VSS

VSS
VSS

VSS
VSS
VSS

M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1

H29

M29

N14
N15

P29

R15
R16
R17
R18

R31
R33

T17
31
33

J31
J33

K29

L31

N31
N33

P14
P15
P16
P17
P18

R14

R19
R20

T14
T15
T16

8
T19
T20

SiSM672
H4
H5

L33
M2
M3

N3

N6
N7

P2
P3

R2
R3
R4

T1
J2
J3

K3
K4
K5

L2
L3
L4
L5
L7

N4
N5

R5

T3
T6
J7
G
G

SiSM672_5/5 B - 9
 Schematic Diagrams

DRII SO-DIMM_1

SO-DIMM 1 1 . 8V

112
111

118

103

104

183

121
122

193

162
150

149
11 7

13 3

1 84

19 6

1 38

16 1
96
95

81
82
87

47

77
12
48

78
71

40
28
88

72

8
J _ D I M1

VD D
VD D
V DD
VD D

VD D
VD D

VD D
VD D
V DD

V SS

VS S

VS S

V SS

V SS

VS S

V SS

V SS
V DD

V DD

V DD

VSS
VSS

VSS
VSS

VSS
VSS

VSS

VSS
VSS

VSS
VSS

VSS

VSS
VSS
5, 1 0 M _ A _ A [ 1 7: 0] M _A _D Q[ 6 3 : 0 ] 5 , 1 0
M _A _A 0 102 5 M_ A _ D Q5
M _A _A 1 101 A0 D Q0 7 M_ A _ D Q2
A1 D Q1
M _A _A 2 100 17 M_ A _ D Q6
M _A _A 3 99 A2 D Q2 19 M_ A _ D Q7
M _A _A 4 98 A3 D Q3 4 M_ A _ D Q4
A4 D Q4
M _A _A 5 97 6 M_ A _ D Q0
M _A _A 6 94 A5 D Q5 14 M_ A _ D Q1
A6 D Q6
M _A _A 7 92 16 M_ A _ D Q3
A7 D Q7
M _A _A 8 93 23 M_ A _ D Q1 3
M _A _A 9 91 A8 D Q8 25 M_ A _ D Q1 1
A9 D Q9
M _A _A 10 105 35 M_ A _ D Q1 5
M _A _A 14 90 A1 0 /AP D Q 10 37 M_ A _ D Q1 4
M _A _A 15 89 A1 1 D Q 11 20 M_ A _ D Q1 2
A1 2 D Q 12
M _A _A 16 116 22 M_ A _ D Q8
M _A _A 17 86 A1 3 D Q 13 36 M_ A _ D Q9
A1 4 D Q 14
84 38 M_ A _ D Q1 0
A1 5 D Q 15
M _A _A 13 85 43 M_ A _ D Q1 6
M _A _A 11 107 A1 6 /BA2 D Q 16 45 M_ A _ D Q2 0
BA0 D Q 17
B.Schematic Diagrams

M _A _A 12 106 55 M_ A _ D Q1 8
BA1 D Q 18 57 M_ A _ D Q1 9
D Q 19 44 M_ A _ D Q2 1
D Q 20
5 ,1 0 M_ D M0 10 46 M_ A _ D Q1 7
26 DM 0 D Q 21 56 M_ A _ D Q2 3
5 ,1 0 M_ D M1 DM 1 D Q 22
52 58 M_ A _ D Q2 2
5 ,1 0 M_ D M2 DM 2 D Q 23
5 ,1 0 M_ D M3 67 61 M_ A _ D Q2 4
130 DM 3 D Q 24 63 M_ A _ D Q2 5
5 ,1 0 M_ D M4 DM 4 D Q 25
147 73 M_ A _ D Q2 9

Sheet 9 of 35
5 ,1 0 M_ D M5 170 DM 5 D Q 26 75 M_ A _ D Q2 7
5 ,1 0 M_ D M6 DM 6 D Q 27
185 62 M_ A _ D Q2 8
5 ,1 0 M_ D M7 DM 7 D Q 28
64 M_ A _ D Q2 6
13 D Q 29 74 M_ A _ D Q3 0

DRII SO-DIMM_1
5 ,1 0 M_ D QS 0 DQ S0 D Q 30
31 76 M_ A _ D Q3 1 M _ CL K _ D DR 0 M _C L K _ D D R 1
5 ,1 0 M_ D QS 1 DQ S1 D Q 31
5 ,1 0 M_ D QS 2 51 12 3 M_ A _ D Q3 9
70 DQ S2 D Q 32 12 5 M_ A _ D Q3 7
5 ,1 0 M_ D QS 3 DQ S3 D Q 33
131 13 5 M_ A _ D Q3 5 C2 1 1 C2 2 7
5 ,1 0 M_ D QS 4 148 DQ S4 D Q 34 13 7 M_ A _ D Q3 8
5 ,1 0 M_ D QS 5 DQ S5 D Q 35
169 12 4 M_ A _ D Q3 2 *3 . 3 P _ 5 0 V _ 0 4 *3 . 3 P _ 5 0 V _ 04
5 ,1 0 M_ D QS 6 DQ S6 D Q 36
188 12 6 M_ A _ D Q3 6
5 ,1 0 M_ D QS 7 DQ S7 D Q 37 13 4 M_ A _ D Q3 4 M _ C L K _ D D R 0# M _C L K _ D D R 1 #
D Q 38 13 6 M_ A _ D Q3 3
D Q 39
5 ,1 0 M_ R A S # M_ R A S # 108 14 1 M_ A _ D Q4 7
M_ W E # 109 RA S # D Q 40 14 3 M_ A _ D Q4 0
5 ,1 0 M _W E # W E# D Q 41
M_ C A S # 113 15 1 M_ A _ D Q4 4
5 ,1 0 M_ C A S # CA S # D Q 42 15 3 M_ A _ D Q4 3
M_ C S 0 # 110 D Q 43 14 0 M_ A _ D Q4 6
5 ,1 0 M _ CS 0 # S0 # D Q 44
M_ C S 1 # 115 14 2 M_ A _ D Q4 5
5 ,1 0 M _ CS 1 # S1 # D Q 45 15 2 M_ A _ D Q4 1
M_ C K E 0 79 D Q 46 15 4 M_ A _ D Q4 2
5 ,1 0 M _ CK E 0 CK E 0 D Q 47
5 ,1 0 M _ CK E 1 M_ C K E 1 80 15 7 M_ A _ D Q4 9
CK E 1 D Q 48 15 9 M_ A _ D Q4 8
D Q 49
17 3 M_ A _ D Q5 0
D Q 50 17 5 M_ A _ D Q5 5
M_ C LK _D D R 0 30 D Q 51 15 8 M_ A _ D Q5 3
18 M _C L K _ D D R 0 CK 0 D Q 52
M_ C LK _D D R 0 # 32 16 0 M_ A _ D Q5 2
18 M_ C L K _ D D R 0 # M_ C LK _D D R 1 164 CK 0# D Q 53 17 4 M_ A _ D Q5 1
18 M _C L K _ D D R 1 CK 1 D Q 54
M_ C LK _D D R 1 # 166 17 6 M_ A _ D Q5 4
18 M_ C L K _ D D R 1 # CK 1# D Q 55
17 9 M_ A _ D Q5 6
M_ O D T 0 114 D Q 56 18 1 M_ A _ D Q5 7
5 ,1 0 M _ OD T 0 OD T 0 D Q 57
M_ O D T 1 119 18 9 M_ A _ D Q5 8
5 ,1 0 M _ OD T 1 OD T 1 D Q 58 19 1 M_ A _ D Q6 2 1 .8 V
195 D Q 59 18 0 M_ A _ D Q6 1
10 , 1 5 , 1 8 , 2 5 S _ D A T SD A D Q 60
197 18 2 M_ A _ D Q6 0
10 , 1 5 , 1 8 , 2 5 S _ C L K SC L D Q 61 19 2 M_ A _ D Q5 9
D Q 62 19 4 M_ A _ D Q6 3
D Q 63
5 ,1 0 M_ D Q S0 # 11 R1 5 2 C2 2 1
29 DQ S# 0
5 ,1 0 M_ D Q S1 # DQ S# 1
49 83 1K _1 % _ 0 4 .1 U_ 1 6 V _ 0 4
5 ,1 0 M_ D Q S2 # 68 DQ S# 2 N C1 12 0
5 ,1 0 M_ D Q S3 # DQ S# 3 N C2
129 50
5 ,1 0 M_ D Q S4 # DQ S# 4 N C3 MV R E F 1
146 69
5 ,1 0 M_ D Q S5 # 167 DQ S# 5 N C4 16 3
5 ,1 0 M_ D Q S6 # DQ S# 6 N CT E ST
186 R1 5 7 C2 2 5
5 ,1 0 M_ D Q S7 # DQ S# 7
1K _1 % _ 0 4 .1 U_ 1 6 V _ 0 4
1
M V RE F 1 VR EF 19 8
C 220 199 SA0 20 0
VD DSP D SA1
1 U _ 6. 3V _X 5 R _0 6

VS S

V SS

VS S

VS S

V SS

V SS

VS S

VS S

V SS

V SS

VS S

V SS

V SS
VSS
VSS

VSS

VSS
VSS

VSS
VSS

VSS

VSS
VSS

VSS
VSS

VSS
VSS

VSS

VSS
VSS

VSS
VSS

VSS

VSS
VSS
A S 0 A 4 21 -N 2 A N - 4F

127

128
145

171

177
187

190

155

132

156
168
3 .3 VS

13 9

16 5

1 72

1 78

1 44
18
24
41

42
54
59
65
60
66

33

15

39
53

21

34

27
9

2
3
C 510

. 1U _ 1 0V _X 7 R _0 4

1. 8 V 5 , 7 , 1 0, 1 5 , 1 6 , 1 7 , 27 , 3 1 , 3 2
3. 3 V S 6 , 1 0, 11 , 1 2 , 1 3 , 1 4, 1 5 , 1 6 , 1 7 , 18 , 1 9 , 2 0 , 2 1, 22 , 2 3 , 2 5 , 2 6, 2 7 , 2 9
1 .8 V

C 251 C2 0 2 C 2 47 C2 4 8 C 2 04 C2 5 0 C 20 3 C 223 C 22 2 C2 1 0 C2 0 9 C 2 34 C2 3 9 C2 0 5 C 2 24
+ +
* 1 5 0U _ 4 V _ B 2 *1 5 0 U _ 4 V _ B 2 1 0 U_ 1 0 V _ 0 8 1 0U _ 1 0V _0 8 1 0 U_ 1 0 V _ 0 8 10 U _ 10 V _ 0 8 1 0 U _ 1 0 V _ 08 . 1U _ 1 6V _0 4 . 1 U _1 6 V _ 0 4 .1 U_ 1 6 V _ 0 4 . 1U _ 1 6V _0 4 . 1 U _1 6 V _ 0 4 .1 U_ 1 6 V _ 0 4 . 1 U _ 1 6 V _ 04 . 1 U _ 16 V _ 0 4

B - 10 DRII SO-DIMM_1
 Schematic Diagrams

DDRII SO-DIMM_2
SO-DIMM 2 1 .8 V

5 ,9 M _A _A [ 1 7: 0]

111
117

103

133

184

121

196
193

162

138

161
149
11 2

1 18

1 04

1 83

12 2

1 50
95

81
82
87

88

47

77
12

78

72

40
28
96

48

71

8
J _ DIM 2
Layout Note:

VS S

VS S

V SS
VS S

V SS

V SS

V SS

V SS

VS S
VD D
V DD
VD D

V DD
VD D

V DD
VD D

VD D
VD D
VSS

VSS
VSS

VSS

VSS

VSS
VSS

VSS
VSS

VSS
VSS

VSS
VSS
V DD

V DD

V DD
5 ,9 M_ A _ A [ 1 7 : 0 ] M _A _A 0 102 5 M_ A _ D Q5 M _ A _ D Q [ 6 3: 0] 5 ,9 Two pieces of 56 ohms must use one
M _A _A 1 101 A0 D Q0 7 M_ A _ D Q2
0.1U bypass capacitor.
A1 D Q1
M _A _A 2 100 17 M_ A _ D Q6
M _A _A 3 99 A2 D Q2 19 M_ A _ D Q7 0 .9 VS
A3 D Q3
M _A _A 4 98 4 M_ A _ D Q4
A4 D Q4
M _A _A 5 97 6 M_ A _ D Q0
M _A _A 6 94 A5 D Q5 14 M_ A _ D Q1 M _A _A 16 8 1 C 527 . 1 U _ 1 6 V _ 04
A6 D Q6
M _A _A 7 92 16 M_ A _ D Q3 7 2 R N2 5
A7 D Q7 5 M_ OD T 2
M _A _A 8 93 23 M_ A _ D Q1 3 5 M_ C S 2 # 6 3 8 P 4 R X5 6 _ 0 4 C 241 . 1 U _ 1 6 V _ 04
M _A _A 9 91 A8 D Q8 25 M_ A _ D Q1 1 5 4
A9 D Q9 5 ,9 M_ R A S #
M _A _A 10 105 35 M_ A _ D Q1 5
M _A _A 14 90 A1 0 /A P D Q 10 37 M_ A _ D Q1 4 M _A _A 12 8 1 C 526 . 1 U _ 1 6 V _ 04
M _A _A 15 89 A1 1 D Q 11 20 M_ A _ D Q1 2 M _A _A 0 7 2 R N2 6
A1 2 D Q 12
M _A _A 16 116 22 M_ A _ D Q8 M _A _A 2 6 3 8 P 4 R X5 6 _ 0 4 C 243 . 1 U _ 1 6 V _ 04
M _A _A 17 86 A1 3 D Q 13 36 M_ A _ D Q9 M _A _A 4 5 4
84 A1 4 D Q 14 38 M_ A _ D Q1 0
A1 5 D Q 15
M _A _A 13 85 43 M_ A _ D Q1 6 M _A _A 6 8 1 C 217 . 1 U _ 1 6 V _ 04
M _A _A 11 107 A1 6 /B A2 D Q 16 45 M_ A _ D Q2 0 M _A _A 7 7 2 R N2 7
M _A _A 12 106 BA0 D Q 17 55 M_ A _ D Q1 8 M _A _A 14 6 3 8 P 4 R X5 6 _ 0 4 C 521 . 1 U _ 1 6 V _ 04
BA1 D Q 18
57 M_ A _ D Q1 9 M _A _A 17 5 4
D Q 19 44 M_ A _ D Q2 1
10 D Q 20 46 M_ A _ D Q1 7 R 15 8 5 6 _0 4 C 528 . 1 U _ 1 6 V _ 04
5 ,9 M_ D M0 D M0 D Q 21 5 ,9 M_ OD T 0
5 ,9 M_ D M1 26 56 M_ A _ D Q2 3 5 ,9 M_ C S 0 # R 15 5 5 6 _0 4
52 D M1 D Q 22 58 M_ A _ D Q2 2 R 15 4 5 6 _0 4 C 534 . 1 U _ 1 6 V _ 04
5 ,9 M_ D M2 D M2 D Q 23 5 ,9 M_ C K E 1

B.Schematic Diagrams
67 61 M_ A _ D Q2 4
5 ,9 M_ D M3 D M3 D Q 24
5 ,9 M_ D M4 130 63 M_ A _ D Q2 5
147 D M4 D Q 25 73 M_ A _ D Q2 9 8 1 C 532 . 1 U _ 1 6 V _ 04
5 ,9 M_ D M5 D M5 D Q 26 5 ,9 M_ C A S #
170 75 M_ A _ D Q2 7 M _A _A 10 7 2 R N1 1
5 ,9
5 ,9
M_ D
M_ D
M6
M7 185

13
D
D
M6
M7
D Q 27
D Q 28
D Q 29
62
64
74
M_ A _ D
M_ A _ D
M_ A _ D
Q2 8
Q2 6
Q3 0
5
5
M_ C S 3 #
M_ OD T 3
6
5
3
4
8 P 4 R X5 6 _ 0 4 C 533 . 1 U _ 1 6 V _ 04
Sheet 10 of 35
5 ,9 M_ D Q S0 D QS 0 D Q 30
5 ,9
5 ,9
5 ,9
M_ D Q
M_ D Q
M_ D Q
S1
S2
S3
31
51
70
131
D
D
D
QS 1
QS 2
QS 3
D Q 31
D Q 32
D Q 33
76
12 3
12 5
13 5
M_ A _ D
M_ A _ D
M_ A _ D
M_ A _ D
Q3 1
Q3 9
Q3 7
Q3 5
M _A _A 1
M _A _A 5
M _A _A 11
8
7
6
5
1
2
3
4
R N1 0
8 P 4 R X5 6 _ 0 4
C 240

C 244
. 1 U _ 1 6 V _ 04

. 1 U _ 1 6 V _ 04 DDRII SO-DIMM_2
5 ,9 M_ D Q S4 D QS 4 D Q 34 5 ,9 M_ W E #
148 13 7 M_ A _ D Q3 8
5 ,9 M_ D Q S5 D QS 5 D Q 35
169 12 4 M_ A _ D Q3 2 M _A _A 15 8 1 C 520 *. 1 U _1 6 V _ 0 4
5 ,9 M_ D Q S6 188 D QS 6 D Q 36 12 6 M_ A _ D Q3 6 M _A _A 9 7 2 R N9
5 ,9 M_ D Q S7 D QS 7 D Q 37 13 4 M_ A _ D Q3 4 M _A _A 8 6 3 8 P 4 R X5 6 _ 0 4 C 531 . 1 U _ 1 6 V _ 04
D Q 38
13 6 M_ A _ D Q3 3 M _A _A 3 5 4
M_ R A S # 108 D Q 39 14 1 M_ A _ D Q4 7
M_ W E # 109 R AS# D Q 40 14 3 M_ A _ D Q4 0 8 1 C 522 . 1 U _ 1 6 V _ 04
WE # D Q 41 5 M_ C K E 2
M_ C A S # 113 15 1 M_ A _ D Q4 4 7 2 R N8
C AS# D Q 42 15 3 M_ A _ D Q4 3 6 3 8 P 4 R X5 6 _ 0 4 C 530 . 1 U _ 1 6 V _ 04
M_ C S 2 # 110 D Q 43 14 0 M_ A _ D Q4 6 M _A _A 13 5 4
S0 # D Q 44
M_ C S 3 # 115 14 2 M_ A _ D Q4 5
S1 # D Q 45 15 2 M_ A _ D Q4 1 R 30 4 56 _ 0 4 C 529 . 1 U _ 1 6 V _ 04
D Q 46 5 M_ C K E 3
M_ C K E 2 79 15 4 M_ A _ D Q4 2 R 15 3 56 _ 0 4
C KE0 D Q 47 5 ,9 M_ C S 1 #
M_ C K E 3 80 15 7 M_ A _ D Q4 9 5 ,9 M_ OD T 1 R 15 6 56 _ 0 4 C 242 . 1 U _ 1 6 V _ 04
C KE1 D Q 48 15 9 M_ A _ D Q4 8 R 15 1 56 _ 0 4
D Q 49 5 ,9 M_ C K E 0
17 3 M_ A _ D Q5 0
D Q 50
17 5 M_ A _ D Q5 5
M_ C L K _ D D R 2 30 D Q 51 15 8 M_ A _ D Q5 3
1 8 M_ C L K _ D D R 2 C K0 D Q 52
M_ C L K _ D D R 2 # 32 16 0 M_ A _ D Q5 2 C 523 1U _ 1 0 V _ 06
1 8 M _ CL K _ D DR 2 # M_ C L K _ D D R 3 164 C K0 # D Q 53 17 4 M_ A _ D Q5 1
1 8 M_ C L K _ D D R 3 C K1 D Q 54
M_ C L K _ D D R 3 # 166 17 6 M_ A _ D Q5 4 C 525 10 U _ 1 0V _0 8
1 8 M _ CL K _ D DR 3 # C K1 # D Q 55
17 9 M_ A _ D Q5 6
M_ O D T 2 114 D Q 56 18 1 M_ A _ D Q5 7
M_ O D T 3 119 O DT 0 D Q 57 18 9 M_ A _ D Q5 8
O DT 1 D Q 58
19 1 M_ A _ D Q6 2
195 D Q 59 18 0 M_ A _ D Q6 1
9 , 1 5 , 1 8 , 25 S _D A T SD A D Q 60
197 18 2 M_ A _ D Q6 0
9 , 1 5 , 1 8 , 25 S _C L K SC L D Q 61
19 2 M_ A _ D Q5 9
D Q 62 19 4 M_ A _ D Q6 3
11 D Q 63 M _C L K _ D D R 2 M _ CL K _ D DR 3
5 ,9 M _ DQ S0 # D QS # 0
5 ,9 M _ DQ S1 # 29
49 D QS # 1 83
5 ,9 M _ DQ S2 # D QS # 2 N C1
68 12 0 C2 0 0 C 230
5 ,9 M _ DQ S3 # D QS # 3 N C2
5 ,9 M _ DQ S4 # 129 50
146 D QS # 4 N C3 69 1 .8 V *3 . 3 P _ 5 0 V _ 0 4 * 3 . 3 P _ 50 V _ 0 4
5 ,9 M _ DQ S5 # D QS # 5 N C4
167 16 3
5 ,9 M _ DQ S6 # D QS # 6 N CT E S T
5 ,9 M _ DQ S7 # 186 M _C L K _ D D R 2 # M _ CL K _ D DR 3 #
D QS # 7
3 .3 V S
1 R 1 62 C2 3 8
MV R E F 2 VR EF 19 8 Z 1 0 0 1 R 30 3 10 K _ 0 4
SA0
C 236 199 20 0 Z1 00 2 1 K_ 1 % _ 0 4 .1 U_ 1 6 V _ 0 4
VD DS P D SA1
1 U _ 6. 3V _X 5 R _0 6
V SS

V SS

V SS

VS S

VS S

VS S

V SS
VS S

V SS

V SS

V SS

V SS

VS S

MV R E F 2
VSS
VSS

VSS
VSS

VSS
VSS

VSS
VSS

VSS
VSS

VSS
VSS

VSS

VSS

VSS
VSS

VSS
VSS

VSS
VSS

VSS
VSS

1 .8 V
R 1 61 C2 4 5
127
139

145
165

172
177

178
190

132

156

3 .3 V S
1 28

1 71

18 7

15 5

14 4

1 68
18

41
53

54
59
65
60
66

21
33

34

15
27
39

A S 0 A 4 21 -N 2 R N -4 F
24

42

2
3

C3 5 0 C 246 1 K_ 1 % _ 0 4 .1 U_ 1 6 V _ 0 4

2 2U _ 6 . 3 V _ 08 . 1U _ 1 6V _0 4

0 .9 V S 32
1 .8 V 5, 7 , 9 , 1 5 , 1 6 , 1 7, 27 , 3 1 , 3 2
1 .8 V 3 .3 V S 6, 9 , 1 1 , 1 2 , 1 3 , 14 , 1 5 , 1 6 , 1 7 , 18 , 1 9 , 2 0 , 2 1, 22 , 2 3 , 2 5 , 2 6, 27 , 2 9

C2 5 2 C 237 C1 5 1 C 232 C 13 8 C2 3 5 C 2 07 C2 3 3 C2 0 6 C 152 C 201 C 1 67 C 16 4 C 16 3 C2 0 8

+ +
1 50 U _ 4V _B 2 * 1 50 U _ 4V _ B 2 1 0 U _ 1 0 V _ 08 1 0 U _ 10 V _ 0 8 1 0 U_ 1 0 V _ 0 8 10 U _ 10 V _ 0 8 1 0 U_ 1 0 V _ 0 8 .1 U_ 1 6 V _ 0 4 . 1 U _ 1 6 V _ 04 . 1U _ 1 6V _0 4 . 1 U _ 16 V _ 0 4 . 1 U _ 16 V _ 0 4 . 1 U _1 6 V _ 0 4 .1 U_ 1 6 V _ 0 4 .1 U_ 1 6 V _ 0 4

DDRII SO-DIMM_2 B - 11
 Schematic Diagrams

SiS307ELV
1 .8 V S V B_ P C IE VD D L1 L1<=400mils 1 .8 V S VB _ PC IEA V DD
Clo se t o 3 07 s ide
L5 H C B 1 6 0 8 K F -1 2 1 T 25 HD V B N 2_ R C 462 . 1 U _ 1 0 V _ X7 R _ 04 L8 H C B 10 0 5 K F -1 2 1 T 20
H D VBN 2 4
HD VBP2 _ R C 467 . 1 U _ 1 0 V _ X7 R _ 04
H D VBP2 4
C 24 C 27 C 16 C 34 C3 7 C2 3 HD V B N 1_ R C 450 . 1 U _ 1 0 V _ X7 R _ 04 H D VBN 1 4
HD VBP1 _ R C 452 . 1 U _ 1 0 V _ X7 R _ 04 C3 5 C3 8 C4 0
H D VBP1 4
* 1 0U _ 1 0V _0 8 * .1 U_ 1 6 V _ 0 4 * . 1 U _ 1 6 V _ 04 .1 U_ 1 6 V _ 0 4 .1 U_ 1 6 V _ 0 4 . 1U _ 1 6V _0 4 HD V B N 0_ R C 446 . 1 U _ 1 0 V _ X7 R _ 04
H D VBN 0 4
HD VBP0 _ R C 449 . 1 U _ 1 0 V _ X7 R _ 04 H D VBP0 4 1 0U _ 1 0V _0 8 .1 U_ 1 6 V _ 0 4 . 0 1U _ 1 6V _X 7 R _0 4
HD V A N 2_ R C 441 . 1 U _ 1 0 V _ X7 R _ 04
H D VAN 2 4
HD VAP2 _ R C 444 . 1 U _ 1 0 V _ X7 R _ 04
H D VAP2 4
VB _ PC IEA V D D HD V A N 1_ R C 434 . 1 U _ 1 0 V _ X7 R _ 04 H D VAN 1 4
HD VAP1 _ R C 439 . 1 U _ 1 0 V _ X7 R _ 04
H D VAP1 4
General I/O Power HD V A N 0_ R C 433 . 1 U _ 1 0 V _ X7 R _ 04
HD VAP0 _ R C 435 . 1 U _ 1 0 V _ X7 R _ 04 H D VAN 0 4
H D VAP0 4
V B _ VDD 3 V 3 .3 V S V B _ P L L1 V D D

M 13
M 12
M 11
M 10

N 13
HDV Sig nals

L11

K 10
K1 2

N1 2

N1 0
N1 1
M9
M8
M7
M6
M5
M4
M3
M2

L1 0

K 7

M1

N 8

N 6

N 4
N 5

N 3
N1

K5
K6

K8
K9

L6
K3
K4
J5
J6

J8
J9
L1
L2
L3

N9

N7

N2
L9

J7
R4 1 *2 0 m il _ s ho rt - N M N P U 22 L6 H C B 10 0 5 K F -1 2 1 T 20
3 .3 V S

V SS

VS S

VS S

VS S

V SS

V SS

VS S

VS S

HD V B N 2
H D VBP2
H DVB N1

H D VB N0
H DVB P 0

H DV A N2
H DVA P 2
HD V A N 1
H DV A P 1
HD V A N 0
H DV P HY V DD
HD V P H Y VD D
H D V PHY V DD
H DV P HY V D D
HD V P H Y VD D
H DV P HY V DD
H DV P H Y V D D
HD V P H Y VD D
H DV P HY V DD
HD V P H Y VD D
VSS

VSS
VSS

VSS
VSS

VSS
VSS

VSS

VSS
VSS

VSS
VSS

VSS
VSS

HD V P L L V S S

HD V B P 1

HD V A P 0
HD V PL L VDD

HD V P H Y VDD
C 43
C4 4 0 C2 1 C1 8
.1 U_ 1 6 V _ 0 4
1 0U _ 1 0V _0 8 .1 U_ 1 6 V _ 0 4 . 0 1U _ 1 6V _X 7 R _0 4
G 10
V D D3 3
1 .8 V S L7 P CIE _ C L K _ HD V # 1 8
G 4 H DV RE F C L K N L8
IV D D HD V RE F CL K P P CIE _ C L K _ HD V 1 8
C 51 C 53 H 4
J4 IV D D L4 V B_ H DV R S ET 0 R 3 5 4 9 9_ 1 % _ 0 4
. 1 U _ 16 V _ 0 4 *. 1U _ 1 6V _0 4 H 10 IV D D HD V R S E T 0 L5 V B_ H DV R S ET 1 R 3 8 1 2 4_ 1 % _ 0 4
IV D D HD V R S E T 1
B.Schematic Diagrams

H 11
H 12 IV D D K1 3
IV D D V A C LK VAC L K 6
H 13 J12 VBC L K
IV D D V B C LK VBC L K 6
1 .8 V S K1 1 VBH SYN C 6
F 5 VBH SYN C J11
VSS VB VSYN C VBVS YN C 6
C 25 C 19 F 6 L13 Side-Band
VSS V BHC A D VBC AD 6
F 7 L12 V B H CL K 6 Signals
. 1 U _ 16 V _ 0 4 .1 U_ 1 6 V _ 0 4 F 8 VSS V B H C LK
VSS
F 9 F13

Sheet 11 of 35 G 5
G 6
G 7
VSS
VSS
VSS
E X TR S T N
G P IO F /DV INT N
PFT EST O
E1 1
E1 0
F10
Z1 1 24
Z1 1 25
Z1 1 26
N B _R S T # 6 , 2 3

G 8 VSS P FT EST 1 G1 1 Z1 1 27

SiS307ELV G 9
H 5
H 6
VSS
VSS
VSS
307ELV P FT EST 2

DA C RS E T
B2
B1
C4 2 7
V B _ DA CV D D 3 .3 V S

L43 H C B 10 0 5 K F -1 2 1 T 20
V B_ L VD S PL L V DD

H 7 VSS D A C C O MP D2 Z1 1 28 *. 1 U _1 6 V _ 0 4
VSS T VDA C R
H 8 D1 Z1 1 29
H 9 VSS T VDA C G E2 Z1 1 30 C2 8 C4 3 2 C4 3 1
J10 VSS T VD ACB E1 Z1 1 31 V B _ D A CV S S
VSS TVC SYN C
1 0U _ 1 0V _0 8 .1 U_ 1 6 V _ 0 4 . 0 1U _ 1 6V _X 7 R _0 4
Z 1 1 02 G 2 C2
GP I OA D ACV D D V B _ D A CV DD
Z 1 1 03 H 2 C1
GP I OB DAC VS S
Z 1 1 04 H 1 D3
Z 1 1 05 G 1 GP I OC DAC VS S E3
GP I OD DAC VS S V B _ D A CV S S
G 13 E4
12 L CD VDD _ E N G 12 L C D V D D _ E N / / GP I OG DAC VS S F4
13 3 07 _ B L O N B L _ E N / / GP I O H DAC VS S
Z 1 1 06 F 1 1
GP I OI

L V DS P HY V DD //T M D S P H Y V D D

L V D S P H Y V D D / / T MD S P H Y V D D

L V D S P H Y V D D//T M D S P H Y V D D

L V D S P H Y V D D// T M DS P HY V D D
L V D S PH Y VDD //T M D SP H Y V D D
Z 1 1 07 F 3 K2

LV D S P H Y V D D / / T M D S P H Y V D D

L V DS P HY V DD //T M D S P H Y V DD
LV D S P H Y V D D / / T M D S P H Y V D D

L V DS P HY V DD //T M D S P HY V DD

L V D S P H Y V S S / / T MD S P H Y V S S

L V D S PH Y VS S / /T M DS P HYV SS

L V D S PH Y VS S / /T M DSP HYV SS

L V D S PH Y VS S//T M D SP HY V SS
L V D S P H Y V S S // T M DS P HY V S S

L V D S PH Y VS S //T M DS P HY V SS
L V D S P H Y V S S //T M DS P H Y V S S

L V D S PH Y VS S //T M DS P HYV SS
L V D S P H Y V S S / / T MD S P H Y V S S

L V D S PH Y VS S / /T M DSP HYV SS
LV D S P H Y V S S / / T M D S P H Y V S S

L V D S P H Y V S S / / T MD S P H Y V S S
LV D S P H Y V S S / / T M D S P H Y V S S

L V DS P HY V S S //T M D S P H Y V S S

L V DS P HY V S S //T M D S P H Y V S S

L V DS P HY V S S //T M D S P H Y V S S

LV D S P H Y V S S / / T M D S P H Y V S S
GP I OJ C O R E P LL V D D VB _ PL L 1 V DD

L V D S P LL V D D / / T M D S P L LV D D
L V D S P L L V S S / / T M D S P LL V S S
Z 1 1 08 G 3 J2
GP I OK V B R C LK C L K _ 1 4 M_ 3 0 7 E L V 1 8
Z 1 1 09 F 2 J1 Z1 1 17
GP I OL V B OS C O
Z 1 1 10 F 1 K1
Z 1 1 11 H 3 GP I OM C OR E P L L V S S
Z 1 1 12 J 3 GP I ON F12
GP I OO LD I D D C C L K / / D V I D D C C LK P_ D DC _ CL K 1 2
E1 3 P _ D D C _ D A T A 12
L D I D D C D A T A / / D V I D D C D A TA

L X C 2 N / / D X C 1N
E1 2 Z1 1 1 8

LX C 2 P / / D X C 1P
B L _ A DJ //D V IH P D

L X 4 N //D X 0 N
L X 2 N// NC 1 2

L X C 1 P //N C1
L X C1 N //N C2

L X 5 N//D X 1 N

L X 6 N// DX 2 N
L X 4 P //D X 0 P

L X 5 P //D X 1 P

L X 6 P // DX 2 P
L X 2 P / / N C 11

LX 0N / / N C 1 0
E X T S W I NG

L X 1 N //NC 4

L X 7 N //NC 8
L X 3 P //N C5
L X 3 N//N C6

LX 1P / / N C 3

L X 0 P //N C9

LX 7P / / N C 7
R 28 1 3 .3 V S V B _ DA C V D D
6 . 0 4 K _ 1 % _0 4
SiS3 0 7 EL V L44 H C B 1 0 0 5K F -1 2 1T 2 0
C 13

C 11

C 10

D 12
Z1 1 1 3 A1 2
Z 1 11 4 A 1 3

C1 2
A 10
A1 1

D 10
D1 1

D1 3

B1 0
B1 1
B1 2
B1 3
C 7
C 8

Z 11 1 5 C 3
Z1 1 16 C 4

E 6

E 9

B 4

B 7

D 6

D 8
D 9
C9

A8
A9

A6
A7
C5
C6
A4
A5

E5

E7
E8

B3
A2
A3

B5
B6

B8
B9

D4
D5

D7
C 447 R 2 80
1U _ 6 . 3V _X 5 R _0 6 24 K _ 1 % _ 0 4 C 426 C4 2 8 C4 2 9
Z 11 3 4 E X T S W IN G
. 1U _ 1 6V _0 4 . 0 1 U _ 1 6 V _ X7 R _ 04 *1 0 U _ 1 0 V _ 0 8

R 27 5 *2 0 m il _ s h ort -N M N P
V B_ L VD SP L L V DD
L V D S -L 2 P
12 L V D S - L2 P
12 L V D S - L2 N L V D S -L 2 N VB_ L AVD D
V B _ D A CV S S
L V D S -L 1 P
12 L V D S - L1 P L V D S -L 1 N
12 L V D S - L1 N

L V D S -L 0 P
12 L V D S - L0 P L V D S -L 0 N
12 L V D S - L0 N

12 LV D S -L C L K P L V D S -L C L K P
L V D S -L C L K N 3 . 3V S VB_ L AVD D
12 LV D S -L C L K N

12 L V D S -U C L K P L V D S -U C L K P L7 H C B 16 0 8 K F -1 2 1 T 25
L V D S -U C L K N
12 L V D S -U C L K N

12 L V D S -U 0 P L V D S -U 0 P C 22 C3 2 C3 3 C 46 C 45
L V D S -U 0 N
12 L V D S -U 0 N
* 10 U _ 10 V _ 0 8 .1 U_ 1 6 V_ 0 4 . 1 U _ 1 6 V _ 04 * .1 U_ 1 6 V _ 0 4 . 1 U _1 6 V _ 0 4
L V D S -U 1 P
12 L V D S -U 1 P 1 .8 V S 4 , 5 , 6 , 7 , 1 2 , 1 4, 15 , 1 6 , 1 7 , 1 8, 2 7
L V D S -U 1 N
12 L V D S -U 1 N 3 .3 V S 6 , 9 , 1 0 , 1 2 , 13 , 1 4 , 1 5 , 1 6 , 17 , 1 8 , 1 9 , 2 0, 21 , 2 2 , 2 3 , 2 5, 2 6 , 2 7 , 2 9
L V D S -U 2 P
12 L V D S -U 2 P
L V D S -U 2 N
12 L V D S -U 2 N

B - 12 SiS307ELV
 Schematic Diagrams

PANEL, CRT
CRT
3. 3 V S
C1 4 *. 1 U _ 1 6 V _ 04 C 15 *. 1 U _ 16 V _ 0 4 V S Y NC D S D A C _V S Y N C Q7 R 26 2 2 . 2 K _0 4
3 .3 VS 3. 3 V S
2 N 7 0 0 2W G
Q1 3 G
R2 7 4 R 2 65 2 N 7 0 0 2W D DC A DA T D S D A C_ DD CA DA T

5
1

5
1
3 90 _ 0 6 3 9 0 _0 6 Z 1 7 06
5 VS R2 6 6 2 .2 K _ 0 4 D2 1 S CS 3 3 5
V S Y NC 4 2 D A C _V S Y N C HS Y NC 4 2 DA C_ HS Y NC C A
D A C _H S Y N C 5V S
HS Y NC D S
R2 6 8 2 .2 K _ 0 4 HS Y NC L3 C R T _H S Y N C
U 2 U1 Q1 0 G F C M1 0 0 5K F -12 1 T 0 3
* S N 7 4 A H C 1 G1 2 5 D C K R *S N 7 4A H C 1G 1 25 D C K R 2 N 7 0 0 2W D DC A CL K D S D A C_ DD CA CL K V S Y NC L4 C R T _V S Y N C

3
F C M1 0 0 5K F -12 1 T 0 3
Q2 7 G DD CA C L K L 42 C R T _D D C A C LK
5 VS
2 N 7 0 0 2W F C M1 0 0 5K F -12 1 T 0 3
R 27 3 2 . 2 K _0 4 DD CA D A T L2 C R T _D D C A D A T
3. 3 V S
F C M1 0 0 5K F -12 1 T 0 3
Zo=75 Ohm
1 .8 VS
C

C
A

A
J _ CR T 1
C -1 08 A X 1 5 F S
D 18 D1 9 D 20
*B A V 99 * BAV9 9 *B A V 9 9 L 64 F C M1 0 0 5K F -60 0 T 0 3 L 38 F C M1 0 0 5K F -6 00 T 0 3 RED 1 D8 R1 8 3 90 _ 0 4 D6 *B A V 99
A C
3 .3 V S
AC

AC

9 Z 1 70 1 C A A
D A C _R E D 5V S
L 65 F C M1 0 0 5K F -60 0 T 0 3 L 39 F C M1 0 0 5K F -6 00 T 0 3 GR E E N 2 R1 4 3 90 _ 0 4 C RT _ D DC A DA T AC
D A C _G R E E N 10 *S C S 7 5 1 V -4 0 C
5V S
D A C _B L U E L 66 F C M1 0 0 5K F -60 0 T 0 3 L 41 F C M1 0 0 5K F -6 00 T 0 3 B L UE 3
11 D7 *B A V 99
4 A

B.Schematic Diagrams
R2 6 3 R 26 7 R2 6 9 C4 1 0 C4 1 6 C4 1 9 C 6 23 C 62 4 C6 2 5 C4 0 9 C 41 2 C 4 15 12 C RT _ D DC A DA T C RT _ H S Y N C AC
5 C
75 _ 1 % _0 4 7 5 _1 % _ 0 4 75 _ 1 %_ 0 4 1 0p _ 5 0 V _ N P O _0 4 1 0p _ 5 0 V _N P O _0 4 2 2p _ 5 0V _N P O_ 0 4 1 0p _ 5 0V _N P O _0 4 13 C RT _ H S Y N C
1 0p _ 5 0 V _N P O _0 4 2 2 p_ 5 0 V _ N P O _ 04 10 p _ 50 V _ N P O_ 0 4 6 D9 *B A V 99
2 2 p _5 0 V _ N P O_ 0 4 1 0 p _5 0 V _ N P O_ 0 4 14 C RT _ V S Y NC A
7 C RT _ V S Y NC AC
15 C RT _ D DC A CL K C

Sheet 12 of 35
8
D2 2 *B A V 99

G ND 1
GN D 2
C 8 C9 C 12 C 42 2 A
C RT _ D DC A CL K AC

PANEL, CRT
1 0 0 0 P _5 0 V _ 0 4 2 2 0P _ 5 0 V _ 04 2 2 0 P _ 5 0V _ 0 4 1 0 00 P _ 5 0 V _ 04 C
J 20 09 11 25

PANEL D3 3
3 .3 V

C
D A C_ RE D L C D _ B R I GH TN E S S A C C 62 2
D A C _ GR E E N D A C _R E D 6
D A C_ G RE E N 6 A . 1 U _1 6 V _ 0 4
D AC_ BL UE
D A C _B LU E 6
BAV9 9
D A C_ HS Y N C
D A C_ H S Y N C 6
D AC_ VSY NC
D A C_ V S Y NC 6
D A C_ DD CA CL K V IN V IN _ INV
D A C_ DD CA DA T D A C_ D DC A CL K 6 J _ L CD 1
D A C_ D DC A DA T 6
L40 H C B 1 60 8 K F -1 2 1 T2 5
80 mil 1 2 P _ DD C_ D A T A
L CD V DD _ E N 1 2 P _ D D C _ C LK P _ D D C _ D A TA 1 1
L CD V DD _ E N 1 1 C 4 13 * . 1U _ 50 V _ 0 6 3 4 P _ D D C _ C LK 11
C 4 18 C 4 11 5 3 4 6
5 6
7 8 L CD _ B RIG HT N E S S L CD _ B RIG HT N E S S 1 9
. 1 U _5 0 V _ 0 6 . 1 U _5 0 V _ 0 6 9 7 8 10
11 9 10 12 I N V _B LO N _ R
11 12 I N V _ B L ON _R 13
13 14
LV D S -L C LK N 15 13 14 16 L V D S -L2 N
1 1 L V D S -L C L K N 15 16 L V D S -L 2N 11
1 1 L V D S -L C L K P LV D S -L C LK P 17 18 L V D S -L2 P L V D S -L 2P 11
19 17 18 20
3 .3 V 19 20
LV D S -L 1 N 21 22
SYS1 5 V SY S1 5 V 11 L V D S -L 1 N LV D S -L 1 P 23 21 22 24
11 L V D S -L 1 P 23 24
25 26 3 .3 V S
LV D S -L 0 N 27 25 26 28
11 L V D S -L 0 N 27 28
Q6 C 11 LV D S -L 0 P 29 30
11 L V D S -L 0 P 29 30
R1 3 R 12 1 6 C4 0 7
D D . 1 U _ 1 0 V _ X 7R _ 04 8 71 2 6 -3 00 6 . 1 U _ 1 6V _0 4
1M _ 04 1 M_ 0 4 2 5
D D 2A
Z 17 0 3 Z1 704 3 4 2A P LV D D
Q9 Q 8 G S PL VD D C 3 C 4 08
D

D TC 1 14 E U A C 2 N 7 0 02 W S I 3 4 5 6 B D V -T 1 -E 3
LC D V D D _E N B N TG S 4 1 41 N T1 G R 8 R 10 4 . 7 U _ 1 0 V _ 08 . 1 U _5 0 V _ 0 6
G C 10 R 9
E * 1 00 _ 1 % _0 6 * 2 00 _ 1 % _0 6
. 0 1 U _ 1 6 V _X 7 R _0 4 * 1 00 K _ 0 4
S

Z 17 0 5
D

Q5 LV D S -U 1 N L V D S -U 2 N
11 L V D S -U 1N L V D S -U 2 N 11
G *2 N 70 0 2 W LV D S -U 1 P L V D S -U 2 P
11 L V D S -U 1P L V D S -U 2 P 11
7 /1 3 LV D S -U C L K P L V D S -U 0 N
S

1 1 L V D S -U C L K P L V D S -U 0 N 11
Modif y C4 from 0.1 uF c ha nge t o 1 1 L V D S -U C L K N
LV D S -U C L K N L V D S -U 0 P
L V D S -U 0 P 11
0 .0 1uF f or LVDS pow e r t im e.
3. 3 V S CLOSE TO J_LCD1
R 26 0 R 26 1

2 .2 K_ 0 4 2 . 2 K _ 04
1 .8 VS 4 , 5 , 6 , 7 , 1 1, 14 , 1 5 , 1 6, 1 7 , 1 8 , 2 7
P _ D D C _ D A TA 3 .3 V 2 , 1 3 , 1 5 , 16 , 1 7 , 2 0, 23 , 2 4 , 2 5, 3 0 , 3 1 , 32
3 .3 VS 6 , 9 , 1 0 , 1 1, 1 3 , 1 4 , 1 5, 1 6 , 1 7 , 18 , 1 9 , 2 0, 21 , 2 2 , 2 3, 2 5 , 2 6 , 2 7, 2 9
P _ D D C _ C LK
5 VS 1 3 , 2 0 , 2 1, 2 2 , 2 3 , 24 , 2 6 , 2 7
S YS1 5 V 2 7 ,3 0
V IN 2 3 , 2 8 , 2 9, 3 0 , 3 1 , 32

PANEL, CRT B - 13
 Schematic Diagrams

INVERTER, BLURTOOTH, FAN

INVERTER CONNECTOR
3 .3 V 3. 3V
Bluetooth
R2 6 4 1 0 0 K _ 04 U2 0 A C 41 4

14
74 L V C 0 8P W U 2 0B

14
1 7 4 L VC0 8 PW * . 1U _ 1 6V _ 0 4
15 S B _ B L ON
3 Z18 07 4
2 6
19 BKL _ EN
5

U 20C

14
7 4 L V C 08 P W

7
Z 1 80 8 9
3 0 7 _ B LO N _3 V 8I N V _ B L ON R 1 7 4 . 7 K _ 04 INV _ B L O N_ R
3 .3 V I N V _ B L ON _R 12
Z 1 80 9 10

R 3 63 1 0K _0 4 R 19 3. 3 V L57 3 VS_ BT

14
B.Schematic Diagrams

C 13 H C B 1 00 5 K F -1 2 1 T 20 50mil

7
12 1 M _0 4
1 9, 2 3 L ID _ SW #
11 1U _ 6 . 3V _0 4
13 C5 1 5 C 516
1 5 , 1 9, 2 3 S B _ P W R O K
U 20D .1 U_ 1 6 V _ 0 4 1 0 U _1 0 V _ 0 8
7 4 L VC0 8 PW

7
J _ BT1

Sheet 13 of 35 16 U S B _ P N2
1
2
3
16 U SB_ PP2 4

INVERTER, 3. 3V 3 .3 V
1 9 ,2 5 BT _ DET #

V D D3
R3 0 2 1 0 K_ 0 4
BT _ EN#

Q 28
5
6
87 2 1 2 -06 L

D
BLURTOOTH, FAN R1 5 R 16
1 9 , 2 5, 26 B T_ E N
G
2 N 7 00 2 W 6-20-41A10-106

J_BT1
1 0K _0 4 1 0 K_ 0 4

S
1 6

Z 1 8 10 3 07 _ B L O N _ 3 V
Q1 1

D
D TC 1 14 E U A C
B Q 12
11 30 7 _ B L ON
G
E 2 N 7 0 0 2W

S
FAN CONTROL
5 VS_ F A N 5 VS U 27
C P U_ F O N# 1 8
2 FO N GN D 7
40MIL V IN GN D
3 6
4 V O UT GN D 5
19 CP U_ F A N VSE T GN D

5 VS G 9 90 P 1 1 U

R2 9 7

*1 0 K _ 04

C P U_ F O N# 5V S 5 VS_ F AN
40MIL J _ F AN 1
1
R2 9 8
C 509 C5 1 2 2
3
*0 _ 04
. 1U _ 16 V _ 0 4 1 0U _ 1 0V _0 8 8 5 2 0 5- 03 0 0 1 _L
V DD 3 1 6, 1 9 , 2 5 , 2 6, 27 , 2 8 , 3 0, 32
3. 3 V 2 , 12 , 1 5 , 1 6 , 1 7, 2 0 , 2 3 , 2 4, 2 5 , 3 0 , 3 1, 3 2
J_FAN1
3. 3 V S 6 , 9, 10 , 1 1 , 1 2 , 14 , 1 5 , 1 6 , 17 , 1 8 , 1 9 , 20 , 2 1 , 2 2 , 2 3, 2 5 , 2 6 , 2 7, 2 9
3
19 C P U _ F A N S E N 5V S 1 2, 2 0 , 2 1 , 2 2, 23 , 2 4 , 2 6, 27
R3 0 0 4 . 7 K _ 04 1
3 .3 VS V IN 1 2, 2 3 , 2 8 , 2 9, 30 , 3 1 , 3 2
C A
D 23 S C S 5 5 1 V -3 0

B - 14 INVERTER, BLURTOOTH, FAN

 Schematic Diagrams

968_PCIE_IDE_MuTIOL_SPI 1/4

6-16-47238-45A

P CI_ A D3 0
PC I_ AD 2 9

P CI_ A D 2 6
PC I_ AD 2 5

P CI_ A D 2 2
PC I_ AD 2 1

P CI_ A D 1 8
PC I_ AD 1 7

P CI_ A D1 5
PC I_ AD 1 4
PC I_ AD 1 3

P CI_ A D1 1
PC I_ AD 1 0
P C I_ A D3 1

P C I _ A D 28
P C I _A D 2 7

P C I _ A D 24
P C I _A D 2 3

P C I _ A D 20
P C I _A D 1 9

P C I_ A D1 6

P C I_ A D1 2

P CI_ A D 3
P C I_ A D 9

P CI_ A D 7
P C I_ A D 6
P C I_ A D 5

P C I_ A D 2
P C I_ A D 1
P C I_ A D8

P C I _A D 4

P C I _A D 0
3 .3 VS RN 1 3
8 P4 R X8 .2 K_ 0 4
1 8 P CI _I NT # B
2 7 P CI _I NT # A
3 6 P CI _I NT # C
4 5 P CI _I NT # D

K 5

M1
M2

M4
P 3
R 1
R 2

R 4
R 3

T 4

T 5
U 4
PCI_REQ#0

H5
J4
J3
K1
K2
J5
K4
K3

L4
L3

L5

P5

T1
T2

T3
U1
U2

U3
V1
L2
U 28 A
R 327 8 .2 K_ 0 4 P C I _R E Q # 0 PCI_GNT#0

AD 3 1

A D2 9
AD 2 8
AD 2 7

A D2 5
AD 2 4
AD 2 3

A D2 1
AD 2 0
AD 1 9

A D1 7
AD 1 6

A D1 4
AD 1 3
AD 1 2

A D1 0
AD 9
AD 8
AD 7
A D6
AD 5
AD 4

A D2
AD 1
AD 0
FOR MR510

A D 30

A D2 6

A D2 2

A D1 8

A D 15

A D 11

A D3
V 3
A V D D_ ID E IDE _ A V D D
RN 3 0 P CI_ R EQ #4 H 2 V 4
8 P4 R X8 .2 K_ 0 4 P CI_ R EQ #3 H 1 PR EQ 4# AV SS_ ID E IDE _ A V S S
1 8 P C I _R E Q # 2 P CI_ R EQ #2 G 3 PR EQ 3#
PR EQ 2#
2 7 P C I _R E Q # 1 P CI_ R EQ #1 G 4
P CI_ R EQ #0 PR EQ 1#
3 6 P C I _R E Q # 3 G 2
4 5 P C I _R E Q # 4 PR EQ 0#
Z1901 J2 A E2 0 I D E _P D I O R D Y
PG NT 4 # ICH R DY A I D E _P D D R E Q
RN 2 9 Z1902 J1 A B1 8
PG NT 3 # IDR E Q A I D E _I R Q
8 P4 R X4 .7 K_ 0 4 Z1903 H 3 A B1 9
5 4 P CI _F R A ME # Z1904 H 4 PG NT 2 # II RQ A A C2 0 Z 1 9 05
6 3 P CI _I R D Y # P CI_ G NT # 0 G 5 PG NT 1 # C BL ID A R1 8 6 * 1 0K _ 04
PG NT 0 #
7 2 P CI _P L OC K #
8 1 P CI _S E R R # P CI_ C /BE# 3 L1
P CI_ C /BE# 2 M3 C/ BE3 #

B.Schematic Diagrams
RN 1 4 P CI_ C /BE# 1 N 5 C/ BE2 # A F20 I D E _P D I O R #
C/ BE1 # I I OR A #
8 P4 R X4 .7 K_ 0 4
1
2
8
7
P C I _S T OP #
P C I _D E V S E L #
4 ,6 P C I_ INT # A
P CI_ C /BE# 0

P CI_ IN T # A
R 5

F 5
C/

IN
BE0 #

TA #
PCI IIO W A #
ID A C K A #
A D1 9
A C1 9
I D E _P D I O W #
I D E _P D D A C K #

3 6 P C I _T R D Y # P CI_ IN T # B F 4
IN TB #
4 5 P CI_ IN T # C F 3
P CI_ IN T # D G 1 IN TC # A D2 1 I D E _P D A 2
IN TD # IDS A A 2 A D2 0 I D E _P D A 1

Sheet 14 of 35
IDS A A 1
P CI_ F R A M E # N 1 A B2 0 I D E _P D A 0

IDE
1 .8 VS FR AM E# IDS A A 0
P CI_ IR D Y # N 2
P CI_ T R DY # M 5 IR DY #
P CI_ S T O P # N 3 T RD Y #

R 167 P CI_ S E RR # P 2
P 4
STO P#

SER R #
ID E C S A 1 #
ID E C S A 0 #
A C2 1
A B2 1
I D E _P D C S 3 #
I D E _P D C S 1 # 968_PCIE_IDE_Mu
PAR

TIOL_SPI 1/4
150_1% _04 P CI_ D E V S E L # N 4
DE V S E L #
P CI_ P L O C K # P 1
P L O CK #
S Z V RE F A E1 9 IDE _P DD 0
V 2 ID A 0 A D1 8 IDE _P DD 1
18 PC L K_ SB P C ICL K ID A 1
D 5 A C1 7 IDE _P DD 2
23 S B _ P C IR S T # P C IRS T # ID A 2
R 166 C2 5 6 A F18 IDE _P DD 3
ID A 3 A B1 6 IDE _P DD 4
4 9 .9 _ 1 % _ 0 4 .1 U_ 1 0 V _ X 7 R_ 0 4 ID A 4 A E1 7 IDE _P DD 5
ID A 5
A D1 6 IDE _P DD 6
ID A 6
A F16 IDE _P DD 7
AC 2 6 ID A 7 A E1 6 IDE _P DD 8
18 Z_ C L K1 ZC LK ID A 8 A F17 IDE _P DD 9
ID A 9
V 22 A C1 6 IDE _P DD 10
6 ZSTB_ D 0 ZSTB0 ID A1 0
V 23 A D1 7 IDE _P DD 11
6 Z S T B _ D #0 ZSTB0 # ID A1 1 A E1 8 IDE _P DD 12
V 25 ID A1 2 A B1 7 IDE _P DD 13
1 .8 VS ID E _ A V DD 6 ZSTB_ D 1 ZSTB1 ID A1 3
V 26 A F19 IDE _P DD 14
6 Z S T B _ D #1 ZSTB1 # ID A1 4
A C1 8 IDE _P DD 15
L30 H C B 1 6 0 8 K F -1 2 1 T 2 5 ID A1 5
AA 2 3
6 Z U RE Q Z U RE Q
AA 2 4
6 Z D RE Q Z D RE Q
C 355 C3 5 1 C 35 2
1 .8 V S
* . 1 U _1 0 V _ X 7 R _ 04

N C 11 N C_ 0 4
*. 0 1 U _1 6 V _ X 7 R _ 04 *. 1U _ 1 0 V _ X 7 R _ 0 4
R 175 56_04 S Z CM P _ N AB 2 4
Z C MP _N
MuTIOL S P I _ C S 0N
A E 2 1 S P I _ C S 0#
R 165 56_04 S Z CM P _ P AB 2 5 A F21 Z19 07
Z C MP _P S P I _ C S 1N

SPI
I D E _A V S S A D 2 2 S P I _ MI S O
S P I_ DO A E 2 2 S P I _ MO S I
S P I_ D I
A F22 S P I_ CL K
SPI_ C L K
1 .8 VS A V DD _ S Z 4 X AA 2 2 3 .3 V S
A V DD _ S Z 4 X A V D D _Z 4 X
AB 2 3
AVS S_ SZ4 X AVS S_ Z4 X
L23 H C B 1 6 0 8 K F -1 2 1 T 2 5 A F23 SPI_ T R AP R 17 4 * 4 . 7 K _ 04
S P I_ HA R D W A R E _ T R A P
SZ VR EF AB 2 6
ZVR EF
0:LPC Internal Pull down
C 296 C2 7 4 C 26 2
1:SPI External Pull up

Z A D1 0
U 2 5 ZAD 1 1
T2 3 ZAD 1 2
Z A D 13
Z A D1 4
A A2 6 ZAD 1 5
ZAD 1 6
Y 25 Z A D 0
Y2 3 ZAD 1
Z A D2
Z A D3
W 2 2 ZAD 4
W 2 4 ZAD 5
Z A D6
Z A D7
U 2 4 ZAD 8
U 2 2 ZAD 9
1 0 U _ 1 0V _ 08 . 0 1U _ 1 6 V _ X 7 R _ 0 4 . 1 U _1 0 V _ X 7 R _ 04

N C 3 N C_ 0 4 SiS9 6 8
W21

W25
Y2 2

Y2 6

U2 1

T22

T25
T26
AVSS_ S Z4 X
Z A D1 0
ZAD 1 1
Z A D 12
Z A D1 3
ZAD 1 4
ZAD 1 5
Z A D 16
ZAD 0
Z A D1
Z A D2
ZAD 3
ZAD 4
Z A D5
Z A D6
ZAD 7
ZAD 8
Z A D9

6 Z A D [ 1 6: 0]

1. 8V S 4 , 5 , 6 , 7 , 1 1 , 1 2 , 1 5 , 1 6 , 1 7 , 1 8, 27
3. 3V 2 , 1 2 , 1 3 , 1 5 , 1 6 , 1 7 , 2 0, 23 , 2 4 , 2 5 , 3 0 , 3 1 , 3 2
3. 3V S 6 , 9 , 1 0 , 1 1 , 1 2 , 1 3 , 1 5 , 1 6, 17 , 1 8 , 1 9 , 2 0 , 2 1 , 2 2 , 2 3, 25 , 2 6 , 2 7 , 2 9

968_PCIE_IDE_MuTIOL_SPI 1/4 B - 15
 Schematic Diagrams

968_PCIE_LAN_GPIO 2/4

U 28 B

C 8 1 .8 V A V D D _ GM A C C M P
A V S S _G MA C C MP 1 8 D 9 A V S S _ GM A C C M P
A V D D _G MA C C MP 1 8 A V D D _G M A C C MP
AC 2 3 L29 H C B 1 0 0 5 K F -1 2 1T 2 0
2 H _ I N I T# I N I T#
2 H _A 20 M # AE2 6 B 8
3 .3 V
R N1 2
1
8 P 4 R X 10 K _ 0 4
8 A G P S T OP #
2
2
H _ S MI #
H _ INT R
AD 2 3
AC 2 2
AE2 5
A 2 0 M#
SM I#
I N TR
CPU_S OS C 2 5M H O
O S C 2 5 MH I
A 8

A 12
C3 4 6 C 3 45
2 H _ N MI NM I G T XC L K
2 7 S C I# AE2 4 F 14 . 1U _ 1 0V _X 7 R _0 4 .0 1 U_ 1 6 V _ X 7 R_ 0 4
2 H _I GN N E # IG NN E# E X TC L K
3 6 P C IE _ RS T # AF2 4
4 5 S W I# 2 H_ F E R R# AF2 5 F ER R# B 11 NC 9 N C_ 0 4
2 H_ S T P C L K # S T P C LK # T XC L K
AD 2 4
2 H_ C P U S L P # C P U S L P # / C P U S TO P #
R 340 1 0K _0 4 CP U_ S T P # C 12
A GP B U S Y # AE2 3 TX E N C 11 A V S S _ G MA C C MP
6 A GP B U S Y # BM BUSY # TX E R
R 313 1 0K _0 4 P S O N#
R 315
R 319
4 . 7K _0 4
1 0K _0 4
PM E#
PW R _ BT N#
2
2
H _ P R O C H O T#
H _ TH R MT R I P #
AC 2 4
AD 2 5 P R OC H O T #
T H E R MT R I P #
APIC T X D0
T X D1
D 12
A 13
B 13
R 317 *1 0 K _ 0 4 SB_ M UT E# T X D2 C 13
Y 5 T X D3 3. 3V
19 L PC _ AD0 L AD0
A A4 A 14

GMAC
19 L PC _ AD1 A B2 L AD1 R G MC MP _N B 14
19 L PC _ AD2 L AD2 R GM C M P _ P
A B3 C 14
3 .3 V S 19 L PC _ AD3 L AD3 R GM V R E F
R3 6 7
A B1
LPC A 11 R 38 0 4 .7 K _ 0 4
B.Schematic Diagrams

19 L PC_ F R AM E# L F R A ME # R XC L K
R 403 1 0K _0 4 L CD ID0 L P C_ L DR Q # A B4 1 0 K _ 04
S B _ T HE RM # L D R Q#
R 404 1 0K _0 4 19 L PC_ SIR Q L P C_ S IR Q A A5 C 10
SIR Q RX D V E 12 R 379 *0 _ 0 4
RX E R
A 10 J M_ D 3 MO D E
R 405 1 0K _0 4 B D _I D R 406 *1 0 K _ 0 4 R X D0 C 9
R X D1

D
B 9
R 234 1 0K _0 4 P M _C L K R U N # R X D2 A 9 Q2 9
R X D3

Sheet 15 of 35 R 231
R 236
1 0K _0 4
1 0K _0 4
S M I#
L P C_ L D RQ # J20091130 R T C _C L K O
R T C _C L K I
E2
E1 OS C 3 2 K H O C OL
E 10
E 11
1 8 , 2 0 LA N _ C L K R E Q #
G 2 N7 0 0 2 W

S
OS C 3 2 K H I CR S
E 14

968_PCIE_LAN_GPI R
R
R
173
230
235
4 . 7K _0 4
1 K _ 04
1 K _ 04
AG PBU SY#
S _ CL K
S _ DA T
1 6 R T C _P W R O K
1 3 , 1 9 , 2 3 S B _ P W R OK
S B _ P W R OK
F1
E4
BAT O K
P W R OK
RTC M DC
M DIO

G P I O2 1
E 13

D 8
R 316 1 0K _0 4 GA 20 # F 8

O 2/4 R 318 1 0K _0 4 S B _ K B C R S T#
V C C_ R T C D 1
RT C V DD
G P I O2 2
G P I O2 3
G P I O2 4
E
A
8
7
R 38 1 4 .7 K _ 0 4
J20091126
C3 6 7 D 2 M 26
RT C V S S P R X0 + PC IE _ RX P 0 _ N E W _ CA RD 2 5
M 25 PC I E _ R X N 0 _N E W _ C A R D 2 5
1 U _ 6 . 3 V _ 04 PRX0 - N 24
P T X0 + PC I E _ T X P 0 _N E W _ C A R D 2 5
N 23
PT X0 - K 26 PC I E _ T X N 0 _ N E W _ C A R D 25
P R X1 + PC IE _ RX P 1 _ C A RD RE A DE R 2 0

HD Audio
R 339 1 0K _0 4 S B _ D P RS L P V R K 25
PRX1 - PC I E _ R X N 1 _C A R D R E A D E R 20
R 33 8 * 1 0 mi l _ s ho rt -N M N P S E N T E S T E5 L24 C 258 . 1U _ 1 0V _X 7 R _0 4
21 A Z _S D I N 0 C 4 HD A _ S D IN0 P T X1 + L23 C 259 . 1U _ 1 0V _X 7 R _0 4 PC I E _ T X P 1 _C A R D R E A D E R 20
24 A Z _S D I N 1 HD A _ S D IN1 PT X1 - PC IE _ T X N1 _ CA R D RE A D E R 2 0
C 307 . 1U _ 1 0V _X 7 R _0 4 A U X _ P W R OK
2 1 , 2 4 A Z _ S D OU T Y 3 F 26 Z 20 0 5
H D A _ S D OU T N C1 1

PCI-Express
C 578 . 1U _ 1 0V _X 7 R _0 4 S B _ P W R OK Y 2 F 25 Z 20 0 6
21 , 2 4 A Z _ S Y NC HD A _ S Y NC N C1 0
R2 4 7 * 1 0K _0 4 G 24 Z 20 0 7
3 .3 V B3 N C9 G 23 Z 20 0 8
2 1, 2 4 A Z _ RS T #
R3 2 1 Z2016 Y 1 HD A _ RE S E T # N C8 H 26 Z 20 0 9 PCI-Express X1
2 1 , 2 4 A Z _ B I T C LK HD A _ B IT _ CL K N C7
0 _0 4 H 25 Z 20 1 0
N C6 J24 Z 20 1 1
N C5 J23 Z 20 1 2 Lane 0 New Card
N C4
C5 6 4
3 3P _ 5 0 V _ 0 4 Lane 1 Mini Card( Wireless LAN)
P 26

ACPI/Others
P CL K 1 0 0 P P C IE _ CL K _ S B 1 8
P 25 P C I E _ C L K _ S B # 18
P C L K 1 0 0N
A A2
18 C L K _ 1 4 M_ 9 6 8 S E NT E S T F2 OS C I R 25
E N TE S T A V DD _ P E X T RX AV D D_ PEX T R X 3 .3 V
A A1 R 26
26 S P K R OU T SPK A V S S _ P E X T RX A V S S _ P E XT R X
P W R_ B T N # E6
19 P W R_ BT N # PW R BT N#
P ME # A6 P 22 P -R S E T0 R1 7 0 4 9 9 _1 % _ 0 4
19 PM E# PM E# RSET 0

C
23 PS O N# P S ON # E7 P 21 P -R S E T1 R1 7 1 1 2 4 _1 % _ 0 4
PSO N# RSET 1 R 2 09 D 12
A U X _ P W R OK C 3 R3 6 4 0_04
6 A U X _ P W R OK Z 20 0 1 A5 A U XO K R 21 R3 6 5 * 0_ 0 4 * 2 . 2K _0 4 * S C S 7 5 1 V -4 0
AC PIL ED P C IE P R S NT 1 R 23
P C IE P R S NT 0
R3 6 6 0_04

A
R 20 2 *1 0 m li _ s ho rt - N M N P
K B C _ R S M R S T# 1 9
AUX POWER MAIN POWER P C IE _ P R S NT 0

19 S CI#
S CI#
S W I#
D 6
A4
GP I O7 / G P W A K #
GPIO GP I O0
U 5
A B5
B D_ ID R3 7 8 * 0_ 0 4 J M_ D 3M O D E
P C IE _ P R S NT 0 2 5
A U X _ P W R OK A U X _P W R O K 6

19 SW I# GP I O8 / R I N G GP I O1 / L D R Q 1# / P C I E _ H OT P L U G SB_ BL O N 1 3
22 S B _ M UT E # S B _ MU TE # C 6 V 5 S B _ TH E R M# R 2 07 C 34 0
C 2 GP I O9 / H D A _ S D I N 2 G P I O 2 / TH E R M# W 4 S MI #
23 SB_ SU SC # SL P_ S5 # G P I O 3 / E X TS MI # S M I# 19
A GP S T O P # F6 W 3 C L K RU N # R2 3 7 *0 _ 0 4 * 3 30 K _ 0 4 * 10 U _1 0 V _ 0 8
6 AG PSTO P# C P U _S TP # D 4 GP I O1 1 / S T P _ P C I # / A GP S T OP # GP I O4 / C LK R U N # W 2 L C DID 0 P M _ CL K R UN # 1 9
PCI-Express 6 C PU_ ST P #
S B_ DPR SL PV R D 3 GP I O1 2 / C P U S T P # GP I O5 / P R E Q5 # W 1 C R_ W A K E #
6 S B _ D P RS L P V R GP I O1 3 / D P R S L P V R G P I O6 / P GN T5 # C R _ W A K E # 20
P CIE _ R S T # B5 J20091130
C 7 GP I O1 4 / A G P S T OP #/ S 3A U X S W #
1 .8 V S 30mA A V D D_ P E X T RX 23 SB_ SU SB#
B7 SL P_ S3 # Y 4 S _ CL K
6 S B _ DP RS T P # GP I O1 6 / D P R S T P # G P I O1 9 S _ DA T S_ C L K 9 , 10 , 1 8 , 2 5
19 GA 20 # G A2 0 # D 7 W 5 S_ D AT 9 , 10 , 1 8 , 2 5
L59 H C B 1 0 0 5 K F -1 2 1 T2 0 S B _ K B CR S T # B4 GP I O1 7 / GA 20 # G P I O2 0
19 S B _ K B C R S T# GP I O1 8 / K B D R S T# 3 .3 V

C 5 19 1. 8V 5 , 7 , 9 , 1 0, 1 6 , 1 7 , 2 7 , 31 , 3 2
C5 2 4 SiS9 6 8
1. 8V S 4 , 5 , 6 , 7 , 11 , 1 2 , 1 4 , 1 6, 17 , 1 8 , 2 7
. 1 U _ 1 0 V _ X7 R _0 4 . 0 1 U _1 6 V _ X 7 R _ 0 4 R1 9 1 P M_ T H R M TR I P # 3. 3V 2 , 1 2 , 13 , 1 6 , 1 7 , 2 0, 23 , 2 4 , 2 5 , 3 0, 3 1 , 3 2
P M_ T H R M T R I P # 3 0 3. 3V S 6 , 9 , 1 0, 11 , 1 2 , 1 3 , 1 4, 1 6 , 1 7 , 1 8 , 19 , 2 0 , 2 1 , 2 2, 2 3 , 2 5 , 2 6 , 27 , 2 9
V CC _ RT C 16

D
NC 1 7 N C _0 4 *8 . 2 K _ 0 4
R T C _ C LK O C3 6 5 1 5 P _ 50 V _ 0 4 Q 22
Z 2 01 4 G
A V S S _ P E X T RX
4

3 *2 N 7 0 0 2 W

D
R2 3 8 X4

S
2 3 2. 76 8 K H z-2 0 0 Q2 1
1 .8 V S 1 0M _ 0 4 H _ P R OC H O T # R 1 8 5 * 8. 2 K _ 0 4 Z2015G
*2 N 7 0 0 2 W
1

R1 6 9 * 10 K _ 0 4 P C IE _ P R S NT 0 R T C _ C LK I C3 7 1 1 5 P _ 50 V _ 0 4

S
6-22-32R76-0B1,H=2.4

B - 16 968_PCIE_LAN_GPIO 2/4
 Schematic Diagrams

968_USB_SATA 3/4

USB0: NEW CARD U2 8 C

USB1: MINI CARD
D2 6 A2 2
25 US B _P P0 D2 5 U V0 + O S C 1 2M H I C LK _1 2 M _U S B 18
USB2: BLUETOOTH 25 US B _P N0 U V0 -
E2 4 B2 2 Z2 1 0 1
25 US B _P P1 U V1 + O S C 1 2 MH O
USB3: PORT0 25 US B _P N1 E2 3 R1 8 8 1 5 0 _ 1% _ 0 4
A2 0 U V1 - F20 US B RE F
13 US B _P P2 U V2 + US B RE F
USB4: 3G B2 0
13 US B _P N2 U V2 -
25 US B _P P3 C1 9 B2 6 US B P V D D1 8
D1 9 U V3 + A V D D_ U S B P L L 1 8 B2 5
USB5: PORT1 Zo=90 Ohm 25 US B _P N3 U V3 - AVSS_ U SBPL L 1 8 US B P V S S1 8
A1 8
24 US B _P P4 B1 8 U V4 + E2 1
USB6: CCD 24 US B _P N4 US B CM P A V D D1 8

USB7: PORT2
25
25
26
US B
US B
US B
_P
_P
_P
P5
N5
P6
C1 7
D1 7
A1 6
U
U
U
U
V4 -
V5 +
V5 -
V6 +
USB A V DD _ US B CM P 1 8
A V S S _ US B CM P 1 8

A V DD _ US B CM P 3 3
E2 0

D2 1
U S B C M P A V S S 18
8mA U V D D 33
B1 6 C2 1
26 US B _P N6 U V6 - A V S S _ US B CM P 3 3
26 US B _P P7 C1 5 C 276 C 2 77
D1 5 U V7 +
3 .3 V 26 US B _P N7 U V7 -
R N2 8 . 1U _ 1 0V _X 7 R _0 4 .0 1 U_ 1 6 V _ X 7 R_ 0 4
8 P 4 RX 1 0 K_ 0 4 25 U S B _ O C# 0 U S B _ OC # 0 A2 3
4 5 U S B _ OC # 7 U S B _ OC # 1 F2 1 O C0 # NC 5 NC _ 0 4
O C1 #
3 6 U S B _ OC # 1 A2 4
25 U S B _ O C# 2 6 O C2 #
2 7 U S B _ OC # 3 U S B _ OC # 3 B2 4 U S B C MP A V S S 3 3
1 8 U S B _ OC # 5 U S B _ OC # 4 C2 3 O C3 #
O C4 #
U S B _ OC # 5 C2 4
R 3 07 10 K _ 0 4 U S B _ OC # 0 A2 5 O C5 #
R 3 08 10 K _ 0 4 U S B _ OC # 4 U S B _ OC # 7 B2 3 O C6 # A C 13 SAT AT XP0

B.Schematic Diagrams
O C7 # STX0 + SATATXP0 2 3
A D 13 SA T A T X N0
E1 6 S T X 0- AF1 2 SAT AR XP0 S A T A T X N 0 23
UV DD 1 8 U VD D1 8 S RX 0 + SATAR XP0 2 3
E1 8 AE1 2 SA T A R X N0
1 .8 V U V D D1 8 U VD D1 8 S R X 0- SAT AT XP1 S A T A R X N0 2 3
F1 5 AC 6
284mA 284mA F1 6 U
U
VD
VD
D1 8
D1 8
STX1 +
S T X 1-
AD 6 SA T A T X N1
SATATXP1 2 4
S A T A T X N 1 24
L 24 H C B 1 0 05 K F -1 21 T 2 0 J1 9 AF5 SAT AR XP1
U VD D1 8 S RX 1 + SA T A R X N1 SATAR XP1 2 4
H1 8 AE5 S A T A R X N1 2 4
H1 7 U VD D1 8 S R X 1-
C2 8 3

. 1U _ 1 0 V _ X7 R _ 04
C 29 0

*. 01 U _ 16 V _ X 7 R _ 0 4
H1 6
H1 5
J1 5
U
U
U
U
VD
VD
VD
VD
D1 8
D1 8
D1 8
D1 8
X IN
X OU T
AE8
AF8
S OS C 2 5 MH I
SO S C2 5 M HO Sheet 16 of 35
AA3 SAT A_ L ED #

UV DD 3 3
F2 2
F1 9
U V D D3 3
HD A C T

IS W IT C HO P E N 1
AC 1
AD 1
IS W 1
IS W 0
R3 2 2
R3 2 3
S A TA _L E D # 2 4 , 2 6
1 K_ 0 4
1 K_ 0 4
968_USB_SATA 3/4
F1 7 U V D D3 3 IS W IT C HO P E N 0
8mA U V D D3 3

3 .3 V U V D D3 3
8mA
L 22 H C B 1 0 05 K F -1 21 T 2 0 AF1 4
A V D D _ S A TA R X A V DD _ S A T A R X
AF1 5
A V S S _ S A TA R X A VSS_ SAT AR X
C2 8 6 C 27 0 A C9 D2 2 Z2 1 0 6
A V D D _ S A TA P L L3 3 A V DD _ S A T A P L L 3 3 I P B _ OU T 0
A D9 C2 2 Z2 1 0 7
A V DD _ S A T A P L L 3 3 I P B _ OU T 1
. 1U _ 1 0 V _ X7 R _ 04 . 0 1 U _ 1 6 V _ X 7R _ 0 4
A V S S _ S A TA P L L3 3
A C8
A D8
A VSS_ SAT APL L 3 3
A VSS_ SAT APL L 3 3
SATA T RA P 0
E2 2 Z C LK _S E L

SATAR EXT AF 7
R EXT
D1 0 Z 2 1 0 8 R3 1 1 1 K_ 0 4
AT RA P
AE1 5
1 .8 V S 6mA A V DD _ S A T A R X 18 C L K_ SATA
A D1 5
C L K 1 0 0P
E9 PC IE _ W A K E #
18 C LK _S A T A # C L K 1 0 0N P CI E W A K E P C I E _ W A K E # 4 , 20 , 2 5
L 27 H C B 1 0 05 K F -1 21 T 2 0

SS
i 96 8
C 3 16 C 30 5

. 1 U _ 10 V _ X 7 R _ 0 4 . 0 1 U _ 1 6 V _ X 7R _ 0 4 MuTIOL Clock Select (ZCLK)

N C8 N C_ 0 4
133MHz : Interanl Pull down
R 2 2 7 1 2 K _ 1 % _ 04 66MHz : External Pull up
SATAR EXT
A V S S _ S A TA R X 3 .3 V
J20091125
V C C _ R TC Z CL K _ S E L R 17 6 *1 0 K _ 04
C 358 2 2 P _ 5 0V _0 4 R B 75 1 V RB 7 5 1 V
R 38 2 1K _ 04 D2 6 S C S 7 51 V -4 0 D2 5 S C S 7 5 1 V -4 0
3 .3 V S 41mA A V D D _ S A T A P LL 3 3
V DD 3 A C C A

L 28 H C B 1 0 05 K F -1 21 T 2 0 R B 75 1 V 3 .3 V
J_ R T C 1 R 30 1 1K _ 04 D2 4 S C S 7 51 V -4 0 R 2 99 1 0 K _ 1 % _0 4
A C P C I E _W A K E # R 21 4 10 K _ 0 4
1 R T C _ P W R OK 15
C 3 43 C 34 2

. 1 U _ 10 V _ X 7 R _ 0 4 . 0 1 U _ 1 6 V _ X 7R _ 0 4 2 C 51 3 C5 1 4 N O1 C 5 11 C 59 1
8 5 20 4 -0 2 0 01 _ R
N C1 0 N C_ 0 4 2 2 U _ 6 . 3 V _ X5 R _ 08 *1 U _ 6 . 3 V _ 0 4 N O_ 0 4 1 U _6 . 3 V _ 0 4 1 0 U _ 1 0 V _ 08

AV SS_ SAT APL L 3 3

1 .8 V U S B P V D D 18 1 .8 V USB CM P A V D D1 8
1 .8 V 5 , 7 , 9 , 10 , 1 5 , 1 7 , 2 7, 31 , 3 2
1 .8 V S 4 , 5 , 6 , 7, 11 , 1 2 , 1 4 , 1 5, 1 7 , 1 8 , 2 7
L 58 H C B 1 0 05 K F -1 21 T 2 0 L2 1 H C B 1 00 5 K F - 12 1 T 2 0
3 .3 V 2 , 1 2, 13 , 1 5 , 1 7 , 2 0, 2 3 , 2 4 , 2 5 , 30 , 3 1 , 3 2
3 .3 V S 6 , 9 , 1 0, 1 1 , 1 2 , 1 3 , 14 , 1 5 , 1 7 , 1 8, 19 , 2 0 , 2 1 , 2 2, 2 3 , 2 5 , 2 6 , 2 7, 2 9
V DD 3 1 3 , 19 , 2 5 , 2 6 , 2 7, 28 , 3 0 , 3 2
C 5 17 C 51 8 C 264 C 2 65
V CC _ RT C 15
. 1 U _ 10 V _ X 7 R _ 0 4 . 0 1 U _ 1 6 V _ X 7R _ 0 4 . 1U _ 1 0V _X 7 R _0 4 .0 1 U_ 1 6 V _ X 7 R_ 0 4

N C1 6 N C_ 0 4 N C4 NC _ 0 4

US B P V S S 1 8 U S B C MP A V S S 1 8

968_USB_SATA 3/4 B - 17
 Schematic Diagrams

968_PWR_GND 4/4
1 . 0 5V S
22mA

AA 2 1
AB2 2

W23
R 22

M 10
M 11
M 12

M 14
M 15
1 .8 V S

U 23

T21
V2 1
Y 21
T15
P1 5
T 17
R 15
R1 6
T 16
U 16
U1 7

K 10
K1 1
K1 2
L10
L11

L14
L15

M1 3

N1 0
L 12

L 16
U2 8 D
N 11

V SS

V SS

V SS

V SS

V SS
V TT

VS SZ

VS SZ

VS SZ
VSS Z

VS SZ
VSS Z

VS SZ
VSS Z

VSS

VSS
VSS

VSS
VSS

VSS
VSS

VSS
VSS

VSS
VSS
VS S

VTT

VSSZ
VSSZ

VSSZ
VSSZ

VSSZ

VSSZ
U 26 N 12
1 .8 VS V DD Z VS S
W 26 N 13 C2 7 9 C 317 C 2 89 C2 5 3 C3 3 0 C2 9 3 C3 1 0 C3 0 4
A A 25 V DD Z VS S N 14
R 24 V DD Z VS S P1 0 1 0U _ 1 0 V _ 08 * 1 0 U_ 1 0 V _ 0 8 1 U _1 0 V _ 0 6 1 U_ 1 0 V _ 0 6 . 1 U _ 1 0 V _ X 7R _ 0 4 . 1 U _ 1 0 V _ X 7R _ 0 4 .1 U_ 1 0 V _ X 7 R_ 0 4 .1 U_ 1 0 V _ X 7 R_ 0 4
522mA T 24
V DD Z VS S
P1 1
V 24 V DD Z VS S P1 2
Y 24 V DD Z VS S P1 3
V DD Z VS S
P 18 P1 4
W 18 V DD Z VS S R 10 3 .3 V S
U 18 V DD Z VS S R 11
V DD Z VS S
V 18 R 12
V 19 V DD Z VS S R 13
W 19 V DD Z VS S R 14 C5 9 2 C 354 C 3 14 C3 8 6 C3 4 9 C3 4 8 C3 3 7 C3 4 4
V DD Z VS S
N 18 T10
V DD Z VS S T11 *1 0 U _ 1 0 V _ 0 8 1 0 U _ 10 V _ 0 8 1 U _1 0 V _ 0 6 *1 U _ 10 V _0 6 . 1 U _ 1 0 V _ X 7R _ 0 4 *. 1 U _ 10 V _ X 7 R _ 0 4 *. 1 U _ 10 V _ X 7 R _0 4 .1 U_ 1 0 V _ X 7 R_ 0 4
R 18 VS S T12
IV D D VS S
R 17 T13
IV D D VS S
V 17 T14 2.5V change to 3.3V
V 13 IV D D VS S U 10
IV D D VS S 3 .3 V V_ L AN
V 12 U 11
IV D D VS S
V 11 U 12
IV D D VS S
B.Schematic Diagrams

V 10 U 13 L26 H C B 1 6 08 K F -1 21 T 2 5
IV D D VS S
K9 U 14
IV D D VS S
M9 U 15 C3 3 4 C 3 18 C3 3 8 C3 0 8 C 306
N9 IV D D VS S D 13
IV D D VS S
P9 D 11 1 U_ 1 0 V _ 0 6 1 U _1 0 V _ 0 6 *1 U _ 10 V _ 0 6 . 1 U _ 1 0 V _ X 7R _ 0 4 * .1 U_ 1 0 V _ X 7 R_ 0 4
IV D D VS S
R9 B1 2
T9 IV D D VS S B1 0
IV D D VS S
U9 AC 2 5
IV D D VS S
J 14 AD 2 6

Sheet 17 of 35 3 .3 VS
T 18

V 16
IV D
IV D
D
D
U
VS

SBVS
S

S
D 14
E1 5
1 .8 V S

R 215 * 20 m i l _ sh o rt -N MN P
V _ A VD D_ SA T A 1 .8 V

V 15 PVD D U SBVS S A1 5

968_PWR_GND 4/4 29mA

V 14
T8
N8
PVD
PVD
PVD
D
D
D
Power/Ground
U
U
U
SBVS
SBVS
SBVS
S
S
S
B1 5
C 16
D 16
C 3 23

1 0 U_ 1 0 V _ 0 8
C3 2 1

1 U_ 1 0 V _ 0 6
C3 3 6

. 1 U _ 1 0 V _ X 7R _ 0 4
C 327

. 0 1 U _ 16 V _ X 7 R _ 0 4
C3 0 1

1 U_ 1 0 V _ 0 6
C 339

. 1U _ 1 0 V _ X7 R _ 04
L9 PVD D U SBVS S A1 7
PVD D U SBVS S
W 17 B1 7
W 16 OV D D U SBVS S E1 7
W 15 OV D D U SBVS S C 18
OV D D U SBVS S 1 .8 V S V _ A V D D_ S B P CIE 1. 05 V S
W 14 D 18
W 13 OV D D U SBVS S A1 9
W 12 OV D D U SBVS S B1 9 R 189 * 20 m i l _ sh o rt -N MN P
OV D D U SBVS S
K8 E1 9
L8 OV D D U SBVS S C 20 C 2 78 C2 6 3 C2 6 8 C 295 C2 7 2 C 271
M8 OV D D U SBVS S D 20
OV D D U SBVS S
P8 A2 1 1 0 U_ 1 0 V _ 0 8 1 U_ 1 0 V _ 0 6 . 1 U _ 1 0 V _ X 7R _ 0 4 . 0 1 U _ 16 V _ X 7 R _ 0 4 1 U_ 1 0 V _ 0 6 . 1U _ 1 0 V _ X7 R _ 04
R8 OV D D U SBVS S B2 1
U8 OV D D U SBVS S D 23
OV D D U SBVS S
V8 D 24
OV D D U SBVS S C 25
J 18 U SBVS S C 26
1 .8 V IV D D_ A U X U SBVS S
J 17 K1 3
J 16 IV D D_ A U X U SBVS S K1 4
19mA J 10 IV D D_ A U X U SBVS S K1 5
J8
IV D D_ A U X U SBVS S
K1 6 1. 8 V S Put under SiS968 solder side
J9 IV D D_ A U X U SBVS S K1 7 1 .0 5 V S 1 .8 V
IV D D_ A U X U SBVS S L13
U SBVS S
H 19 L17
3 .3 V OV D D _A UX U SBVS S
H9 C 32 2 C 30 3 C 2 98 C 3 31 C 285 C 267
H8 OV D D _A UX AB 6 C3 3 2 C3 0 0
OV D D _A UX AVSS_ SA TA
F7 AB 7 . 1 U _1 0 V _ X 7 R _ 0 4 . 1 U _1 0 V _ X 7 R _ 0 4 . 1 U _1 0 V _ X 7 R _ 0 4 . 1 U _ 10 V _ X 7 R _0 4 . 1 U _ 10 V _ X 7 R _0 4 . 1 U _ 1 0V _X 7 R _0 4
4mA J 11
OV D D _A UX AVSS_ SA TA
AB 12 .1 U_ 1 0 V _ X 7 R_ 0 4 . 1U _ 1 0 V _ X7 R _ 04
J 12 OV D D _A UX AVSS_ SA TA AB 13
OV D D _A UX AVSS_ SA TA
AB 14
AVSS_ SA TA
V_ L AN H 10 AB 15
H 11 GM IIV D D_ A U X AVSS_ SA TA AC 2 3. 3 V S 3 .3 V
GM IIV D D_ A U X AVSS_ SA TA
H 12 AC 3
GM IIV D D_ A U X AVSS_ SA TA
H 13 AC 4
J 13 GM IIV D D_ A U X AVSS_ SA TA AC 5
GM IIV D D_ A U X AVSS_ SA TA
AC 7 C 29 4 C 29 9 C 3 15 C 3 02 C3 4 1 C3 2 5 C3 3 3
AVSS_ SA TA
V _ A V D D_ S B P CI E K 18 AC 12
L 18 AVD DPE X AVSS_ SA TA AC 14 . 1 U _1 0 V _ X 7 R _ 0 4 . 1 U _1 0 V _ X 7 R _ 0 4 . 1 U _1 0 V _ X 7 R _ 0 4 . 1 U _ 10 V _ X 7 R _0 4 . 1 U _ 1 0 V _ X 7R _ 0 4 . 1 U _ 1 0 V _ X 7R _ 0 4 .1 U_ 1 0 V _ X 7 R_ 0 4
AVD DPE X AVSS_ SA TA
L 19 AC 15
AVD DPE X AVSS_ SA TA
M 18 AD 2
153mA M 19 AVD DPE X AVSS_ SA TA AD 3
N 19 AVD DPE X AVSS_ SA TA AD 4
AVD DPE X AVSS_ SA TA V _ A V DD _ S B P C IE V _L A N V _ A V D D _S A T A
H 21 AD 5
J 21 AVD DPE X AVSS_ SA TA AD 7
K 21 AVD DPE X AVSS_ SA TA AD 12
AVD DPE X AVSS_ SA TA
L 21 AD 14
M 21 AVD DPE X AVSS_ SA TA AE 1 C 27 3 C2 6 9 C3 2 6 C 319 C3 2 4 C3 2 9
N 21 AVD DPE X AVSS_ SA TA AE 2
AVD DPE X AVSS_ SA TA
M 22 AE 3 .1 U_ 1 0 V _ X 7 R_ 0 4 . 0 1U _ 1 6 V _ X7 R _ 04 . 1 U _ 1 0 V _ X7 R _ 0 4 . 1 U _ 10 V _X 7 R _0 4 .1 U_ 1 0 V _ X 7 R_ 0 4 . 01 U _ 1 6V _X 7 R _0 4
H 22 AVD DPE X AVSS_ SA TA AE 4
AVD DPE X AVSS_ SA TA AE 6
AVSS_ SA TA
AE 7
AB8 AVSS_ SA TA AE 9
V _ A V D D_ S A T A AVD D_ S A TA AVSS_ SA TA
AB9 AE 11
AVD D_ S A TA AVSS_ SA TA
A B 10 AE 13
A B 11 AVD D_ S A TA AVSS_ SA TA AE 14
190mA A C 10 AVD D_ S A TA AVSS_ SA TA AF 2
1 .0 5 V S 2 ,3 ,4 ,6 ,7 ,3 1
AVD D_ S A TA AVSS_ SA TA 1 .8 V 5 , 7 , 9 , 1 0 , 15 , 1 6 , 2 7 , 3 1 , 3 2
A C 11 AF 3
A D 10 AVD D_ S A TA AVSS_ SA TA AF 4 1 .8 VS 4 , 5 , 6 , 7 , 1 1, 12 , 1 4 , 1 5 , 1 6 , 1 8, 2 7
AVD D_ S A TA AVSS_ SA TA 3 .3 V 2 , 1 2 , 1 3, 15 , 1 6 , 2 0 , 2 3 , 2 4, 2 5 , 3 0 , 3 1 , 3 2
A D 11
AVD D_ S A TA 3 .3 VS 6 , 9 , 1 0 , 1 1, 1 2 , 1 3 , 1 4 , 1 5 , 16 , 1 8 , 1 9 , 2 0 , 2 1, 2 2 , 2 3 , 2 5 , 2 6, 27 , 2 9
A E 10 AF 6
A F 10 AVD D_ S A TA AVSS_ SA TA AF 9
V9 AVD D_ S A TA AVSS_ SA TA AF 11
AVD D_ S A TA AVSS_ SA TA
A VSSP EX

AV SSPE X

A VSSPE X

A VSSPE X

A VSSPE X

A VSSPE X

A VSSPE X

W8 AF 13
AV SSPEX
AVSS PEX
AVSSP EX
AV SSPEX
AVSS PEX
AVSSP EX
AV SSPEX
AVS SPEX
AVSSP EX
AV SSPEX
AVS SPEX
AVSSP EX
AV SSPEX
AVS SPEX
AVSSP EX

AVS SPEX
AVSSP EX

AVS SPEX
AVSSP EX

AVS SPEX
AVSSP EX

AVS SPEX
AVSS PEX

AVS SPEX
AVSS PEX

W9 AVD D_ S A TA AVSS_ SA TA
W 10 AVD D_ S A TA
AVD D_ S A TA
W 11
AVD D_ S A TA
SiS9 6 8
N 26

M 23

H 23
G 26

E 25

M 17
N 17

M 16

N 15
P2 4
P2 3
N2 2

N 25
M 24

L22
K2 2
J22
G 22

L25
K2 4
K2 3
J26
J25
H2 4

G2 5
F 24
F23
E2 6

P1 6

P1 7

N1 6
L 26

B - 18 968_PWR_GND 4/4
 Schematic Diagrams

CLK_GEN & CLK_BUTTER

C1 8 8 C 1 86 C1 7 1
3 .3 V S C L K GE N _ V D D
. 1 U _ 1 0 V _ X7 R _ 04 . 1 U _ 10 V _ X 7 R _ 0 4 . 1 U _1 0 V _ X 7 R _ 0 4 U2 6
L 56 H C B 16 0 8 K F -1 2 1 T2 5 2 55 H_ CL K _ N B _ R 1 4 R N1 6
VD D RE F C P U T _ L0 F H _ C LK _ N B 4
1 4 54 H_ CL K _ N B # _ R 2 3 4 P 2 R X3 3 _ 0 4 H _ C LK _ N B # 4
C5 0 6 C5 0 3 C 1 91 C1 7 4 1 9 VD D P CI C P U C _ L0 F 52 H_ CL K _ C P U_ R 1 4 R N1 7
VD D P CI CP UT _ L 1 H _ C LK _ C P U 2
2 3 51 H_ CL K _ C P U# _ R 2 3 4 P 2 R X3 3 _ 0 4
10 U _ 10 V _ 0 8 1 U _ 1 0 V _ 06 1 U _1 0 V _ 0 6 . 1 U _1 0 V _ X 7 R _ 0 4 2 4 VD D Z C P UC _ L 1 H _ C LK _ C P U # 2
5 6 VD D 48 44 P C I E _C L K_ NB _ R 1 4 R N1 9
VD D CP U PC IET _ L 0 P CIE _C L K_ NB 4
3 9 43 P C I E _C L K_ NB # _ R 2 3 4 P2 R X3 3 _ 0 4 P CIE _C L K_ NB # 4
2 9 VD D P CIE X P CIE C _ L 0 41 P C I E _C L K_ CA R D_ R 1 4 R N2 0
VD D P CIE X PC IET _ L 1 P CIE _C L K_ CA R DR E A D E R 2 0
40 P C I E _C L K_ CA R D# _ R 2 3 4 P2 R X3 3 _ 0 4
7 P CIE C _ L 1 38 P C IE _ CL K_ SB_ R 1 4 R N2 1 P CIE _C L K_ C A R D R E A D E R # 20
G ND RE F PC IET _ L 2 P CIE _C L K_ SB 1 5
8 37 P C IE _ CL K_ SB# _ R 2 3 4 P2 R X3 3 _ 0 4
G ND PC I P CIE C _ L 2 P CIE _C L K_ SB# 1 5
1 3 36 P C I E _C L K_ N E W _R 1 4 R N2 2 P CIE _C L K_ NE W 25
2 0 G ND PC I PC IET _ L 3 35 P C I E _C L K_ N E W #_ R 2 3 4 P2 R X3 3 _ 0 4
G ND Z P CIE C _ L 3 P CIE _C L K_ N E W # 25
2 7 34 P C I E _C L K_ MI N I _ R 1 4 R N2 4
5 3 G ND 48 P C I E T _ L4 F 33 P C I E _C L K_ MI N I # _R 2 3 4 P2 R X3 3 _ 0 4 P CIE _C L K_ MI N I 2 5
G ND CP U P C I E C _ L4 F P CIE _C L K_ MI N I # 2 5
4 2 31 P C I E _C L K_ HD V _ R 1 4 R N2 3
G ND PC IEX P C I E T _ L5 F P CIE _C L K_ HD V 1 1
R1 1 3 * 0_ 0 4 3 2 30 P C I E _C L K_ H D V # _R 2 3 4 P2 R X3 3 _ 0 4
2 2 , 2 3 , 2 5, 2 7 , 3 1 , 3 2 S US B # G ND PC IEX P C I E C _ L5 F P CIE _C L K_ HD V # 1 1
49 CL K _ S A T A _ R 1 4 R N1 8 CL K _ S A T A
SAT AC L KT _ L CL K _ S A T A 1 6
3 .3 VS R1 1 6 1 0 K_ 0 4 C LK E N 1 48 CL K _ S A T A # _ R 2 3 4 P 2 R X3 3 _ 0 4 CL K _ S A T A # CL K _ S A T A # 1 6

Sheet 18 of 35
(C L K _ S T O P # )/ V TT P W R G D / P D # S A T A CL K C _ L
D

21 Z _ CL K 0 _ R R1 3 4 2 2 _0 4 Z _ CL K 0
Z C LK 0 22 Z _ CL K 1 _ R R1 3 7 2 2 _0 4 Z _ CL K 1 Z _ CL K 0 6
Z C LK 1 Z _ CL K 1 14
G Z 23 0 1 28
29 CL K E N# 6 CP US T P # * (C P U _ S T O P #)/ R E S E T#
Q 14 3 CL K G E N_ F S L 0 R1 0 5 3 3 _0 4 CL K _ 1 4 M_ 6 71 M X CL K _ 1 4 M_ 6 7 1M X 6

CLK_GEN &
2 N 70 0 2 W 3 . 3V S L14 C L K GE N _ V D D A * *F S L0 / R E F 0 _ 2 x 4 CL K G E N_ F S L 1 R1 1 2 3 3 _0 4 CL K _ 1 4 M_ 9 68
S

*F S L1 / R E F 1 _ 2 x CL K _ 1 4 M_ 9 6 8 1 5
H C B 1 0 0 5K F - 1 2 1T 2 0 R1 0 9 3 3 _0 4 CL K _ 1 4 M_ 3 07 E L V
50 9 CL K G E N_ F S L 2 R1 1 8 3 3 _0 4 P CL K _ SB CL K _ 1 4 M_ 3 0 7E L V 11
VD D A ** F S L 2 / P C I C L K 0 _ 2x F P CL K _ SB 14
10 CL K G E N_ F S 3 R1 2 1 3 3 _0 4 P CL K _ KBC
**F S 3 / P C I C L K 1 _ 2x F P CL K _ C A RD P CL K _ KBC 1 9
C 35 7 C1 8 3 C 182 11 CL K G E N_ F S 4 R1 2 3 *3 3 _ 04

CLK_BUTTER
* *F S 4 / P C I C LK 2 12 S T P _ P CI#
*( P C I _ S T O P # )/ P C I C LK 3
1 0 U _ 1 0 V _ 08 . 1 U _ 1 0 V _ X 7R _ 04 . 01 U _1 6 V _ X 7 R _ 0 4 15 C L K G E N _ M OD E
47 **M O D E / P C I C LK 4 16 P E C L K R E Q 0# R1 3 0 0 _ 04 M I N I _C A R D _ C LK R E Q #
G ND A ( P E C L K R E Q 0# ) / P C I C LK 5 MI N I _ C A R D _ C L K R E Q # 2 5
17 P E C L K R E Q 1# R1 3 2 0 _ 04 N E W _ C A R D _ C L K R E Q#
( P E C L K R E Q 1# ) / P C I C LK 6 N E W _C A R D _ C L K R E Q # 25
18 P CL K _ D E B UG _ R
P C IC LK 7 R3 7 6 *0 _ 0 4
C L K _ 4 8 M_ C A R D LA N _ C L K R E Q # 15 , 2 0
Z 23 0 2 45 26

B.Schematic Diagrams
9 , 1 0 , 15 , 2 5 S_ D AT Z 23 0 3 46 SD ATA ** S E L 2 4 _4 8 # / 2 4_ 4 8 MH z
9 , 1 0 , 15 , 2 5 S _ C LK J20091126
SC L K 25 C L K _ 1 2 M_ U S B _ R R1 3 8 3 3 _0 4 C L K _ 1 2 M_ U S B
1 2 MH z C L K _ 1 2 M_ U S B 16

X1

X2
I C S 9L P R 6 0 0C G L F

6
X5 D05 10/15
Z 2 3 04 2 1 Z 2 30 5

1 4 . 3 1 MH z

C4 9 6 C 49 7
S T P _ P C I# R 12 7 *1 0 K _ 0 4
3 .3 V S
3 3P _5 0 V _ 0 4 3 3 P _ 50 V _ 0 4
P E C L K R E Q0 # R 12 9 *1 0 K _ 0 4

P E C L K R E Q1 # R 13 1 *1 0 K _ 0 4

3 .3 VS
Place CRYSTAL Within 500 R 10 8 *1 K _ 0 4
mils of ICS9LPR600 C L K G E N _ M OD E R1 2 8 1 0 K_ 0 4
C L K GE N _ F S L 0 R 11 0 2 . 2K _0 4 CP U_ B S E L 0 2

C L K GE N _ F S L 1 R 11 4 2 . 2K _0 4
CP U_ B S E L 1 2
Clock Generator Pin 15
C L K GE N _ F S L 2 R 11 5 2 . 2K _0 4
CP U_ B S E L 2 2
R 11 9 *2 . 7 K _ 0 4 Status (LO)Non-STUFF (HI)PULLl-UP
1 .8 V S
C L K GE N _ F S 3 R 12 0 2 . 7K _0 4
Mode Desktop mode Mobile mode
C L K GE N _ F S 4 R 12 2 *2 . 7 K _ 0 4 3 .3 V S
L 20 C2 1 3 C 2 16 C2 2 6
H C B 1 60 8 K F - 1 2 1 T 2 5 Pin 1 VTTOWRGD/PD# CLK_STOP#
. 1 U _ 1 0 V _ X7 R _0 4 * . 1 U _ 1 0V _X 7 R _0 4 . 1 U _ 1 0 V _ X7 R _0 4

CL K B U F _ V D D Host Clock
C2 4 9 C2 2 9 C 2 14 FS4 FS3 BSEL2 BSEL1 BSEL0 Frequency
Pin 12 PCICLK3 PCI_STOP#
10 U _ 10 V _ 0 8 . 1 U _ 1 0 V _ X7 R _0 4 * . 1 U _ 1 0V _X 7 R _0 4 U 9 0 1 1 0 1 100 MHz Pin 16 PCICLK5 PECLKREQ0#
3 7
V D D1 .8 V DD A 1 .8 C L K B U F _ A V DD
11 0 1 0 0 1 133 MHz
25 V D D1 .8 1 M _C L K _ D D R 3 # _ R 2 3 RN 7 M_ C L K _ D D R 3 #
V D D1 .8 DD RC 0 M _C L K _ D D R 3 # 1 0 Pin 17 PCICLK6 PECLKREQ1#
21 2 M _C L K _ D D R 3 _ R 1 4 *4 P 2 R X0 _ S h o rt -N MN P _ 04 M_ C L K _ D D R 3 0 1 0 1 1 166 MHz
V D D1 .8 D DR T 0 M _C L K _ D D R 3 1 0
10 5 M _C L K _ D D R 1 # _ R 1 4 RN 6 M_ C L K _ D D R 1 # 0 1 0 1 0 200 MHz Pin 28 RESET# CPU_STOP#
5 M_ F W D S D C L K O A _ D # CL K _ IN C DD RC 1 M _C L K _ D D R 1 # 9
9 4 M _C L K _ D D R 1 _ R 2 3 *4 P 2 R X0 _ S h o rt -N MN P _ 04 M_ C L K _ D D R 1
5 M _F W D S D C LK O A _ D CL K _ IN T D DR T 1 M _C L K _ D D R 1 9
R1 4 9 *0 _ 0 4 Z 2 3 06 20 13 M _C L K _ D D R 0 # _ R 1 4 RN 5 M_ C L K _ D D R 0 #
9 , 10 , 1 5 , 2 5 S _ DA T SD ATA DD RC 2 M _C L K _ D D R 0 # 9
9 , 10 , 1 5 , 2 5 S _ CL K R1 5 0 *0 _ 0 4 Z 2 3 07 19 12 M _C L K _ D D R 0 _ R 2 3 *4 P 2 R X0 _ S h o rt -N MN P _ 04 M_ C L K _ D D R 0 M _C L K _ D D R 0 9 1 .8 V S 4 , 5 , 6 , 7 , 1 1 , 12 , 1 4 , 1 5 , 16 , 1 7 , 2 7
S C LK D DR T 2
M_ C L K _ D D R 2 # 1 .8 V S CL K B U F _ A V D D 3 .3 V S 6 , 9 , 1 0 , 1 1, 12 , 1 3 , 1 4 , 15 , 1 6 , 1 7 , 19 , 2 0 , 2 1 , 2 2, 2 3 , 2 5 , 2 6, 27 , 2 9
F B _ IN A 18 15 M _C L K _ D D R 2 # _ R 2 3 RN 4
R 1 48 22_04 F B _ O UT A 17 F B_ IN DD RC 3 16 M _C L K _ D D R 2 _ R 1 4 *4 P 2 R X0 _ S h o rt -N MN P _ 04 M_ C L K _ D D R 2 M _C L K _ D D R 2 # 1 0
F B _ O UT D DR T 3 M _C L K _ D D R 2 1 0
L18 H C B 1 0 05 K F -1 21 T 2 0
C 2 12 8 23
6 GN D DD RC 4 22 C1 7 7 C 21 5 C2 3 1
GN D D DR T 4
1 0 P _ 5 0V _0 4 28
24 GN D 27 10 U _ 10 V _ 0 8 . 1 U _ 1 0 V _ X 7R _ 0 4 . 01 U _ 16 V _ X 7 R _ 0 4
14 GN D DD RC 5 26
GN D D DR T 5
IC S9 P9 3 5

CLK_GEN & CLK_BUTTER B - 19

 Schematic Diagrams

KBC-ITE IT8512E
K B C _A V D D L25 R 2 22 *1 0 K _ 04 W D T_ E N
V DD 3
H C B 1 00 5 K F -1 2 1 T 20
V D D3 PJ 4
V DD 3
C3 6 4 C 26 6 C 36 3 C 2 91 R2 1 6 R 22 1 V D D3 W D_ DI S A B L E 1 2
C 31 2 C 3 13
1 0 U _ 1 0V _0 8 . 1 U _ 1 6 V _ 04 . 1 U _1 6 V _ 0 4 * . 1 U _ 1 6 V _0 4 *1 0 K _ 04 *1 0 0 K _ 0 4
.1 U_ 1 6 V _ 0 4 . 1 U _1 6 V _ 0 4 2 0 mi l
R 2 13 *1 0 K _ 04 W D _ D I S A B LE R 2 32
C 33 5
U 14 G 1 0 0 K _ 04
. 1 U _ 1 6 V _ 04 K B C _ A GN D Z 2 50 8 3
1 24 M R#
J_KB1/J_KB2 1 Z2509S D K B C_ W R E S E T #
3. 3V S 5 RE S E T #
VC C 4 Q 24 C 3 53
WD I

114

127
12 1
J _ KB1 J_ K B 2 C 328 2 * 2 N 7 0 0 2W

26
50

74
11

92
G ND

3
U 12 *8 5 20 1 -2 4 05 1 8 5 20 1 -2 4 05 1 1 U _1 0 V _ 0 6
* . 1 U _ 1 0 V _ X7 R _0 4 *A T 3 5 10 I G V -2 . 9 3-C -C -T1 3 IN 1

VST BY

VS TBY

V STBY

VBA T

A V CC
VSTBY

VSTBY

VSTBY
V CC
10 58 K B -S I0 4 K B -S I 0 4
15 L P C_ A D 0 L A D0 K S I0 /S T B #
9 59 K B -S I1 5 K B -S I 1 5
15 L P C_ A D 1 L A D1 K S I 1/ A F D #
15 L P C_ A D 2 8 60 K B -S I2 6 K B -S I 2 6
7 L A D2 K S I2 /INIT # 61 K B -S I3 8 K B -S I 3 8
15 L P C_ A D 3 L A D3 K S I3 /S L IN#
18 P C LK _ K B C P C LK _ K B C 13 62 K B -S I4 11 K B -S I 4 11
6 L P CC L K K S I4 63 K B -S I5 12 K B -S I 5 12 V D D3
15 L P C _ F R A M E # L F R A ME # K S I5
5 LPC K/B MATRIX 64 K B -S I6 14 K B -S I 6 14
15 LP C _ S I R Q 22 S E R IRQ K S I6 65 K B -S I7 15 K B -S I 7 15 C
2 0, 23 , 2 5 L P C _ R S T # L P C R S T # / W U I 4/ G P D 2( P U ) K S I7 S MC _ B A T AC
28 S MC _B A T
K B C _W R E S E T# 14 36 K B -S O0 1 K B -S O 0 1 D 13 A V DD 3
W R ST# K S O 0/ P D 0 37 K B -S O1 2 K B -S O 1 2 B A V 99
K S O 1/ P D 1 RA
B.Schematic Diagrams

GA 20 # 126 38 K B -S O2 3 K B -S O 2 3 C R 19 8 *1 0 K _ 04
A C_ IN # 4 GA 20 / G P B 5 K S O 2/ P D 2 39 K B -S O3 7 K B -S O 3 7 S MD _ B A T AC MO D E L _ I D
28 A C _I N # K B R S T # / GP B 6 ( P U ) K S O 3/ P D 3 28 S MD _B A T
16 40 K B -S O4 9 K B -S O 4 9 D 14 A R 19 9 10 K _ 0 4
26 L E D_ A C IN# T H E R M_ A L E R T# 20 P W U R E Q# / GP C 7 ( P U ) K S O 4/ P D 4 41 K B -S O5 10 K B -S O 5 10 B A V 99
2 T H E R M _A L E R T # L 8 0L L A T / GP E 7 ( P U ) K S O 5/ P D 5 42 K B -S O6 13 K B -S O 6 13 C RB
W EB_ AP# K S O 6/ P D 6
23 , 3 2 W E B _ A P # 23 43 K B -S O7 16 K B -S O 7 16 28 BAT_ D ET B A T _ DE T AC
W E B _ E M A IL # 15 E C S CI# /G P D3 ( P U ) K S O 7/ P D 7 44 K B -S O8 17 K B -S O 8 17 D 10 A
2 3 W E B _ E MA I L# E C S MI # / G P D 4 ( P U ) K S O 8/ A C K #
45 K B -S O9 18 K B -S O 9 18 B A V 99
K S O 9 /B US Y 46 K B -S O1 0 19 K B -S O 10 19 C
DAC
Sheet 19 of 35 24 3 G _P W R
3G _ P W R
W L A N_ E N
C P U _ F A N _R 76
77
78
DA
DA
DA
C0 /G
C1 /G
C2 /G
P J0
P J1
P J2
K S O1 0 / P E
K S O1 1 / E R R #
K S O1 2 / S L C T
K S O1 3
51
52
53
K B -S
K B -S
K B -S
O1 1
O1 2
O1 3
20
21
22
K B -S O
K B -S O
K B -S O
11
12
13
20
21
22
28 B A T 1 _V OL T
B A T 1 _V O L T
D 11
AC

B A V 99
A

79 54 K B -S O1 4 23 K B -S O 14 23

KBC-ITE IT8512E
2 5, 2 6 W L AN _ EN DA C3 /G P J3 K S O1 4
E C _V G A _ A L E R T # 80 55 K B -S O1 5 24 K B -S O 15 24

22 K B C_ M UT E #
K B C _M U T E # 81
DA
DA
C4 /G
C5 /G
P J4
P J5
IT8502E K S O1 5

For W740S For W76S

ADC FLASH
B A T _ DE T 66 100 V D D3
B A T _ V OL T _ R 67 AD C0 /G PI0 F L F R A ME # / G P G2 101 K B C _ S P I_ CE #
AD C1 /G PI1 F L A D 0/ S C E #
C H G_ C U R S E N _ R 68 102 KBC _ SPI_ SI C CD _ DE T # R1 9 6 1 0 K_ 0 4
T OT A L _ C U R _ R 69 AD C2 /G PI2 F L AD 1 /SI 103 KBC _ SPI_ SO
AD C3 /G PI3 F L A D2 /S O
70 104 For 2800mA Battery 3 G _D E T # R1 9 0 1 0 K_ 0 4
3 G_ D E T# 71 AD C4 /G PI4 F L A D 3 / G P G6 105 K B C _ S P I_ S CL K V C H G -S E L 2 8
24 3G _ D E T # J20091126
CC D_ D E T # 72 AD C5 /G PI5 F L CL K /S C K 106 C C D _E N S M C_ B A T R2 2 8 4 .7 K _ 0 4
26 CC D_ D E T # AD C6 /G PI6 ( P D )F L R S T # / W U I 7 / GP G 0 / TM C C D _E N 26 S W I#
MO D E L_ I D 73 SW I # 15
AD C7 /G PI7 S M D_ B A T R2 2 9 4 .7 K _ 0 4
GPIO G A2 0 #
SMBUS 56
S M C_ B A T 110 ( P D )K S O1 6 / G P C 3 57 K B C _ S U S B # 23 G A 2 0# 15 B A T_ D E T R1 8 2 1 0 K_ 0 4
SM C L K 0 / GP B3 ( P D )K S O1 7 / G P C 5 K B C _ S US C# 2 3
S M D_ B A T 111 S MI #
SM D A T 0 / GP B4 S M I# 15
2 S M C _C P U _ T H E R M 115 93 P M _ CL K RU N# P M _ CL K R UN # 1 5 S M C_ C P U_ T HE RM R 296 4 .7 K _ 0 4
116 SM C L K 1 / GP C1 ( PD )GP H 0 /ID0 94 L E D _T H R O TT L E # S CI#
2 S M D _C P U _ T H E R M SM D A T 1 / GP C2 ( PD )GP H 1 /ID1 S C I# 15
S M C _ V GA _T H E R M 117 95 C TX 1 S M D_ C P U_ T HE RM R 295 4 .7 K _ 0 4
S M D _ V GA _T H E R M 118 SM C L K 2 / GP F6 ( PU ) ( PD )GP H 2 /ID2 96 W D T _E N S B _K B C R S T #
SM D A T 2 / GP F7 ( PU ) ( PD )GP H 3 /ID3 W D T _E N 2 5 S B _ K B C R S T# 1 5
97 W L A N _ DE T #
( PD )GP H 4 /ID4 98 B T _ DE T # W L A N _ DE T # 2 5 P W R_ B T N #
PWM ( PD )GP H 5 /ID5 B T _ D E T# 1 3 , 2 5 P W R _ B T N# 1 5
B R I GH TN E S S 24 99 PC L K_ KBC R2 0 8 * 10 _ 0 4 Z 2 5 10
K B C _B E E P PW M 0 / GP A 0( P U ) ( PD )GP H 6 /ID6 D D _ ON 30 K B C _ R S MR S T #
26 K B C_ B E E P 25 107 3 G_ E N 3 G_ E N 24 K B C _ R S MR S T # 1 5 C 31 1 * 1 0P _ 5 0 V _ 0 4
28 PW M 1 / GP A 1( P U ) ( PD )GP G 1 /ID7
2 6 L E D _ S C R O LL # PW M 2 / GP A 2( P U )
29 EXT GPIO
26 LE D _ N U M# 30 PW M 3 / GP A 3( P U ) 82 SM I# B A T 1 _ V OL T B A T _ V O LT _ R
26 L E D _C A P # PW M 4 / GP A 4( P U ) ( P D )E G A D / G P E 1
LOW ACTIVE 31 83 SC I# R1 8 4 1 0 0 _ 04 C 28 2 1 U _ 1 0 V _0 6
2 6 LE D _ B A T _ C H G# 32 PW M 5 / GP A 5( P U ) ( P D )E G C S #/ G P E 2 84 P W R _ B T N#
2 6 L E D _ B A T _ F U LL # PW M 6 / GP A 6( P U ) ( P D )E G C L K / G P E 3 V D D3
34
26 L E D_ P W R # PW M 7 / GP A 7( P U )
WAKE UP 35 K B C _ RS M RS T #
PS/2 ( P D )W U I 5/ G P E 5
8 0C L K 85 17 S B _ K B C R S T# NC 6
25 8 0C L K 3 IN1 86 PS2 C LK 0/ G PF0 ( PU ) ( P D )L P C P D # / W U I 6/ G P E 6
25 3I N 1 PS2 D A T 0/ G PF1 ( PU )
8 0 P O RT _ DE T # 87 PWM/COUNTER
2 5 8 0 P OR T_ D E T # PM E# PS2 C LK 1/ G PF2 ( PU )
15 PM E# 88 47 C P U_ F A N S E N 13 N C _ 04
89 PS2 D A T 1/ G PF3 ( PU ) ( P D )T A C H 0 / G P D 6 48 C 2 84
24 TP _C L K PS2 C LK 2/ G PF4 ( PU ) ( P D )T A C H 1 / G P D 7 8Mbit KBC_SPI_*_R = 0.1"~0.5"
Reserve 24 TP _ D A T A 90 . 1 U _ 1 0V _X 7 R _0 4
PS2 D A T 2/ G PF5 ( PU ) 120
J20090724 ( P D )TM R I 0/ W U I 2 / G P C 4 V C OR E _ ON 29
WAKE UP 124 U 13
A C T H E R M_ R S T # 125 ( P D )TM R I 1/ W U I 3 / G P C 6 S P I_ V D D 8 5 K B C_ S P I_ S I_ R K B C _ S P I_ S I
1 3, 15 , 2 3 S B _ P W R OK PW R SW /G PE4 ( PU ) VD D SI
D2 8 *S C S 3 35 CIR R1 9 4 47_04 C2 8 1 * 3 3P _5 0 V _ 0 4
PW R _ SW # 18 119 C R X0 2 K B C_ S P I_ S O _ R K B C _ S P I_ S O
32 P W R_ S W #
R1 8 7 1 0 0_ 0 4 L I D # 21 R I 1# / W U I 0 / GP D 0 ( P U ) ( P D )C R X / G P C 0 123 CT X 0 R 22 0 1 K _ 04
? ? ? SO R2 1 9 1 5 _ 1 %_ 0 4 C3 6 1 * 3 3P _5 0 V _ 0 4
1 3, 2 3 L I D _ S W # R I 2# / W U I 1 / GP D 1 ( P U ) ( P D )C T X/ G P B 2
K B C_ F L A S H 3 1 K B C _ S P I _ C E # _R K B C _ S P I_ CE #
W P# C E# R2 1 8 1 5 _ 1 %_ 0 4 C3 6 0 * 3 3P _5 0 V _ 0 4
GP INTERRUPT LPC/WAKE UP
W EB_ W W W # 33 19 SW I # 6 K B C_ S P I_ S C L K _ R K B C _ S P I_ S C LK
23 W E B _W W W # GI N T / GP D 5 ( P U ) ( P D )L 80 H LA T/ G P E 0 R 19 2 4 . 7 K _ 04 S CK R1 9 3 47_04 C2 8 0 * 3 3P _5 0 V _ 0 4
112 Z 2 51 1 7 4
( P D )R I N G # / P W R F A I L # / LP C R S T #/ G P B 7 C H G _E N 28 H OL D # VSS
B T_ E N 108
UART W 2 5 X 8 0V S S I G
1 3 , 2 5 , 2 6 B T_ E N B K L _E N R X D / GP B 0( P U ) CLOCK
AVS S

109 2 Z 25 0 6 M X 25 L 8 0 05
VS S

V SS

13 B K L _E N T X D/G P B 1 ( P U ) C K3 2 KE J _ S P I1
VSS
VSS
VSS

VSS

VSS

128 Z 25 0 7
CK 3 2 K R2 1 7 * 1 0M _ 04 2 1 S P I_ V DD
I T 8 5 02 E K B C _ S P I _S C L K _ R 4 3 K B C _ S P I _ C E # _R
113
1 22
12

49

75

K B C _ S P I _S I _R 6 5 K B C_ S PI_ S O _ R
27

91
1

X3 3 2. 7 6 8 K H z 8 7
4 1
WEB0--->AP KEY V DD 3 13 , 1 6 , 2 5 , 26 , 2 7 , 2 8, 30 , 3 2
Z 2 5 05

3 2 * S P N Z -0 8S 3 -B - C -0 -P
EC? ? 8512 8502 C 34 7 3 .3 V 2, 12 , 1 3 , 1 5, 1 6 , 1 7 , 2 0, 2 3 , 2 4 , 2 5, 3 0 , 3 1 , 32
WEB1--->EMAILKEY R574 R 0_04 C 0.1U_04 C 60 3
.1 U_ 1 6 V _ 0 4
C3 5 6
1 2P _5 0 V _ 0 4
1 2 P _ 50 V _ 0 4
3 .3 V S 6, 9, 1 0 , 1 1 , 12 , 1 3 , 1 4 , 15 , 1 6 , 1 7 , 18 , 2 0 , 2 1, 22 , 2 3 , 2 5, 2 6 , 2 7 , 2 9

WEB2--->WWWKEY NC 7 N C_ 0 4

R 2 01 *1 0 mi l _ sh o rt -N BMN
R IP
GH T N E S S C P U _ F A N _R
1 2 LC D _ B R I GH T N E S S 13 C P U _F A N
K B C_ A G ND R2 1 0 1 20 K _ 0 4
C 2 97 * . 1U _ 16 V _ 0 4 C3 2 0 . 1 U _ 1 0V _X 7 R _ 0 4

B - 20 KBC-ITE IT8512E
 Schematic Diagrams

JMC261 CARD READER/LAN

Card Reader/Lan (JMC261) 5 VS

S D _ CL K R3 8 3 2 2 _0 4
R363 R362 R361 C346 Fu nction
3 .3 V 3. 3 V

C
A

A
0 NC NC NC Disable D3E
3 .3 V
NC NC 0 NC Enable D3E(1 ) D 34 D3 5 D 36 D3 7
*B A V 99 R E C T I F I E R *B A V 99 R E C T I F I E R

D I O1 0
DIO 1 1
D I O1 2

AC

AC

AC

AC
S D_ W P
SD_ D 0
SD _ D1
S D _D 2

S D _D 3

M DIO 7

D I O8
DIO 9
SD_ B S
R3 8 4 4. 7 K _ 0 4 MDIO Sin gle NC 10 0K NC 0 .1u Enable D3E(2 ) * B A V 9 9 RE C T IF IE R * B A V 9 9 RE C T IF IE R
U 34
End = 50
L A N _S C L R3 8 5 4. 7 K _ 0 4 8 7 1. For JMC2 51/JMC261 only. LP 2

M
M
M
M
M
V CC WP Oh m *W C M 20 1 2 F 2 S -1 61 T 0 3
6 2. MPD conn ect to Main Po wer or RSTNf or ML M X0 -_ R 4 3 ML M X0 -
S CL D3Eapplicaion, to AUX powe r oth erw s
i e.
L A N _S D A 5 1

48
47
46
45
44

42
41
40
39

37

35
34
33
43

38

36
S DA A0 2 U 17 ML M X0 + _ R 1 2 ML M X0 +
A1
4 3

M DIO 0
M D I O1
M DIO 2

M D I O3
M DIO 4
M D I O5

M D I O7

M D I O8
M DIO 9
M D I O1 0
M DIO 1 1
V DD IO

V DD IO
GN D
G ND A2

MD I O6

MD I O 12
LP 1
*H T2 4 L C 0 2 1 8P B *W C M 20 1 2 F 2 S -1 61 T 0 3
ML M X1 -_ R 4 3 ML M X1 -
L A N_ L E D0 49 32
L ED 0 GN D ML M X1 +
L A NX O UT L A N_ L E D1 50 31 M DIO 1 3 ML M X1 + _ R 1 2
51 L ED 1 MD I O 13 30 M DIO 1 4
DVD D VD D MD I O 14
52 29 L A N _S D A
L A NX IN R3 8 6 1 M_ 0 4 L A N_ M DIP 0 53 G ND S M B _ S DA /C R_ L E D N 28
L A N_ M DIN 0 54 V I P _1 T EST N 27
VIN _ 1 V DD IO 3 .3 V
X6 2 1 X 8 A 0 2 5 00 0 F G 1H _ 25 M H z DVD D 55 26 D V DD LA N _ C L K R E Q# 1 5 , 1 8
L A N_ M DIP 1 56 A V D D 12 VD D 25 C R1 _ P CT L N
V I P _2 V CC 3 O
C6 2 6 C6 2 7 L A N_ M DIN 1 57 24 S D _ CD # 3. 3V
58 VIN _ 2
JMC261 C R_ CD 0 N 23 M S _ INS #

B.Schematic Diagrams
2 2p _ 5 0 V _N P O _0 4 2 2p _ 5 0V _N P O _0 4 59 G ND C R_ CD 1 N 22 L A N _S C L R3 8 7 *0 _ 0 4 3 .3 V S
3 .3 V A V D D 33 S MB _S C L / L E D 2
L A N_ M DIP 2 60 21 L A N _ C LK R E Q #
L A N_ M DIN 2 61 V I P _3 (N C ) (L QFP 6 4) CR E Q N 20 M PD R3 8 8 *1 0 0 K _ 0 4
V I N _ 3 (N C ) MP D
DVD D 62 19 W A KEN
L A N_ M DIP 3 63 A V D D 12 (N C ) W AKE N 18 X R S TN R 38 9 0_04 C 62 8 *0 . 1 u _ 16 V _ Y 5V _0 4
V I P _4 (N C ) R STN
L A N_ M DIN 3 64 17 D V DD
V I N _ 4 (N C ) A VD DX V C C_ CA RD

V DD REG
V D DX 3 3

A V DD H
Sheet 20 of 35

C LK N
R 39 0 *1 0 m i _l s h or t S D _ CL K

R EXT

X O UT

CL KP
L P C _ R S T# 1 9 , 2 3 , 2 5

FB1 2
GN D

R XN
G ND
RX P

TXN
TXP
X IN

LX
C6 2 9 C6 3 0 DEL R544 for ME BUG
Sw itch in g Reg ulat or JM C 2 6 1 -L GC Z 0 A 7 *7 PCIe Differential
DV D D
JMC261 CARD

11

13
14
15
16
*1 0 p _5 0 V _ N P O _ 0 4

10

12
1
2
3
4
5
6
7
8
9
L67 Pairs = 100 Ohm 1 0u _ 6 . 3 V _ X5 R _0 6
( >20mil) ( >20mil)
REG L X

L A N X OU T
C 63 1 0 . 1 u_ 1 0 V _ X 7R _ 04 P C IE _ RX P 1 _ CA R DR E A D E R 15
READER/LAN

L A N X IN

R E GL X
S W F 2 5 20 C F -4 R 7 M- M C6 3 3 C6 3 4 C 63 2 0 . 1 u_ 1 0 V _ X 7R _ 04

DV D D
P C I E _ R X N 1_ C A R D R E A D E R 15
Fo r JMC25 1/261 1 0U _ 10 V _ 0 8 R3 9 1 Ne ar Ca rdre a de r CO NN
0 . 1 u_ 1 6 V _ Y 5 V _ 0 4
o nly
12 K _ 1 % _ 04 P C I E _ T X N 1 _ C A R D R E A D E R 15
P CIE _ T X P 1 _ CA R DR E A D E R 1 5
J20091201 V C C_ CA RD C ard Re ade r P owe r
3 . 3V 3 .3 V ( >20mil) R3 9 2 (> 20mil)
Ne a r JMC 26 1 P ow er Pin C R 1 _ P C T LN
DV D D
P C IE _ CL K _ C A RD RE A DE R 1 8
P C I E _C L K _ C A R D R E A D E R # 1 8 * 15 m i _l s h o rt _ 06
C6 3 5 C6 3 6 R 39 3
3 .3 V
C 6 37 C 6 38 C 6 39 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 7 5 _1 % _ 0 4
0 . 1 u_ 1 6 V _ Y 5 V _ 0 4
0 . 1 u _ 16 V _ Y 5V _ 0 4 * 1 0u _ 6 . 3 V _ X5 R _0 6 3 .3 V
0 . 1 u _ 16 V _ Y 5V _0 4 Fo r J MC251/ 261
R3 9 4 4 . 7 K _ 04 S D _C D # C6 4 0 C 64 1 on ly
R3 9 5 4 . 7 K _ 04 MS _I N S # 0. 1 u _ 1 6V _Y 5 V _ 04 1 0 U _ 1 0 V _ 08
DV D D

VCC _ CA R D
Ca rd Reader Connector
R N3 1 J20091201 D 39 * RB 7 5 1 V
C 6 42 C 6 43 C 6 44 C 645 1 0 K _ 8P 4R _ 0 4 S D _C D # A C
8 1 S D _W P C R _ W A K E # 15 J _ C A R D -R E V 1
0 . 1 u _ 16 V _ Y 5V _ 0 4 0 . 1 u _ 16 V _ Y 5V _0 4 7 2 S D _B S SD _ CD # P1
0 . 1 u _ 16 V _ Y 5V _0 4 * 1 0u _ 6 . 3 V _ X5 R _ 06 6 3 MD I O 13 W AK EN R3 9 6 *1 0 m li _ s ho rt SD _ D2 P2 CD _ S D
P C IE _ W A KE # 4 ,1 6 ,2 5 DA T 2 _ S D
5 4 SD _ D3 P3
C D / D A T3 _ S D
SD _ BS P4
P5 CM D_ S D
VSS_ SD
3 .3 V P6
V C C_ CA RD S D _ CL K P7 VDD _ S D
C5 6 1 P8 CL K _ S D
VSS_ SD
S D _ D0 P9
C 6 46 C 6 47 C 6 48 C 649 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 S D _ D1 P1 0 DA T 0 _ S D
DA T 1 _ S D
SD _ W P P1 1
1 0 u _6 . 3 V _ X 5 R _ 0 6 0 . 1 u _ 16 V _ Y 5V _0 4 P1 2 W P_ SD
VSS_ M S
0 . 1 u _ 16 V _ Y 5V _0 4 0 . 1 u _ 16 V _ Y 5 V _0 4 L1 0 P1 3
V C C_ CA RD S D _ CL K P1 4 V C C _ MS
L A N_ M DIP 0 7 10 ML MX 0 + _ R J _ RJ 4 5 C5 5 9 S D _ D3 P1 5 SCL K _ M S
TD + TX+ D A T 3 _ MS
L A N_ M DIN 0 8 9 ML MX 0 -_ R M L MX 0 + 1 GN D 1 M S _ INS # P1 6
3 .3 V TD - T X- M L MX 0 - 2 DA+ sh i e l d GN D 2 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 S D _ D2 P1 7 I N S _M S
DA- sh i e l d D A T 2 _ MS
4 12 M L MX 1 + 3 S D _ D0 P1 8
5 N C N C 13 M L MX 1 - 6 DB+ S D _ D1 P1 9 S D I O/ D A T 0_ M S
N C N C DB- D A T 1 _ MS
SD _ BS P2 0 P2 2
B S _ MS G ND
C 6 50 C 6 51 C 6 52 C 653 L A N_ M DIP 1 1 16 ML MX 1 + _ R P2 1 P2 3
L A N_ M DIN 1 2 R D+ R X+ 15 ML MX 1 -_ R 4 VSS_ M S G ND
R D- R X- DC +
1 0 u _6 . 3 V _ X 5 R _ 0 6 0 . 1 u _ 16 V _ Y 5V _0 4 D C_ N P 5 M D R 01 9 -C 0 -1 0 4 2
0 . 1 u _ 16 V _ Y 5V _0 4 0 . 1 u _ 16 V _ Y 5 V _0 4 3 14 RX _ CT 7 DC -
R D_ C T R X_ C T DD +
6 11 TX _ C T D D_ N P 8
T D _ CT T X_ C T DD -
C4 8 5 P J S -0 8 S L 3B
LF -H 8 0 P -1
Plac e al l c ap ac itors cl os ed to c hip . R5 6 R 58 R2 7 R 24
The su bs cript in eac h CAP inc icates the 0. 1 u _ 1 0V _X 7 R _ 0 4
J20091201 7 5 _1 % _ 0 4 7 5 _ 1 %_ 0 4 7 5_ 1 % _ 0 4 7 5 _ 1 %_ 0 4
pin numb er o f JMC251 /JMC 261 th at
should be c los ed t o.
C4 2 3
5 VS 12 , 1 3 , 2 1, 22 , 2 3 , 2 4, 26 , 2 7
1 0 00 p _ 2K V _ X7 R _1 2 _ H 1 2 5
3 .3 V 2, 1 2 , 1 3 , 1 5, 1 6 , 1 7 , 2 3, 2 4 , 2 5 , 30 , 3 1 , 3 2

JMC261 CARD READER/LAN B - 21

 Schematic Diagrams

AUDIO CODEC ALC272

CODEC ( ALC272-GR )

PIN25,PIN38 ‫ ٺ‬1ឍ 10uF/.1uF D29 *SCS551V-30

C A 5V
5VS_AUD

L35 HCB1005KF-121T20 5VS

C402 C403
3.3VS L37 3.3VS_AUD
HCB1005KF-121T20 .1U_16V_04 10u_10V_Y 5V_08 C606 C404

*.1U_16V_04 1u_6.3V_Y 5V_04

B.Schematic Diagrams

C397 C394 C390 C594

AUDG L63 *10mil_short
.1U_16V_04 10u_10V_Y 5V_08 .1U_16V_04 .1U_16V_04
C607 0.1u_50V_Y 5V_06
C572 C571 C608 0.1u_50V_Y 5V_06

.1U_16V_04 10u_10V_Y 5V_08

AUDG

Sheet 21 of 35 AUDG

25
38
Layout Note:

4
7

1
9
U30
ALC_VREF C579 4.7u_25V_X5R_08

AUDIO CODEC Very close to Audio Codec

DVSS1
DVSS2

AVDD1
AVDD2
DVDD-IO
DVDD
AUDG
ALC_GPIO0 2

ALC272 15,24 AZ_SDOUT

C587 *22p_50V_NPO_04ALC_GPIO1 3

5
GPIO0/DMIC-DATA1/2
GPIO1/DMIC-DATA3/4

SDATA-OUT
VREF
27

D30
MIC1-VREFO-R
6 28 MIC1-VREFO A C CH355PT
15,24 AZ_BITCLK BIT-CLK MIC1-VREFO
R341 22_04 AZ_SDIN0_R 8 D31
15 AZ_SDIN0 SDATA-IN MIC1-VREFO-L
10 A C CH355PT
15,24 AZ_SY NC SY NC
11 37
15,24 AZ_RST# RESET# MONO-OUT
47
DIGITAL R343 R348
22 EAPD_MODE EAPD
SPDIFO 48 31 C609 2.2u_6.3V_X5R_04 4.7K_04 4.7K_04
45 SPDIFO1 CPVEE 30 C610 2.2u_6.3V_X5R_04
SPDIFO2 CBN 29
46 CBP MIC1-L MIC1-R
44 DMIC-CLK1/2
C611 *.1U_16V_04 DMIC-CLK3/4 AUDG
43 35 FRONT-L C584 C589
NC LOUT1-L FRONT-L 22
BEEP R325 10K_04 C569 1u_6.3V_Y 5V_04 12 36 FRONT-R
26 BEEP PCBEEP-IN LOUT1-R FRONT-R 22
R332 1K_1%_04 *680p_50V_X7R_04
C573 .1U_16V_04 R245 20K_1%_04 13 39 *680p_50V_X7R_04
26 JD_SENSE_MIC Sense A(JD1) LOUT2-L
R353 5.1K_1%_04 34 41
26 JD_SENSE Sense B(JD2) LOUT2-R AUDG AUDG
14 33 HEADPHONE-L
15 LINE2-L
LINE2-R
ANALOG HPOUT-L
HPOUT-R
32 HEADPHONE-R HEADPHONE-L 26
HEADPHONE-R 26
C376 4.7u_6.3V_X5R_06 MIC2_L 16 23
INT_MIC R240 1K_04 C377 4.7u_6.3V_X5R_06 MIC2_R 17 MIC2-L LINE1-L 24
MIC2-R LINE1-R

MIC2-VREFO
18
LINE1-VREFO JDREF
NEAR CODEC MIC2-VREFO

19 40 R249 20K_1%_04
20 MIC2-VREFO JDREF R139
LINE2-VREFO
R246 75_1%_04 C380 4.7u_6.3V_X5R_06 MIC1_L 21 2.2K_04
26 MIC1-L MIC1-L

AVSS1
AVSS2
R241 75_1%_04 C375 4.7u_6.3V_X5R_06 MIC1_R 22 AUDG J_INTMIC1
26 MIC1-R MIC1-R INT_MIC
1
ALC272 C192 2

26
42
88266-02001_L
330p_50V_X7R_04 88266-2L

MIC2_L C388 *0.1u_16V_Y 5V_04 AUDG

MIC2_R C389 *0.1u_16V_Y 5V_04

MIC1_L C382 *0.1u_16V_Y 5V_04

MIC1_R C374 *0.1u_16V_Y 5V_04

Layout Note:
AUDG Codec pin 1 ~ pin 11 and pin 44 ~ pin 48
Layout Note: are Digital signals.
3.3VS 6,9,10,11,12,13,14,15,16,17,18,19,20,22,23,25,26,27,29
Very close to Audio Codec The others are Analog signals. 5V 25,26,29,30,31,32
5VS 12,13,20,22,23,24,26,27
PIN 13 ,PIN34 JD_SENSE
Ꮑ૞ሶၲ߻ַեឫ

B - 22 AUDIO CODEC ALC272

 Schematic Diagrams

AUDIO AMP TPA6017

AMP (TPA6017)

5VS_REAR
5VS
L62 HCB1005KF-121T20

B.Schematic Diagrams
C570 C612 C613 C614
0.1u_16V_Y5V_04 *10u_6.3V_X5R_06 10u_10V_Y5V_08 *10u_10V_Y5V_08

U29
FRONT-L C615 1u_6.3V_X5R_04 LIN- 5 6
21 FRONT-L C616 1u_6.3V_X5R_04 LIN+ 9 LI N- PVDD 15 L36 1 2 FCM1005KF-121T03 AUDG
LI N+ PVDD
21 FRONT-R FRONT-R
AUDG
C617
C619
1u_6.3V_X5R_04
1u_6.3V_X5R_04
RI N-
RI N+
17 RIN-
7
VDD 16
4 SPKOUTL+
C618 1000p_50V_X7R_04
J_SPKL1
J_SPK1 Sheet 22 of 35
AUDG RIN+ LOUT+ SPKOUTL+_R 2 1

Th ermal Pad
R360 100K_04
SPK_EN 19 SD#
LOUT- 8 SPKOUTL- L34 1 2 FCM1005KF-121T03
C396
SPKOUTL-_R

C393
1
2
85204-02001
AUDIO AMP
5VS
AUDG R356
R357
*100K_04
100K_04
GAIN0
GAIN1
2
3 GAIN0
GAIN1
ROUT+
ROUT-
18
14
SPKOUTR+

SPKOUTR-
SPKOUTR+ 26

SPKOUTR- 26 R371
180P_50V_NPO_04
*10mil_short 180P_50V_NPO_04
PCBFootprint = 85204- 02R
TPA6017
R361 *100K_04 1
AUDG 11 GND
13 GND 10 AMP_BYPASS
20 GND BYPASS
21 GND 12 C601
EXPOSED PAD NC
N7010 4. 7u_6. 3V_X5R_06
Gain Settings
GAIN0 GAIN1 AV(inv) INPUT IMPEDANCE AUDG
0 0 6 dB 90 k AUDG
0 1 10 dB 70 k
1 0 15.6 dB 45 k
1 1 21.6 dB 25 k

3.3VS
3.3VS
Low mute! C620 *0.1u_16V_Y5V_04

R372
C621
100K_04 Delete
D32 *SCS355V *.1U_16V_04 J20091125
C A
5

15 SB_MUTE#
21 EAPD_MODE R374 *0_04 1
4 SPK_EN
19 KBC_MUTE# 2
U33
3

D38 *SCS355V MC74VHC1G08DFT1G

18,23,25,27, 31,32 SUSB# C A

Reserve
J20091125

3.3VS 6,9, 10,11,12,13,14,15,16, 17,18,19,20,21,23, 25, 26,27,29

5VS 12,13, 20,21,23,24,26,27

AUDIO AMP TPA6017 B - 23

 Schematic Diagrams

SATA HDD, POWER GOOD & SW

POWER MANAGMENT POWER GOOD & RESET

For NB control and Level shift
3 .3 V 3 .3 V 3. 3 V 3 .3 V 3 . 3V 3 .3 V
VCORE Power Good delay
3ms and Notice SB U 11A All Power Good and

14
7 4 L VC0 8 PW U1 1 B

14
R 17 9 C2 5 4 R 17 7 1 7 4L V C 0 8P W
Notice SB
32 1 . 8 V _ P W R GD
R 1 64 3 Z 2 91 1 4
* 10 K _ 0 4 *. 1 U _1 6 V _ 0 4 *4 . 7 K _ 0 4 2 6
31 1 . 5 V _ P W R GD S B _P W R O K 1 3 , 15 , 1 9
* 1 0K _ 0 4 5
K B C_ S U S C# 1 9
R2 0 6

7
D
5
R1 8 3 * 10 m i l _s h o rt -N M N P S B _ S U S C # 1 5

7
Z 2 90 6 Z 2 9 07 1 1 0K _ 0 4
R1 7 8 4 Z 2 9 08 G

D
*0 _ 0 4 C 2 Q 16
Z2905 B *2 N 7 00 2 W R 1 80 3 . 3V

S
5 N B _ S 3 A UX S W # G U 10
Q 17 E Q 15 * 74 A H C 1 G 08 G W 1 0 0 K _ 04 U 11C

14
B.Schematic Diagrams

*D TC 1 14 E U A * 2 N 7 0 02 W 7 4 L VC0 8 PW

S
9
6 , 2 9 D E L A Y _ P W R GD
8 Z 2 91 2
10
3 .3 V 3 1 1 . 05 V S _P W R G D

Close to SIS968

7
R 16 8

Sheet 23 of 35 *4 . 7 K _ 0 4 R1 8 1 * 10 m i l _s h o rt -N M N P
K BC_ S U S B# 1 9
3 . 3V

SATA HDD,
S US B # 18 , 2 2 , 2 5, 27 , 3 1 , 3 2

D
R 1 63 R1 7 2 * 10 m i l _s h o rt -N M N P C2 8 7 * . 1 U _ 1 6V _0 4
S B_ SUSB # 1 5
*1 0 0 K _ 04
Z 29 1 0 G U 11D

14
POWER GOOD & 15 PS O N#

If n ee d PS ON # C 2 55
Q 18
*2 N 7 00 2 W C 2 57 12
7 4 L VC0 8 PW

S
11 Z 2 9 0 9 R1 9 7 3 3_ 0 4
th an u se d 10 0K 14 S B _P C I R S T# P C I_ RS T # 2 5
* . 1 U _ 1 6V _0 4 * . 1 U _ 1 6 V _0 4 13

SW an d 0. 1U

R 1 95
R2 0 3

R2 0 5
3 3_ 0 4

3 3_ 0 4
L P C _ R S T # 19 , 2 0 , 2 5

N B _R S T # 6 , 1 1

7
1 0 0 K _ 04

SIGNAL S0/S1 S3 S4/S5

S3AUXSW# 1 0 1

PSON# 0 1 1

SATA HDD POWER SWITCH CONNECTER

3 .3 V S 3 .3 V
3 .3 V S 3 .3 V

Close to
J_ H D D 1 connector C6 0 4 0. 0 1 u _ 50 V _ X 7 R _ 0 4
S1
S2 S A T A T XP 0_ R C 5 60 . 0 1 U _ 1 6 V _X 7 R _0 4 C6 0 5 0. 0 1 u _ 50 V _ X 7 R _ 0 4 J _ SW 3
S3 S A T A T XN 0 _ R C 5 55 . 0 1 U _ 1 6 V _X 7 R _0 4
S A T A T XP 0 16
S A T A T XN 0 1 6 1
20mil
S4 R 3 7 7 1 0 0 K _ 04
S5 S A T A R X N 0_ R C 5 53 . 0 1 U _ 1 6 V _X 7 R _0 4 J_ S W 1 2 M_ B T N #
S6 SA T ARXP 0 _ R C 5 52 . 0 1 U _ 1 6 V _X 7 R _0 4
S A T A R X N 0 16 20mil 3
W EB_ W W W #
S7 S AT ARX P0 1 6 1 4 W E B_ EM AIL #
3 .3 V S 2 M_ B T N # 5 L ID_ S W #
3 W EB_ W W W # M _B T N # 32 6
4 W E B _W W W # 1 9 7
P1 W E B _ E M A IL # W EB_ AP #
5 L ID_ S W # W E B _E M A I L # 1 9 8 W E B_ AP # 1 9 ,3 2
P2 L ID_ S W # 1 3 ,1 9
P3 C5 4 4 C 5 43 6
7
P4 AP_ KEY 8 8 29 6 -0 8 L
P5 *. 0 1 U _ 1 6 V _ X7 R _0 4 * 1 0U _ 10 V _ 0 8 8 AP_ KEY 32
P6 9
10 VIN
P7 5 VS
P8 R 370
P9 *5 0 50 0 -0 1 04 1 -0 0 1L * 4 7K _0 4
P1 0
P1 1 Z 2 90 1
P1 2 C5 4 0 C2 6 0 C5 3 9 C5 3 8 C2 6 1 C2 9 2 VIN 1 2, 28 , 2 9 , 3 0, 3 1 , 3 2
+ 3 . 3V 2 , 1 2, 1 3 , 1 5 , 16 , 1 7 , 2 0 , 24 , 2 5 , 3 0, 31 , 3 2
P1 3 Z 2 90 2
3 . 3V S 6 , 9 , 10 , 1 1 , 1 2, 13 , 1 4 , 1 5, 1 6 , 1 7 , 1 8, 1 9 , 2 0 , 21 , 2 2 , 2 5, 26 , 2 7 , 2 9
P1 4 Z 2 90 3 *. 1 U _ 1 6 V _ 0 4 1 0U _ 10 V _ 0 8 *. 1 U _1 6 V _ 0 4 *1 U _1 0 V _ 0 6 1 0U _ 1 0V _ 0 8 *1 0 0 U _ 6 . 3 V _ B 2 5 VS 1 2, 13 , 2 0 , 2 1, 2 2 , 2 4 , 2 6, 2 7
P1 5 Z 2 90 4

9 1 90 7 -0 2 20 C
P IN GN D1 ~ 2 = G ND

B - 24 SATA HDD, POWER GOOD & SW

 Schematic Diagrams

ODD, MDC, TP Conn, 3G

ODD 3G
C288
20 mil 220U_4V_V Change to B2 size
Close to

+
J_ODD1
J20090725
connector J_3G1
S1 1 2
WAKE# 3.3V_0 3G_3.3V
S2 SATATXP1_R C508 .01U_16V_X7R_04 3 6
SATATXP1 16 BT_DATA 1.5V_0
S3 SATATXN1_R C507 .01U_16V_X7R_04 5 8 MUIM_PWR
SATATXN1 16 BT_CHCLK UIM_PWR
S4 10 MUIM_DATA
S5 SATARXN1_R C505 .01U_16V_X7R_04 7 UIM_DATA 12 MUIM_CLK C275
SATARXN1 16 CLKREQ# UIM_CLK
S6 SATARXP1_R C504 .01U_16V_X7R_04 11 14 MUIM_RST
SATARXP1 16 REFCLK- UIM_RESET
S7 13 16 MUIM_VPP .1U_16V_04
9 REFCLK+ UIM_VPP
15 GND0 4
5VS GND1 GND5
P1 Z3002
P2 KEY
P3

B.Schematic Diagrams
P4 Z3001 21 18
P5 C502 C501 C500 C499 C498 27 GND2 GND6 26
P6 +
29 GND3 GND7 34
.1U_16V_04 *.1U_16V_04 1U_10V_06 *10U_10V_08 100U_6.3V_B2 GND4 GND8 40
C18553-101 35 GND9 50
19 3G_DET# GND11 GND10
23
PETn0
PIN GND1 ~4=GND 25
PETp0 W_DISABLE#
20
3G_EN 19
31 22
33 PERn0 PERSET# 30
PERp0 NC(SMB_CLK)
5VS
17
19
37
NC3
NC4
NC(SMB_DATA)
NC(USB_D-)
NC(USB_D+)
32
36
38
USB_PN4
USB_PP4
USB_PN4 16
USB_PP4 16
Sheet 24 of 35
R309 39 NC6 24

*10K_04

SATA_LED#
3G_3.3V
C549

.1U_16V_04
C548

10U_10V_08
41
43
45
47
NC7
NC8
NC9
NC10
3.3VAUX
1.5V_1
1.5V_2
3.3V_1
28
48
52
42
3G_3.3V

3G_3.3V
ODD, MDC, TP
16,26 SATA_LED# SATA_LED# 16,26 NC11 NC(LED_WWAN#)
49
51 NC12
NC13
88910-5204
LED_WLAN#
NC(LED_WPAN#)
44
46 +
C359

220U_4V_V Conn, 3G
3G POWER R239 *0_08

3G_3.3V
120mil Q25 AO3415 120mil
R233 0_08 S D
3.3V
C362 G
C369 1u_6.3V_Y 5V_04 R226 C370

10u_10V_Y5V_08 100K_04 0.1u_16V_Y5V_04

MDC CONN R223

R224

10K_1%_04
100K_04
W740S
J_MDC1
20mil 3.3V

D
1 2 L60 3.3V
AZ_SDOUT R333 0_04 MAZ_SDOUT 3 GND RESERVED 4 Z4006
15,21 AZ_SDOUT
5 Azalia_SDO
GND
RESERVED
3.3V Main/aux
6 Z4007 10mil HCB1005KF-121T20 19 3G_PWR
G
Q23
MTN7002ZHS3
15,21 AZ_SY NC AZ_SY NC R334 0_04 MAZ_SYNC 7 8 2N7002W
AZ_SDIN1 R335 22_04 MAZ_SDIN1 9 Azalia_SY NC GND 10

S
15 AZ_SDIN1 Azalia_SDI GND
15,21 AZ_RST# AZ_RST# R336 0_04 MAZ_RST# 11 12 MAZ_BITCLK R320 0_04
Azalia_RST# Azalia_BCLK AZ_BITCLK 15,21
88018-120G C554 C556
J_MDC
.1U_10V_X7R_04 *22P_50V_04
12

2
11

1
SIM card J_SIM1
R305 *4.7K_04

LOCK
(TOP VIEW)
MUIM_CLK R326 *10mil_short-NMNP
Z3007 C3 C7 Z3008 R306 *10mil_short-NMNP MUIM_DATA
MUIM_RST C2 UIM_CLK UIM_DATA C6 MUIM_VPP
MUIM_PWR C1 UIM_RST UIM_VPP C5
UIM_PWR UIM_GND
C536 C535 C537
C563 OPEN *22P_50V_04 *22P_50V_04 *22P_50V_04
*22P_50V_04 1770661-1

TP CONN 5VS_TP

R144 *20mil_short-NMNP
5VS

R142 R143

J_TP1 10K_04 10K_04 Layoutழ VDD3

3.3V
13,16,19,25,26,27,28,30,32
2,12,13,15,16,17,20,23,25,30,31,32
3.3VS 6,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,25,26,27,29
1
2 TP_DATA 19
1. SIMհࢬ‫ॾڶ‬ᇆᒵ‫ף‬ษ(10mil) 5V 21,25,26,29,30,31,32
TP_CLK 19 5VS 12,13,20,21,22,23,26,27
3
4
2. ࢬ‫ॾڶ‬ᇆᒵհၴ‫ף‬GND
85201-04051 C194 C196 C197 3. SIM hold ‫᧯ء‬؄ࡌ‫ף‬GND໮៥
1U_10V_06 47P_50V_04 47P_50V_04 4.SIM CONN ᔾ२ MINI CARD CONN

ODD, MDC, TP Conn, 3G B - 25

 Schematic Diagrams

NEW CARD, USB, MINI PCIE

3 .3 VS

NEW CARD C 4 01 * . 1 U _ 1 6V _0 4

5
L P C _R S T # 1
4
2
3 .3 V
U 31 U3 2 J _ NE W 1
C 5 85 . 1 U _1 6 V _ 0 4 17 8 N C _ R S T# 7 4 A H C 1G 0 8 GW N C_ P E R S T # 13

3
A U XI N P E RS T # PER ST#
N C_ 3 .3 V 20 mil C 54 5 . 1 U _ 1 6 V _ 04
3 .3 VS 15 12
A UX O UT + 3 . 3V A U X
6 -0 1- 74 108 -Q 61
C 3 99 * . 1 U _ 1 6V _0 4 2 40 mil C 55 1 *. 1 U _ 16 V _ 0 4
3 .3 V IN N C_ 3 .3 V S
C 4 00 . 1 U _1 6 V _ 0 4 3 14
3 .3 V O UT + 3 . 3V
C 55 0 . 1 U _ 1 6 V _ 04 15
1 .5 VS + 3 . 3V
N C_ 1 .5 V S 40 mil C 54 2 *. 1 U _ 16 V _ 0 4
C 5 80 * . 1 U _ 1 6V _0 4 12 11 9
1 .5 V IN 1 .5 V O UT + 1 . 5V
C 5 81 . 1 U _1 6 V _ 0 4 C 54 1 . 1 U _ 1 6 V _ 04 10
+ 1 . 5V
10 N C_ C P P E # 17
L P C_ R S T # 6 C PPE# 9 N C_ C P US B # 4 CP P E #
19 , 2 0 , 2 3 LP C _ R S T#
B.Schematic Diagrams

19 SY S RS T # CP U S B# PC IE_ W AKE # 11 CP US B#
16 U S B _ OC #0 OC # 4, 1 6 , 2 0 P C I E _W A K E # W AKE #
1 8 N E W _C A R D _ C L K R E Q# 16
1 R 3 45 * 1 00 K _ 0 4 R 3 14 1 0 K_ 0 4 CL K R EQ #
18 , 2 2 , 2 3, 2 7 , 3 1 , 32 S U S B # ST BY # 3 .3 V S
R 3 47 * 1 00 K _ 0 4 19
3 .3 V 1 8 P C I E _ C LK _N E W 18 RE F CL K +
18 P C I E _ C LK _ N E W # RE F CL K -
R3 5 2 *1 0 K _ 0 4 4 18 R 3 49 * 1 0K _ 0 4 27
3 .3 V 5 NC R CL K E N 20 R 3 55 1 0 K_ 0 4 22 N C 28
NC S HD N# 1 5 P C IE _ RX P 0 _ NE W _ C A RD PER p 0 N C
13 21
NC 1 5 P C IE _ RX N0 _ NE W _ CA R D PER n 0
14 7 1 5 P C I E _T X P 0 _ N E W _C A R D C 3 68 . 1 U _ 1 0 V _ X 7R _ 04 P C I E _ T XP 0_ N E W _ C A R D _ R 2 5

Sheet 25 of 35 16 NC GN D 21 C 3 66 . 1 U _ 1 0 V _ X 7R _ 04 P C I E _ T XN 0 _ N E W _ C A R D _ R 2 4 PETp 0 5 Z3102

NC GN D 1 5 P C I E _T X N 0_ N E W _ C A R D PETn 0 RE S E RV E D Z3103
6
P 2 2 3 1N F E 2 RE S E RV E D
U SB_ PP0 3

NEW CARD, USB,

16 U SB_ PP0 U SB _ P N0 2 US B _ D+ 1
EN E P2 23 1N F E2 pi n1 ,8 ,9 ,1 0, 20 h as 16 U S B _ P N0 US B _ D- GN D 20
in te rn al ly p ul le d hi gh ( 11 0~ 33 0K GN D
9, 10 , 1 5 , 1 8 S _D A T 8 23
oh m) 7 S M B _ DA T A GN D 26

MINI PCIE
9, 10 , 1 5 , 1 8 S _C L K S M B _ CL K GN D
R B 7 5 1V
D2 7 S C S 7 5 1 V -4 0 1 3 5 80 1 5 1- 5
A C N C_ C P P E # G N D1 ~ 4 = GN D
15 P C I E _ P R S N T 0

USB PORT MINI CARD

R4 6 U S B V C C3 5 U S B _ V C C 3 5_ 2
*1 0 K _ 0 4 60 mil
L54 H C B 1 6 0 8K F -1 21 T 2 5
16 U S B _ OC #2 6
R4 5 C4 8 1 C 2 28 J 20 09 11 26 20 mil
*5 6 0 K _ 04 + J _ MI N I 1 3 .3 V
1 00 U _ 6. 3 V _ B 2 . 1U _ 16 V _ 0 4 R 23 0 _ 04 1 2 20 mil
4 , 1 6, 20 P C I E _ W A K E # W AK E# 3 .3 V _ 0
3 6
R 40 7 0 _ 04 5 B T _ DA T A 1 .5 V _ 0 8 UIM _ PW R 1. 5 V S
1 3, 1 9 , 2 6 B T_ E N B T _ CH CL K UI M _ P W R
R 22 1 0 K _ 04 10 UIM _ DA T A
R 1 60 * 10 m i l _s h o rt J_ U S B 2 3 .3 V S M I N I _ C A R D _C L K R E Q # 7 U I M_ D A T A 12 UIM _ CL K
1 8 MI N I _ C A R D _C L K R E Q # C LK R E Q # U I M_ C L K
1 11 14 UIM _ RS T
V + 1 8 P C I E _ C LK _M I N I # R E F CL K - UIM _ RE S E T
1 8 P C I E _C L K _ MI N I 13 16 UIM _ VPP
1 L1 9 2 US B _ P P 5 _ R US B _ P N5 _ R 2 9 R E F CL K + U I M_ V P P
16 U S B _P P 5 D ATA_ L G ND 0
15 4
4 3 U S B _ P N 5 _R U S B _ P P 5 _R 3 G ND 1 G ND 5
16 U S B _P N 5 D ATA_ H
*W C M2 0 1 2 F 2 S -1 61 T 0 3

G N D 2G N D 1
G ND 3
4

G N D 3GN D 2
GN D 4
R 1 59 * 10 m i l _s h o rt G ND KEY
21 18

GN D 1

GN D 4
C 1 0 7 7 0-1 0 4 A 3 27 G ND 2 G ND 6 26
G ND 3 G ND 7 J 20 09 11 27
29 34
G ND 4 G ND 8 40
U S B _ V C C 3 5_ 2 G ND 9
35 50 R4 0 0 0_04
19 W L A N _ D E T# R3 6 8 *1 0 m i _l s h ort 23 G N D 11 G ND 1 0 B T_ D E T # 13 , 1 9
60 mil 4 P E 0R X 0# PETn 0
R3 6 9 *1 0 m i _l s h ort 25 20 W L A N _E N
4 P E 0 RX 0 PETp 0 W _ D I S A B LE # W LA N _ E N 19 , 2 6
4 P E 0T X 0 # 31 22 P C I _ R S T# 2 3
C4 8 2 C 1 50 33 PER n 0 PER SET# 30
U SB P ac ka ge c ha ng e 4 P E 0 TX 0 PER p 0 N C (S M B _ C L K )
+ 32 R4 0 1 * 0 _0 4
J 20 09 09 09 N C (S M B _ D A T A ) W D T _ E N 19
1 00 U _ 6. 3 V _ B 2 * . 1 U _ 1 6 V _0 4 17 36 U S B _ P N1
19 8 0 P OR T _D E T # N C3 N C (U S B _ D -) U SB_ PP1 U S B _ P N 1 16
19 38
19 3 IN 1 Z3 1 0 6 37 N C4 N C (U S B _ D +) U S B _ P P 1 16
N C6 20 mil
39 24
N C7 3 .3 VAU X
R 1 04 * 10 m i l _s h o rt J_ U S B 1
3 . 3V
41
N C8 1 .5 V _ 1
28 40 mil 3 . 3 V
1 43 48
V + N C9 1 .5 V _ 2 1 .5 V S
Z3 1 0 9 45 52 3 .3 V
1 L1 2 2 US B _ P P 3 _ R US B _ P N3 _ R 2 Z3 1 1 0 47 N C1 0 3 .3 V _ 1 42
16 U S B _P P 3 D ATA_ L ? ? ? ? ? ? ? N C1 1 N C (L E D _W W A N #) 20 mil
49 44
4 3 U S B _ P N 3 _R U S B _ P P 3 _R 3 51 N C1 2 L E D_ W L A N # 46
16 U S B _P N 3 D ATA_ H V DD 3 N C1 3 N C (L E D _ W P A N #) 8 0 CL K 19
*W C M2 0 1 2 F 2 S -1 61 T 0 3 G N D 2G N D 1
G ND 3
4 8 8 9 08 -5 2 0 4
G N D 3GN D 2
GN D 4
R 1 03 * 10 m i l _s h o rt G ND
GN D 1

GN D 4
C 1 0 7 7 0-1 0 4 A 3
1 . 5V S 3 , 6 , 31
3 . 3V 2 , 1 2, 1 3 , 1 5 , 16 , 1 7 , 2 0 , 23 , 2 4 , 3 0, 31 , 3 2
R 49 1 0 K_ 0 4
3 .3 V US B V CC 3 5 3 . 3V S 6 , 9 , 10 , 1 1 , 1 2, 13 , 1 4 , 1 5, 1 6 , 1 7 , 1 8, 1 9 , 2 0 , 21 , 2 2 , 2 3, 26 , 2 7 , 2 9
V DD 3 1 3, 16 , 1 9 , 2 6, 2 7 , 2 8 , 3 0, 3 2
U2 3 100 mil
5V US B _ O C# 2 6 5 6 5V 2 1, 26 , 2 9 , 3 0, 3 1 , 3 2
F L G# V O U T 1

60 mil 2 7 C4 7 5 C 72 3 .3 V 1 . 5V S 3. 3 V
V IN1 V O UT 2
C 48 3 8 *. 1 U _1 6 V _ 0 4 1 0 U_ 1 0 V _ 0 8 C4 5 6 C4 8 4 C 20 C8 0 C 17
V IN2 V O UT 3
1 u _ 6 . 3V _Y 5 V _ 04 4 1 . 1U _ 16 V _ 0 4 *1 0 U _ 1 0V _0 8 . 1U _ 16 V _ 0 4 10 U _1 0 V _ 0 8 . 1 U _1 6 V _ 0 4
E N# G ND
R T 9 7 15 B G S

3 0 , 3 1, 3 2 D D _ ON #
6-0 2-0971 5-920

B - 26 NEW CARD, USB, MINI PCIE

 Schematic Diagrams

LED, PC BEEP, CCD, Audio Conn

LED V DD 3 VD D3 5 VS 5 VS
3 .3 V S

R2 5 2 R 25 3 R 6 R5
R 4
2 2 0_ 0 4 2 2 0 _0 4 47 0 _ 0 4 4 70 _ 0 4
2 2 0 _0 4
Z 32 0 1 Z 3 20 2 Z 3 2 09 Z3210
Z 3 21 8

A
1

3
D1 6 D 1 D5
SCROLL
AC IN/POWER ON LED WLAN/BT LED LOCK

SG
SG
Y

Y
K P B -3 0 2 5Y S G C K P B -3 02 5 Y S GC K P -2 0 12 S G C LED
R Y -S P 1 5 5H Y Y G4 R Y -S P 15 5 H Y Y G4 R Y -S P 1 7 2Y G3 4

4
Z 3 2 11 Z3212

C
C C
19 LE D _ A C I N # L E D _ PW R# 1 9 1 3 , 1 9 , 25 B T_ E N B B W L A N _E N 1 9 , 2 5 L E D _ S C R OL L # L E D _ S C R O L L# 1 9
Q 1 E E Q2
D T C 1 14 E U A D T C 1 1 4E U A

3 . 3V S 3 .3 V S 3 .3 VS
V DD 3 VD D3

B.Schematic Diagrams
R2 R 3 R 1
R2 5 5 R 25 4
2 20 _ 0 4 2 2 0 _0 4 2 2 0 _0 4
2 2 0_ 0 4 2 2 0 _0 4 Z 3 22 2
Z32 20 Z 3 22 1

A
Z 32 0 5 Z 3 20 6
D 3 NUM LOCK D4 CAPS LOCK D2 HDD/CD-ROM
Sheet 26 of 35
1

D1 7
K P -20 1 2 S GC LED K P -2 0 1 2S G C LED K P -2 0 1 2S G C
LED
BAT CHARGE/FULL LED R Y -S P 17 2 Y G 3 4 R Y -S P 1 7 2 Y G 34
SG

R Y -S P 1 7 2 Y G 34
Y

K P B -3 0 2 5Y S G C
R Y -S P 1 5 5H Y Y G4 LED, PC BEEP,

C
2

1 9 L E D _ B A T _ C H G# L E D _ B A T _F U L L # 19
L E D _ N U M# LE D _ N U M# 1 9 L E D _ CA P # L ED_ C AP # 1 9 S A T A _ LE D # S A T A _ L E D# 1 6 ,2 4
CCD, Audio Conn

PC BEEP Audio/USB CONN

C 37 8
1U _ 10 V _ 0 6 5V
J _A U D I O1
19 K B C _B E E P BEEP 21
M I C 1 -R 1
2 1 MI C 1- R 2
2 1 MI C 1- L M I C 1 -L
C 38 1 3
1U _ 10 V _ 0 6 H E A D P H O N E -R 4
2 1 H E A D P H ON E -R 5
15 S P K RO UT 2 1 H E A D P H ON E -L H E A D P H O N E -L
J D _ S E N S E _ MI C 6
2 1 J D _ S E N S E _ MI C 7
S P K _H P #
J D_ S E N S E 8
2 1 J D_ S E N S E 9
U SB _ PN7
5V 5 V _ CC D 1 6 U SB_ PN7 U SB_ PP7 10

CCD SECOND ID C ONN. 1 6 U SB_ PP7

2 2 S P K O UT R+ S P K OU TR +
11
12
13
C4 C5 S P K OU TR -
2 2 S P K O UT R- 14
1U _ 6. 3V _ 0 4 1U _ 6. 3 V _ 0 4 8 72 1 3 -1 4R

5V Q3 5 V _ CC D
A O3 4 09 40 mil
L1 H C B 1 0 05 K F -12 1 T 2 0 Z 4 00 2 S D A U DG
V D D3
G J_CCD1
C2 R 11 C 7 C6 C6 4 * . 1 U _ 1 6 V _0 4
Z 4 00 3 1
1 U _ 6 . 3V _0 4 C 1 . 1U _ 10 V _ X 7 R _ 0 4 * 1 00 K _ 0 4 . 1U _ 16 V _ 0 4 1U _ 6. 3 V _ 0 4

M R1 5 J _ SL ED1
1
20mil
1 0 0K _0 4 3 . 3V S 6 , 9 , 10 , 1 1 , 1 2, 13 , 1 4 , 1 5, 1 6 , 1 7 , 1 8, 1 9 , 2 0 , 21 , 2 2 , 2 3, 25 , 2 7 , 2 9
J _ CC D1 2 LE D _ P W R #
3 L E D _P W R # 1 9 5V 2 1, 25 , 2 9 , 3 0, 3 1 , 3 2
Z4004 LE D _ A C I N #
1 4 LE D _ A C I N # 1 9 5 VS 1 2, 13 , 2 0 , 2 1, 2 2 , 2 3 , 2 4, 2 7
R 7 33 0 K _ 0 4 U S B _ P N6 LE D _ B A T _ F U L L # V DD 3 1 3, 16 , 1 9 , 2 5, 2 7 , 2 8 , 3 0, 3 2
16 U SB_ PN6 2 5 L E D _B A T_ F U L L# 1 9
D

U SB_ PP6 LE D _ B A T _ C H G#
Q 4 16 U SB_ PP6 C C D _D E T # 3 6 LE D _ B A T _ C H G# 1 9
19 C CD _ DE T # 4 7
CC D_ E N G 2 N 7 0 0 2W
19 C C D _E N 5 8
8 5 20 5 -0 5 00 1 _ R * 88 2 9 6 -08 L
S

From EC default HI

LED, PC BEEP, CCD, Audio Conn B - 27

 Schematic Diagrams

SYSTEM POWER
1.2VS,1.5VS,1.8VS,3.3VS,5VS
P Q5 4 J20091203 PQ 2 2 J20091203 P Q1 4 J20091203
SY S1 5 V V DD 5 M E 4 4 1 0A D -G 5 VS S Y S 1 5V VD D3 M E 4 4 10 A D -G 3. 3 V S SY S1 5 V 1 .8 V M E 4 4 1 0 A D -G 1 .8 V S
8 8 8
4A 7
6
3
2
4A 3A 7
6
3
2
3A 4A 7
6
3
2
4A
PR 7 8 5 1 P R 77 5 1 PR 7 1 5 1
4 P C 1 76 PC1 7 8 PR 1 6 1 4 PC5 4 P C5 2 PR 8 0 4 PC 4 5 PC4 1 P R6 5
1 M_ 0 4 1 M_ 0 4 1 M _0 4
.1 U_ 1 6 V _ 0 4 10 U _ 1 0V _0 8 * 1 00 K _ 0 4 .1 U_ 1 6 V_ 0 4 1 0 U _1 0 V _ 0 8 *1 0 0 K _ 0 4 . 1 U _1 6 V _ 0 4 1 0U _ 1 0V _0 8 * 1 00 K _ 0 4

Z 33 0 1 Z3 302 Z 3 30 5

D
PQ 2 4 PC 5 3 P Q 23 P C 51 PQ 1 7 PC 4 8
SU SB G 2 N7 0 0 2 W S US B G 2 N7 0 0 2 W S USB G 2 N 70 0 2 W
2 2 00 P _5 0 V _ 0 4 31 SU SB . 0 1 U _ 5 0 V _ X7 R _ 04 .0 3 3 U_ 1 6 V _ 0 4

S
B.Schematic Diagrams

V DD 5

P Q4 3 J20091203
SY S1 5 V 1 .2 V M E 4 4 1 0 A D -G 1 .2 V S
PR 7 5 8
3A 7 3 3A
1 0 0K _ 04 6 2
PR 4 7 5 1

Sheet 27 of 35 S US B
1 M _0 4
4 P C 1 28 PC1 2 9 P R1 2 8

D
. 1 U _1 6 V _ 0 4 1 0U _ 1 0V _0 8 * 1 00 K _ 0 4
PQ 2 1

SYSTEM POWER 1 8, 2 2 , 2 3 , 2 5 , 3 1, 3 2 S U S B #
G 2 N7 0 0 2 W Z 3 30 4

D
S
PR 7 6 PQ 6 PC 1 2 6
SU SB G 2 N 70 0 2 W
1 0 0 K _ 04 .0 1 U_ 5 0 V _ X 7 R_ 0 4

S
1 .2 V 7 ,3 1
1 .2 V S 4 ,7

1 .8 V 5 , 7 , 9, 10 , 1 5 , 1 6 , 1 7, 31 , 3 2
1 .8 V S 4 , 5 , 6, 7, 1 1 , 1 2 , 1 4 , 1 5, 16 , 1 7 , 1 8
3 .3 V 2 , 1 2, 1 3 , 1 5 , 1 6 , 1 7, 2 0 , 2 3 , 2 4 , 2 5, 30 , 3 1 , 3 2
3 .3 V S 6 , 9 , 10 , 1 1 , 1 2 , 1 3 , 14 , 1 5 , 1 6 , 1 7 , 1 8, 1 9 , 2 0 , 2 1 , 2 2, 2 3 , 2 5 , 2 6 , 2 9
5V 2 1, 25 , 2 6 , 2 9 , 3 0, 31 , 3 2
5 VS 1 2, 13 , 2 0 , 2 1 , 2 2, 23 , 2 4 , 2 6

VD D3 1 3, 16 , 1 9 , 2 5 , 2 6, 28 , 3 0 , 3 2
VD D5 30
SY S1 5 V 1 2, 30
VIN 1 2, 23 , 2 8 , 2 9 , 3 0, 31 , 3 2

B - 28 SYSTEM POWER
 Schematic Diagrams

AC_IN, CHARGER
VA

PQ 3 1 charge Current 3.2A

V IN 4 M E 4 42 5
1 5 Charge Voltage 12.6V
2 6
J _A C -J A C K 1 3 7 Total Power 60W
5 09 3 2 -0 0 30 1 -0 0 1 PL 4 VA P Q2 6 8
H C B 4 5 32 K F -8 00 T 6 0 ME 4 4 2 5 P Q 30 A
Z3 4 01 8 A P 69 0 1 GS M PL 5 B AT
1
7 3 2 4. 7 U H _ 6 . 8 *7 . 3 *3 . 5
2 6 2 PR 8 2 0 . 0 2 _ 1% _ 3 2 1 7 Z 3 4 05 3.2AP R 1 0 9 0 . 0 2 _ 1 %_
B A 3T 2
G N D1 PR8 6 5 1

PC 9 7
G N D2 Z3409

PC 9 5
4

P C9 6

P C9 4
5
6
1 30 K _ 0 4 PR8 4
PC 5 6 P C1 PR1 P C2 2 00 K _ 1 % _ 04 PC 8 8

8
PC 1 5 P C1 4
.1 U_ 5 0 V _ 0 6 . 1 U _ 50 V _ 0 6 10 K _ 0 8 . 1 U _ 50 V _ 0 6 Z 3 4 33 3 . 1 U _5 0 V _ 0 6

4 . 7 U _ 2 5 V _ 08

4 .7 U_ 2 5 V_ 0 8
4 . 7 U _ 2 5 V _ 08 4 . 7 U _2 5 V _ 0 8

4 . 7U _ 2 5V _0 8

4. 7 U _ 25 V _ 0 8
PR8 5 PR9 7 * 1 0m i l _s h o rt PQ 3 0 B
P R 11 2 A P 69 0 1 GS M

4
1 0K _1 % _ 0 4 *1 0 m i l_ s h o rt

P C2 3 . 1 U _ 2 5 V _ X 7R _ 0 6
1U _ 2 5V _0 8
PR8 3 C A PC8 5

B.Schematic Diagrams
10 0 K _ 0 4 P D3 F M0 5 4 0 -N

P R 21 *0 _ 0 4 PC1 3 . 1 U _ 5 0 V _ 06 P C9 0 P C 89
VA

Z 34 0 6
Z3 40 4

Z3 40 7
Z3 40 8
Z 3 40 3
P R 22 *0 _ 0 4 4. 7 U _ 25 V _ 0 8 4 . 7 U _ 2 5 V _0 8

VA

32
31
30

28
27

25
Sheet 28 of 35

29

26
PU3
P C 7 8 . 1 U _5 0 V _ 0 6

O UT - 1
LX
V B

C EL L S
C TL2

O U T -2
P GN D
CB
1 24
V CC V IN
2 23 C TL P C7 4 . 1 U _5 0 V _ 0 6
Z3410
Z 3 4 11
3
4
5
-I N C 1
+ INC 1
A CI N
TRERMAL PAD
C TL1
GN D
V RE F
22
21
20
Z3419
Z 3 4 2 0 P R 98 3 9. 2 K _ 1 % _ 0 4
AC_IN, CHARGER
PQ 4 P R 28 6 A CO K R T 19 Z 3 4 2 1 P C 75 . 1 U _ 1 6 V _ 04
-I N E 3 CS V OL T -S E L

O UT C 2

CO M P 2
A O 3 40 9 3 0 0K _1 % _ 0 4 Z3412 7 18 P C 87

C OM P 3
OU T C 1
A DJ 1 AD J 3

+ INC 2
- INC 2
AD J 2
BAT S D Z 34 2 6 PR 3 3 8 17

-I N E 1
B A T 1 _ V OL T 1 9 C O MP 1 B ATT
P R3 5 33 S G ND 5 . 1 U _ 5 0 V _ 06
S GN D
G 2 00 K _ 1 % _ 0 4 1 K _ 1 % _0 4
P R2 4 P R 36 MB 3 9 A 1 3 2 PR 9 9 PR 1 0 7

10
11

13
14

16
12

15
9
20 0 K _ 0 4 1 00 K _ 1 % _ 0 4 SG ND 5 1 K _ 1 % _ 04 2 0 0 K _ 1% _ 0 4
PR2 9 P C1 9 PC 2 4

60 . 4 K _ 1 % _ 04 0. 1u _ 1 0 V _ X7 R _ 04 0 . 0 1 U _ 5 0V _X 7 R _0 4

P R2 3 S G ND 5 SG ND 5 PR 3 1 * 10 m i l _s h o rt
PR 3 2 * 10 m i l _s h o rt PC 7 3
0_ 0 4 P R1 1 1 PR 1 1 0
PR35 = 16.2K for 1 0 0 P _ 50 V _ 0 4 P R 16 4 P R1 6 5
Z3 4 27 M760SU (Total Power PC 7 9 * 22 P _ 5 0 V _ 0 4 1 0 K _ 1 % _ 04 1 0 0 K _ 1% _ 0 4
D

Limit: 83W) 1 0 2K _1 % _ 0 4 2 M _ 1% _ 0 4

G PQ 3 PC7 6 PR1 0 5 2 2K _1 % _ 0 4 V OL T -S E L
SY S5 V
MT N 7 0 0 2 Z H S 3
1 00 0 P _ 5 0 V _ 04 SG ND 5
S

D
P C8 0 P R 16 6 PQ 5 7
1 0 0 0 P _ 50 V _ 0 4 P R 1 67
7 6 . 8K _1 % _ 0 4 G
V C H G -S E L 1 9
S GN D 5 0_04
2 N 7 00 2 W

S
SG ND 5 S G ND 5

V DD 3 S YS5 V
Bttery Voltage:
9V~12.6V
PM BAT 2
1
PR6 2 P R1 0 3 P L3 H C B 1 00 5 K F -1 2 1 T 2 0
19 B A T _D E T P L2 H C B 1 00 5 K F -1 2 1 T 2 0 2
19 S MD _ B A T 3
10 K _ 0 4 1 0 0 K_ 0 4 P L1 H C B 1 00 5 K F -1 2 1 T 2 0
19 S MC _ B A T 4
C TL
A C _ IN# 19 5
D

B T D -0 5 T I 1 G
PQ 1 0 PQ 2 8 P C1 8 P C 17 PC 1 6
P R 63 1 M _0 4 Z 3 4 29 G 2 N 70 0 2 W P R 1 08 1 0 0 K_ 0 4 Z3428 G
VA SY S5 V 2 N 7 00 2 W 30 P _ 5 0 V _ 0 4 3 0P _5 0 V _ 0 4 3 0 P _ 5 0V _0 4
D

PM BAT 1
S

P R6 0 PQ 2 9
1
1

G
19 C HG _ EN 2
2 0 0 K_ 0 4 2 N 7 00 2 W P J5 PR 2 0 * 15 m i l _s h o rt
3
1m m
S

4
2

S G ND 5 5
*B T D -0 5T I 1 G
V IN 1 2 , 2 3, 2 9 , 3 0 , 3 1, 32
Reserve
BAT VIN J20090723
S Y S 5V 30
V DD 3 1 3 , 1 6, 1 9 , 2 5 , 2 6, 27 , 3 0 , 3 2

PC9 2 PC 9 1 P C9 3 PC 1 0 0 P C1 0 1 P C9 9 P C 10 2

. 1 U _ 5 0 V _ 06 . 1 U _5 0 V _ 0 6 . 1 U _5 0 V _ 0 6 .1 U_ 5 0 V _ 0 6 . 1U _ 5 0V _0 6 . 1U _ 5 0V _0 6 . 1 U _ 5 0 V _ 06

AC_IN, CHARGER B - 29
 Schematic Diagrams

VCORE

VI N 5V
VCORE FOR PENRYN CPU
VIN
V -R C 1

1 0 0_ 1 % _ 0 4

* 1 5u _ 2 5 V _ 6 . 3 *4 . 4 _ C
A
PC 9 P C5 7 P C7 1

1 5 u _ 2 5V _6 . 3 * 4 . 4 _C
PC 1 1 P D1
1 U_ 1 0 V _ 0 6 + +
1 0 0 0 P _ 50 V _0 4 F M0 5 4 0 -N PR 8 8
VIN
1 0 _0 6

C
P R9 4 *1 0 m i l _s h o rt Z 3 50 1

P C2 2 PC2 0 P C2 1 P C1 1 7

P R 15
+

5
6
7
8
PR 1 1 *0 _ 0 4 P C6 9 P R1 0 4
*1 5 m i _l s h o rt *. 1 U _5 0 V _ 0 6 *4 . 7 U _2 5 V _ 0 8 *4 . 7 U _2 5 V _ 0 8 33 0 U _ 2 5V

BS T1
1 U _ 2 5V _ 08 Z 3 5 14 4
S G ND 3 PR 1 6
7. 5 K _1 % _ 0 4 PC 6 1 P Q3 2

2
3
1
Z 3 50 2 I RF 7 4 1 3 Z P B F
PR 7 0_04 D PR SL _ ST P
2 ,6 H _D P R S T P #
E N_ V C O RE .0 1 5 U_ 5 0 V_ 0 6
PR 1 9 * 0 _0 4 D PR SL T G1 P L7 V CO R E
6 P M _D P R S L P V R
close to IMVP6 0 . 5 U H _ 1 0 * 10 * 4 . 1
20A 40A

VPN 1
B.Schematic Diagrams

DR N1
? C4 ? PR91 Del 3 .3 V S B G1

DR N1
IS H PD 6

C
F M 5 82 2

5
6
7
8

5
6
7
8
CL K E N# P R3 4 P C1 1 6 PC 1 1 4

44
43

41
40
39
38
37
36

34
18 CL K E N#

42

35
P R 10 2 PU 1 4 4 10_06 + +
PC 6 2

I SH
D PR SL
VPN 1
VIN 1
B ST 1
TG 1
DR N 1

V 5_ 1

DP RS T P #
EN
B G1
PC 8 2 10 0 P _ 5 0 V _ 0 4 6 80 _ 0 4 Z3515

2
3
1

2
3
1
. 1 U _ 25 V _X 7 R _ 06 P C 25 33 0 u _ 2 . 5 V _ V _ A 3 3 0 u _ 2. 5V _ V _ A

A
Sheet 29 of 35 PR 2 7 33 K _1 % _ 0 4 PR 2 6
1 3 0 K_ 1 % _ 0 4 V C O RE _ V RE F 2
1
CL K E N#
VR EF
C S1 +
CS 1 -
33
3 2 C S1 N P Q3 4 P Q3 7 1 0 0 0 P_ 5 0 V_ 0 6

C S 1N
V C O RE _ H Y S 3 3 1 C S2 N IR F 7 8 3 2 Z T RP B F I R F 7 8 32 Z T R P B F
HY S CS 2 -
V C O RE _ C L S E T 4 30 P R 45 0_ 0 6

VCORE PR 1 0 6 22 0 K _ 1 % _ 0 4
PR 2 5
1 3 0 K_ 1 % _ 0 4
3
3
H
H
_ V ID
_ V ID
6
5
H_ V ID 6
H_ V ID 5
H_ V ID 4
5
6
7
CL S E T
VID 6
VID 5
TRERMAL PAD
C S2 +
E R R OU T
V C CA
29 Z350 3
2 8 V CC A
27

1 K _ 1 % _0 4
3 H _ V ID 4 VID 4 A GN D

PR 3
PC 8 3 10 0 P _ 5 0 V _ 0 4 H_ V ID 3 8 2 6 DA C
3 H _ V ID 3 H_ V ID 2 9 VID 3 D AC 2 5 VC _ SS P R 43 0_ 0 6

. 0 1 U _ 1 6 V _ X 7 R _0 4
3 H _ V ID 2 VID 2 SS
H_ V ID 1 10 24
3 H _ V ID 1 VID 1 D R P+
PC 8 1 10 0 0 P _ 5 0 V _ 0 4 H_ V ID 0 11 23

1 0 0 0 P _ 5 0V _ 04
3 H _ V ID 0 VID 0 D RP -

C S 2N
1 U _ 1 0V _ 06
P W RG D

15 0 0 P _ 5 0 V _ 0 4

1 0 0P _ 50 V _ 0 4
E - RC
3 .3 V S

DR N 2
VPN 2

B ST2
V IN 2

V 5_ 2
PSI #
GN D

TG 2

F B-
S GN D 3

FB+
B G2
VI N + PC 1 0 7 P C 11 1
P R1 0 1 S C4 5 2 + +
1 K_ 0 4 P C7 2 3 3 0 u_ 2 . 5 V _ V _A *3 3 0 u _ 2. 5V _V _ A

12
VPN 2 1 3

15
16
17
18
19
20

22
45

14

21
5 6 0 u _ 2. 5V _ 6. 6* 6 . 6 *5 . 9
P R1 0 0 * 10 m i l _ sh o rt Z3504 PC 9 8 P C 86 PC8 4 + PC 6 6

PC 6 0

PC 7

P C5 9
6 ,2 3 DE L A Y _ P W RG D

5
6
7
8
PR 9 3 1 0 _ 04 FB+

PC 4
PC3
3 VC C SEN SE
PR 9 0 1 0 _ 04 FB- *. 1 U _ 5 0V _ 06 *4 . 7 U _ 2 5V _0 8 *4 . 7 U _ 2 5V _0 8 1 5 u_ 2 5 V _ 6 . 3 *4 . 4 _ C
3 VSS SEN SE P R1 3 * 10 m i l _ sh o rt Z3505 4
2 PSI #
D RP- V C O R E _V R E F
D RP+ S G ND 3 P Q3 3

2
3
1
PR 1 2 I RF 7 4 1 3 Z P B F
PR1 8 7 .5 K_ 1 % _ 0 4 CS 2 P P C 5 8 . 0 1 5 U _5 0 V _ 0 6

*1 0 0 P _ 5 0 V _ 0 4

*1 0 0 P _ 5 0 V _ 0 4

* 10 0 P _ 5 0 V _ 0 4

* 1 00 P _ 5 0 V _ 0 4

DR N2
*6 8 0 _ 0 4
T G2 PR 3 0 * 1 0 m li _ s h o rtZ 3 5 0 6 PL 8
BG 2 0 . 5 U H _ 1 0 * 10 * 4 . 1
20A
3 .3 V S
5V

C
5
6
7
8

5
6
7
8
PR 3 9

PC 8

PC 6 5

PC 6 3
P C 77

A
PD 8

1 0 0 _ 1% _ 0 4
PC 1 2 P C7 0 PD 2 PC 1 0 4 4 10_06

P R1 7
F M 5 82 2
S GN D 3S G N D 3S G N D 3S G N D 3 1 0 0 0 P _ 50 V _0 4 1U _ 2 5 V _ 0 8 F M 0 5 4 0 -N 1 U _ 10 V _0 6 Z 3 50 7

2
3
1

2
3
1

A
PR 8 7 * 1 5 m li _ s h o rt PC 2 8 V C_ SS

C
V -R C 2 1 0 0 0 P _ 5 0V _ 06
P Q3 5 PQ 3 6
I R F 7 83 2 Z T R P B F I RF 7 8 3 2 Z T RP B F S GN D 3 P C6 7
B S T 2P R 9 5 *1 0 m i l _s h o rt Z3516
V IN
*. 0 2 2 U _ 1 6 V _ X 7 R _ 0 4

Z3 511

D
P R 1 6 3 * 0 _ 04 P Q2 7
PR T2
D P RS L Z 3 50 9 G * A P 2 3 2 2 GN
5V PR 4 6 DR P _ L 1 2 1 C S1 N
PR 9 1 1 0 K_ 0 4

S
2 8 K _ 1% _ 0 4
E N_ V CO RE 1 0 0 K _ N T C _ 06

DR N 1 PR 4 4 PC 5 . 0 3 3 U _1 6 V _ 0 4 PR 5
P R9 P R8 9 47 K _0 4 S G ND 3
1 7 . 4 K _ 1 % _0 4 DR P +
D

1 0 0 K_ 0 4 *1 0 K _ 0 4 DC R_ D R 1 PR 4 4 7 K_ 0 4

Z 35 1 3 G DC R_ D R 2 PR 2 4 7 K_ 0 4 PC 6 4 PR 6
P Q2 VI N 1 2 , 2 3 , 2 8, 30 , 3 1 , 3 2
D

2N 7 0 0 2 W 6 8 0 P _ 5 0 V _ 04 9 .1 K _ 1 % _ 0 6
S

PR 4 1 PR 8 5V 2 1 , 2 5 , 2 6, 30 , 3 1 , 3 2
PJ 1 DR N 2 PC 6 . 0 3 3 U _1 6 V _ 0 4
3 .3 VS 6 , 9 , 1 0 , 1 1 , 1 2, 13 , 1 4 , 1 5 , 1 6 , 1 7 , 1 8, 1 9 , 2 0 , 2 1 , 2 2 , 2 3 , 25 , 2 6 , 2 7
19 V C O R E _ ON P R1 0 * 10 m i l _ sh o rt Z 35 1 2 G 1m m 47 K _0 4 DR P - V C O RE 3
1 7 . 4 K _ 1 % _0 4
PR T1
PQ 1
S

2 N 7 00 2 W PR 4 0 DR P _ L 2 2 1 C S2 N
2 8 K _ 1% _ 0 4
1 00 K _ N T C _ 0 6

B - 30 VCORE
 Schematic Diagrams

VDD3, VDD5

V I N1

P C 16 8 C A
SY S5 V
P R 14 2 1 0 _0 6 0 . 01 u _ 5 0V _X 7 R _0 4

A
LG A T E 1 Z 3 6 25 P D 1 7 F M 05 4 0 -N
P C1 6 6 PD 1 3
2 . 2 u _ 6. 3V _Y 5 V _ 06 PC1 6 2 P R 14 0 F M0 5 4 0- N A C
SY S1 0 V
I NT V C C2
1 0_ 0 6 P D 1 6 F M 05 4 0 -N P C1 7 1
1 0 0 0 p _5 0 V _ X 7 R _ 0 4

C
PR 1 4 4 4 2 2 K _ 1% _ 0 6 SG ND 4 2 20 0 P _ 5 0 V _ 04
P C 17 2 C A
0 . 01 u _ 5 0V _X 7 R _0 4
PR6 7 Z 36 2 6 P D 1 5 F M 05 4 0 -N
VI N
P R1 5 1 PR 1 5 3 7 5K _ 0 6 A C
Ra PU9 P C1 6 0
SY S1 5 V

21

5
1 0K _ 0 4 2 0 K _ 1 %_ 0 4 1u _ 2 5 V _ 08 P D 1 4 F M 05 4 0 -N P C1 7 3

1 5 u _ 25 V _ 6 . 3 *4 . 4 _ C
V DD A
FB L
PAD

FB

V OU T

NC
S G N D4 SG ND 4 PC 4 6 + P C 42 PC4 7 PC 4 0 2 20 0 P _ 5 0 V _ 04
20 6
E NL VIN

0 . 1 u_ 5 0 V _ Y 5 V _ 0 6

4 . 7 u_ 2 5 V _ X 5 R _ 0 8

4 . 7 u_ 2 5 V _ X 5 R _ 0 8
IN T VCC 2
19 7
R T ON VL D O
P C 15 8

5
6
7
18 8 8
A GN D SC418 BS T PQ 1 2 S Y S 5V
E N _ 5V 17 9 1 u _ 25 V _ 0 8 4 P 1 2 0 3B V P L1 1 VDD 5
E N/PS V D H PJ 1 3

B.Schematic Diagrams
4 . 7U H _ 6 . 8 *7 . 3 * 3. 5
4A

P G OO D
16 10 1 2 1 2

1
2
3
V DD P
IL IM LX

P G ND
R PSV
Rb Ra
0 . 02 2 u _ 25 V _ X 7 R _ 06

DL

5
6
7
PC 1 7 0 8 P R1 4 9 5m m
PC1 7 4 PR 1 5 8 PC 1 7 5 PR1 5 9 PQ 1 3 P C1 6 7
15

14

13

12

11
P R1 5 5 L G ATE1 4 P 1 2 0 3B V 91 K _ 1 % _ 0 6
1 0K _1 % _ 0 4

*2 2 0p _ 5 0 V _ N P O _ 04
* 0 . 1u _ 5 0 V _ X 7 R _ 0 4
10 0 0 p _5 0 V _ X 7 R _0 4

1 37 K _ 1 % _ 04

*1 0 K _ 0 4
Sheet 30 of 35

1
2
3
Change source Rb P C 1 53
PR1 5 4 1 5K _1 % _ 0 4 +
J20091203
P C1 6 9 P R1 4 8 1 5 0 u_ 6 . 3 V _ V _ A P C1 5 5
1 1 3 K _ 1% _ 0 4
PR1 5 6
PR1 5 2 *1 0 0 K _ 04

P C 1 65 P C1 5 9
*3 3 0K _1 % _ 0 4 9. 76 K _ 1 % _ 06
0 . 1u _ 1 6 V _ Y 5 V _ 0 4
VDD3, VDD5
1 u _1 0 V _ 0 6 1 u _ 1 0V _0 6
PR 6 6
S G ND 4 S G N D4 S G ND 4 S G N D4 S GN D 4 SY S5 V
*1 0 K _ 0 4 P NC 1 N C _0 6 J20091203
S G N D4
SYS5 V I NT V C C2 S G ND 4 Vout=0.5V(1+Ra/Rb)

PR1 3 6 PR 1 3 5 SY S5 V
Vout=0.75V(1+Ra/Rb)
15 m i l _s h o rt * 0 _0 6

E
VIN
D D_ O N# B PQ 5 3
2 5 , 3 1 , 3 2 D D _O N #
A

CD T A 1 14 E U A
PD 1 2 P C 44 PC 4 3
F M0 5 4 0 -N P R 64
32 D D _O N H

1
1 5 mi l _ s ho rt 4 . 7 u_ 2 5 V _ X 5R _ 0 8 4 . 7 u _2 5 V _ X 5 R _ 0 8 D D_ O NH
Ra P J 14

5
6
7
P R 1 38 PR 1 3 7 15 K _ 1 % _ 04 8 G 1m m
C

P R 14 6 P Q1 1 19 D D _O N PQ 5 6 PC 1 7 7 PR1 6 2
1 0 K _ 1 % _0 4 P C 16 4 4 P R 16 0 2 N7 0 0 2 W

S
P 12 0 3 B V

2
1 0K _1 % _ 0 4 P R 14 3 . 1 U _ 16 V _ 0 4 20 0 K _ 0 4
PC 1 5 4
1
2
3
*1 0 m li _ s h ort VD D3
1 0 0 p _5 0 V _ N P O_ 0 4 PU 8 0 . 1 u _ 25 V _ X 7 R _ 0 6
13

15

16
14

S C 4 1 2A PL 1 2 SY S3 V 1 00 K _ 0 4
4 . 7 U H _ 6 . 8* 7 . 3 *3 . 5 PJ 1 1
5A
N .C

D H
I LI M

N.C

EN _ 3 V 12 1 1 2 1 2
EN LX
S YS5 V P R1 4 1 11 2 5m m
PG D BST
5
6
7

*1 0 K _ 0 4 10 3 8
V O UT V CC
P Q4 9 P C 15 2 P C 15 1
P C 15 6 P R 1 39 9 4 4 +
0 . 0 1 u _5 0 V _ X 7 R _ 0 4

FB D L P 12 0 3 B V
1 5 0u _ 6 . 3 V _ V _ A 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4
R TN

G ND

* 1 0K _0 4 Rb 17
N.C

N.C

1
2
3

PAD P C 1 57
P R 14 5
P C 1 61 J20091203
1 u _ 1 0V _0 6
8

2 . 9 4K _1 % _ 0 4 0. 0 1 u _ 50 V _ X 7 R _ 0 4

E N_ 3 V E N_ 5 V

P Q4 8 J20091203 P Q5 5 J20091203
M E 4 4 10 A D -G ME 4 4 1 0 A D -G
D

S Y S 1 5 V V DD 3 8 3. 3 V SYS1 5 V VDD 5 8 5V P Q5 0 P Q5 1 5V I N TV C C 2 VIN 1 2 , 2 3 , 28 , 2 9 , 3 1 , 32

VIN 1 32
7 3 7 3 *2 N 70 0 2 W *2 N 7 0 0 2 W
3A 6 2
3A 4A 6 2
4A G G
S Y S 1 5V 1 2 ,2 7
5 1 5 1 Power Plane
PR 1 3 4 4
Power Plane P R8 1 4 P R1 5 7 P R 1 50
3 .3 V 2 , 1 2 , 1 3, 1 5 , 1 6 , 1 7, 20 , 2 3 , 2 4 , 25 , 3 1 , 3 2
S

P R1 3 3 PR 7 9 V D D3 1 3 , 1 6 , 19 , 2 5 , 2 6 , 27 , 2 8 , 3 2
5V 2 1 , 2 5 , 26 , 2 9 , 3 1 , 32
1 M _0 4 1M _ 0 4 * 1 0K _0 4 * 10 K _ 0 4
V D D5 27
1 00 K _ 0 4 1 0 0 K _ 04 SY S5 V 28
Z3628 Z 3 62 7 Z3634

P Q4 7 P Q 25
D

D
1

PC 1 5 0 2 N 7 00 2 W P C5 5 2 N 7 0 0 2W PQ 5 2
P R1 4 7 PJ 1 2 P C 1 63 *2 N 7 00 2 W
. 0 1 U _ 5 0 V _ X 7R _ 0 4 G D D _O N # 22 0 0 P _ 5 0V _0 4 G D D _ ON # 4 0 m il G
P M _ T H R MT R I P # 1 5
*1 0 0K _0 4 *. 1 U _ 1 0 V _ 0 4
S

S
2

VDD3, VDD5 B - 31
 Schematic Diagrams

1.05VS,1.2V,1.5V
5V

PR114 1.05VS
15mil_
short

Vout=0.75V(1+Ra/Rb) PC179
VIN +
*330u_
2.5V_V_A

A
PD7 PC2
7 PC30 PC29
FM05
40-N
.1U_50V_064
.7U_25V_08 4.7U_25V_08
5V Ra

5
6
7
8

C
PR117 15K_1%_04
PC1
04 PR113 PR37 PQ39
4 P1203BV
4.02K_1%_04 0_1%_04

1
2
3
PR42 PR116 100p
_50V_NPO_04 PC110

13

14

15

6
PU4 0.1u_25V_X7R_06

1
100K_04 100K_04 SC412A PL6 V1.05 1.05VS
2.5UH_6.8*7
.3*3.5 PJ2

N.C

DH
ILIM
4A

N.C
12 1 1 2
EN LX

D
11 2 5mm
PQ40 PGD BST

5
6
7
G 10 3 8
VOUT VCC
2N70
02W PQ38 + PC26

S
PC109 9 4 4 P1203BV J20091203 PC1
03
PQ5 PJ6 FB DL 0.1u_16V_Y5V_04

RTN

GND
N.C

N.C
G .1U_16
V_04 Rb 17 560U_2.5V_6.6*6.6*5.9

1
2
3
18,22,23,25, 27
,32 SUSB# 1mm PAD PC105
2N7002W
B.Schematic Diagrams

2
PR115 PC108
1
u_10V_06

5
3.3V 0
.01u_50V_X7R_
04
10K_1%_04

PR3
8

10
K_04
5V

23 1.05VS_PWRGD

Sheet 31 of 35 PR118
15mil_short

1.05VS,1.2V,1.5V
Vout=0.75V(1+Ra/Rb) VIN

A
PD9 PC113 PC1
12 PC115
FM0540- N
4
.7u_25V_X5R_08 .1U_50V_06

1
2
Ra 4.7u_2
5V_X
5R_08
PR119 15K_1%_04

C
PR120 PQ41A
PC122 PR122 8
6.8K_1%_04 AO4932
0
_1%_04 PC119
1.2V

13

14

15

16

7
100p_5
0V_NPO_04 PU5 0.1u_
25V_X7R_06 V1.2
SC412A PL9

IM
2.5UH_6.8*7.3*3.5 PJ7

N.C

DH
3A

N.C
PR12
3 100K_04 12 1 1 2

IL
5V EN LX
11 2 5mm
D

5
6
PGD BST
PC124 10 3
G PQ42 VOUT VCC PQ41B + PC120 PC121
25,30,32 DD_ON#
2N7002W .1U_16V_04 9 4 3
FB DL
S

AO4932 220u
_2.5V_
B_A 0.1u_16V_Y5V_04

GND
N.C

N.C

RTN
Rb 17
PAD PC118

4
PC123

5
1u_
10V_
06
PR121 0.01u
_50V_X7R_04

10K_1%_04

5V

PC1
06
1
.8V
PU6 1U_10V_06
PR125 10K_0
4
1.5A 5 6 V1
.5 PJ8 1.5VS
3.3V VIN VCNTL
9 3mm
7
VIN
4
1.5A 1 2
23 1.5V_PWRGD POK VOUT
3 PC1
27
PR124 470K_1%_04 Z372
1 8 VOUT PC130 PC13
1 PC132
5V EN
82
P_50
V_0
4
VIN 12,23,28,29,30,32
1 2 Z372
2 10U_
10V_
08 10
U_10V_08 .1U_16V_04
D

GND VFB PR127

5V 21,25,26,29,30,32
PC1
25 PC133 PC1
34 AX661
0 17
.4K_1%_
04
3.3V 2,12,13,15,16,17,20,23,24,25, 3
0, 3
2
G PQ44 PR1
26
27 SUSB 1.8V 5,7,9,10,15,16,17,27,32
2N7002W .033
U_16V_04 .1U_16
V_04 10
U_10V_08
S

19
.6K_1%_06 1.5VS 3,6,25
J20091203 1.2V 7,27
W74 0S 1.05VS 2,3,4,6,7,17

B - 32 1.05VS,1.2V,1.5V
 Schematic Diagrams

1.8V/0.9VS
VIN 5V 3.3V

A
PR50 PR131 PR54
PD11 10
0K_04
1M_04 10_06
V1
.8 FM0540-N
PU7

C
PR5
1 10_06 Z3801 3 7 1.8V_PWRGD 23
VDDQS PGD
Ra
PC37 PR55 PC33 PC14
6 PR129
Z3802 2 *15mil_short Z3
823
TON
100P_50
V_04 2.49K_1%_04 1U_10V_06 1U_10V_06 24 Z3
811
BST
VIN
Z3803 6
FB
Z3804 8 PC142 PC139 PC1
40 PC141
REF
PR57 Z3805 9 .1U_25
V_X7
R_06 4.7U_2
5V_0
8 4.7U_25V_08 .1U_50V_06

5
6
7
8
COMP PR48
Rb 10_06 PC35 *15mil_short
PR58 PR52 23 Z3
812 Z3816 4
DH
*.1U_
10V_
04
10_0
6 10K_1%_04 Z3806 10 PR130 PQ 45

2
3
1
VTTS 6.8K_
1%_04 IRF7413ZPBF
Z3809 Z3807 5 21 Z3813 PL10 V1.8
VCCA ILIM
2
.5UH_10*10*5 PJ9
PC39 PC38 PR59
*15mli_short
PC145
PC147
LX
22 Z3814 8A 1 2
1. 8
V

B.Schematic Diagrams
1U_10V_06 .068U_10
V_0
4 1000P_50V_04 1U_10V_06 19 Z3815 8mm

C
DL

5
6
7
8
VSSA 4 PD10 PC1
38 PC135 PC137 PC1
36
VSSA +
PJ10 Z3808 14 20 4 FM5822 22
0u_4V_V_A 4.7U_
10V_08 .1U_16V_04 .01U_50V_X7R_04
0.9VS
2 1 1.5A 15 VTT
VTT
VDDP1 5V

A
2
3
1
PC31 PQ 46
3mm
PR132 PC149 PC148
PC144
V1.8
12
13
VDDP2
VDDP2 18
1U_10V_06
IRF783
2ZT RPBF
Sheet 32 of 35
20K_1%_04 4.7U_10
V_0
8 10U_10
V_0
8 + PC32 PC34 1 PGND1 16 VSSA
*150U_4V_B2
10U_
10V_08 1U_10V_06 11
EN/PSV

VTTEN
PGND1
PGND2
PGND2
17
25
PR5
6 *15mil_short
7 /2 4 pow e r PC 10 3 f rom
2 2 0U _4 V_ D2
1.8V/0.9VS
SC486 c ha nge to 47 0 U_ 2. 5 V_ D3 .
A DD PC 1 90 4 . 7U _1 0 V_ 08 .
PR49 47K_04 1.8VEN
5V
D

PC143

G PQ7 .1
U_16V_04
25,30
,31 DD_ON# 2N7002W
S

PR53 47K_04 VTT

EN
5V
VDD3 VIN VA VIN1
PR61 PD4 SCS140
P
A C
D

100K_04 PC36 PQ 16
PR74 AO3409 PD5 SCS140
P
Z3810 G PQ8 .1
U_16V_04 S D Z3822 A C
2N7002W 10K_04
D

G
S

19 PWR_SW#
G PQ9 PQ1
8 PR73 100K_04 PR72 2
0K_1
%_04

D
18,22,23,25,27,31 SUSB# Z381
8
2N7002W 2
N7002W Z3817
WEB_AP# 19,23
S

G
PJ3 PQ19 PQ20

D
S
1mm 2N7002W 2N7002W
PR70 100K_04 Q20 Q19
*2
N7002
2

E C Z3
820 Z3819 G G *2N7002 G G
VIN DD_ONH 30

S
PC49 PQ15 PR69 PC50
.1U_
50V_06 DTA1
14EUA

B
Z3821 100K_04 .1U_50V_06

PR68 10K_04
23 M_BTN#

AP_KEY 2
3

VIN1 30
VIN 12,23,28,29,30, 31
5V 21,25,26,29,30, 31
VDD3 13,16,19,25,26, 27
,28,30
3.3V 2,12,13,15,16,17,20, 2
3, 2
4,25,30,31
1.8V 5,7,9,10,15,16,17,27,31
0.9VS 10

1.8V/0.9VS B - 33
 Schematic Diagrams

CLICK BOARD
C C2 CC1
0.1u _10V_X7R _04 0. 1u_10 V_X7 R_0 4
C5VS C 5VS

CG ND CGN D
C J_TP1 CJ_ TP2

1 C TP_D ATA 1 CTP_CLK

2 C TP_C LK 2 CTP_DATA
3 3 CTPBUTTON_ L
4 4 CTPBUTTON_ R
852 01-04051 5
6
CGN D 8 5201 -0605 1

C GND
B.Schematic Diagrams

Sheet 33 of 35
CLICK BOARD
C SW1~ 2

2 4
1 3
LIFT RIGHT
KEY KEY
C SW1 CSW 2
TJG-533-S- T/R TJG -533- S-T/R
1 2 1 2
3 4 CTPBU TTON _L 3 4 CTPBUTTON_R

5
6

5
6
C GND CGN D

CH 3 CH1 CH4 C H2
2 9 2 9 2 9 2 9
3 8 3 8 3 8 3 8
4 1 7 4 1 7 4 1 7 4 1 7
5 6 5 6 5 6 5 6

MTH 237 D91 MTH2 37D 91 MTH23 7D9 1 MTH237 D91

C GND CGN D CG ND C GND CGN D CG ND C GND CGN D

B - 34 CLICK BOARD
 Schematic Diagrams

AUDIO/ USB/ RJ11 BOARD

RJ-11 USB PORT

A_USBVCC A_USBVCC
AU1 60mils
A_5V 5 6
FLG# VOUT1
60mils 2 7
VIN1 VOUT2 AC9 AC10
AC13 3 8
VIN2 VOUT3 0.1u_16V_Y 5V_04
10u_10V_Y 5V_08 4 1 0.1u_16V_Y 5V_04
EN# GND
RT9715BGS
AGND AGND AGND AGND AGND
6-02-09715-920
ႊፖࠡ‫ה‬ሿٙࢨᒵሁ
෣़ 2.5mm ‫א‬Ղ A_USBVCC AL10
HCB1608KF-121T25 60mils
A_USBVCC2

B.Schematic Diagrams
AC16 AC11
+
100U_6.3V_B2 .1U_16V_04
MODEM RJ-11
AJ_USB1
J_MODEM1 AJ_MODEM1 AJ_RJ1 1
2 1 Z4008 AL1 BK1608HS121 Z4010 1 AGND V+
2 Z4009 AL2 BK1608HS121 Z4011 2 TIP AUSB_PN4_R 2
1
85205-02001_L
85205-02L
RING

C10181-100A
AR7 *10mil_short AUSB_PP4_R 3
DATA_L

DATA_H Sheet 34 of 35

GND2GND1
GND3GND2
GND4GND3
GND4
4
AUSB_PP4 AUSB_PP4_R GND
PIN G ND1~2= A G ND 1 AL9 2

AUDIO/ USB/ RJ11

GND1
AUSB_PN4 4 3 AUSB_PN4_R C10770-104A3
*WCM2012F2S-161T03

AR6 *10mil_short

AGND AGND BOARD

AUDIO JACK AMIC_SENSE 5 AJ_MIC1

4
AMIC1-R AL4 FCM1005KF-121T03 Z4105 3 R

AMIC1-L AL3 FCM1005KF-121T03 Z4106 2

Z4107 6 L
1
AC5 AC6 2SJ-S351-S30
A_5V
AJ_AUDIO1 100P_50V_04 100P_50V_04 MIC IN 3 4 5
AMIC1-R 1
AMIC1-L 2
3
BLACK
AHEADPHONE-R 4 A_AUDG
AHEADPHONE-L 5
AMIC_SENSE 6 AHP_SENSE
ASPK_HP# 7 2 1 6
AHP_SENSE 8 ASPK_HP# 5 AJ_HP1
AUSB_PN4 9 4
AUSB_PP4 10 AHEADPHONE-R Z4112 AL6 FCM1005KF-121T03 Z4108 3 R
11 AR3 68_1%_04
ASPKOUTR+ 12 AHEADPHONE-L Z4113 AL5 FCM1005KF-121T03 Z4109 2
ASPKOUTR- 13 AR2 68_1%_04 6 L
14 1
87213-14L AR4 AR1 AC7 AC8 2SJ-S351-S30

*1K_04 *1K_04 100P_50V_04 100P_50V_04 HEADPHONE

A_AUDG AGND
BLACK
A_AUDG

ASPKOUTR+ AL8 1 2 FCM1005KF-121T03

AL7 AC12 AJ_SPKR1

J_SPK1
FCM1005KF-121T03 1000p_50V_X7R_04 ASPKOUTR+_R
ASPKOUTR- 1 2 ASPKOUTR-_R 1 2 1
2
AC15 AC14 85204-02001
PCB Footprint = 85204-02R
AH2 AH3 AH1 180p_50V_NPO_04 180p_50V_NPO_04
C52D52 2 9 2 9 AC3 0.1u_16V_Y 5V_04
3 8 3 8 A_AUDG AR5 *10mil_short
4 1 7 4 1 7 AC1 0.1u_16V_Y 5V_04
5 6 5 6
AC4 0.1u_16V_Y 5V_04
MTH276D111 MTH276D111
AC2 0.1u_16V_Y 5V_04
AGND AGND AGND AGND

AGND A_AUDG

AUDIO/ USB/ RJ11 BOARD B - 35

 Schematic Diagrams

POWER SWITCH & LID BOARD

POWER SW & LED & HOT KEY

S _ 3 .3 V

LID SWITCH IC SD2

C
S _ 3 . 3V S *B A V 99
S _ 3 .3 V
POWER
SWITCH SR 1 1 00 K _ 0 4 AC
S_ 3 .3 VS S _ 3 .3 V LED
S R2 SU 1
S_ 3 .3 VS S _ 3 . 3V 1 2 S LI D _ S W #
S J_ S W 1 2 20 _ 0 4 VC C O UT
20mil

GN D

A
1
S J_ S W 2 S C2 S C1
2
3
S M_ B T N #
1
20mil 20mil Z 4 30 1 MH -24 8
SW EB_ W W W # 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 10 0 p _ 50 V _ N P O_ 0 4

3
4 SW EB _ E M AIL # 2 S M_ B T N # SC6 S MG N D
5 3
B.Schematic Diagrams

S LI D _ S W # S W EB_ W W W #

A
6 4 S W E B _ E MA I L# *. 1 U _ 0 4 S MG N D S MG N D
7 S MG N D 5
S A P _ ON S LI D _ S W #
8 6
S MG N D S M GN D SD 1 S MG N D
9 7 S A P _ ON L T S T -C 1 5 0 TB K T S M GN D
10 S _V I N 8
SU1, SU2
3
* 5 05 0 0 -0 10 4 1 -0 01 L 8 8 2 96 -0 8 R

C
Sheet 35 of 35 1 2

S M GN D

POWER SWITCH &

LID BOARD
S _ V IN

HOT KEY
POWER BUTTON WEB_WWW# WEB_EMAIL# AP_KEY#
SR3
SPW R _ SW 1 S W W W _ SW 1 S M A I L _S W 1 *1 0 0K _0 4 SAP_ SW 1
T JG -5 33 -S - T/ R T J G -53 3 -S -T / R T JG -5 3 3-S -T/ R T JG -5 33 -S - T/ R
1 2 S M _B TN # 1 2 SW EB_ W W W # 1 2 S W E B _E MA I L # 1 2 SAP_ O N
3 4 3 4 3 4 3 4

S C4 SC 3 SC 5 SR 5
PSW1~8 SR4 * 4 7K _ 0 4

5
6

5
6

5
6

5
6
0 . 1u _ 1 6V _Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 _ 04 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4
3 1
4 2

S MG N D S M GN D S MG N D S MG N D S M GN D S M GN D S M GN D
S M GN D

S MG N D

SM H1 S MH 3
2 9 2 9
3 8 3 8
4 1 7 4 1 7
5 6 5 6
S MH 4
2 9
3 8
4 1 7
5 6

M T H 2 3 7D 8 7 M T H 2 3 7D 8 7 M T H2 3 7 D1 1 8

S MGN D S MG N D S MG N D S MG N D

B - 36 POWER SWITCH & LID BOARD