MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION

VIDYAVARDHINI’S BHAUSAHEB VARTAK

POLYTECHNIC ,VASAI ROAD WEST

MICRO PROJECT
Academic year: 2022-2023

Title of Micro Project:

7 Segment BCD display

Program/Code: Computer Engineering (CO) Semester: THIRD

Course/Code : Digital techniques (22320)

Name: Roll No:

Enrolment No.:

Name of Faculty: Proj. Santosh Kulkarni.

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION

Certificate
This is to certify that Ms.…………………………………………………. … Roll No of
THIRD Semester of Diploma in computer engineering of Institute, B.V. POLYTECHNIC
(Code: 0093) has completed the Micro Project satisfactorily in Subject – Digital techniques
(22320) for the academic year 20222023 as prescribed in the curriculum.

Place:Vasai Enrolment No:____________

Date:________ Exam seat no:_____________

Subject Teacher Head of the Department Principal

 Annexure - I

Part A: Micro Project Proposal

1.1 Aim/Benefits of the Micro-Project:

The aim of the Micro-Project is to understand the concept of 4 bit synchronous counters
2.1 Course Outcomes integrated:
The theory, practical experiences and relevant soft skills associated with this course are to be taught and implemented,
so that the student demonstrates the following industry oriented COs associated with the above mentioned competency:
• Use number system and codes for interpreting working of digital system.
• Use Boolean expressions to realize logic circuits.
• Build simple combinational circuits.
• Build simple sequential circuits. • Test data converters and PLDs in digital electronics systems.
3.1 Proposed Methodology:
1. Literature survey.
2. Collect information through different sources
3. Analysis of data.
4. Compilation of collected data.

4.0 Action Plan

Sr. Planned Planned Name of

No. Details of the activity Start date Finish date Members

1 Formation of Group & Topic Selection All members

2 Submission of Proposed Plan All members

3 Preparation of Report All members

4 Final valuation of a working Report All members

5 Presentation of Report All members

6 Submission of Final Report All members

5.0 Resource Required:

Sr.
No. Name of resources/Material Specifications Qty Remarks

Processor: i3
1. Computer RAM : 4.00 GB 1
2. Microsoft Word Word -2016

3. Printer Hp Laser Jet 1

6.0 Name of Team Members with Roll No: 1134 to 1136

Roll No Individual
Process and Total
Sr. Name of Students Product Presentation
(04) (10)
No. assessment (06)
01 1245 Rohan Sul

02 1246 Harsh Tandel

03 1247 Mufij Topinkatti

04 1248 Rion Tuscano

Name & Signature of Faculty: Prof .Santosh Kulkarni

Final Micro Project Report

Title: 7 Segment BCD display

Rationale: In the present scenario most of the electronic equipment like computers, mobiles, music
systems, ATM, automation and control circuits and systems are based on digital circuits which the
diploma electronic engineering passouts (also called technologists) have to test them. The knowledge
of basic logic gates, combinational and sequential logic circuits using discrete gates as well as digital
ICs will enable the students to interpret the working of equipment and maintain them. After
completion of the course, students will be able to develop digital circuits based applications.

2. 0 Course Outcomes Integrated:

The theory, practical experiences and relevant soft skills associated with this course are to be taught and implemented,
so that the student demonstrates the following industry oriented COs associated with the above mentioned competency:
• Use number system and codes for interpreting working of digital system.
• Use Boolean expressions to realize logic circuits.
• Build simple combinational circuits.
• Build simple sequential circuits.
• Test data converters and PLDs in digital electronics systems.
3.0 Actual Procedure Followed.
1 Discussion about topic with guide and among group members
2 Literature survey
3 Information collection
4 Compilation of content
5 Editing and revising content
6 Report Preparation 4.0: Actual Resources Required:
Sr.
No. Name of resources/Material Specifications Qty Remarks
Processor: i3
1. Computer RAM : 4.00 GB 1
2. Microsoft Word Word -2016

3. Printer Hp Laser Jet 1

Programming compiler
4. Turbo C++
7.0 Skill Developed/Learning outcomes of this Micro-Project The following
skills were developed:
Teamwork: Learned to work in a team and boost individual confidence.
Problem-Solving: Developed good problem solving habits.
Technical Writing: Preparing the report of proposed plan and the final report.
 Annexure - III

Rubrics for Assessment of Micro-Project

Title: 7 Segment BCD display
Institute Code: 0093/1738 Academic year: 2022-2023

Program: CO3I Course & Code: DTE(22320)

Name of Candidate:

Roll No:
Semester: THIRD Name of Faculty: Prof. Santosh Kulkarni

Sr. Characteristic to be Assessed Poor Average Good Excellent

No. (Marks 1-3) (Marks 4-5) (Marks 6-8) (Marks 9-10)

1. Relevance to the Course

Literature Survey/Information
2. Collection

3. Project Proposal

Completion of the Target as per

4. Project Proposal

5. Analysis of Data and Representation

6. Quality of Prototype/Model

7. Report Preparation

8. Presentation

9. Viva

Annexure IV
 Micro Project Evaluation Sheet
Title: 4 bit Synchronous counter.
Institute Code: 0093 Academic year: 2022-2023 Program: CO3I
Course & Code: DTE(22320) Name of Candidate: Roll No:
Semester: THIRD Name of Faculty: Proj Santosh Kulkarni.
Course Outcomes Achieved:
• Use number system and codes for interpreting working of digital system.
• Use Boolean expressions to realize logic circuits.
• Build simple combinational circuits.
• Build simple sequential circuits. • Test data converters and PLDs in digital electronics systems.
Evaluation as per Suggested Rubric for Assessment of Micro Project:
Sr. Characteristic to be Poor Average Good Excellent Sub
No. assessed Mark Marks Marks Marks 910 Total
1-3 4-5 6-8

(A) Process and product assessment Out Of 6

1 Relevance to the course

2 Literature Survey .
Information Collection

3 Completion of the
Target as per project
proposal

4 Analysis of Data and

representation

5 Quality of
Prototype/Model/Conte
nt

6 Report Preparation

(B) Individual Presentation/Viva Out of 4

7 Presentation

8 Viva

Name and designation of the Faculty Member: Prof. Santosh Kulkarni.

 Weekly Activity Sheet

Topic: 7 Segment BCD display

Institute Code: 0093 Academic year: 2022-2023
Program: CO3I Course & Code: DTE(22320)
Name of Candidate: Roll No:
Semester: THIRD Name of Faculty: Proj Santosh Kulkarni

SR. NO WEEK ACTIVITY PERFORMED

1. 1st Week Discussion and Finalization of Topic

2. 2nd Week Literature Review

3. 3rd Week Submission of Proposed Plan

4 4th Week Information Collection

5. 5th Week Analysis of Data

6. 6th Week Compilation of content

7. 7th Week Editing and Revising the Content

8. 8th Week Report Preparation

9. 9th Week Report Preparation

10. 10th- 12th Week Presentation

Signature of Student. Dated Signature of Faculty

Prof. Santosh Kulkarni
 Introduction

Most often seven-segment displays are used to display the digits

in digital watches, calculators, clocks, measuring instruments and
digital counters, etc. Generally, LCD and LED segments provide
the display output of numerical numbers and characters.

However to display the characters and numbers (in order to produce the decimal
readout), seven-segment displays are most commonly used. Mostly these displays
are driven by the output stages of digital ICs (to which the visual indication of the
output stages has to be performed) such as latches and decade counters, etc.

But these outputs are in the form of 4-bit binary coded decimal (BCD), and not
suitable for directly driving the seven-segment displays.

A display decoder is used to convert a BCD or a binary code into a 7 segment code.
It generally has 4 input lines and 7 output lines. Here we design a simple display
decoder circuit using logic gates.

Even though commercial BCD to 7 segment decoders are available, designing a

display decoder using logic gates may prove to be beneficial from economical as
well as knowledge point of view.
 Principle of Display Decoder Circuit

The basic idea involves driving a common cathode 7-segment LED

display using combinational logic circuit. The logic circuit is designed with 4
inputs and 7 outputs, each representing an input to the display IC. Using
Karnough’s map, logic circuitry for each input to the display is designed.

Theory Behind the Circuit:

The first and foremost aspect of this circuit is decoder. A decoder is a combinational
circuit which is used to convert a binary or BCD (Binary Coded Decimal) number to
the corresponding decimal number . It can be a simple binary to decimal decoder
or a BCD to 7 segment decoder.
Another relevant section is the combinational logic circuitry. A combinational logic
circuit is a system of logic gates consisting of only outputs and inputs. The output
of a combinational logic circuit depends only on the present state of the inputs and
nothing else. Best examples of such circuits are Encoders and Decoders,
Multiplexers and De-multiplexers, Adders, Subtractors etc.
To understand the design and operation of these logic circuits, one needs to have
a good knowledge about Boolean algebra and logic gates. For example few basic
Boolean algebra rules to be followed are the complementary law, associative law,
De-Morgan’s law etc.

A 7 segment LED display consists of an arrangement of 8

LEDs such that either all the anodes are common or
cathodes are common. A common cathode 7 segment
display consists of 8 pins – 7 input pins labeled from ‘a’ to ‘g’
and 8th pin as common ground pin.
 BCD
BCD (Binary Coded Decimal) is a number system which consisting of
ten different 4-bit patterns of 1s and 0s that represent decimal numbers
0-9.
This table shows how ten
BCD numbers shows ten
decimal digits. The equivalent
decimal value of each BCD
number is determined by
adding the weight of the bit
patterns where 1s are placed.

Decoder has four inputs to which the 4-bit BCD numbers are applied.
Each input is labeled with a
capital letter, which
represents one of the
binary-weighted positional
values.

Input into the decoder each

waveform time period that is an
individual BCD number.
 Truth Table

Truth Table – For common cathode type BCD to seven segment decoder:

Note –
 For Common Anode type seven segment LED display, we only have

to interchange all ‘0s’ and ‘1s’ in the output side i.e., (for a, b, c, d, e,
f, and g replace all ‘1’ by ‘0’ and vice versa) and solve using K-map.
 Output for first combination of inputs (A, B, C and D) in Truth Table

corresponds to ‘0’ and last combination corresponds to ‘9’. Similarly

rest corresponds from 2 to 8 from top to bottom.
 BCD numbers only range from 0 to 9,thus rest inputs from 10-F are

invalid inputs.
 Karnaugh Maps Simplification

For other combinations of input, the output is “don’t care X” as there are no
more digits to display. We will derive the expression for each output
using Karnaugh map (K-MAP).

For output a:

For output b:
For output c:

For output d:

For output e:
For output f:

For output g:
 7-Segment Display Decoder Circuit

We have derived an expression for each output now we need to make

its schematic using logic gates as shown in the figure given below.
Fig: Schematic of BCD to 7-Segment Display Decoder.
 CD to 7-Segment Decoder IC & Pin outs

7447 BCD to 7-Segment Decoder

The commonly used IC for BCD to 7-segment decoding is 7447.
The pin configuration of 7447 is given in the figure below.