A Multiplierless Implementation of Cascade
Integrator Comb Filter
Nezam Saberi1, Arash Ahmadi1, Shahpour Alirezaee2, Majid Ahmadi2
1. Electrical Department, Faculty of Engineering, Razi University, Kermanshah, Iran
2. Electrical and Computer Engineering Department, University of Windsor, Windsor, Ontario, Canada
Abstract— this paper presents a cascaded integrator comb
compensator filter with a multiplierless implementable structure.
A second order linear phase filter is realized with minimum error
approximation of the coefficients. The compensator filter
coefficients are presented in a canonical signed digits form.
Presented design can be implemented using low cost hardware
units such as add and shift operations. The results show that the
compensator filter not only reduces the power consumption but
also improves the pass band drop of the CIC filter.
Keywords— Cascaded integrator Comb Filters, Decimation
Filter, MultiplieRless, FIR, Linear Phase Filter
I. INTRODUCTION
Multirate signal processing has been widely used in modern
signal processing applications, including audio, data
communication and bio-signal processing. Multirate filtering is
considered as an essential requirement in constructing
Quadrature Mirror Filters (QMF) or wherever sample rate
needs to be changed in a digital system. These type of filters
has the capability to be realized with lower computational
complexities compared with ordinary single rate filter
structures.
Basically, a multirate system is a system with multiple
sample rates. For instance, if two subsystems work at different
sampling rates, where they supposed to work together, then,
normally, a rate conversion (rate increase/decrease) is required
when data transfer from one system to the other one. But, from
an implementation cost viewpoint, the most important reason
to use multiple sample rates is the possibility to improve the
processing efficiency with lower hardware cost in the system.
Multirate consists of three parts; interpolation, decimation and
resampling.
The Cascaded Integrator Comb (CIC) filter is a
multiplierless structure with low memory requirements, with
low hardware complexity. This structure was originally
introduced by Eugene B. Hogenauer [1] for over two decades
back and has been used for both interpolation and decimation.
Furthermore, this realization structure does not require any
memory bank for the filter coefficients, and can be designed
with only two basic building blocks. CIC structure also has a
good regularity in that it is possible to (re)use the same design
implementation for different rate changes.
One of the drawbacks, on the other hand, is the passband
droop. This filter has an undesired passband droop due to the
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boxcar characteristic [2], which often leads to use of a
conventional FIR filter for compensation. Furthermore, the
designer has only three design parameters resulting in a limited
desirable frequency response. The CIC magnitude response
must have a low pass band drop and a high attenuation within
the folding band (bands around the zeros). This filter has high
drop in the pass band and low attention in the folding bands
which are undesired. Different methods have been proposed to
solve these issues [1-5].
Recently, a generalization of the CIC filter (GCF) is
proposed in [5-7] to improve the attenuation and the folding
bands of the filter. Details of the corresponding transfer
function of the GCF can be found in [6]. The method proposed
in [4] describes a multiplierless structure for a second-order
compensation filter. The filter coefficients expressed as a sum
of power of two, i.e. 2n, and are optimally calculated using a
random search algorithm [8]. Further, in [8] a second-order
linear phase filter has been designed and implemented using
the CIC compensation filters.
The main objective of this work is to improve the pass band
characteristic of the filter. In this case study, a second order
linear phase filter is considered as the compensator. The
compensation filter coefficients are obtained using the
minimax error function approximation. The signed digit
coefficients is utilized for the multiplier free realization. With
this approach, hardware implementation costs, area and power
consumption, can be improved.
The rest of article is organized as follows. In Section II, a
second-order linear phase compensation filter is presented,
where the minimax is used to find the filter coefficients.
Section III deals with multiplierless implementation of the
proposed compensation filter. Finally, the results and
discussions are presented in the section IV.
II. CIC COMPENSATOR FILTER
In general, the structure of a cascaded integrator comb filter
consists of two main sections, cascaded integrators and combs,
separated by a down-sampler, as shown in Figure 1.
The integrator section, basically, is a first-order IIR filter
as:
1 (1)
with frequency response as:
 Comb section, on the other hand is a comb filter with high
sampling rate, fs, which change the rate as:
(3)
where R is the rate parameter and M is the differential delay. In
this equation M is a positive integer which is usually limited to
1 and 2. The frequency response of this section is
(a)
1 ,
2 1 cos ,
(4)
,
,

To create a CIC filter, need to connect N integrator (fs) and

(b) N comb sections ( ) as shown in Figure 2.

Figure 2. A sample structure for three stage CIC decimation

(c) filter.

Figure 1. Basic building blocks of CIC filter. a) Integrator

section b) Comb section c) CIC decimation. The transfer function of the CIC filter is defined by [3]:

11 1 2
∏ 1 1 1 (5)
1 1 1
,
, where D and N are the decimation factor and the number of
stages respectively.
, (2)
The compensated CIC filter can be expressed as [11]:
0
, G H(z) P( ) (6)
0
where H(z) is CIC filter transfer function defined in (1), and
P( ) is a transfer function of the linear phase Compensation

(a) (b) (c)

Figure 3. Sample frequency responses for CIC filters with different M,N and R values. a) 2, 8, 4 b)
1, 48 , 3 c) 2, 8, 8

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filter as follows: 0 (14)
P( ) (7) 0 (15)
where , , coefficients are the FIR linear phase type one
filter and . The compensation filter is cascaded with Therefore, by solving these equations and based on method
CIC filter. Usually, the CIC decimator filter is followed by a presented in [11], we have:
second decimator stage. The decimator factor ν of the second
stage determines the passband edge frequency , where the
)
worst pass band drop occurs, [6] and the value √2
of is, 4, where and are real-valued 0.3594 )
functions that are described in the following [9]:
2 cos (8)
/
For validation, we have considered the following
(9) parameters:
/

Consequently, the corresponding frequency response of 5 , the decimator factor is equal to 32 , and is 4.
can be written as: Using the values , and , the resulting passband
/
(9) frequency 0.00781 rad. Therefore, we have:

where the error function can be defined as: 0.0055 rad.

1 (10)
and accordingly it can be written as
We have selected the MinMax method to design the
compensation filter as: 0.0028 rad.
δ min , max | ω | 0.0072 rad.
(11)
To obtain the coefficients and we impose the error
function to zero at frequencies and , where 0
, .
0 (12)
In this case, and are obtained

. (13)

(15)

Figure 4 indicates the error function based on the Equation 8.

(a)

Figure 4. Error function for minimax method

(b)
Figure 5. Magnitude response of the CIC and
According to the figure1, it can be concluded that: compensated for 5, 32, 4.

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as a result , , coefficients is obtained. Therefore, for , , wee can rewrite:
0.2344 . (18) 0.23
344 2 2 .
1.467 . (19) 1.467 1 2 2 .
Consequently, the compennsator can be implemented in a
Figure 5(a) illustrates the magnitude respponse of both CIC
multiplierless manner as show
wn in Figure 6. Figure. 6(a) the
and compensated CIC filters. Passband deetails of CIC and
implementation using a shiftft and adder block, which is
compensated CIC filters has been presenteed in Figure. 5(b).
described in Figure. 6(b).
Therefore the compensated filter is a bettter feature in the
passband region. The gain of CIC and compeensated CIC filters
at 0.0078 rad are 1.12 anda 0.024 ,
respectively. Furthermore, the compensatedd CIC filter has a CLUSION
IV. CONC
very low passband drop. This paper focused on dessign of the cascaded integrator
comb (CIC) compensator filter and multiplierless
implementation of the CIC. A second
s –order linear phase filter
III. MULTIPLIERLESS IMPLEMEN
NATION is considered and the best approximation of the filter
coefficients, the compensator filter
f coefficients were presented
The proposed compensated CIC filter in section II results a
in a canonical signed digits (CSD) form. The compensator
desirable band-pass. However, the extracted coefficients
c need a
filter parameters obtained via the minimax approximation
lot of space and power for implementation. To avoid wasting
method. Finally, the filter was implemented in multiplier free
area and power for very small coefficient,, a more efficient
manner. The results indicate that
t the compensator filter can
representation of numbers must be applied. A suitable solution
reduce the power consumptionn as well as improve the pass
is provided by the signed digit (SD) reepresentation. SD band drop of the CIC filter.
representation is redundant, since the samme number can be
represented in several ways. By using the minimal
m number of
non-zero digits, digital functions can be implemented
i with
minimum hardware. In particular, multiiplication can be REFER
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(b)

Figure 6. Second-order compensation filter

fi structure.

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