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D iD Sinv1 Sinv3
Lr iLr Lf
S vCr
PV A
Vpv Co Vdc vAB Cf vac
Arrays Cin Cr D1
B Utility Grid
iS
Sa
Sinv2 Sinv4
Figure 2. Developed dc-dc boost converter with active resonant technique for small grid-connected PV-systems.
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vD vD
D iD D iD
iS iS
Lr iLr Lr iLr
vCr vC r
Iin Vdc Iin Vdc
Cr D1 Cr D1
S S
Sa Sa
Sa Sa
Sa Sa
Sa
(g) Stage 7: t5 - t6
dvCr (t ) Z n = Lr / Cr (16)
iLr (t ) = I in − iCr (t ) = I in − Cr (10)
Cr ∫
dt and the resonant angular frequency of the active snubber
1 (11) network ωn is
vCr (t ) = iCr (t )dt
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the main switch S should be turned on during this interval. The dvcr (t )
resonant inductor current is iCr (t ) = Cr = I in (31)
dt
iLr (t ) = I Df (t ) + I in (19) The solution is determined as follows:
Using the initial condition iLr (t2 ) = I in + Vo / Z n , iDf(t) can I in
vCr (t ) = ⋅t (32)
be solved to give Cr
iDf (t ) = Vo / Z n (20) By using the initial condition vCr (t6 ) = Vdc , the duration in
It can be seen that the operating time in this stage is nearly this stage can be solved to give
zero. Thus, the time interval can be defined as
Cr ⋅ Vdc
Δt56 = t6 − t5 = (33)
Δt23 = t3 − t2 ≅ 0 (21) I in
5) Stage 5 (t3 – t4): At t = t3, the main switch S is turned on C. Characteristic of the soft-switching converters
and the auxiliary switch Sa is turned off simultaneously. At this
Due to the constant switching frequency operation, the dc
time, S is turned on with ZVS and the main switch current is
characteristics of the dc-dc boost converter with active resonant
increases linearly to Iin. Consequently, the energy stored in the
snubber can be derived. Since in steady-state operation the
resonant inductor Lr is transferred to the load via diode D1. The
waveform must repeat from one time period to the next, the
voltage vSa(t) across Sa is clamped at Vdc due to the conduction
average voltage across the inductor in steady-state operation is
of D1. The resonant inductor current iLr(t) starts decreasing
zero. Therefore,
VinTs = ∫ VCr dt
linearly and becomes to zero at t = t4. The circuit equations and
initial conditions in this stage are given as follows: Ts
(34)
⎣ 2 ⎦ T1
dt (35)
dv (t )
Cr Cr = 0 (23) where Da is the duty ratio of Sa. The dc voltage-conversion
dt ratio can be defined as
iLr (t3 ) ≅ I in + Vo / Z n (24)
Vdc 1
⎛ 1 ⎞
vCr (t3 ) = 0 (25) M= = (36)
(1 − D − Da ) + ⎜ T01 + T12 − T56 ⎟ / Ts
Vin 2
⎝ 2 ⎠
The solutions are determined as follows:
π
Vdc V Substituting T01, T12 and T56 into Eq. (36), Therefore,
iLr (t ) = − t + I in + dc (26)
Lr Zn
1
⎛I L ⎞
M= (37)
vCr (t ) = 0 (27)
(1 − D − Da ) + ⎜ in r + Lr Cr − dc r ⎟ / Ts
V C
⎝ Vdc ⎠
The time interval of this stage can be found as
2 I in
Lr ( I in + Vdc / Z n )
Δt34 = t4 − t3 = (28)
Vdc III. DESIGN CONSIDERATION FOR SOFT COMMUTATION
6) Stage 6 (t4 – t5): At t = t4, the diode D1 is turned off with In this section, for ensuring adequate soft commutation, a
ZVS naturally. During this stage, the main switch S conducts delay time has to be determined. Then, the values of the
the input current Iin. The circuit operations are identical to the components used in this auxiliary resonant circuit are
turn-on state of a conventional PWM boost converter. The formulated. All design constrains should be met at this point to
switch on duration of S is given by confirm soft commutation condition.
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can be specified as 5% - 10% of the switching period Ts. The resonant inductor and parasitic capacitor of the auxiliary switch
proposed soft-switching can be successfully achieved by Sa. The value of the active snubber components are calculated
delaying the turn-on instant of main switch according to the as follows: Lr=288.3uH, Cr=0.9nF. The value of the main
condition of (38), the auxiliary switch conducts only during the circuit components are L=4.97mH and Co=100uF.
short interval. The gating signal generating scheme to achieve
this objective is depicted in figure 5. L1 D1
1 2 3
4.97mH Dbreak
IC = 0A LR1
S CR1 288.3uH
Q VS1
0.9nF
IC = 200V
IC = 0A
5
D2 CO1
VPWM S1 100uF
Monostable 150V 7 + DF1 DS1 DF2 Dbreak IC = 200V
+
Multivibrator Q
Dbreak Dbreak Dbreak
+ + RL1
- -
VS2 0.5S2 VS3
V1 = 0 Sbreak RD1
- -
V1 = 0 640
Sa TD V2 = 10V Sbreak V2 = 10V
TD = 2.5us 4 TR = 1ns
TR = 1ns RSW1 DD1 RSW2 TF = 1ns
Figure 5. Control block diagram and timing of gate signals. TF = 1ns 0.001 Dbreak 0.001 PW = 2.5us
PW = 14.7us PER = 25us
PER = 25us
0
B. Components selections Figure 6. Orcad PSpice® simulation schematic of the proposed converter.
1) Maximum resonant inductor current
In stage 3 (t1 - t2), the resonant inductor current iLr(t) Fig. 7(a)-(b) shows the waveform of voltage and current of
continues to increase and reaches its maximum value at t = t2, the main switch and power diode under hard-switching
one can see that the maximum value of resonant inductor
operation. Fig. 7(c)-(h) shows the simulation waveforms of the
current iLr,max should be greater than the maximum value of the
input current Iin,max. For the convenience design and energy proposed dc-dc boost converter with active snubber during the
optimization of the auxiliary resonant circuit, the maximum switching period. From figure 7(d), it can be seen that the
value of resonant inductor current can be specified as: main switch S is turned on perfectly with ZVS and turned off
under near ZCS. In figure 7(e), Sa is turned on under near ZCS
iLr ,max = a ⋅ I in ,max (39) and turned off under near ZVS. Fig. 7(f)-(g) also show the
where 1.3 < a < 1.5 in practical design. If a is chosen to diodes D and D1 operate with soft switching. Moreover,
higher than 1.5, the conduction loss will be increased [5]. additional voltage and current stresses on the main switch and
diode do not take place. Fig. 8 shows the efficiency
2) Determination of Lr and Cr
comparison results. The overall efficiency of the proposed
The resonant capacitor and inductor have to be designed to
provide adequately soft switching for the auxiliary switch and converter increases to about 94% from the value of 93% in its
the main switch devices. The value of Lr can be obtained by counterpart hard switching converter.
determining how fast the boost diode D1 can be turned off. The
smaller the value of Lr is specified, the larger the peak current V. CONCLUSION
will flow in the resonant branch. The value of the resonant In this paper, an improved dc-dc boost converter with
capacitor Cr is the sum of the parasitic output capacitance of active resonant technique for small grid-connected PV systems
the main boost switch and the value of an external capacitor has been proposed. An implementation of active snubber in dc-
placed across the main switch, which is designed to control dc boost converter has been analytically analyzed and designed
dv/dt of the turn-off voltage across the main switch. Hence, in detail. The operation principles and the theoretical analysis
of the proposed converter in steady-state condition have been
Vdc ⋅ t D completely verified by the simulation results. The simulation
⎡ π ⎤
Lr = (40) results show that the active snubber can effectively suppress
⎢⎣(a − 1) 2 + 1⎥⎦ ⋅ I in ,max
the switching losses of the main switch and main diode without
increasing the current and voltage stresses. The snubber
(a − 1) ⋅ I in,max ⋅ t D inductor and capacitor for the proposed converter can be
⎡π 1 ⎤
Cr = (41) precisely determined by the presented design. The overall
⎢ 2 + (a − 1) ⎥ ⋅ Vdc
efficiency, which is about 93% in the hard switching case,
⎣ ⎦
increases to about 94%.
REFERENCES
IV. SIMULATION RESULTS
[1] J. A. Gow and C. D. Manning, “Photovoltaic converter system suitable
To verify the operation and the performance of the for use in small scale stand-alone or grid connected applications”, IEE
proposed high-efficiency dc-dc boost converter for small grid- Proc.-Electr. Power Appl., vol. 147, pp. 535-543, Nov. 2000.
connected PV systems, a 40kHz, 250W PWM boost converter [2] K. M. Smith, Jr., and K.M. Smedley, “Engineering Design of Lossless
with active resonant snubber has been designed and simulated Passive Soft Switching Methods for PWM Converters-Part I: With
by Orcad PSpice®. The power circuit operates from 150Vdc Minimum Voltage Stress Circuit Cells”, IEEE Trans. Power Electron.
vol. 16, pp. 336-344, May. 2001.
voltage source and supplies 400Vdc resistive load as shown in
figure 6. In the practical circuit, a diode in series with a resistor
is added to absorb the high-frequency oscillation caused by the
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Hard Switching Hard Switching
vD_hard
vS_hard
iS_hard iD _hard
(a) (b)
vg_S vS
ZVS ZCS
vg_Sa
iS
(c) (d)
vSa
vD
ZCS ZCS
iSa iD
(e) (f)
vD1
vCr
ZCS
iD1 iLr
(g) (h)
Figure 7. Simulation results of the proposed converter (a) Voltage and current of S under hard-switching condition (b) Voltage and current of D under hard-
switching condition (c) Turn on signal of S and Sa (d) Voltage and current of S (e) Voltage and current of Sa (f) Voltage and current of D (g) Voltage and
current of D1 (h) Voltage of Cr and current of Lr.
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