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International Journal of Electronics

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Novel log-domain frequency-adaptive

filter
a a a
Chrisostomos Kasimis , George Souliotis & Costas Psychalinos
a
Electronics Laboratory, Department of Physics, University of
Patras, GR-26504 Rio Patras, Greece

Available online: 10 Oct 2011

To cite this article: Chrisostomos Kasimis, George Souliotis & Costas Psychalinos (2011):
Novel log-domain frequency-adaptive filter, International Journal of Electronics,
DOI:10.1080/00207217.2011.623273

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 International Journal of Electronics
2011, 1–13, iFirst

Novel log-domain frequency-adaptive filter

Chrisostomos Kasimis, George Souliotis* and Costas Psychalinos

Electronics Laboratory, Department of Physics, University of Patras,

GR-26504 Rio Patras, Greece
(Received 27 January 2010; final version received 24 July 2011)

A topology for realising log-domain frequency-adaptive filters is proposed in this

article. According to this the side effects of the on-chip capacitor deviations,
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generated by the technology tolerances, are efficiently compensated giving a

constant cutoff frequency. Also, the cutoff frequency is automatically
controlled and readjusted by the frequency of an external reference signal.
The correct operation of the proposed scheme has been verified through
simulations by employing transistor models provided by a typical 0.35 mm
BiCMOS technology.
Keywords: adaptive filters; automatic tuning; filter compensation; log-domain
filters; companding filters

1. Introduction
Log-domain method has been introduced as an alternative technique in the design of
current-mode continuous-time analog filters. Its attractive features include electronic
adjustment of the frequency behaviour and low-voltage operation capability originating
from the companding nature of the performed signal processing. The input signal is
compressed by a logarithmic I–V converter (compressor) and afterwards it is expanded at
the output by an exponential V–I converter (expandor). Thus, the signal is linear at both
the input and output of the filter but remains compressed (non-linear) inside the core filter
(Frey 1993, 1996).
Analog filters are used in communications, biomedical systems and several other
applications. Most of them require highly accurate cutoff frequency which, however,
strongly depends on the technology parameter variation. Unfortunately, log-domain filters
cannot escape from this inconvenience. A number of compensation methods have been
already proposed in the case of conventional linear filters, where the accuracy of the
derived frequency behaviour is achieved through the compensation of the non-idealities
introduced by the transistors imperfections (finite beta, non-zero parasitic resistances, etc.)
(Perry and Roberts 1996; Yang, Enz, and van Ruymbeke 1996; Frey 1999; Leung and
Roberts 2000a,b; Oiza and Psychalinos 2004; Psychalinos 2006, 2008; Fragoulis,
Psychalinos, and Haritantis 2009). However, those methods are not intended to be used
for compensating other technology-parameter variations that affect the operation of the
overall circuit and they are of the same or higher importance as the fore-mentioned
imperfections. For example, the most significant unpredictable variation occurs in the

*Corresponding author. Email: gsoul@physics.upatras.gr

ISSN 0020–7217 print/ISSN 1362–3060 online
ß 2011 Taylor & Francis
http://dx.doi.org/10.1080/00207217.2011.623273
http://www.tandfonline.com
 2 C. Kasimis et al.

value of the integrated capacitors which depend on the oxide-thickness and could be in the
order of 15% in the technologies applied nowadays. Within the same die, however, the
matching of one capacitor to another identical component is much more precise and can
be typically within the range 0.05–1%. The capacitor tolerance causes one of the most
significant deviations on the nominal cutoff-frequency of a filter. It is unpredictable and,
consequently, cannot be compensated through a specific prewarping design concerning the
element values of the filter.
In cases of unpredictable variations, an adaptive system could be employed in order to
keep the cutoff frequency stable. A method for making adaptive log-domain filters for
system identification has been proposed in Yiming and Abshire (2008). The employed
floating-gate CMOS transistors impose difficulties in the modelling and design of such
filters using typical technologies (Ivanov, Rafiq, Renovell, Azais, and Bertrand 2001).
A simple and accurate automatic tuning scheme has been proposed in Yoo (2002). This
has been followed for compensating the process variation side effects in current-mode
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filters (Souliotis 2010) and Gm-C filters (Kasimis, Souliotis, and Psychalinos 2010). The
most attractive benefit is its simplicity and the requirement for simple blocks in its
structure.
The method in Yoo (2002), Kasimis et al. (2010) and Souliotis (2010) is based on
indirect tuning and particularly on the master–slave technique. According to this, a
reference signal follows two paths denoted as reference and adaptive paths, respectively.
Comparing the outputs derived from each path, an error signal is produced that attempts
to readjust the adaptive path through suitable feedback.
An automatic frequency tuning scheme, suitable for compensating the cutoff frequency
variations caused by the influence of the capacitor tolerance in log-domain filters, is
introduced in this article. The tuning scheme is based on the same principle as the one
proposed in Yoo (2002). It should be mentioned at this point that, according to the
authors’ best knowledge, this is a first attempt towards automatic frequency tuning in
log-domain filters in the open literature, although the capability for manual tuning in the
log-domain filters is intrinsic, through the bias current (Schmalz, Teplechuk, and Sewell
2005). Attractive characteristics offered by the proposed scheme are the employment of
standard log-domain blocks, the simplicity and symmetrical structure. These attributes
offer a simple system but with significant mitigation of the device tolerances. This article is
organised as follows: the proposed scheme is introduced in Section 2, where the principle
of operation and the corresponding log-domain realisation are also given. The verification
of the correct operation of the proposed configuration is performed in Section 3, where a
third-order filter has been adaptively tuned.

2. Proposed adaptive tuning scheme for log-domain filters

The block diagram of the proposed automatic tuning scheme is shown in Figure 1. This is
constructed from a lossy integrator, buffer, squarer, envelope detector, comparator and
current mirrors/amplifiers. The integrator, buffer and envelope detector are realised
according to the concept of log-domain circuits, while the realisation of the squarer is
based on the translinear principle. The comparator and the feedback stage are structured
by current mirrors. The slave filter is the circuit that needs compensation, and the master
filter-integrator is the main circuit which takes the responsibility to perform the required
compensation directly. The slave filter just follows the feedback signals created by the
 International Journal of Electronics 3
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Figure 1. The automatic tuning architecture.

p
Figure 2. The log-domain 1/ 2-buffer.

master filter. Typically, the master filter is a first-order filter, while the slave filter could be
of arbitrary order.
An external sinusoidal signal iref of frequency fref is the reference signal which through
a double-output current mirror fed the two paths, denoted in Figure 1 as reference and
adaptive paths, respectively. The first block of the reference path is a buffer with
p p
attenuation 2 (1/ 2-buffer), shown in Figure 2, and that of the adaptive path is a lossy
integrator (master filter) with cutoff frequency fc, shown in Figure 3.
 4 C. Kasimis et al.

Figure 3. The log-domain integrator.

The output current of the master integrator (iint) is given, as a function of the input
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current (iref), by (1) as

iint 1
¼ ð1Þ
iref   s þ 1
The variable  in (1) is the time-constant in log-domain filters defined by (2) as
CM  VT
¼ ð2Þ
Io
In Equation (2), CM is the capacitor of the master filter, VT the thermal voltage and Io
the bias current of the master integrator. The time-constant can be controlled by the dc
current Io and, consequently, the cutoff frequency fc of the master integrator can be also
controlled by Io. However, as shown in the topology of Figure 1, the dc feedback current if
is added to the constant current Io to vary the total bias current of the master integrator.
The slave filter is biased by the same bias current Io þ if, in order to follow the control of
the master filter. p
On the reference path, the buffer has always gain equal to 1/ 2 (3 dB), giving the
reference level for comparison and therefore its transfer function is defined in (3) as,
ibuf 1
¼ pffiffiffi ð3Þ
iref 2
Ideally, the amplitude of the output signal of the integrator at the cutoff frequency
p p
must be 1/ 2 times the input signal and equal to the output signal of the 1/ 2-buffer. The
comparison result of the two signals indicates whether the cutoff frequency is at its
nominal value. For a given cutoff frequency !ref, the nominal value of the time constant
 ref is equal to 1/!ref. However, due to capacitor tolerances, the realised value of time
constant deviates from its nominal value  ref. According to Figure 4, if  is greater than
p
1/!ref, then the gain at !ref will be smaller than the nominal value 1/ 2. This originates
from the fact that the realised cutoff frequency of the filter is smaller than the !ref. As a
result, the system tries to readjust the time constant  of the integrator to the nominal
value  ref by comparing ibuf and iint and adjusting the bias current towards the suitable
direction. An opposite condition holds in the case that  is smaller than 1/!ref.
The comparison of the amplitude of the two signals ibuf and iint is performed after the
process of the squared signals through envelope detectors. Comparison of the squared
 International Journal of Electronics 5

Figure 4. The operation principle of the tuning system.

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Figure 5. The used squarer topology.

signals gives better results instead of comparison of the non-squared signals (Yoo 2002;
Kasimis et al. 2010; Souliotis 2010). The improvement is originated from the elimination of
unwanted dc signals appearing in the output of the envelope detectors.
The squarer shown in Figure 5 is based on the translinear principle (Meledez-
Rodriguez, Martinez-Silva, and Spencer 2005). The two output signals isqbuf and isqint are
processed by the envelope detectors producing the signals ienvbuf and ienvint, respectively.
The envelope detectors are realised by a topology similar to that of the master integrator
(lowpass filter) shown in Figure 3. The difference is that the capacitor value is much
greater than that of the master integrator, in order to guarantee the achievement of the
envelope detection.
In order to describe the signals ienvbuf and ienvint, it is assumed that the reference signal
is sinusoidal with frequency !ref and an amplitude A.
Thus,

iref ¼ A  sinð!ref  tÞ ð4Þ

At the cutoff frequency,

A
ibuf ¼ pffiffiffi  sinð!ref  tÞ ð5Þ
2

A  
iint ¼ pffiffiffi  sin !ref  t  ð6Þ
2 4
 6 C. Kasimis et al.
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Figure 6. The current comparator.

Although iint is shifted by /4, this has no effect in the system because the comparison
with ibuf is based on the amplitude of the signals and not in their phase shift. The
corresponding squared currents are given by Equations (7) and (8),
i2buf A2
isqbuf ¼ ¼  sin2 ð!ref  tÞ ð7Þ
4  Io 8  Io

i2int A2  
isqint ¼ ¼  sin2 !ref  t  ð8Þ
4  Io 8  Io 4
The envelope detector output currents are given by (9)
G
ienvbuf ¼ ienvint ¼  A2 ð9Þ
8  Io
where G is a gain factor which is required for amplifying the low-level signal A2/8Io. An
additional gain-stage is also required to further amplify this low amplitude signal.
As a next step, these signals are compared through the current comparator of Figure 6.
The comparator produces an output signal,
icomp ¼ ienvbuf  ienvint ð10Þ
which is equal to zero if the system operates perfectly at the nominal cutoff frequency.
However, this is not observed in practical circuits due to the fact that the capacitor CM
deviates by a variation value CV. As icomp is typically low, it must be amplified and fed
 International Journal of Electronics 7

Figure 7. The operation principle of the tuning system changing the frequency of iref.
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back to the bias of the master filter, readjusting its time constant and, consequently, the
cutoff frequency. The total bias of the master filter becomes then Io þ If. In the ideal case,
where no deviation occurs in the integrator capacitors, If is zero and the total bias current
is Io. In any other case, If reaches a suitable value in order  to remain in its nominal value
1/!ref. Thus, the final time constant is described by (11) as
ðCM þ CV Þ  VT
¼ ð11Þ
Io þ If
Feedback current of the same value is also added to the bias current of the slave filter.
Thus, the cutoff frequency of the slave filter is compensated in the same proportion with
the master filter.
An interesting point concerns the case where the system is already adjusted at the
reference frequency !ref and then this is externally changed to a new value !ref1 or !ref2, as
shown in Figure 7. Following a similar consideration to that in Figure 4, it is obvious that
p
the gain of the master integrator will be greater or smaller than 1/ 2, respectively, causing
a difference between iint and ibuf. In order that the system may be readjusted to its new
nominal frequency (!ref1 or !ref2), this difference is detected by the comparison, and
consequently, the suitable feedback current readjusts the total bias current to the new
equilibrium point. As a result, the slave filter is forced to change the cutoff frequency
according to the new bias conditions, giving the ability for frequency control.

3. Simulation results
The frequency tuning system of Figure 1 has been verified through PSpice simulations
using the realistic models provided by AMS 0.35 mm BiCMOS technology. The main
technology parameters for the MOS transistors are VTon ¼ 0.50 V, Kpn ¼ 170 mA/V2,
VTop ¼ 0.65 V, Kpp ¼ 58 mA/V2 and the beta ¼ 200 of the NPN bipolar transistors.
It should be mentioned at this point that PMOS transistors have been used instead of
PNP transistors. The reason is that in common BiCMOS technologies, PNP transistors are
implemented as parasitic transistors with poor performance. Also, from the layout point of
view, they require large silicon area. For all these reasons, PMOS transistors are more
preferable than PNP transistors. The aspect ratio of the PMOS transistors employed in the
buffer and in the master integrator was 30 mm/1 mm.
 8 C. Kasimis et al.

Figure 8. Multiple output current mirrors used in the feedback circuit.

A first-order lowpass filter has been utilised as a slave filter with cutoff frequency
10 MHz. The frequency of iref was also 10 MHz while its amplitude has been chosen to be
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5 mA. The supply voltages were 1.5 V and the initial bias current Io has been chosen to be
20 mA. Under these conditions and according to (2), CM was calculated as 12.3 pF.
However, taking into account the transistors’ non-idealities provided by the employed
technology, the bias current has been recalculated according to the method introduced in
Oiza and Psychalinos (2004) and Fragoulis et al. (2009) and the derived value was 22.4 mA.
The feedback stage connected in series with the comparator simultaneously performs a
current amplification and produces the required multiple current sourcing and sinking
operation, as shown in Figure 8. The total current gain of the amplification stage, required
for amplifying the low-level current produced by the comparator, is about 80 and achieved
by employing a cascade connection of three current mirrors. Only the final stage is shown
in Figure 8, which has a current gain of 20. Also, a small amplification has been preceded
at the envelope detection stage, as described in Section 2. The outputs of the final part of
the feedback stage are directly fed into the bias nodes of the master and slave filters and
consequently the total bias current of those filters is adjusted. This block is entirely
designed by CMOS transistors due to the fact that the realisation of current mirrors with
gain is more efficient by utilising this type of transistors. The aspect ratio for the
transistors of the feedback stage is 2 mm/1 mm for NMOS transistors, and 4.4 mm/1 mm for
PMOS transistors.
It should be mentioned at this point that high-value capacitors must be used within the
envelope detectors in order to guarantee that the feedback current which feeds the bias
nodes of the filters must be free of any ripple. The exact value is not critical, but they must
be of the same value. A tradeoff is found in the fact that using high-value capacitors, low
ripple envelope detector outputs are generated, but the system takes longer to get to the
final equilibrium point and vice versa. So, the final choice depends on the system
requirements about the required time for getting to the equilibrium point. Thus, external
4 nF capacitors have been used. This value gives  ¼ 10 nsec or cutoff frequency equal to
16 KHz, achieving a ripple suppression of about 39 dB.
Simulations have been performed assuming that all the capacitors deviate within the
range 15% to þ20% from their nominal value. Simulations for the first milliseconds
indicate the feedback current until this acquires its equilibrium point, as depicted in
Figure 9 for several deviations.
The third-order Chebyshev log-domain filter (Psychalinos 2006) shown in Figure 10,
with 10 MHz cutoff frequency and 1 dB ripple in the passband, has been chosen
among others as the slave filter. However, in this automatic tuning topology, any other
 International Journal of Electronics 9
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Figure 9. Waveforms of the feedback current If.

Figure 10. Third-order log-domain Chebyshev filter.

log-domain filter could be used. The limitation is only that the slave filter must be biased at
the same current as the master filter. Also, limitations in the tuning range and
consequently in the correction range arise mainly from the CMOS current mirror
limitations.
The frequency responses of the third-order filter before and after the employment of
the frequency tuning are shown in Figures 11 and 12, respectively. Without the proposed
frequency tuning system, the cutoff frequency was varied within the range 8.3–11.9 MHz
for a capacitor variation from 15% to þ20%. With the frequency tuning system, the
variation of the cutoff frequency was restricted within the range 9.8–10.1 MHz. Thus, the
total variation range is suppressed from 36% to only 3% resulting in a significant
improvement.
In order to take into account the effect of process variations of the bipolar and MOS
transistor parameters, a number of simulations of the filter with worst-case models of
bipolar transistors provided by the process, denoted as high beta (hb), high speed (hs) and
low beta (lb), have been initially performed. The derived frequency responses including
 10 C. Kasimis et al.
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Figure 11. Frequency response of the third-order filter without the tuning system for several
capacitor variations.

also the case of typical mean (tm) model are shown in Figure 13. According to this plot,
the total variation of the cutoff frequency is about 17%. It should be mentioned at this
point that the variations of the threshold voltage of the MOS transistors do not affect the
behaviour of the filter itself, due to the fact that it is constructed only from bipolar
transistors. However, they affect the operation of the several other blocks of the automatic
tuning topology which are constructed from MOS transistors (e.g. the comparator) and
consequently the performance of the whole system. Thus, simultaneously considering
variations of the MOS transistors’ threshold voltage, the derived frequency responses of
the whole system are depicted in Figure 14. According to this plot, the total variation of
the cutoff frequency is about 11%.
In addition, this method offers the ability of electronically controlling the cutoff
frequency of the slave filter. The cutoff frequency automatically takes the value of the
frequency of the reference signal as it is described in the end of Section 2. Setting several
frequency values within the range 0.85fcnom–1.2fcnom results to the corresponding
frequency variation, within the same range 0.85fcnom–1.2fcnom, where in our case
fcnom ¼ 10 MHz. The results are shown in Figure 15.
 International Journal of Electronics 11
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Figure 12. Frequency response of the third-order filter with the tuning system for several capacitor
variations.

Figure 13. Frequency response of the third-order filter without the tuning system for several process
variations.
 12 C. Kasimis et al.
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Figure 14. Frequency response of the third-order filter with the tuning system for several process
variations.

Figure 15. Frequency response of the third-order filter with the external control of fref.

4. Conclusions
An adaptive frequency tuning system is proposed for log-domain filters. This method can
not only compensate the tolerances of the on-chip capacitors and other technology
parameters but it can also be able to reassign the cutoff frequency of the slave filter totally
by externally controlling the frequency of the reference signal. The automatic frequency
tuning is performed by adjusting the bias current in order to keep the time constants of the
master and slave filters in a specific value. The operation of the system is validated through
simulation results where the behaviour of a third-order filter has been evaluated. A
reduction of the cutoff frequency variation range from 36% to 11% is achieved and,
consequently, the proposed scheme could be employed for realising log-domain filters with
accurate frequency characteristics.
 International Journal of Electronics 13

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