Chapter 04

Chapter 4:
Instructions
1 chapter-4 Instruction
Topic included in this chapter
 Instruction, Definition and classification.
 Data Movement Instructions
 Arithmetic and Logic instructions
Objectives of this chapter
 Describing each types of instruction.
 Use data movement instructions to transfer the data
from the source to the destination.
 Explain each arithmetic instructions to perform
arithmetic operations like addition subtraction,
multiplication, division, etc
 Describing about logic instructions.
Introduction
 An instruction is a binary pattern designed
inside a microprocessor to perform a specific
function.
 The entire group of instructions that a
microprocessor supports is called Instruction Set.
 8086 has more than 20,000 instructions.
Types of instruction
 Data Movement Instructions
 MOV
 PUSH/POP
 Load-Effective Address
 String Data Transfers
 Arithmetic and Logic instructions
 Arithmetic Instructions
 Basic Logic Instructions
 Shift and Rotate
 String Comparisons
Data Movement Instructions
 These instructions are used to transfer data
from source to destination.
 The operand can be a constant, memory
location, register or I/O port address.
Data Movement Instructions(continued)
MOV Des, Src:
 Src operand can be register, memory location or
immediate operand.
 Des can be register or memory operand.
 Both Src and Des cannot be memory location at the
same time.
E.g.:
MOV CX, 037A H
MOV AL, BL
MOV BX, [0301 H]
Data Movement Instructions(continued)
PUSH instructions
 PUSH instruction always transfers 2-byte of data to the
stack.
 The source of data may be any internal 16-bit register,
immediate data, any segment register or, any 2-bytes of
memory data.
 Whenever data are pushed onto the stack,
i. First (Most-significant) data byte moves to the
stack segment memory location addressed by SP-1.
ii. Second (Least Significant) data byte moves into
the stack memory location addressed by SP-2.
PUSH instructions(cont’d)
PUSHA
 PUSHA (Push all) instruction copies the registers
to the stack in the following order :
AX, CX, DX, BX, SP, BP, SI and DI
 The value for SP that is pushed onto the stack is
whatever it was before the PUSHA in the stack.
PUSHF
 PUSHF (push flags) instruction copies the contents
of the flag register to the stack.
POP instructions
POP
 POP instruction performs the inverse operation of a
PUSH instruction.
 The POP instruction removes data from stack and
places it into the target 16-bit register, segment
register or, 16-bit memory location.
i. Least Significant byte of data is removed from
SP
ii. Most Significant byte is removed from
stack segment memory location addressed by
SP+1.
POP instructions(cont’d)
POP instructions(cont’d)
POPA
POPA (pop all) instruction removes 16 bytes of data
from stack and places them into the following
registers, in the order:
DI, SI, BP, SP, BX, DX, CX and AX
POPF
The POPF (pop flag) instruction removes 2-byte
number from the stack and places it into the flag
register.
Load-effective address
LEA
 The LEA instruction loads a 16-bit register with offset
address of the data specified by the operand
• Example: LEA BX, [DI] ; the operand address [DI]
is loaded into the register BX, not the contents of
address [DI].
 By comparing LEA with MOV, we observe that LEA
BX, [DI] loads the offset address specified by
[DI] (content of DI) into BX register; MOV BX, [DI]
loads the data stored at the memory location
addressed by [DI] into register BX.
Load-effective address(cont’d)
LDS
 LDS instruction load any 16-bit register with an offset
address & DS segment register with a segment address.
 Example: LDS BX, [DI] ; Loads DS and BX with
32bit content of data segment memory location [DI]
LES
 LES instruction load any 16-bit register with an offset
address and ES segment register with a segment
address.
 Example: LES BX, [DI] ; Loads ES and BX with
32bit content of data segment memory location [DI]
Load-effective address(cont’d)
Operation
of LDS BX,
[DI]
instruction
String Data transfer
Before discussing string data transfer instructions we
should know the followings:
Direction flag:
 Direction flag selects auto-increment (D=0) or the
auto-decrement (D=1) operation for the DI and SI
registers during string operations.
 CLD clears D flag (D=0) ; i.e. CLD selects auto-
increment mode.
 STD set D flag (D=1); i.e. STD selects auto-
decrement mode.
String Data transfer(cont’d)
DI and SI:
 DI offset address accesses data in the extra
segment(ES) for all string instructions.
 SI offset address accesses data, by default, in the
data segment(DS).
LODS/ LODSB/LODSW
 LODS (Load string) instruction loads AL or AX with
data stored at the data segment offset address index by
the SI register. (i.e. It loads contents of memory
pointed by DS:[SI] into AL or AX.)
 After loading AL with a byte or, AX with a word, the
content of SI increment, if D=0; or decrement if D=1.
 LODSB (loads a byte) instruction causes a byte to be
loaded into AL.
 LODSW (loads a word) instruction causes a word to
be loaded into AX.
LODS/ LODSB/LODSW(cont’d)
Example: LODSB ;
AL=DS: [SI] ; SI=SI+1
(if D=0) or SI=SI-1 (if
D=1)
LODSW ; AX=DS:
[SI]; SI=SI+2
(if D=0) or, SI=SI-2(if
D=1)
STOS/ STOSB/STOSW
 STOS (Store string) instruction stores AL or, AX at the
extra segment memory location addressed by the DI
register. (i.e. The content of AL or AX stored to
memory pointed by ES:[DI])
 STOSB (stores a byte) instruction stores the byte in AL
at the extra segment memory location addressed by DI.
 STOSW (stores a word) instruction stores AX in the
extra segment memory location addressed by DI.
Example:
STOSB ; ES:[DI]=AL ; DI=DI+1 (if D=0), DI=DI-1 (if D=1)
STOSW ; ES:[DI]=AX ; DI=DI+2 (if D=0), DI=DI-2 (if D=1)
MOVS
 Transfers byte/word from DS location addressed by SI
to the ES location addressed by DI.
 This is only memory-to-memory transfer allowed in the
8086 microprocessor.
 Like other string instructions, addresses incremented or
decremented checking the status of direction flag.
 Examples:
 MOVSB ; ES:[DI]=DS:[SI], DI=DI±1, SI=SI±1
(byte transferred)
 MOVSW ; ES:[DI]=DS:[SI], DI=DI±2, SI=SI±2
(word transferred)
XCHG
XCHG
 XCHG (exchange) instruction exchanges the contents
of a register with the content of any other register or
memory location.
 The XCHG instruction can not exchange segment
register or, memory to memory data.
 Example:
• XCHG AX, BX ; Exchanges the content of
AX with BX.
• XCHG [DI], AL ; Exchanges the content of
memory location [DI] with AL
IN and OUT
 IN and OUT instruction performs I/O operation..
 IN instruction transfers data from an external I/O
device into AL or AX; an
 OUT transfer data from AL or AX to an external I/O
device.
 Two forms of I/O device (port) addressing exist for IN
and OUT:
1. Fixed-port addressing allows data transfer between
AL or AX, using an 8-bit I/O port address.
 It is called fixed-port addressing because the port
number follows the immediate addressing.
IN and OUT (Cont.)
2. Variable port addressing allows data transfer b/n AL
or AX and a 16-bit port address stored in DX.
 It is called variable port addressing because I/O port
address stored in DX, which can be change (varied)
during execution of a program.
 Example:
 IN AL, 89H ; 8 bits are input to AL from I/O port 89H
(fixed port addressing)
 IN AL, DX ; 8 bits are input to AL from I/O port DX
(variable port addressing)
 OUT 89H, AX ; 16-bits are output to I/O port 89H from
AX (fixed port addressing)
IN and OUT (Cont.)
 OUT DX, AL; 8-bit data are output to I/O port DX
from AL (variable port addressing)
Operation of OUT 19H, AX instruction
Arithmetic instruction
This topic covers the following instructions:
 Addition (ADD, INC, ADC)
 Subtraction (SUB, DEC, SBB)
 Multiplication (MUL, IMUL)
 Division (DIV, IDIV)
Addition Instructions.
Addition appears in many forms in the
 Register addition
microprocessor.
 Immediate addition
 Memory to register addition
 Increment addition
 Addition-with-carry
Addition Instructions (Continued)
Register Addition
Register addition instructions are used to add the
contents of registers.
Example: ADD AL, BL ; AL=AL+BL
ADD CX, DI ; CX=CX+DI
Immediate Addition
Immediate addition is employed whenever constants
or known data are added.
Example: ADD CL, 44H ; CL=CL+44H
ADD BX, 245FH ; BX=BX+245FH
Memory to Register Addition
 Memory data can be added with register content.
Example:
 ADD CL, [BP] ; The byte content of the SS
memory location addressed by BP add to CL with
the sum stored in CL.
 ADD [BX], AL ; AL adds to the byte contents of the
DS memory location addressed by BX with the sum
stored in the same memory location.
N.B. * Data Segment is used by default
when BX, DI or SI is used to address
memory.
Increment Addition
 Increment addition (INC) adds 1 to any register or
memory location except a segment register.
 With indirect memory increments, size of the data must
be described by using the BYTE PTR, WORD PTR or,
DWORD PTR assembler directives.
 Example:
 INC BL ;BL= BL+1
 INC SP ; SP=SP+1
 INC BYTE PTR[BX] ; Add 1 to the byte contents of
the DS memory location addressed by BX.
Addition with carry (ADC)
 An addition with carry (ADC) instruction adds the
bit in the carry flag (CF) to the operand data.
Example:
 ADC AL, AH ; AL=AL+AH+carry
 ADC DH, [BP] ; The byte content of the
stack segment memory location addressed
by BP add to DH with the sum stored in DH.
Changes of flag bits after addition:
 Changes bits by any Add instruction: Sign, Zero,
Carry, Auxiliary carry, parity and overflow flag.
Z = 0 (result not zero) Z=1(result zero)
C=0 (no carry) C=1(carry exist)
A=0 (no half carry) A= 1 (half carry exist)
S=0 (result positive) S=1 (result negative)
P=0 (Odd parity) P=1 (even parity)
O=0 (no overflow) O= 1 (overflow occur)
Subtraction Instructions
Many forms of subtraction appear in the instruction
set.
 Register Subtraction
 Immediate Subtraction
 Decrement Subtraction
 Subtraction with Borrow
Subtraction Instructions (Continued)
Register Subtraction
Register subtraction instructions are used to subtract
the contents of registers.
Example: SUB AL, BL ; AL=AL-BL
SUB CX, DI ; CX=CX-DI
Immediate Subtraction
Immediate subtraction is employed whenever
constants or known data are subtracted.
Example: SUB CL, 44H ; CL=CL-44H
SUB BX, 245FH ; BX=BX-245FH
Memory to Register Subtraction
Memory data can be subtracted from register content.
Example:
• SUB [DI], CH ; Subtract CH from the byte content
of data segment memory addressed by DI and stores
the result in same location.
• SUB CH, [BP] ; Subtract the byte contents of the
stack segment memory location addressed by BP
from CH and the result stored in CH.
N.B. * Data Segment is used by default when BX, DI or SI is used to address memory.
* If the BP register addresses memory, the stack segment is used by default.
Decrement Subtraction
Decrement subtraction (DEC) subtract 1 from a
register or memory location except a segment
register.
With indirect memory increments, the size of the
data must be described by using the BYTE PTR,
WORD PTR or, DWORD PTR assembler directives.
Example:
DEC BL ;BL= BL-1
 DEC SP ; SP=SP-1
DEC BYTE PTR[BX] ; Subtracts 1 from the byte
contents of the data segment memory location
addressed by BX.
DEC WORD PTR[BP] ; Subtracts 1 from the word
content of the stack segment memory location
addressed by BP
Subtraction with Borrow (SBB)
 A subtraction with borrow (SBB) instruction
functions as a regular subtraction, except that the
carry flag (C), which hold the borrow, also
subtracts from the difference.
Example:
 SBB AL, AH ; AL=AL-AH-carry
 SBB DH, [BP] ; The byte content of the data
segment memory location addressed by BP
subtracted from DH and result stored in DH.
N.B. Immediate subtraction from a memory location
requires BYTE PTR, WORD PTR directives.
Example:
• SBB BYTE PTR[DI], 3 ; both 3 and carry subtract
from data segment memory location addressed by
DI
Multiplication Instructions
In 8086 multiplication is performed on bytes (8-bit) and
words (16-bit) and can be signed integer (IMUL) or
unsigned integer (MUL).
If two 8-bit numbers are multiplied, they generate 16-bit
product; if two 16-bit numbers are multiplied they
generate 32-bit product.
Some flag bits ,O (overflow) and C (carry) changes
when multiply instruction executes and produce
predictable outcomes.
The other flag also change, but their results are
unpredictable and therefore are unused
Multiplication Instructions (Continued)
8-bit multiplication (signed and unsigned)
 Multiplicand is always in AL register
 Multiplier can be any 8-bit register or any memory
location.
 Product is placed in AX register.
 Unsigned multiplication uses MUL instruction and
signed multiplication uses IMUL instruction.
Example:
• MUL CL ; AL is multiplied by CL, the unsigned
product is in AX
• IMUL DH ; AL is multiplied by DH, the signed
product is in AX
• IMUL BYTE PTR[BX] ; AL is multiplied by
byte contents of the DS memory location
addressed by BX, the signed product is in AX.
16 –bit multiplication
 Multiplicand stay in AX.
 Multiplier can stay any 16-bit register or memory
location.
 32-bit product appear in DX-AX.
 The DX register always contains the most
significant 16 bits and AX contains the least
significant bits of the product.
Example:
• MUL CX ; AX is multiplied by CX, the unsigned
product is in DX-AX
• IMUL DI ; AX is multiplied by DI, the signed product
is in DX-AX.
• MUL WORD PTR[SI]; AX is multiplied by the word
content of data segment memory location
addressed by SI, the unsigned product is in DX-AX
Division Instructions
 Unsigned division use DIV instruction and signed
division use IDIV instruction.
 Dividend is always double-width dividend that is
divided by the operand. This means that an 8-bit
division divides a 16-bit number by an 8-bit; a 16-
bit division divides a 32-bit number by a 16-bit
number.
Division Instructions (Continued)
8-bit Division
 Dividend (which is divided by value) always
stored in AX.
 The dividing content is stored in any 8-bit register
or memory location.
 The quotient moves into AL division.
 Reminder stored in AH register.
Example:
• DIV CL ; AX is divided by CL, the unsigned quotient
is in AL and the unsigned reminder is in AH.
• IDIV BL ; AX is divided by BL, the signed quotient is
in AL and the signed reminder is in AH
• DIV BYTE PTR[BP] ; AX is divided by the byte
content of the stack segment memory location
addressed by BP, the unsigned quotient is in AL and
unsigned remainder is in AH
16-bit division
 Dividend always stored in DX-AX.
 Dividing content is stored in 16bit register/memory.
 The quotient appears in AX.
 Reminder appears in DX register.
Example:
• DIV CX ; DX-AX is divided by CX, the unsigned
quotient is in AX and unsigned remainder is in DX.
• IDIV WORD PTR[SI] ; DX-AX is divided memory
addressed by SI, the signed quotient is in AX and
the signed remainder is in DX
Basic Logic Instructions
• AND
• OR
• Exclusive OR (XOR)
• NOT
• TEST
• NEG
AND Instruction
 AND operation performs logical Multiplication.
 AND operation clears bits of a binary number. The
task of clearing a bit in a binary number is called
masking.
 AND instruction uses any addressing mode except
memory to memory and segment register
addressing
AND Instruction(cont’d)
OR Instruction
 OR operation performs logical addition and is often
called the Inclusive-OR function
OR Instruction(cont’d)
Example:
OR AH, BL ; AH= AH or BL
OR DX, [BX] ; DX is Or with the word contents of
data segment memory location addressed by BX
Exclusive-OR Instruction
The exclusive-OR instruction produces 1 when input
logics are different otherwise it produces 0.
Exclusive-OR Instruction(cont’d)
Example: XOR CH, DL ; CH= CH xor DL

XOR DX, [SI] ; DX is exclusive-Or with the
word content of the data segment memory location
addressed by SI.
TEST Instruction
TEST instruction performs AND operation.
The difference is that AND instruction changes the
destination operand, but TEST instruction does not.
TEST used to add operands to update zero flags
without affecting operands.
It only changes zero flag (Z) bit.
The zero flag (Z) is a logic 1 (indicating a zero
result) if the bit under test is a zero and Z=0
(indicating a nonzero result) if the bit under test is
not zero.
TEST Instruction(continued)
Usually TEST instruction is followed by either JZ
(jump if result zero, Z=1) or, JNZ (jump if result not
zero, Z=0) instruction.
Example: TEST DL, DH ; DL is AND with DH.
TEST AH, 4 ; AH is AND with 4
NOT
 NOT instruction performs logical inversion (invert all
bits of a byte or word) or find the one’s complement
Example:
 NOT CH ; CH is one’s complemented
 NOT BYTE PTR[BX] ; The byte contents of data
segment memory location addressed by BX are
one’s complemented
NEG
 NEG instruction performs arithmetic sign inversion
or, the two’s complement.
 The arithmetic sign of a signed number changes
from positive to negative or from negative to
positive by NEG instruction
Example:
• NEG CH ; CH is two’s complemented.
• NEG AX; AX is two’s complemented.
SHIFT and ROTATE instructions
 SHIFT and ROTATE instructions are used to
move
or rotate any memory data or register.
 All of the Shift and Rotate instructions affect
Overflow and Carry Flags.
SHIFT and ROTATE instructions (continued)
SHIFT Instruction
 Shift instructions position or move numbers to the
left or right within a register or memory location.
 They also perform simple arithmetic such as
multiplication by powers of 2+𝑛 (𝑙𝑒𝑓𝑡 𝑠ℎ𝑖𝑓𝑡) and
division by powers of 2-𝑛 (𝑟𝑖𝑔ℎ𝑡 𝑠ℎ𝑖𝑓𝑡).
 The microprocessor instruction set contains four
different shift instruction.
 Two logical shift :
• (a) Shift operand bits left (SHL)
• (b) Shift operand bits right (SHR)
 Two arithmetic shift:
• (c) Shift arithmetic Left (SAL)
• (d) Shift arithmetic Right (SAR)
Logical shifts (SHL and SHR):
 The logical shifts move a zero into the rightmost bit
position for a logical left shift and a 0 into the
leftmost bit position for a logical right shift.
 MSB is shifted to CF in case of SHL and LSB
shifted to CF in case of SHR.
 Example:- The following instruction sequence shifts
the BL once to the left, with the highest bit copied into
the Carry flag and the lowest bit cleared:
mov bl, 8Fh ; BL = 1000111b
shl bl, 1 ; BL = 00011110b, CF = 1
Example:- The following instruction sequence shifts the
AL once to the right, with the lowest bit copied into the
Carry flag and the highest bit cleared:
Arithmetic shifts (SAL and SAR):
 Arithmetic left shift and logical left shift are identical.
 The arithmetic right shift and logical right shift are
different because the arithmetic right shift copies the
sign bit through the numbers, where as logical right
shift copies a 0 through the numbers.
Arithmetic shifts (SAL and SAR):(Contined)
Example:-The following instruction sequence shifts
the AL once to the right, with the lowest bit copied
into the Carry flag and the sign bit copied to the right:
MOV AL, F0h ; AL = 11110000b = -16
SAR AL, 1; AL=11111000b = -8
CF = 0
Logical VS Arithmetic Shift:
 Logical shift operations function with unsigned
numbers and arithmetic shifts function with signed
numbers.
 Logical shifts multiply or divide unsigned data, and
arithmetic shifts multiply or divide signed data.
 Two different modes used in shift counting:
 One modes uses an immediate shift count and
 other uses register CL to hold the shift count. Note
that CL must hold the shift count.
Division by SHIFT instructions: A shift right always
divides by 2 for each bit position shifted. Two times
right shifting divides by 4. For n times right shift the
number is divided by 2-𝑛.
Multiplication by SHIFT instructions: A shift left
always multiplies by 2 for each bit position shifted. Two
times left shifting multiplies by 4. For n times left shift
the number is multiplied by 2𝑛
ROTATE instruction
 Rotate instructions position binary data by rotating
the information in a register or memory location,
either from one end to another or through the carry
flag.
 There are four available rotate instructions:
1. Rotate out of carry left (ROL)
2. Rotate out of carry right (ROR)
3. Rotate through carry left (RCL)
4. Rotate through carry right (RCR)
ROL Instruction
 The ROL instruction shifts each bit to the left,
with the highest bit copied in the Carry flag and
into the lowest bit.
• The instruction format is:
• ROL destination, bits_shifted
ROL Instruction(continued)
 Example:-The following instruction sequence shifts
the AL three times (once each) to the left, with the
highest bit copied into the Carry flag and into the
lowest bit:
ROR Instruction
 The ROR instruction shifts each bit to the right,
with the lowest bit copied in the Carry flag and
into the highest bit.
 The instruction format is:
• ROR destination, bits_shifted
ROR Instruction(continued)
 Examples:-The following instruction sequence
shifts the AL three times (once each) to the right,
with the lowest bit copied into the Carry flag and
into the highest bit:
RCL Instruction
 The RCL (Rotate and Carry Left) instruction shifts
each bit to the left, copies the Carry flag to the
least significant bit and copies the most significant
bit into the Carry flag.
 Example
RCR Instruction
 The RCR (Rotate and Carry Right) instruction
shifts each bit to the right, copies the Carry flag to
the most significant bit and copies the least
significant bit into the Carry flag.
 Examples, STC ;CF=1
MOV AH, 10H ;CF=1, = AH=00010000B
RCR AH, 1 ;CF = 1 AL = 10001000B
RCR AH, 1 ; CF = 0 AL = 01000100B
Problem:
a. AX=0F07H and BX=6644H, find the value of AX
and BX after the execution following with CF=1
MOV CL, 4;
RCL AX, CL;
ROR BX, CL
b. AX=0F07H and BX=6644H, find the value of AX
and BX after the execution following
SHL AX, 4
SAR BX, 3
End of chapter four
Question?
Reading assignment:-
 String Comparisons
 BCD Arithmetic (DAA, DAS)

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