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Hall Ticket No.

: SRIT R19

SRINIVASA RAMANUJAN INSTITUTE OF TECHNOLOGY


(AUTONOMOUS)
II B. Tech II Sem – Semester End Examinations – Supplementary – Mar 2022
DIGITAL ELECTRONICS AND IC APPLICATIONS
[194GA02404]
(Electrical & Electronics Engineering)
Time: 3 hours Max. Marks: 70

PART-A
(Compulsory Question)
***
1 Answer the following: (10 X 02 = 20 Marks)
a) Convert (4567) 10 to base 2.
b) Convert (2468)10 to (?)16.
c) What are the advantages of tabulation method over K -map?
d) Design a NOR gate.
e) Define multiplexer.
f) Define encoder and decoder.
g) What are the advantages of Universal shift register?
h) What is race around condition?
i) List out ideal and practical characteristics of Op-amp.
j) Draw the V to I converter.

PART-B
(Answer all five units, 5 X 10 = 50 Marks)

UNIT-1
2 a) Find the complement of the Boolean function and reduce into minimum number of [5M]
literals. (b’ d+ a’ b c’ +a c d+ a’ b c).
b) Perform the subtraction using 1’s complement and 2’s complement methods. [5M]
i) 11010 – 10111
ii) 11000 – 1010
iii) 1110 – 110000
(OR)
3 a) Perform the given operation on the following numbers without converting them into [5M]
decimal.
i) (15B)16 + (C7)16 = (?)16
ii) (11011)2– (10001)2 =(?)2
b) Perform the following operations using r-1`s complement arithmetic: [5M]
i) (+43)10 – (– 53)10
ii) (3F85)16 – (1E73)16.

UNIT-2
4 a) Explain tabulation method and simplify the following Boolean function by using [5M]
tabulation method, F=Σ(0,1,2,8,10,11,14,15).
b) Convert the given expression in standard SOP form f(A,B,C)=AC+BA+BC. [5M]
(OR)
5 a) Simplify the given Boolean expression using K-map and implement it by using NOR [5M]
gates. F(W,X,Y,Z)=w’x’y’z’ + wxy’z’ + w’x’yz + wxyz.
b) Represent and draw the logic circuit for the given function using minimum number of [5M]
basic gates (AB + AB’) (AB)’.

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UNIT-3
6 a) Design a full adder circuit and draw its logic circuit. [5M]
b) Define decoder. Construct 3x8 decoder using logic gates and truth table. [5M]
(OR)

7 a) Design 8x1 multiplexer using 2x1 multiplexer. [5M]


b) Draw the circuit diagram of a 4-bit adder-subtractor and briefly describe its functional [5M]
principles.
UNIT-4
8 a) Draw the logic diagram of a SR latch using NOR gates. Explain its operation using [5M]
excitation table.
b) Construct a JK flip flop using a D flip flop. [5M]
(OR)
9 a) Draw the logic diagram of a JK flip flop and using excitation table explain its operation. [5M]
b) Draw the schematic circuit of SR flip flop. Explain its functionality. [5M]
UNIT-5
10 a) What is a practical Op-amp? Draw its equivalent circuit. [5M]
b) Draw the Instrumentation amplifier and explain its operation in detail. [5M]
(OR)
11 a) Explain the terms: [4M]
i) Input & Out put Off set voltages & currents,
ii) Slew rate
iii) CMRR
iv) PSRR.
b) Explain how an op-amp can be used as integrator? Also derive expression for the output. [6M]
*****

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