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25.10.2021
Dr.-Ing. Christoph H. van der Broeck
Channel current in A
□ Conduction characteristics
□ Transient characteristics
■ Device (IGBT + Diode)
■ Package and driver
Current density distribution at 1 MHz excitation Current density distribution at 1MHz excitation
■ Example: Operation with AC current ■ Average loss computation over excitation period
□ Instantaneous loss computation (every PWM cycle)
■ Example: Operation with AC current ■ Average loss computation over excitation period
□ Instantaneous loss computation (each PWM cycle)
Conduction
characteristics
Turned-on
Channel current in A
Turned-off
Saturation Region
→ Transfer characteristics
Cres = Cgc
Capacitor characteristics
Gate resistance
Gate voltage IC
→ provides voltage
More information on gate drivers in next section
■ Voltage slopes
■ Losses and loss energies © PMK 2019
■ Measurement
Commutation inductance
□ For realistic measurements the commutation cell
must not be changed compared to the converter
□ Device current measurement is challenging
■ Shunt
− Adds to commutation inductance Ls
■ Rogowski coil
− Only extracts di/dt
− Correct dc-current must be reconstructed
150
Channel current in A
100
50
150
Channel current in A
100
50
150
Channel current in A
100
50 C
150
Channel current in A
100
D
50 C
Gate plateau
150
Channel current in A
100
D
50 C
Gate plateau
150
Channel current in A
100
E D
50 C
150
Channel current in A
100
E D
50 C
150
Channel current in A
100
50
150
Channel current in A
100
B
50
150
Channel current in A
100
B C
50
iCout
Gate plateau
150
Channel current in A
100
B C
50
iCout
Gate plateau
150
Channel current in A
100
B C
50 D
150
Channel current in A
100
B C
50 D
■ IGBT switching operation at different load currents ■ Loss energy and losses
□ Turn-on and turn-off loss are proportional to load current
■ Diode switching operation at different load currents ■ Loss energy and losses
□ Very small diode turn-on losses
□ Diode turn-off losses due to reverse recovery effect
■ Much smaller than IGBT switching losses
■ Nearly linear with current Diode turn-off loss energy
Diode turn-off transition
S2
■ Gate resistance
□ Key design variable to control
switching transition
■ Design objectives
□ Current slope
■ Smaller Rg
increases di/dt
□ Voltage slope
■ Smaller Rg
increases du/dt
■ Gate resistance
□ Key design variable to control
switching transition
■ Design objectives
□ Current slope
■ Smaller Rg
increases di/dt
□ Voltage slope
■ Smaller Rg
increases du/dt
~1kV/ms ~3kV/ms
■ Key functions
□ Amplification Gate-Signal
□ Isolation
□ Device protection
□ Smart control and sensing 𝑢GS
■ The most used power semiconductor switches show capacitive characteristics at their gate
□ IGBTs (Insulated Gate Bipolar Transistor)
□ MOSFETs (Metal Oxide Semiconductor Field Effect Transistor)
MOSFET IGBT
𝐶GD 𝐶GC
𝐶DS 𝐶CE
𝐶GS 𝐶GE
Lgs
■ Gate drive design
□ Minimize area between traces
to optimize 𝐿𝜎1 and 𝐿𝜎2
□ Ensure sufficient damping D
Magnetic field
Power in mW
□ Where:
■ 𝑃GD Output = Gate driver output Power 200
isolation capacitance
□ Currents are induced through the coupling
capacitances of the supply isolation
𝐶CM
■ Typical coupling capacity of gate supplies:
□ IGBTs: ~45 pF 𝐶OSS,HS
□ SiC MOSFETs: < 15 pF
■ Examples for imposed currents:
d𝑈 𝐶CM 𝐶OSS,LS
■ 𝐼max = 𝐶coupling × d𝑡
5 kV
− 𝐼max, 𝐼𝐺𝐵𝑇 = 45 pF × = 225 mA
μs Signal Layer Signal Layer
80 kV Supply V+ Supply V+
− 𝐼max, SiC = 15 pF × = 1200 mA Signal Layer Supply V-
μs
GND GND
■ Ensure layout leaves sufficient gap Forbidden zone
□ Working principle
■ Safe deactivation of power device via gate circuit UVLO-Limit
□ Feature
■ Reliable operation during power up and down sequences Gate-Signal
■ Protection against switching with low gate voltage
𝑉GS
− Increased device losses
− Can cause failure due to operation in the linear region
■ Dead-time insertion CPLD contains programmable
logic for dead-time insertion
□ Working principle
■ Logic ensures minimal blanking-time (typ. 2-3ms for IGBTs)
□ Feature
■ Prevents shoot through caused by
− False commands
− Corrupted signals or EMI
uce
1
ice
2
■ “Active-clamping” - Working principle Short circuit current turn-off with (left) and without (right) “Active Clamping”
□ Fast turn-off of large currents/short circuit currents
leads to overvoltage that can destroy the device
■ Overvoltage caused by commutation inductance Ls
□ TVS Diodes break down if dc-link voltage + margin is
exceeded and charge gate
□ Current slope dice/dt and thus overvoltage is reduced
■ Implementation
□ Feedback path with TVS diode and Implemented by multiple diode to
reverse diode that blocks at turn on withstand voltage
■ Features
□ Prevents overvoltage at device
□ Controls “safe” turn-off” of
short circuit currents
15 V
■ Negative gate voltage - Working principle 15 V
Cgc
□ Negative gate voltage ensures sufficient margin
to threshold voltage 0V
𝑈Supply +
𝑈G
𝑈Supply −
[1]
Electrical model includes all Switching transients and Gate drivers act as amplifier to
key component of the module losses can be manipulated by turn-on/off device and provide
❑ Devices (IGBTs and diodes) ❑ Gate resistance (du/dt + di/dt) ❑ Isolation of signals and supply
❑ Package parasitics + driver ❑ Module and converter design ❑ Device protection
25.10.2021
Dr.-Ing. Christoph H. van der Broeck