2021-10-18 - LECTURE-3 - Power Electronic Devices and Packaging

Power Electronics – Control, Synthesis, Applications (CSA)
Power Electronic Devices and Packaging
19.10.2021
Dr.-Ing. Christoph H. van der Broeck
Institute for Power Electronics

and Electrical Drives 1
Outline and Objective
PWM Converter
■ Power semiconductor materials and devices
□ Silicon devices - Diodes, MOSFETs, IGBTS
□ Wide-bandgap devices Power electronic package Power device
■ Key functions of power electronic packages

□ Electrical interface
□ Isolation capability
□ Thermal interface
□ Environmental protection
□ Mechanical integrity
□ Integration and assembly ■ Objective
■ Overview on different power electronic packages □ Review power semiconductor materials and
□ Discrete packages devices as well as their application range
□ Substrate packages with baseplate □ Get an overview on typical packages
□ PCB-integrated packages □ Understand key functions of electrical packaging
□ Press-pack packages □ Learn about design trade-offs to be made
2 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

Power Electronics (CSA) - Current Control of Power-Electronic Converters
Silicon power semiconductor materials and devices
Positive-intrinsic-negative doted diode (PIN)-Diode
■ Application range
□ 6.6 kV, 5000 A (via paralleling)
A
■ High voltage Blocking capability
□ Realized via low-doted (N-) region █
C
□ Higher voltage realized by wider (N-) region
𝑢 = න𝐸 ⅆ𝑥
■ Forward conduction
□ Approximation by constant voltage source UT and
Exemplarily forward characteristic Reverse recovery effect
resistive component RT
□ High current capability at low losses
■ Conductivity modulation
− The high the current the more charger carriers are
located in the (N-) region that increase conductivity
■ Reverse recovery effect (soft/snappy)
□ No instantaneous blocking at current zero-crossing
□ Charge carriers take time to recombine
Data-sheet inromation
■ Visible reverse-recovery current Irr and charge Qrr FS800R07A2E3B13 Infineon

Power Electronics (CSA) - Power Electronic Devices and Packaging
Schottky diodes
Schottky diode
■ Application range A
□ 200 V, 100 A
■ Voltage blocking capability C
Metall
□ Realized via metal to N-doted Si region Schottky Data-sheet
□ Maximal blocking voltages for Si range to 200 V N- Si
barrier information
DSA90C200HB
□ Comparatively large reverse current IXYS
□ Low forward voltage in comparison to Si PIN diodes
□ Very low conduction losses
■ Switching behavior
□ Ultra-fast switching transient
□ No reverse recovery effect
■ Application
□ Excellently suited for secondary side rectification at
lower voltages

Metal-oxide-semiconductor field-effect transistor (MOSFET)
□ 300-600 V, 1000 A (via paralleling)
S
■ Blocking capability G
□ Realized via PN junction and low-doted (N-) region

D
□ Applied gate voltage results in an inversion layer and
thus a conducting channel in the p-doted area
□ Typical MOSFET equation for saturation region holds General output characteristics Exemplarily output characteristic
□ No conductivity modulation
■ Resistive forward voltage characteristics █
− Not suited for high voltages requiring wide (N-) region
■ Reverse characteristics
□ PIN diode characteristics
Data-sheet information
■ Snappy dynamic behavior often prevents utilization IPB156N22NFD Infineon

Insulated-gate bipolar transistor (IGBT)
□ 600 V to 6.6 kV, 5000 A (via paralleling)
E
■ Blocking capability G

C
□ Gate voltage turns-on MOSFET in Darlington structure
□ MOSFET generates base current for PNP transistor
Darlington structure of the IGBT Exemplarily output characteristic
■ Conductivity modulation is ensured by PNP transistor
− IGBT is suited for high voltage/current devices
− Tail current due to recombination uge
□ MOSFET equation for saturation region holds for IGBT
■ Reverse characteristics
□ IGBT must not be operated with negative reverse voltage Data-sheet inromation
FS800R07A2E3B13 Infineon

Thyristors and IGCTs
□ 10 kV, 6000 A (via paralleling)
■ Blocking capability
□ Gate current must be large enough to latch the
npn and pnp structures of the Thyristor
■ Current conduction with low forward voltage Operation principle of a thyristor
drop and low conduction losses
□ Turn-off
■ Turn-off is not possible
■ Must wait for zero crossing of the current
■ IGCT
□ Thyristor structure with special gate and driver
□ Driver removes entire load current to stop latching
Thyristor Integrated Gate-Commutated Thyristor

Operation Range
■ Voltage and power range

□ MOSFET
■ Suited for applications with low voltages (U < 400 V)
□ IGBTs
MOSFET
■ Suited for applications with higher voltage (400 V <U < 6.6 kV)
□ Thyristor-based devices (e.g. IGCT)
■ Suited for high voltage and high power applications Schottky-Diode
■ Operation temperature
□ Silicon devices fail above a maximal junction temperatures in
the range of Tj,max = 150-175°C (data-sheet)
□ Packaging must dissipate heat such that Tj,max is not exceeded
■ Switching transients
□ MOSFETs switch typically faster than IGBTs, but this depends on Rule of thumb: Ur·Ir·fsw = const
■ Package parasitics
■ Gate driver

Wide bandgap power semiconductor materials and devices
What is the difference?
■ Wide bandgap semiconductors exhibit superior properties that

enhancing the operation range of power devices towards higher
□ Voltages
□ Temperatures
□ Switching frequencies
□ Efficiency
■ SiC Schottky diodes Ur = 1700 V
□ Replace Si-based PIN diodes in
many high efficiency applications
■ Silicon Carbide MOSFETs
□ Compete against IGBTs in a wide
application range Electrical property Si 4H-SiC
■ GaN Field-Effect Transistors Band gap energy (eV) 1.12 3.28
□ Replace Si-based MOSFETs in low voltage applications (U < 400V) Critical electric field (MV/cm) 0.29 2.5
Thermal conductivity (W/K) 1.5 3.8
The major drawback of wide-bandgap power semiconductors is cost Maximum junction temperature (°C) 150 600
Source: Fairchild Semiconductors - Overview of Silicon Carbide Power Devices

PWM Converter


Key Functions of Power Electronic Packages
Multidisciplinary Perspectives
■ Power electronic packages need to fulfill multiple

functions Electrical
■ Discussion based on widely-spread package
Interface
□ Substrate-based power module
Thermal Isolation
■ Hybridpack2 power module (Infineon)
Interface Capability
Environmental Mechanical
Protection Integrity
Integration
and
assembly


Interface
Thermal Isolation
Integration
and
assembly

Electrical Interface
■ Electrical interconnects must conduct current

□ Chips are soldered/sintered on DCB substrate with
copper surface that conducts the current
□ Aluminum bond wires interconnect chips with other
chips and substrate “islands”
■ Single bond has current capability of 5-10 A
− Multiple bond wires are paralleled Substrate with soldered and bonded chips


■ Packaging processes
□ Aluminum bonding Microsection of a bonded chip
■ Cold welding process that utilizes ultrasonic energy to

connect an aluminum wire of 100 μm to 500 μm
thickness to the Aluminum metallization of a chip
© Fraunhofer ISIT – Werstoffe der AVT/ECPE 2016

Source: Dissertation C. Neeb


□ Soldering Microsection of a bonded chip
■ Two metal surfaces are connected by a liquid metal

alloy at a temperature of ~ 250°C
− Single atoms of solder diffuse into the metal surfaces and
create a thin composition layer of solder and metal
■ Low melting point ~ 250°C
− Interface degrades if exposed to temperature cycles
■ To ensure a void-free solder interface, the soldering
must be conducted in a vacuum © Fraunhofer ISIT – Werstoffe der AVT/ECPE 2016


□ Chips are soldered/sintered on substrate with
■ Single bond wire has limited current capability
□ Diffusion sintering (high melting point ~ 900°C) Microsection of a sinter chip
■ At around 250°C a fine silver paste is sintered under

high pressure to form a low-porous silver bond layer
■ High melting point ~ 900°C
− Stronger capability of thermal cycles than solder
■ Only interconnection of precious metals possible
− Requires metallization with e.g. silver/gold
Source: Dissertation C. Neeb

Location of the devices and commutation path within the HP2 power module
■ Package exhibits parasitic elements that have a
strong impact on the switching process
□ Parasitic capacitances
□ Parasitic inductances
→ Modeling and discussion in next lecture
Surface areas forming Current paths resulting in

parasitic capacitances parasitic inductances
Source: Dissertation G. Englemann


Interface
Thermal Insulation
Integration
and
assembly

Insulation Capability
■ Package must provide insulation of the

high voltage components
□ Direct copper bond (DCB) substrate ensures DCB
insulation via its ceramic layer
■ DCB exhibits three layers
− Copper
− Ceramic (Al2O3/AlN)
− Copper Ceramic substrates for power Insulation voltages for different
electronic modules before cutting insulating substrates
■ The metal / ceramic connection is made at
temperatures of just above 1063°C with the
Isolation voltage
aid of low-viscosity copper
□ Al2O3/AlN ceramic can effectively provide the
insulation that is required for low and medium
voltage power modules up to 10 kV
© Ferrotec Corporation
© Semikron– Application Manual
Power Semiconductors 2016


Interface
Thermal Insulation
Integration
and
assembly

Thermal Interface
Rth,i
■ A power module must dissipate losses from
….
the power devices to the coolant
□ Keep junction temperature below Tj,max Tj
Ploss
Tj = Ploss · Rth,S
■ Thermal interface limits power capability
− Ploss ∝ Iconv
Cross section of the Hybridpack2 power module (Infineon)

Thermal Interface
Rth,i
….
Ploss
Tj = Ploss · Rth,S
■ Measures for high power capability
□ Ensure strong heat spreading below chips Vertical temperature gradient Thermal conductivity of typical
■ Optimize copper layer thickness packaging materials
□ Improve thermal resistance of each layer
T in K
■ Use AlN substrate instead of Al2O3 Heat
Substrate materials
spreading
Ceramic layer and
v in m/s
heat sink exhibit
highest temperature
drop
© Infineon, ECPE Workshop – Aufbau und Verbindungstechnik in der

Leistungselektronik 2015

Thermal Interface
Rth,i
….
Ploss
Tj = Ploss · Rth,S
■ Measures for high power capability
□ Ensure strong heat spreading below chips Vertical temperature gradient Characteristics of the heat sink
■ Optimize copper layer thickness
□ Improve thermal resistance of each layer
T in K
■ Use AlN substrate instead of Al2O3 Heat
spreading
■ Improve convection process
Ceramic layer and
v in m/s
heat sink exhibit
highest temperature
drop

Thermal Interface

□ Keep junction temperature below Tj,max
Tj = Ploss · Rth,S
■ Transient heat dissipation is very

important to handle dynamic losses
□ E.g. switching losses, AC currents
■ Measures for transient device losss
dissipation
□ Provide thermal capacitance close
to the power devices
■ DCB copper layer exhibits a high
thermal capacitance
□ Optimize copper layer thickness


Interface
Thermal Insulation
Integration
and
assembly

Mechanical integrity
Displacement after passive heating
■ Power electronic packages must provide a
Z-axis displacement in mm
strong mechanical integrity to …
□ … conduct currents with low parasitic resistance
□ … dissipate heat with specified performance
throughout its entire lifetime
■ Fatigue degrades mechanical integrity
□ Dominant fatigue modes result from thermal cycles Coefficient of thermal expansion of typical packaging materials
□ CTE mismatch + Cyclic thermal load

■ Thermally induced plastic strain at critical
material interfaces Thermally induced strain: e = DT · a

■ Power electronic packages must provide a

strong mechanical integrity to …
□ … conduct currents with low parasitic resistance
□ … dissipate heat with specified performance
throughout its entire lifetime
■ Fatigue degrades mechanical integrity
□ Dominant fatigue modes result from thermal cycles Coefficient of thermal expansion of typical packaging materials
□ CTE mismatch + Cyclic thermal load

■ Thermally induced plastic strain at critical
material interfaces Thermally induced strain: e = DT · a

■ Fatigue process
□ Low cycle fatigue
□ Crack initiation
□ Crack growth & delamination
■ Locations of critical degradation
□ Bondwire lift-off █
□ Solder delamination █
□ Reconstruction of metallization █
■ Measures for high power modules
with high reliability
□ Reliability-oriented design
■ Oversize components
□ Use improved interfacing
technologies, e.g. sintering Reliability and Lifetime of Power Modules Tutorial: Industry Best Practices in Reliability Prediction and
Assurance for Power Electronics, M. Thoben, Infineon Technologies, Max Planck Str. 1, D-59581 Warstein
□ Apply real-time diagnosis methods


Interface
Thermal Insulation
Integration
and
assembly

Environmental Protection
Silicone-based gel “soft mould
■ Power devices and interconnects must be
protected from environmental stress
□ Corrosion caused by
■ Humidity
■ Sulfuric atmosphere
can deteriorate and break electrical interface e.g.
Molding process of a power module
substrate, bond wires
□ Impurities, dust and dirt
■ Can lead to voltage flash-overs at the proximity of Environmental Mechanical
the chips and destroy the converter Protection Integrity
■ Measures for environmental protection
□ Apply mold mass around the devices, interconnects
and the substrate to reduce impact of corrosion and
impurities
□ Detect humidity via sensors
Quelle: Wacker Chemie AG


Interface
Thermal Insulation
Integration
and
assembly

Integration and assembly
■ Interfaces for integration and assembly

□ Electrical connection
■ Screws
■ Press contacts
□ Coolant supply 2012
■ Thermal management system • fsw = 16 kHz
• Si-Module
• classic cooler and
inductances


■ Screws
■ Press contacts
□ Coolant supply
■ Thermal management system
■ Standardized power module interfaces
□ Customer does not to redo a converter
Econo Package Family (Infineon) Semitrans Package Family (Semikron)
design entirely if he switches to
the next generation power device
Source: Infineon Source: Semikron


■ Screws
■ Press contacts
□ Coolant supply 2012
■ Thermal management system • fsw = 16 kHz
• Si-Module
■ Standardized power module interfaces • classic cooler and
■ Compact assembly for many applications, inductances
2016
especially automotive and aerospace 25 • fsw = 150 kHz
□ Enables by multi-physics integration of power 20 • SiC-Module
• classic cooler
electronic components
kW / kg
15 and inductances
■ Power module
10 2018
■ Passives and filters
5 • fsw = 400 kHz
■ Coolant system • discrete SiC devices
■ Electronics, Control and Measurement 0 • 3D-printed cooler
2010 2015 2020 and inductor bobbin

PWM Converter


Overview on different power electronic packages
Discrete packages
Decapsulated TO247 package Overview on discrete packages

■ Features of discrete packages
□ Attach the device to a lead frame that provides
■ Electrical contact
■ Heat spreading
□ Electrical interface is provided via bond wires
□ Power device is capsulated by a “hard” mold mass
■ Applications
□ Mounting on PCBs TO247 packages attached to a
3D-prineted heat sink
□ Lower and medium power applications
■ Limitations
□ Galvanic isolation is not provided by discrete packages Internal structure of a TO247 package
■ Thermal interface materials (TIMs) are used as isolation
to contact the device to a heat sink
■ TIMs exhibit a weak thermal
conductivity, which limit the applicability
of discrete packages at higher power
PCB

Substrate packages with baseplate
■ Features of substrate packages with base plate

□ Power module exhibits baseplate that is mounted on
the heat sink with a thermal interface material (TIM)
■ TIM eliminates air voids between the material
surfaces and improves the thermal contact
□ Allows a flexible converter design
■ Applications (widely used)
□ Industrial and traction applications
□ Grid an power supply applications

Substrate packages with baseplate
■ Features of substrate-based packages with base plate

□ Power module exhibits baseplate that is mounted on
the heat sink with a thermal interface material (TIM)
■ TIM eliminates air voids between the material
surfaces and improves the thermal contact
□ Allows a flexible converter design
■ Applications (widely used)
□ Industrial and traction applications
□ Grid an power supply applications
■ Challenges and limitations
□ TIM has a weak thermal conductivity
■ Critical to use the right thickness
□ Total thermal resistance of substrate-based
packages with base plate is typically higher
compared to power modules without base-plate

PCB-integrated packages
■ Features of PCB-integrated packages

□ Power devices are integrated inside a printed circuit board (PCB)
□ Ultra low-inductive packages
■ Enables fast switching with minimal overvoltage and losses
□ Assembly of gate drivers, sensors and controls on the PCB
■ Ideally suited for
■ Application
□ Highly-integrated power electronic systems
■ Limitations Turn-off transient
□ Heat dissipation
□ Long term reliability
are inferior compared to substrate based power modules

Press-pack packages
■ Features of press-pack packages

□ Chip is pressed between two contact elements with high pressure
to establish an electrical and mechanical contact instantaneously
□ Double-sided cooling
□ Defined failure behavior
■ Device failure always results in a short circuit
□ Technology
■ Chips must be smaller than contacts to leave distance to the
passivation layer of the devices
■ Molybdenum disks avoid pressure peaks at the chip edges
− CTE of Molybdenum is similar to Si
■ Application
□ High power converters, HVDC
■ Limitations
□ At a metal-to-metal surface no more than 30-50% Quelle: U. Scheuermann, Semikron - ECPE Cluster Schulung AVT
of the surface contribute to thermal conduction
Summary
■ Power devices ■ Packages fulfill various ■ Typical packages

□ Diode functions in many domains □ Substrate-based power module
■ Conductivity modulation yields low □ Discrete package
voltage drop
□ Substrate packages with baseplate
■ Reverse recovery effect
□ PCB-integrated packages
□ MOSFET
□ Press-pack packages
■ Resistive forward characteristics
□ IGBT
■ Conductivity modulation yields low
voltage drop
■ Tail-current

Power Electronics – Control, Synthesis, Applications (CSA)
Power Electronic Devices and Packaging
19.10.2021
Dr.-Ing. Christoph H. van der Broeck
Institute for Power Electronics

and Electrical Drives 42

2021-10-18 - LECTURE-3 - Power Electronic Devices and Packaging

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Power Electronics – Control, Synthesis, Applications (CSA)

Power Electronic Devices and Packaging

Institute for Power Electronics

■ Key functions of power electronic packages

2 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

3 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

4 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

□ Realized via PN junction and low-doted (N-) region

5 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

□ Realized via PN junction and low-doted (N-) region

6 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

7 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

■ Voltage and power range

8 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

■ Wide bandgap semiconductors exhibit superior properties that

Source: Fairchild Semiconductors - Overview of Silicon Carbide Power Devices

9 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

■ Key functions of power electronic packages

10 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

■ Power electronic packages need to fulfill multiple

11 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

■ Power electronic packages need to fulfill multiple

12 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

■ Electrical interconnects must conduct current

13 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

■ Electrical interconnects must conduct current

■ Cold welding process that utilizes ultrasonic energy to

© Fraunhofer ISIT – Werstoffe der AVT/ECPE 2016

14 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

■ Electrical interconnects must conduct current

■ Two metal surfaces are connected by a liquid metal

15 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

■ Electrical interconnects must conduct current

■ At around 250°C a fine silver paste is sintered under

16 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

Surface areas forming Current paths resulting in

Source: Dissertation G. Englemann

17 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

■ Power electronic packages need to fulfill multiple

18 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

■ Package must provide insulation of the

19 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

■ Power electronic packages need to fulfill multiple

20 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

Cross section of the Hybridpack2 power module (Infineon)

21 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

□ Improve thermal resistance of each layer

Ceramic layer and

© Infineon, ECPE Workshop – Aufbau und Verbindungstechnik in der

22 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

Ceramic layer and

23 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

■ A power module must dissipate losses from

■ Transient heat dissipation is very

24 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

■ Power electronic packages need to fulfill multiple

25 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

□ CTE mismatch + Cyclic thermal load

26 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

■ Power electronic packages must provide a

□ CTE mismatch + Cyclic thermal load

27 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck

28 19.10.2021 | Dr.-Ing. Christoph H. van der Broeck