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W WW 00Y.CO .TW W
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WW 00Y.CO .TW W W WW 00Y.CO .TW
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WW .100Y W W .100 M.T
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W O M.T W .C O W W.1 Y.COM W
WW .100Y.C M.TW WW Data 0Y
.10Sheet M.T
W W .100 1998 M.T File Number 1049.3
W O W O W W
September .C O
WW .100Y.C M.TW WW .100Y.C M.TW W .100
Y
M.T
W
W O W C O
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WW .100Y.C M.TW
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WW .100Y.C M.TW WW .100Y. M .TW
W O W O
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WW BiMOS 0
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Y.CDual Voltage .T W WW .100Y.C M.TW Features
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WW .100Y.C M.TW
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WW .100Y.C M.TW 00Y PART M.TW TEMPo W W.100
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W O W O W O
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WW .100Y.C M.TW 00Y
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WW .100Y.C M.TW WPACKAGE 1 .
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WW .100Y.C M.TW WW .100Y.C M.TW
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OM WW 00Y.CO .TW WW .100Y.C M.TW
WW .100Y.C M.TW (ONLY ONEW .1 M
W W .C O
W WW 00Y.CO .TW
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W FOR CURRENT
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W W 9 Y.CO10 Q 11 Q 12
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WW .100Y.C M.TW
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WW .100Y.C M.TW 100kΩ
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W
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V-

1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
 W.1 Y.COM W . WW 00Y.CO .TW
W WW 00Y.CO .TW W
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WW .100Y W W .100 M.T
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WW .10Absolute .TW Ratings
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W Y .C W W W TEMP
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W . C W W Y .C W W 0 0 .TW
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2
 W.1 Y.COM W . WW 00Y.CO .TW
W WW 00Y.CO .TW W
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WW 00Y.CO .TW W W WW 00Y.CO .TW
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WW .100Y.C M.TW 00Y .TW( C) MINW TYP 100
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W Y .C W W 0 Y .T W W 0 0
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W.1 Y.COM W .1 M
W W.1 Y.COM W W W WW 00Y.CO .TW
W .100 M.T
W 00 .T W.1 Y.COM
Test Circuits and Waveforms W .C O W W.1 Y.COM W W
WW .100Y W W .100 M.T
W 00 .T
W O M.T W .C O W W.1 Y.COM
WW .100Y.C M.TW WW .100Y M.T
W W .100 M.T
W O W O W W .C O
WW .100Y.C M.TW WW .100Y.C M.TW W .100
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W W . C O W W Y . C O
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W .C O W W.1 Y.COM W W
W W W
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FIGURE 1. PARASITIC OSCILLATIONS TEST CIRCUIT AND WAVEFORMS

3
 W.1 Y.COM W . WW 00Y.CO .TW
W WW 00Y.CO .TW W
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WW 00Y.CO .TW W W WW 00Y.CO .TW
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WW .10Test 0Y.CCircuits Wand Waveforms WW .100Y M.T
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W O W O GND W
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O W O W .C O
W
WW .100Y.C M.TW WW .100Y
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W
WW .100Y.C M.TW W O M.T
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WW .100Y.C M.TOVERDRIVE
O
W 100mV W W 20mV
00Y5mV
.C .TW WW5mV .100Y.C20mV M.T100mV W
. 1 M W O
WW 00Y.CO .TW
OVERDRIVE OVERDRIVE
WW .100Y.C M.TW
OVERDRIVE OVERDRIVE OVERDRIVE
W
WW .100YFIGURE .CO .TW W
2. NON-INVERTING COMPARATOR . 1 RESPONSE M TIME TEST CIRCUIT ANDW WAVEFORMS O
W W .C OM WW 00Y.CO .TW W W 0Y.C M.TW
W 0 Y .T W W . 1 0
W.1
0
OM W.1 OM W O
WW .100Y.C M.TW WW .100Y.C M.TW WW .100Y.C M.TW
W W .C O
W WW 00Y.CO .TW W WW 00Y.CO .TW
W 00 Y .T W .1 M
W.1 Y.COM W W W.1 Y.COM W WW 00Y.CO .TW
W W
W
W .100 GNDOM.T
W
W .100 OMGND
.T
W W.1 Y.COM W
W Y. C W W Y .C TW W 00 .T
W+15V
W .100 INPUT O M.T
W
W .100 O M.INPUT W W.1 Y.COM W
WW .100Y .C
WW .10OVERDRIVE 0Y.C M.TW .TW W .100 M.T
OVERDRIVE

W O W O M W W .C O
1K WW5.1K .100Y.C M.TW WW .100Y.C M.TW W .100
Y
M.T
W
W O W C O
INPUT
-
+ WW
W O
0Y.C M.TW WW .100Y.C M.TW WW .100Y. M .TW
OUTPUT .10 W O W O
1K
W
WW .100Y.C M.TW
O
WW .100Y.C M.TW WW .100Y.C M.TW
W O W O
W
WW .100Y.C OVERDRIVE
O
.
5mV
T W OVERDRIVE 20mV
WW
100mV
0 0 Y.C OVERDRIVE .T
100mV
W 20mV WW 5mV .1 0 0Y.C M.TW
M W.
OVERDRIVE1 OM
OVERDRIVE OVERDRIVE
W O
W WW 00Y.CO .TW WW .100Y.C M.TW WW .100Y.C M.TW
FIGURE 3..1INVERTINGO
W W .C
M
COMPARATOR
W WW 00Y.CO .TW
RESPONSE TIME TEST CIRCUIT AND WAVEFORMS
W WW 00Y.CO .TW
W 00 Y .T W .1 M
W.1 Y.COM W W W.1 Y.COM W WW 00Y.CO .TW
W W 00 .T W
Circuit Description WW.1
W 00
OM
.T W.1 Y.COM W W W.1 Y.COM
.C W
W .100
Y
M.T
W W
W .100 O M.T
W .100
Wcurrent OM
.T
The Basic Comparator WW O 4 W .C µ W Y .C
Y.C .TW
Q
W is established Y at approximately
.100I3, respectively.
W 50 A
M.T Since Q1 and Q4 W
by constant
W 100 M.T
W
Figure 4 shows the basic circuit diagram W .10for0 one ofO theMtwo sources IW 1 and O areW. .C O
comparators in the CA3290. ItW
W Y.C to the.TW
00similar WW with.1a0constant
operated 0Y.C current .TW W
load, their gate-to-source .100
Y
is generically
. 1 M W O M W OM
W W .C O
W voltage W drops will beY .C
effectively constant
W as longWasW the input 0Y.C
industry type “139” comparators, with PMOS Y
transistors W 0 .T range. 0
W
replacing PNP transistors as input stageW .100 Transistors
elements. OM
.T voltages areW .10 the common-mode
within
.C OM W W.1
W . C W Y W W
W input.1stage,
Q1 through Q4 comprise the differential 00Y with QM 5.
TW As a result, W .100offset voltage .T
OM (VGS(Q1) + VBE(Q2) -
W C O W W
the input
.C W
and Q6 serving as a mirror connected WW active load0and Y. W VBE(Q3)W 00Ynot be degraded M.T when a large
differential-to-single-ended converter. The W .10 inputOatM.T
differential
- VGS(Q4).1
W
) will
Wvoltage0is0Y .C O
WQW .C differential DC applied to the device for extended
Q1 and Q4 is amplified so as to toggle 1 00Y withM.TW periods ofW
6 in accordance
. time atW .
high 1 temperatures.
WINW .CO WW
the input signal polarity. For example, ifW +V
00Ythan M.TWAdditional voltage
is greater
. 1 gain following the first stage is provided by
-VIN, Q1, Q2, and current mirror transistors Q5W beO
W W and Q060will Y .C T W
turned off; Transistors Q3, Q4, and Q7 will be turned
W .1 on, O M. transistors Q 7 and Q8. The collector of Q8 is open, offering
W positive .C the user a wide variety of options in applications. An
causing Q8 to be turned off. The output isW pulled
. 1 00Y additional discrete transistor can be added if it becomes
when a load resistor is connected between theW W and V+.
output
W necessary to boost the output sink current capability.
In essence, Q1 and Q4 function as source followers to drive
Q2 and Q3, respectively, with zener diodes D1 through D4 The detailed schematic diagram for one comparator and the
providing gate oxide protection against input voltage common current source biasing is shown on the front page.
transients (e.g., static electricity). The current flow in Q1 and PMOS transistors Q9 through Q12 are the current source
elements identified in Figure 4 as I1 through I4, respectively.

4
 W.1 Y.COM W . WW 00Y.CO .TW
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
WW 00Y.CO .TW W W WW 00Y.CO .TW
W 00 .T W.1 Y.COM W
W .1
.C O M W W.1 Y.COM CA3290,
W
CA3290A W
WW .100Y W W .100 M.T
W 00 .T
W O M.T W . C O W W.1 Y.COM W
WW .10Their0Y.Cgate source .TW potentials (VGS W)W are supplied Yby a common
.100hand portion M.T
W W the stray
minimize
.100capacitive M .T between the input and
coupling
W bus from O Mbiasing
the circuit shown in W
the right O of output W W
terminals. Parasitic .C O oscillations manifest themselves
WW .1the Y.C
00Schematic .T W The currents
Diagram. WWsupplied . 1 0 0byY.QC10 andM.TW during
Wthe output.1voltage 00Y transition M .TW intervals as the
W W Q are .C OMthose supplied by Q and W W Y .C O
W W
W
Wswitches 0 Y .COFor high .T W
Y twice W W Q .
11 10 The 0 transistor
M.T
comparator
.1 0 states. source impedances,
W .100 .T M
12 9
W O Mappropriately W . the requisite O W W .C Oparasitic
geometries
.C are scaled to Wprovide
0QY.. C stray
TW addition of
capacitance
W can induce
00Y (1mV M
oscillations.
.TW of positive
The
WW currents 0 0 Ywith .T W W . 1 0 M . a small .1
amount
.CO .TW
common V applied to Q through to 10mV)
W.1 .CO .TW
M GS 9 W 12 O W
WW .1produces
WW .100YV+ WW .100Y.C M.TW feedback (hysteresis) 00Y a faster M transition, thereby
W O M W C O reducing the W
likelihoodW of .C
parasitic Ooscillations. Furthermore,
WW .100Y.C M.TW WW .100Y. M .TWif the input signal W . 1 00Y M .TWrelatively
is Wa pulse waveform, O with rapid
W W Y .C O
I1
W
I2 I3
W WW 00I4Y.CO .TW rise and fall W
times,
Wparasitic 0 0 Y.C
tendencies .T
are W
reduced.
W
W .100 50µA .T 100µA
OM
50µA
W.1 Y.COM W
100µA
W W.1 Y.COM W
W D1 D2 . C W W 0 CA3290,Mare .Tpackaged in an
W . 1 00Y M .TW D 3W D 4
W . 100 VO OM.T When dual comparators,
W .10the
like
C O
W O WW .100Y .
WW .10Q80Y.C Madjacent .TW
8 lead configuration, the output terminal of each comparator is
WW .100Y.CQ2 MQ.T W .TW to an input M
W WQP1 Y.CO 3 W W W Y . C O
W W WW
terminal. The
0 Y .CO .TW
lead-to-lead capacitance is
QP4 W 00 .T .10
V - approximately 1pF, which may be sufficient to cause
.100
VW
M.T
I
I+
W O W.1 Y.COM W Win .C OM
WW .10Q05Y . C QT
. 6 W
W
W Q7 .100 undesirable
M . W feedback
T such as impedance levels, W effects
.
certain
1 0 Y applications.
0supply voltage, M .TW Circuit
W OM W O factors
WW 00Y.CO .TW switching
WW .100Y.C M.TW WW .100Y.C rate, .T
etc.,Wmay increaseWthe .1 of parasitic
possibility
W O W C O M W W . C OitMisoscillations.
WW .100Y.CV- M.TW WW .100Y. recommended To minimize
M
this potential
.TW that for source W oscillatory Y
condition,
.100 greater Mthan.TW
FIGURE 4. BASIC W CIRCUIT O
DIAGRAM FOR ONE OF THE W
TWO C O W W
impedances .C O 1kΩ a
W Y .C W W W 0 Y. .T W W 0 0 Y .T W
W COMPARATORS . 1 00 M .T . 1 0 capacitor
M (≥1pF - 2pF) be connected
W .1between the
O appropriate
M
W O W O
.C terminal W .C W
Operating WWConsiderations 0 0 Y.C .T W WW .100Yinput M .TW and the output Wterminal. . 1 00YFigure 1.)
(See
M.T
W . 1 O M W O W
Winput terminals .C O
WW .100IfYeither .C comparator Y should.also TW
Input Circuit WW .100Y.C M.TW M .TWthe isV+unused, Wits
W . 100 O M
W be tied O to either or V- supply rail.
The use of MOS WW
W
transistors 0 Y.the
in COinput stage
.T Wof the CA3290 WW .100Y.C M.TW WW .100Y.C M.TW
0
series circuits provides W
1
W.the user .C
withOM the following features WW Typical
W Y .CO Applications W W WW 00Y.CO .TW
00 Y W 0 0 .T .1
for comparatorW .T W.1LightYControlled OM M
W W.1 Y.COM W
applications:
W . C WOne-Shot Timer
W WW 00Y.CO .TW
W 0 .T
1. Ultra high input W impedance 00 (≅1.7TΩ);M.T
W.1 mode O for input signals WWIn .10Figure
. C OMcomparator (A1) of theWCA3290
5 one W.1 is used Y .CO to
M
W
.C Y W W 0
2. The availabilityW ofW common
.1 00Y rejection
M .TWsupply rail; W W .
sense100a change O M T diode current. The other
in.photo W .10 O M.T
at potentials below that
WW 00Y.CO .TW
of the negative power .C WW timer Y. C W
3. Retention of theW
WW comparator . 1 00Y (A2) isMconfigured .TW as a one-shot . 100and is OM.T
.1
in phase relationship M
of the input and out- W COoutputTofWA1. The output W .C
put signals for input WW
W
signals below 0 COnegative
Y.the T Wrail.
triggered
WWswitch.1to 0
by.the
0aYlow . WW of the circuitY
1 0 will
0after .TW
. 1 0 M . state
O M for approximately 60 secondsW . the OM
Wrugged Y .CO (zener) W C W .C
Although the CA3290 employs
WW
bipolar
00input terminal W diodes
.Tcurrents WW light source
1 00Y to. the photo.T
M
W has beenWinterrupted.
diode . 10The0Y M .TW
for protection of the input circuit, .the 1 M . O W O
WW 0series O
Y.Cconnected W WWoperates
circuit
Wsensitivity 0 Y.at
0the C normal Troom
. W lighting levels. WWThe .100Y.C M.TW
should not exceed 1mA.W Appropriate 0 .T . 1 M
limiting resistors should be used W W . 1
in circuits where.C OMgreater
W WWof R10and
of
Y
circuit
.RCO
may be
W
adjusted by
W WWbe the00Y.CO .T
changing
W Y
00 input M .T Wvalues 0 . The .T
ratio of R to R should .1 M
Wto.1insureYconstant
2 1 2
current flows might exist, allowingW the.1signal
C Ovoltage to constantW .C OM reverse voltage biasW onW the Y .CO .T
W Y . W W 00 .T W W 0 0
be greater than the supply voltage W without
W .100damaging O Mthe .T photo diode. W.1 Y.COM W W W.1 Y.COM
.C W W .100
circuit.
WW .100Y .TW W
R1 1.5MΩ W.1
00 M .T M
Output Circuit W W .C O M W Y .C O
W W W W
0 Y.CO
Y W W+15V .10 0 M.T 0
The output of the CA3290 is the open W
W .100 of an O
collector M.T
n-p-n W . C O +15V
W W.1
W .C W W Y W W +15V
transistor, a feature providing flexibility W in a.broad
W
Y
100 rangeOofM.T
W
W .100 OM
.T
C W
15kΩ . C
comparator applications. An outputW W function
ORing Ycan. be .TW W .101MΩ 0Y .TW
.100collectors.
3.3kΩ
theW O M W O M1N914
implemented by parallel connection of W open .C W W Y . C
An output pull-up resistor can be connected W
W to.1 a0power0Y
O M.T
W15
kΩ WW
+15V
.100 1.0µF
supply having a voltage range within the WW rating of the 0 Y. C T W W 8 60MΩ
1 0 M .
particular CA3290 in use; the magnitude of Wthis W.voltage Y .CO .TW R
may + +
be set at a value which is independent of that applied W . 1 0
0 to the M 2
3
140kΩ
5
W O A 1 CA3290 1 A CA3290 7
WW .100Y.C
2MΩ 2
V+ terminal of the CA3290. +15V
2 - 6 -
W
Parasitic Oscillations WW C30809 4 0.01µF 10kΩ
The ideal comparator has, among other features, ultra high 1N914
X 60s TIME
input impedance, high gain, and wide bandwidth. These
desirable characteristics may, however, produce parasitic
oscillations unless certain precautions are observed to FIGURE 5. LIGHT CONTROLLED ONE-SHOT TIMER

5
 W.1 Y.COM W . WW 00Y.CO .TW
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
WW 00Y.CO .TW W W WW 00Y.CO .TW
W 00 .T W.1 Y.COM W
W .1
.C O M W W.1 Y.COM CA3290,
W
CA3290A W
WW .100Y W W .100 M.T
W 00 .T
W O M.T W .C O W W.1 Y.COM W
0Y.C M.TWMultivibrator
WW .10Low-Frequency WW .100Y M.T
W WindowW Comparator .100 M.T
W O W O W W .C O
In this.C
WW .1conventional
00Y
application, one half of the CA3290
.TW WW .is 0Y.Cas a M.TW
used
1of0the
Both halves
W of the Y can be
CA3290
.100comparator Mas
W in a high input
.Tused
Mmultivibrator circuit. Because W extremelyO impedance W
window .C O shown in Figure 7. The
W
WW high 0 Y .CO
input impedance .T W of this W
device,
W
large 0
values 0 Yof.C timing .T W LED willWbeWturned.1“on” 0 0Ywhenever M .TW
the input signal is above
.10 (R )Omay
Wresistor .C
M be used for long timeWdelays W.1 withYrelatively . C OM
W the lower W
limit
W ) but below
(V 0 Y .CO the upper Wlimit (V ), as
W W W .10/R /R resistor T
M. divider. U
Y W 100of the OM.T
1 L
W . 1
small 00leakage M
timing.Tcapacitors. The second W .
half determined by W
the R C O
W
WW CA3290 CO
is .used as an W buffer toWinsure W that0the 0Y.C M.TW WW .100Y. 1 2 3
.TW
. 1 00Y M .Toutput . 1 O W O M
W
multivibrator CO
Y.frequency will
Wnot be affected WW byW 0Y.C M.TW
output loading. WW .100Y.C +15VM.TW
WWR is.1the 0 0parallel .T . 1 0
W PW
. C
M
Ocombination
W
of the two 1MΩW
W resistors CO
Y . W W WW 00Y.CO .TW
Y W 0 .T
W connected 00between +15V
W.1 Y.COM W
.Tand GND. 0
W.1 Y.COM W W W.1 Y.C8OM W
W
W W
. 1 00 M .T W
W . 00
1+15V O M .T W100kΩ
W .100 - O
.T
M3.9kΩ LED
W . C O W Y . C W W W 2
0 Y . C W
WW .100Y .TW A10CA3290 .T
+15VW +15VOM
W
W .100 O M.T R1
47kΩ W VU W. 1
.C OM1
WW3.3kΩ .100Y .C Y TW
670Ω
WW .100Y.C 15kΩ .T W M .T W+15V W 3 .10+ 0
W O M .
WR1 .C OM W W Y .CO INPUT W W W 0 Y.C W
W M.T 2N2102
R3
W 20MΩ 00 Y .T W W . 10 0 M .T R2 .1 0
. 1 M A2 W O 6.8kΩ W C O
W O +
WW 7 .100Y.C M.TW WW Y. .TW
WW C .100Y.C M+15V
5 47kΩ
-.100
8
1MΩ
.TW CA3290
W O
6
W O M
2W -
O VL W .C
WW0.36 0 0 YA.1C .T W6 - WW .100Y.C M.TW 100kΩ W A2 CA3290 .1 00Y 7 M.TW
µF W
W
1
.CA3290
.C O1 M 1MΩ
W W Y .CO W W5 WW +
0 Y .CO .TW
Y W W 0 . T 0
RP
W
3 W +.100
OM
.T 1MΩ 0
W.1 Y.COM W W W4.1 Y.COM W
.C W
W W
4.10
0Y M .TW W
W .100 O M .T W
W .100 O M.T
1MΩ
W O W .C WW .100Y . C W
WW .100Y.C t M .TW = 10s W W.100Y OM.TW
= Period
W O M.T
W O
W  2RP WW .100Y.C MFIGURE WW Y.C .TW
WW .100Y.C t = M 2R.1TClog e  ------------ + 1
.TW 7. WINDOW COMPARATOR
W .100 O M
W O
WW RW2 Y.C
O
W  2  WW .100Y.C M.TW
R
WW .100Y.C M.TW
1MΩ .100 .T
W W .CO .TW
M WW 00Y.CO .TW W WW 00Y.CO .TW
W 0 Y W .1 M
FIGURE 6. LOW FREQUENCY 0
W.1 Y.COM W
MULTIVIBRATOR
W W.1 Y.COM W WW 00Y.CO .TW
W W
W
W .100 O M.T
W
W .100 OM
.T
W W.1 Y.COM W
C W .C W
WW .100Y. M.T
W W .100
Y
M.T
W
W .100 OM
.T
W O W C O W .C W
Typical Performance WW Curves 00Y
.C .TW WW .100Y. M .TW W .100
Y
M.T
. 1 O M W O W .C O
4.0
RL = ∞
W
WW .100Y.C M.TW WW .100Y.C o M.TW WW .100Y M .TW
W 0 A .C O W O
O WW .100Y.C M.TW
T = 25 C
W
3.5
WW .100Y.C M.TW WW .10V+0Y = +30V, V- = GND
M .TW
W W .C O
W WW-5 00Y.CO .TW W WW 00Y.CO .T
Y W
SUPPLY CURRENT (mA)

3.0
W 00 .T W.1 Y.COM W .1 M
W.1 Y.COM W WW 00Y.CO .T
INPUT CURRENT (pA)

W W
W -10 .100 .T W
W .100 M.T W.1 Y.COM
2.5
W C O W W .C OM W
2.0
WW .100Y . -55 oC
.TW W -15 .100 Y .T W W .100 M
W O25oC M W O M W W .CO
W Y .C W W W 0 Y .C W W 0 0 Y
.10 .T W.1
W .100 125oO M.T
1.5
W C -20WW .C OM W
W . C
W Y W W
1.0 W
W .100
Y
O M.T
W
W .100 OM
.T
C W . C W
0.5 WW .100Y. M.T
W W
-25
.100
Y
M.T
W O W W .C O
W30W 35 .40 .C .TW 00Y
0
0 5 10 15 20 25 1 00Y 45 M -30W
W . 110
W O 0 5 15 20 25 30 35
TOTAL SUPPLY VOLTAGE WW (V) .100Y.C M.TW WW INPUT COMMON MODE VOLTAGE (V)
W O
WW 0 Y.C W
FIGURE 8. SUPPLY CURRENT vs SUPPLY VOLTAGE
W . 1 0 (BOTH
O M.T FIGURE 9. VOLTAGE INPUT CURRENT vs INPUT COMMON MODE
AMPLIFIERS)
WW .100Y .C
W
WW

6
 W.1 Y.COM W . WW 00Y.CO .TW
W WW 00Y.CO .TW W
.100 M.T W.1 Y.COM W .1 M
WW 00Y.CO .TW W W WW 00Y.CO .TW
W 00 .T W.1 Y.COM W
W .1
.CO M W W.1 Y.COM CA3290,
W
CA3290A W
WW .100Y W W .100 M.T
W 00 .T
W O M.T W .C O W W.1 Y.COM W
W
0Y.C M
WW .10Typical .TW
Performance WCurves 00Y
.1(Continued) M.T
W W
W .100 O M.T
W O W O W .C
WW .100Y.C M.TW WW .100Y.C M.TW W .100
Y
M.T
W
W O W C O
W
WW .100Y.C TA =M
O o
WW .100Y.C M.TW WW .100Y. .TW

INPUT EXCURSIONS FROM V+ TERMINAL (V)

25.T CW M
W O W O
W
WW .1004.5 Y.C
O= +5V, V- = GND
V+
.T W WW .100Y.C M.TW
-1.0
WW .100Y.C M.TW
OM W O W O
W
WW .100Y.C M.TW WW .100Y.C M.TW
-1.5
WW .100Y.Co M.TW
INPUT CURRENT (pA)

W O W 125C CO
W 4.0 O
WW .100Y.C M.TW WW .10025 Yo. C W
WW .100Y.C M.TW
-2.0

W O W O M.T
W .CO .TW W .C
WW .100Y.C M.TW -2.5 W -55YC .TW
o
WW .3.5 1 00Y M W .100 O M
W O
W
WW 3.0.100Y.C M.TW
O
WW .100Y.C M.TW -3.0 WW .100Y.C M.TW
W W .C O
W WW 00Y.CO .TW-3.5 W WW 00Y.CO .TW
W 00 Y .T W .1 M
W.1 Y.COM W
2.5
W W.1 Y.COM W WW 00Y.CO .TW
W W 00 .T -4.0 W
W
W .100 O M.T W.1 Y.COM W W W.1 Y.COM W
.C W
WW 0 .11.0 00Y 2.0 M W 5.0 W
3.0.T 4.0
W . 100 O M .T 0 5 10 15 W20 W .10025 30OM35.T 40 45
W O
W VOLTAGE (V)WW .100Y.C M.TW WW SUPPLY Y.C (V) .TW
WW .10INPUT 0Y.CCOMMON .TMODE POSITIVE
. 1 00VOLTAGE M
W .C OM W W Y.C O
W W W W
0 Y .COVOLTAGE W
FIGURE 10.W
W VOLTAGE . 1 00Y
INPUT CURRENT vs
M .TW
INPUT COMMON W
MODE
W . 100
FIGURE
O M .T 11. POSITIVE COMMON
W .10
MODE INPUT
O M.T
W O RANGE vs
WW .100Y.
SUPPLY VOLTAGE C
WW .100Y.C M.TW WW .100Y.C M.TW M .TW
W O W O
W
WW .100Y.C M.TW
O
WW .100Y.C M.TW WW .100Y.C M.TW
INPUT EXCURSIONS FROM V- TERMINAL (V)

W .C O WW 00Y.CO .TW
10K
W WW 00Y.CO .TW
1.0 WW Y W W .1
00 .T W.1 Y.COM W .CO .TW
M
W W.1 Y.COM W W
V+ = +15V, V- =W
W VW -15V
= 0V
0 0 Y
0.5 W .100 M.T
W 00 .T CM
W.1 Y.COM W
W.1 Y.1K OM
INPUT CURRENT (pA)

W . C O W C W W
0 125W
W oC
.100
Y
M.T
W W .100 M.T
W
W.V+10=05V, V- = 0VOM.T
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7
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W WW 00Y.CO
Sales Office Headquarters
W W.1
NORTH AMERICA W EUROPE ASIA
Intersil Corporation Intersil SA Intersil (Taiwan) Ltd.
P. O. Box 883, Mail Stop 53-204 Mercure Center 7F-6, No. 101 Fu Hsing North Road
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