Nikki,

Excellent post!  Great job in explaining the key similarities and

differences between the two languages.  I selected the same
topic.  However, I offered that although they have some
similarities--as you mentioned--they are fundamentally
different.  As we both know, those differences are clear when
we see that in C or C++, we have basic data structures (i.e., an
array, integer, string, etc.); however, in Verilog, we see Flip
Flops, Switches and Gates.  To me, that necessarily means that
we use the two languages  based on need;  the requirement or
task will inform which one we use and when.

Best,
Dan