Application of D-STATCOM to Improve Distribution
System Performance with Balanced and Unbalanced Fault
Conditions
S. H. Hosseini, A. Nazarloo and E. Babaei
Faculty of Electrical and Computer Engineering
University of Tabriz
Tabriz 51666-16471, Iran
hosseini@tabrizu.ac.ir, nazarloo@ieee.org and e-babaei@tabrizu.ac.ir
Abstract - This paper proposes a new control method for D-
STATCOM (Distribution STATIC Compensator) control system.
The operation of this proposed control method enables D-
STATCOM to mitigate all types of fault, intelligently (such as
Single Line to Ground (SLG) fault and Double Phase to Ground
(DPG) fault and three-phase fault). In this paper, the 12-pulse D-
STATCOM configuration with IGBT is designed and the graphic
based models of the DSTATCOM are developed using the
PSCAD/EMTDC electromagnetic transient simulation program.
This paper validates the performance of a D-STATCOM system
for improving distribution system performance under all types of
fault. The reliability and robustness of the control scheme in the
system response to the voltage sags caused by SLG and DPG and
three-phase faults is obviously proved in the simulation results.
Index Terms - D-STATCOM, Voltage Sags, Energy Storage
Systems, Balanced and Unbalanced Faults.
I. INTRODUCTION
Voltage sags are the most important power quality (PQ)
problems that many industries and utilities face it. It
contributes more than 80% of power quality problems that
exist in power systems. Voltage sags are not tolerated by
sensitive equipment used in modern industrial plants such as
process controllers; programmable logic controllers (PLC),
adjustable speed drive (ASD) and robotics [1]. Various
methods have been applied to reduce or mitigate voltage sags.
The conventional methods are by using capacitor banks,
introduction of new parallel feeders and by installing
uninterruptible power supplies (UPS). However, the PQ
problems are not solved completely due to uncontrollable
reactive power compensation and high costs of new feeders
and UPS. The D-STATCOM has emerged as a promising
device to provide not only for voltage sag mitigation but also
for a host of other power quality solutions such as voltage
stabilization, flicker suppression, power factor correction, and
harmonic control [2]. D-STATCOM is a shunt device that
generates a balanced three-phase voltage or current with
ability to control the magnitude and the phase angle [3].
Generally, the D-STATCOM configuration consists of a
typical 12-pulse inverter arrangement, a dc energy storage
device; a coupling transformer connected in shunt with ac
system, and associated control circuits, as shown in Fig. 1.
The configurations that are more sophisticated use multipulse
and/or multilevel configurations. The VSC converts the dc
2010 IEEE Electrical Power & Energy Conference
978-1-4244-8188-0/10/$26.00 ©2010 IEEE
voltage across the storage device into a set of three-phase ac
output voltages. These voltages are in phase and coupled with
the ac system of network through the reactance of the coupling
transformer [4]. A control method based on rms voltage
measurement has been presented in [5], [6] where they have
been presented a PWM-based control scheme that requires
rms voltage measurements and no reactive power
measurements are required. Also in this given method, Clark
and Park transformations are not required. However, they have
been investigated voltage sag/swell mitigation due to just load
variation and using the same proportional gain for all types of
voltage distortions while no SLG and DPG and three-phase
faults have been investigated. In this paper, a new control
method for mitigating the load voltage sags caused by all
types of fault is proposed. In this method, both dc side
topology of the D-STATCOM is modified and the
proportional gain of the PI controller is selected intelligently
(based on the proposed Lookup Table) for mitigating voltage
distortions. In addition, effects of system faults on the
sensitive loads are investigated and the control of voltage sags
are analysed and simulated.
II. Configuration and operation of D-STATCOM
Fig. 1 shows the schematic representation of the D-
STATCOM. The basic electronic block of the D-STATCOM
is the voltage source inverter that converts an input dc voltage
into a three-phase output voltage at fundamental frequency.
These voltages are in phase and coupled with the ac system
through the reactance of the coupling transformer. Suitable
adjustment of the phase and magnitude of the D-STATCOM
output voltages allows effective control of active and reactive
power exchanges between the DSTATCOM and the ac
system.
Fig. 2 shows a typical 12-pulse inverter arrangement
utilizing two transformers with their primaries connected in
series. The first inverter is connected to the system through a
Y-Y arrangement, whereas a Y-Δ connection is used for the
second inverter. Each inverter operates as a 6-pulse inverter,
with the Y-Δ inverter being delayed by 30 degrees with
respect to the Y-Y inverter. The current flowing into each
inverter is the same, scaled by the transformer ratio, as the
current being drawn from the system by the D-STATCOM.
For the Y-Δ inverter, the current is also delayed by 30 degrees
with respect to the current of the Y-Y inverter [7].
Fig. 1. Schematic representation of the D-STATCOM as a custom power
controller
Fig. 2. The 12-pulse D-STATCOM arrangement
In addition, Fig. 2 shows the proposed 12-pulse D-
STATCOM configuration with the IGBTs used as power
devices. The IGBTs are connected anti parallel with diodes for
commutation purposes and charging of the DC capacitor. The
DC side of D-STATCOM is connected in parallel to keep the
voltage on the DC side as low as possible and to improve
utilization of the DC side capacitor. The first transformer is in
wye-to-wye connection and the second transformer is in wye-
to-delta connection. This is to give a 30 degrees phase shift
between the pulses and to reduce harmonics generated from
the DSTATCOM. The D-STATCOM is connected in shunt to
the system [7].
The block diagram of the control scheme designed for the
D-STATCOM is shown in Fig. 3. It is based only on
measurements of the voltage Vrms at the load point.
Fig. 3. Control scheme designed for the D-STATCOM
The voltage error signal is obtained by comparing the
measured Vrms voltage with a reference voltage, Vrms_ref. A PI
controller processes the difference between these two signals
in order to obtain the phase angle δ that is required to drive the
error to zero. The angle δ is used in the PWM generator as the
phase angle of the sinusoidal control signal. The switching
frequency used in the sinusoidal PWM generator is fsw=1450
(HZ) and the modulation index is Ma ≈ 1 [8].
The modulating angle δ is applied to the PWM generators
in phase A. The angles of phases B and C are shifted 120 and
240 degrees, respectively.
Fig. 4 shows the schematic diagram of the test system
used to carry out the transient modelling and analysis of the
D-STATCOM. A balanced load is connected to the 11 (kV),
secondary side of the transformer. Brk. 1 is used to control the
period of operation of the D-STATCOM. In addition, when
Timed Fault Logic operates balanced (three-phase) and
unbalanced (SLG and DPG) faults are exerted, therefore, the
D-STATCOM supplies reactive power to the system.
Fig. 4. Schematic diagram of the test system used to carry out transient
analysis of the D-STATCOM
III. PROPOSED CONTROL METHOD
Proportional gain is playing a very important role in PI
controller in D-STATCOM. If proportional gain is considered
smaller than a suitable value, it causes a decrease in mitigation
and if proportional gain is considered bigger than a correct
value, it causes an oscillation in rms voltage profile and
mitigation will not be perfect. For example, in mitigation of
sags caused by unbalanced faults, the proportional gain should
be selected rather small, and for mitigation of voltage drop
caused by three-phase fault, proportional gain should be
selected big enough. Thus, proportional gain must be selected
accurate.
In this paper, in order to mitigate voltage sags caused by
balanced & unbalanced faults, a new method is proposed in
which firstly, D-STATCOM and Super-capacitor energy
storage system (ESS) are integrated and secondly, a Look-up
Table is used to determine the suitable proportional gain for
each one of different voltage sags.
Considering this fact that all types of fault may occur in
distribution system, controller system must be able to mitigate
any types of voltage sags. The integration and control of ESSs,
such as Super-capacitor (Ultra capacitor - UCAP) into a D- TABLE I
LOOKUP TABLE ARRANGEMENT
STATCOM is developed to mitigate such problems, enhance
Unbalanced Faults Balanced Fault
power quality and improve distribution system reliability. The
first part of new method develops the control concepts of Rms load current
charging and discharging the UCAP by D-STATCOM, and 0 9 0 25
validates the performance of an integrated D- Proportional gain 650 750 750 3000
STATCOM/UCAP system for improving distribution system
performance under all types of system related disturbances
In this Lookup Table, proportional gains are determined
and system faults, such as SLG fault, DPG fault and three-
based on Trial And Error and then the optimum value is
phase fault . Fig. 5 shows a typical distribution system
selected for each boundary.
controlled by this method. A UCAP is integrated with dc
Whenever the measured current rms value at the load point is
capacitor. The UCAP capacitance is determined by applying a
situated in each boundary, the related proportional gain is
constant-current discharge with C = I × dt dv . Since dv/di is
extracted from proposed Lookup Table. For example, in SLG
almost constant, UCAP capacitance can be modelled as a or DPG fault when the load current rms value is smaller than 9
constant. The equivalent series resistance (ESR) is calculated the related proportional gain is 650 and when the rms load
by measuring the output voltage drop from no load to steady- current is bigger than 9 the related proportional gain is 750.
state load and then dividing by the load current. Since the Moreover, in three-phase fault when the load current rms
open-circuit voltage has no significant effect on the ESR, the value is bigger than 25 the related proportional gain is 3000.
ESR can be modelled as a constant [9]. The UCAP is The speed of response and robustness of the control scheme
modelled with 10.0 (mF) capacitance and 320 (mΩ) ESR. are clearly shown in the simulation results.
IV. SIMULATION RESULTS
Fig. 5 shows the test system implemented in
PSCAD/EMTDC to carry out simulations for the D-
STATCOM. The test system comprises a 230 (kV)
transmission system. A 12-pulse D-STATCOM is connected
to the tertiary winding by closing Brk. 1 at 0.2 (s), for
maintaining load rms voltage at 1pu. A 750 (µF) capacitor in
parallel with an Ultra capacitor - UCAP on the dc side provide
the D-STATCOM energy storage capabilities. Simulations are
carried out for both cases where the D-STATCOM is
Fig. 5. Distribution system with D-STATCOM integrated with connected to or disconnected from the system.
UCAP and controller The simulations of the D-STATCOM in fault condition
are done using unbalanced and balanced faults. In SLG fault
Every PI controller has a proportional gain that is playing analysis, phase A is the faulted phase, while in DPG fault the
an important role in D-STATCOM correct performance, and faulted phases are phases A and B. In addition, in three-phase
each voltage disturbance needs a special proportional gain, for fault, the faulted phases are phases A, B, and C. The duration
improving distribution system and D-STATCOM of the fault is set for about 0.4 (s) and the faults are exerted at
performance. Therefore, it is necessary to use a separated 0.6 (s). The total simulation time is 1.6 (s).
proportional gain for each type of voltage sags. The second Specifications of test system under all types of fault are
part of this method uses a Lookup Table for adjusting the presented in Table II.
proportional gain of the PI controller in D-STATCOM for TABLE II
mitigating of the voltage distortions, intelligently. CONDITIONS OF TEST SYSTEM UNDER ALL TYPES OF FAULT
As shown in Fig. 6, load current of one of the phases Type Fault Faulted Voltage Fault
Phases Drop Interval
(such as phase A) is measured and its rms value is calculated. SLG A 15% 0.6 – 1 (s)
Based on the load current rms value, the proportional gain is DPG A,B 12% 0.6 – 1 (s)
determined for each disturbance, formally. Three-Phase A,B,C 12% 0.6 – 1 (s)
Fault

In this paper, the D-STATCOM by using proposed

control method mitigates load point voltage sags due to all
types of faults. The simulations are done for all types of faults
Fig. 6. The application of Lookup Table for determining a suitable introduced in the 11 (kV) distribution systems as follows:
proportional gain

Every type of the voltage disturbances affects load A. Simulation results for SLG fault
current. In this part of method, a Look-up Table is arranged Fig. 7 shows the rms voltage at the load point for the case
based on these load current variations as shown in Table I: when the system operates without D-STATCOM and under
SLG fault. In this case, the voltage drops by almost 15% with Vab-Total Harmonic Distortion
1.00
respect to the reference value.
0.75
Vrms Vref
1.40
0.50
1.20
1.00 0.25
0.80
0.00
0.60
0.40 0.00 0.40 0.80 1.20 1.60
Fig. 10. Vab-THD using proposed method for mitigating SLG fault
0.20
0.20 0.60 1.00 1.40 Fig. 11 shows the dc voltage of the VSC. Before the D-
Fig. 7. The rms voltage (Vrms) at PCC without D-STATCOM under SLG fault STATCOM starts operating, the capacitor is charged to a
steady state voltage level of approximately 7 (kV). This initial
In t = 0.2 (s), D-STATCOM is connected to the condition of the capacitor improves the response of the D-
distribution system. The voltage drop of the sensitive load STATCOM and simplifies the requirements of the control
point is mitigated using the proposed control method. In this system. As shown in Fig. 11, in the periods 0.6-1 (s), the D-
method, proportional gain is obtained from Lookup Table. STATCOM absorbs active power from the ac system to
Fig. 8 shows the mitigated rms voltage using this new method charge the capacitor and maintain the required dc link voltage
where a very effective voltage regulation is provided. level.

Vrms Vref VDC

1.40 36.0
1.20 30.0
1.00 24.0
0.80 18.0
0.60 12.0
0.40 6.0
0.20 0.0
0.20 0.60 1.00 1.40 0.00 0.40 0.80 1.20 1.60
Fig. 8. Compensated rms voltage under SLG fault Fig. 11. DC link voltage under SLG fault

Fig. 9 shows the frequency spectrum for Vab (line voltage

B. Simulation results for DPG fault
at the load point) in interval 0.6-1 s, after eliminating transient
states. It is seen, all even harmonics are zero, and odd Fig. 12 shows the rms voltage at the load point for the
harmonics are mitigated, because a 12-pulse D-STATCOM is case when the system operates without D-STATCOM and
used in this paper. DPG fault is occurred. The rms voltage faces with 12%
decrease with respect to the reference voltage.
Vab - frequency spectrum
100.0 Vrms Vref
1.40
1.20
1.00
0.80
0.60
0.40
0.0
Fig. 9. Vab frequency spectrum during mitigation of voltage sag caused by 0.20
SLG fault 0.20 0.60 1.00 1.40
Fig. 12. Variation of rms voltage (Vrms) at PCC without
Moreover, the Total Harmonic Distortion (THD) for line D-STATCOM under DPG fault
voltage Vab for total time of simulation, i.e., in interval 0-1.6
(s) for every second of time is shown in Fig. 10. It is observed, Fig. 13 shows the compensated rms voltage at the load
the THD in percent for Vab in intervals of SLG fault point under DPG fault using proposed method. It is observed
occurrence is 0.0633%. that the proposed method has mitigated voltage sag, truly.
 Vrms Vref C. Simulation results for three-phase fault
1.40
Fig. 17 shows the rms voltage at the PCC for the case
1.20 when the system operates without D-STATCOM and under
1.00 three-phase fault. In this case, the voltage drops by almost
0.80 12% with respect to the reference value.
0.60 Vrms Vref
1.40
0.40
0.20 1.20

0.20 0.60 1.00 1.40

1.00
Fig. 13. Compensated rms voltage under DPG fault 0.80

Fig. 14 shows the frequency spectrum for Vab in interval 0.60

0.6-1 (s), after eliminating transient states. It is observed that 0.40
all harmonics are mitigated.
0.20
Vab - frequency spectrum 0.20 0.60 1.00 1.40
100.0
Fig. 17. Variation of rms voltage (Vrms) at PCC without
D-STATCOM under three-phase fault

Fig. 18 shows the mitigated rms voltage at the load point

under three-phase fault using proposed method. It is observed
that the load voltage is very close to the reference value, i.e.,
1pu.
0.0
Vrms Vref
Fig. 14. Vab frequency spectrum during mitigation of voltage sag caused by 1.40
DPG fault
1.20
The THD for line voltage Vab in interval 0-1.6 (s) is 1.00
shown in Fig. 15 It is observed that the THD in percent for
0.80
mitigated line voltage in intervals of DPG fault occurrence is
very suitable and 0.0126%. 0.60
0.40
VabTHDTotal
1.00 0.20
0.75 0.20 0.60 1.00 1.40
0.50 Fig. 18. Compensated rms voltage under three-phase fault

0.25 Fig. 19 shows the frequency spectrum for Vab during

0.00 mitigation of voltage sag. It is seen, all harmonics are almost
zero.
0.00 0.40 0.80 1.20 1.60
Fig. 15. Vab-THD using proposed method for mitigating DPG fault Vab - frequency spectrum
100.0
In addition, the dc voltage of the VSC is shown in Fig. 16.

VDC
36.0
30.0
24.0
18.0
0.0
12.0
Fig. 19. Vab frequency spectrum during mitigation of voltage sag caused by
6.0 three-phase fault
0.0
The THD for the line voltage Vab in simulation interval
0.00 0.40 0.80 1.20 1.60 0-1.6 (s) is shown in Fig. 20. The THD for Vab in intervals of
Fig. 16. DC link voltage under DPG fault
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Fig. 21. DC link voltage under three-phase fault

V. ConclusionS
In this paper, a new control method for mitigating the
voltage sags, caused by balanced and unbalanced faults, at the
PCC has been proposed. The proposed method has been made
up of two factors. The first factor was "Integrating D-
STATCOM and super-capacitor energy storage system" and
the second factor was "Lookup Table application in
determining a suitable proportional gain for each different
voltage disturbance". This proposed control scheme was tested
under a wide range of operating conditions (under all types of
fault), and it was observed that the proposed method is very
robust and intelligent in every case. In addition, the regulated
Vrms voltage showed a reasonably smooth profile. It was
observed that the load voltage is very close to the reference
value, i.e., 1pu and the voltage sags are minimized completely.
Moreover, the simulation results were shown that the
charge/discharge of the capacitor is rapid through this new
method and hence the response of the D-STATCOM is fast.
This custom power controller may find application in
automated industries with critical loads.