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  • Syn PD TA Assignment 230426 194418

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    Vaishnavi B V
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    The document contains 8 questions about digital circuit design and timing analysis. It asks about how to address a hold violation, fixing timing paths between latches, the meaning of CRPR/CPPR, the roles of OPC, PSM and off-axis illumination in manufacturability, what a clock tree distribution system is, how to fix crosstalk glitches, what setup and hold checks are done with differing clock frequencies, and whether a clock period is sufficient for a given circuit.

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    Syn_PD_TA_Assignment_230426_194418

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    The document contains 8 questions about digital circuit design and timing analysis. It asks about how to address a hold violation, fixing timing paths between latches, the meaning of CRPR/CPPR, the roles of OPC, PSM and off-axis illumination in manufacturability, what a clock tree distribution system is, how to fix crosstalk glitches, what setup and hold checks are done with differing clock frequencies, and whether a clock period is sufficient for a given circuit.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    25 views2 pages

    Syn PD TA Assignment 230426 194418

    Uploaded by

    Vaishnavi B V
    The document contains 8 questions about digital circuit design and timing analysis. It asks about how to address a hold violation, fixing timing paths between latches, the meaning of CRPR/CPPR, the roles of OPC, PSM and off-axis illumination in manufacturability, what a clock tree distribution system is, how to fix crosstalk glitches, what setup and hold checks are done with differing clock frequencies, and whether a clock period is sufficient for a given circuit.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    of 2

    Synthesis, Physical Design and Timing Analysis of Digital Circuits

    Assignment

    Question -1

    STA tool reports a hold violation on following circuit. What would you do?

    Question -2: How do you fix timing path from latch to latch?

    Question -3: What does CRPR (or CPPR) stand for and what does it mean?

    Question -4: - Explain the role of Optimal Proximity Correction (OPC), Phase Shift Masking
    (PSM) and Off-axis illumination in Design for Manufacturability.

    Question -5: - What is clock tree distribution system

    Question 6: - How do you fix the Crosstalk glitch

    Question 7: - What type of setup and hold checks will be performed when launch and capture clock are
    not of the same frequency?

    Question 8: - Is the clock period enough for the given circuit?

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