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V+
SOC Die
VCC (also To all internal circuits Analog Front End
programming)
Regulator
BYP
Multisegment
CVH Element
SENT SENT
Interface Digital
CBYP(VCC) Diagnostics Subsystem
SDA/MISO
SCL/SCLK
CBYP(BYP) I2C/SPI
SA0/CS Interface
32-bit
SA1/MOSI Microprocessor ADC
ISEL
VCC
(Programming)
DGND EEPROM
AGND
Selection Guide
Part Number System Die Package Packing*
A1335LLETR-T Single 14-pin TSSOP 4000 pieces per 13-in. reel
A1335LLETR-DD-T Dual 24-pin TSSOP 4000 pieces per 13-in. reel
*Contact Allegro for additional packing options
Table of Contents
Specifications 3 Message Structure 21
Absolute Maximum Ratings 3 SENT Output Mode 27
Thermal Characteristics 3 Shared SENT Protocol 28
Pin-Out Diagram and Terminal List 4 Sequential SENT (SSENT) 30
Operating Characteristics 5 Addressable SENT (ASENT) 32
Functional Description 8 Sensor Magnetic Data Sampling 33
Overview 8 Sensor States: Offline Bus Sync, and
Operation 8 Online 34
Diagnostic Features 11 User-Initiated Diagnostic Support 34
Programming Modes 12 SENT Message Frame Descriptions 36
Manchester Serial Interface 13 SENT Data Programming Parameters 37
Entering Manchester Communication Mode 13 ASENT/SSENT Specific Fields 40
Transaction Types 13 SSENT Specific Fields 41
Writing to EEPROM 13 Application Information 44
Reading from Memory 14 Serial Interface Description 44
Error Checking 14 Magnetic Target Requirements 45
Manchester Message Structure 15 On-Axis Applications 45
Manchester Interface Reference 16 Off-Axis Applications 45
Manchester Access Code 17 Effect of Orientation on Signal 46
Manchester Exit Code 18 Linearization 48
Read 18 Correction for Eccentric Orientation 49
Read Response 19 Harmonic Coefficients 50
Write 19 PCB Layout 50
SENT Output Mode 20 Package Outline Drawings 51
SPECIFICATIONS
THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information
Characteristic Symbol Test Conditions* Value Unit
LE-14 package 82 ºC/W
Package Thermal Resistance RθJA
LE-24 package 117 ºC/W
LE-24 Package I2C: SA1 digital input: Sets slave address bit 1 (LSB)2; tie to BYP for 1,
tie to DGND for 0.
(Dual SoC) SA1_1/
12 22 SPI: Master Output / Slave Input terminal (die 1).
MOSI_1
Manchester: MSB of the ID value for Die 1. tie to BYP for 1, to DGND
for 0. Must be in I2C operation (ISEL set to a logic low).
I2C: SA1 digital input: Sets slave address bit 1 (LSB)2; tie to BYP for 1,
tie to DGND for 0.
SA1_2/
– 10 SPI: Master Output / Slave Input terminal (die 2).
MOSI_2
Manchester: MSB of the ID value for Die 2. tie to BYP for 1, to DGND
for 0. Must be in I2C operation (ISEL set to a logic low).
SCL_1/ Digital input: Serial clock (I2C: SCL, SPI: SCLK); open drain, pull up
11 21
SCLK_1 externally to 3.3 V (die 1).
SCL_2/ Digital input: Serial clock (I2C: SCL, SPI: SCLK); open drain, pull up
– 9
SCLK_2 externally to 3.3 V (die 2).
I2C: Digital data terminal: digital output of evaluated target angle, also
SDA_1/
10 20 programming data input; open drain, pull up externally to 3.3 V (die 1).
MISO_1
SPI: Master Input / Slave Output terminal (die 1).
I2C: Digital data terminal: digital output of evaluated target angle, also
SDA_2/
– 8 programming data input; open drain, pull up externally to 3.3 V (die 2).
MISO_2
SPI: Master Input / Slave Output terminal (die 2).
SENT transmission output terminal (die 1); Manchester output in
SENT_1 9 19
Manchester mode; open drain, pull-up to external supply.
SENT transmission output terminal (die 2); Manchester output in
SENT_2 – 7
Manchester mode; open drain, pull-up to external supply.
1 Thenumber following the underscore refers to the die number in a dual SOC variant
2 For
additional information, refer to the Programming Reference addendum, EEPROM Description and Programming section, regarding the
INTF register, I2CM field.
OPERATING CHARACTERISTICS: valid throughout full operating voltage and ambient temperature ranges, unless other-
wise specified
Electrical Characteristics
Supply Voltage VCC 4.5 5 5.5 V
Supply Current ICC – 15 20 mA
VCC Low Flag Threshold VCCLOW(TH) 4.4 4.55 4.75 V
Supply Zener Clamp Voltage VZSUP IZCC = ICC + 3 mA, TA = 25°C 26.5 – – V
Reverse Battery Voltage VRCC IRCC = –3 mA, TA = 25°C – – –18 V
Power-On Time3,4 tPO TA = 25°C 2 – 40 ms
SPI Interface Specifications5
Digital Input High Voltage3 VIH MOSI, SCLK, C̄¯ S̄¯ pins 2.8 – 3.63 V
Digital Input Low Voltage3 VIL MOSI, SCLK, C̄¯ S̄¯ pins – – 0.5 V
SPI Output High Voltage VOH MISO pins, TA = 25°C 2.93 3.3 3.69 V
SPI Output Low Voltage VOL MISO pins – 0.3 – V
SPI Clock Frequency3 fSCLK MISO pins, CL = 50 pF 0.1 – 10 MHz
Chip Select to First SCLK Edge3 tCS Time from C̄¯ S̄
¯ going low to SCLK falling edge 50 – – ns
Data Output Valid Time3 tDAV Data output valid after SCLK falling edge – 45 – ns
MOSI Setup Time3 tSU Input setup time before SCLK rising edge 10 – – ns
MOSI Hold Time3 tHD Input hold time after SCLK rising edge 50 – – ns
SCLK to C̄¯ S̄¯ Hold Time3 tCHD Hold SCLK high time before C̄¯ S̄¯ rising edge 5 – – ns
Load Capacitance3 CL Loading on digital output (MISO) pin – – 50 pF
I2C Interface Specifications (VPU = 3.3 V on SDA and SCL pins)
Bus Free Time Between Stop
tBUF 1.3 – – µs
and Start3
Hold Time Start Condition3 tHD(STA) 0.6 – – µs
Setup Time for Repeated Start
tSU(STA) 0.6 – – µs
Condition3
SCL Low Time3 tLOW 1.3 – – µs
SCL High Time3 tHIGH 0.6 – – µs
Data Setup Time3 tSU(DAT) 100 – – ns
Data Hold Time3 tHD(DAT) 0 – 900 ns
Setup Time for Stop Condition3 tSU(STO) 0.6 – – µs
Logic Input Low Level (SDA and
VIL(I2C) – – 0.9 V
SCL pins)13
Logic Input High Level (SDA and
VIH(I2C) 2.1 – 3.63 V
SCL pins)
OPERATING CHARACTERISTICS (continued): valid throughout full operating voltage and ambient temperature ranges,
unless otherwise specified
I2C Interface Specifications (VPU = 3.3 V on SDA and SCL pins), continued
Logic Input Current3 IIN VIN = 0 V to VCC –1 – 1 µA
Output Voltage (SDA pin) VOL(I2C) RPU = 1 kΩ, CB = 100 pF, TA = 25°C – – 0.6 V
Logic Input Rise Time (SDA and
tr(IN) – – 300 ns
SCL pins)3
Logic Input Fall Time (SDA and
tf(IN) – – 300 ns
SCL pins)3
SDA Output Rise Time3 tr(OUT) RPU = 1 kΩ, CB = 100 pF – – 300 ns
SDA Output Fall Time3 tF(OUT) RPU = 1 kΩ, CB = 100 pF – – 300 ns
SCL Clock Frequency13 fCLK – – 400 kHz
SDA and SCL Bus Pull-Up Resistor RPU – 1 – kΩ
Total Capacitive Load on SDA Line3 CB – – 100 pF
Pull-Up Voltage3 VPU RPU = 1 kΩ, CB = 100 pF 2.97 3.3 3.63 V
SENT Interface Specifications3
SENT Message Duration tSENT Tick time = 3 µs – – 1 ms
Minimum Programmable SENT Tick time = 0.5 µs, 3 data nibbles, SCN, and
tSENTMIN – 96 – µs
Message Duration CRC, nibble length = 27 ticks
VSENT(L) 5 kΩ ≤ Rpullup ≤ 50 kΩ – – 0.10 V
SENT Output Signal Minimum Rpullup = 5 kΩ 0.9 × VS – – V
VSENT(H)
Maximum Rpullup = 50 kΩ 0.7 × VS – – V
VSENTtrig(L) – – 1.4 V
SENT Trigger Signal
VSENTtrig(H) 2.8 – – V
Minimum Time Frame for SENT
Ttrig(MIN) 2 – – µs
Trigger Signal
From end of trigger pulse to beginning of SENT
Triggered Delay Time tdSENT message frame. – 7 – Tick
TSENT (SENT_MODE 3 and SENT_MODE 4)
Maximum Sink Current ILIMIT Output FET on, TA = 25°C – 30 – mA
Magnetic Characteristics
Magnetic Field6 B Range of input field 300 – 1000 G
OPERATING CHARACTERISTICS (continued): valid throughout full operating voltage and ambient temperature ranges,
unless otherwise specified
Characteristic Symbol Test Conditions Min. Typ.1 Max. Unit2
Angle Characteristics
Output7 RESANGLE – 12 – bit
Effective resolution8 B = 300 G, TA = 25ºC, ORATE = 0 – 10.1 – bits
Angle Refresh Rate9 tANG ORATE = 0 – 32 – µs
All linearization and computations disabled, see
Response Time10 tRESPONSE – 60 – µs
figure 1
TA = 25°C, ideal magnet alignment, B = 300 G,
– ±0.5 – degrees
target rpm = 0, no linearization
Angle Error11 ERRANG
TA = 150°C, ideal magnet alignment, B = 300 G,
–1.3 – +1.3 degrees
target rpm = 0, no linearization
TA = 25°C, 50 samples, B = 300 G, no internal
– 0.6 – degrees
filtering
Angle Noise11, 12 NANG
TA = 150°C, 50 samples, B = 300 G, no internal
– 0.8 – degrees
filtering
TA = 150°C, B = 300 G –1.4 1.4 degrees
Temperature Drift ANGLEDRIFT
TA = –40°C, B = 300 G – ±1.2 – degrees
ANGLEDRIFT- B = 300 G, typical maximum drift observed after
Angle Drift Over Lifetime – ±0.5 – degrees
LIFE AEC Q100 qualification testing
1 Typical data is at TA = 25°C and VCC = 5 V and it is for design information only.
21 G (gauss) = 0.1 mT (millitesla).
3 Parameters for this characteristic are determined by design. They are not measured at final test.
4 End user can customize what power-on tests are conducted at each power-on that causes a range of power-on times. For more information, see the description
of the CFG register.
5 During the power-on phase, the A1335 SPI transactions are not guaranteed.
6 The A1335 operates in Magnetic fields lower than 300 G, but with reduced accuracy and resolution.
7 RES
ANGLE represents the number of bits of data available for reading from the die registers.
8 Effective Resolution is calculated using the formula below:
(
log2 (360) - log2 3 X
32
l=1
)
l
where σ is the Standard Deviation based on thirty measurements taken at each of the 32 angular positions, I = 11.25, 22.5, … 360.
9 The rate at which a new angle reading is ready. This value varies with the ORATE selection.
10 This value assumes no post-processing and is the response time to read the magnetic position with no further computations. Actual response time is dependent on
EEPROM settings. Settings related to filter design, signal path computations, and linearization will increase the response time.
11 Error and noise values are with no further signal processing. Angle Error can be corrected with linearization algorithm, and Angle Noise can be reduced with
internal filtering and slower Angle Refresh Rate value.
12 This value represents 3-sigma or thrice the standard deviation of the measured samples.
13 Parameter is tested at wafer probe only.
50
Transducer Output
0
t
Response Time, tRESPONSE
FUNCTIONAL DESCRIPTION
Overview
The A1335 incorporates a Hall sensor IC that measures the direc- value is calculated.
tion of the magnetic field vector through 360° in the x-y plane
• Microprocessor The preprocess signal is subjected to various
(parallel to the branded face of the device). The A1335 computes
user-selected computations. The type and selection of computa-
the angle based on the actual physical reading, as well as any
tions used involves a trade-off between precision and increased
internal parameters that have been set by the user. The end user
response time in producing the final output.
can configure the output dynamic range, output scaling, and
filtering. P1 Angle Averaging. The raw angle data is received in a periodic
stream, and several samples are accumulated and averaged, based
This device is an advanced, programmable internal microproces- on user-selected output rate. This feature increases the effective
sor-driven system-on-chip (SoC). It includes a Circular Vertical resolution of the system. The amount of averaging is determined
Hall (CVH) analog front end, a high-speed sampling A-to-D con- by the user-programmable ORATE (output rate) field. The user
verter, digital filtering, a 32-bit custom microprocessor, a digital can configure the quantity of averaged samples by powers of
control interface capable of supporting I2C, SPI and SENT, and two to determine the refresh rate, the rate at which successive
digital output of processed angle data. averaged angle values are fed into the post-processing stages. The
Advanced linearization, offset, and gain adjustment options available rates are set as follows:
are available in the A1335. These options can be configured in Table 1: Refresh Rates of Averaged Samples
onboard EEPROM providing a wide range of sensing solutions ORATE Quantity of Samples Refresh Rate
in the same device. Device performance can be optimized by [2:0] Averaged (µs)
enabling individual functions or disabling them in EEPROM to 000 1 32
minimize latency.
001 2 64
Operation 010 4 128
011 8 256
The device is designed to acquire angular position data by sam-
100 16 512
pling a rotating bipolar magnetic target using a multi-segmented
circular vertical Hall-effect (CVH) detector. The analog output 101 32 1024
is processed, and then digitized, and compensated before being 110 64 2048
loaded into the output register. Refer to Figure 1 for a depiction 111 128 4096
of the signal process flow described here.
P1a IIR Filter (Optional). The optional IIR filter can provide
• Analog Front End In this stage, the applied magnetic signal is more advanced multi-order filtering of the input signal. Filter
detected and digitized for more advanced processing. coefficients can be user-programmed, and the FI bit can be pro-
grammed by the user to enable or disable this feature.
A1 CVH Element. The CVH is the actual magnetic sensing ele-
ment that measures the direction of the applied magnetic vector. P2 Angle Compensation The A1335 is capable of compensating
for drift in angle readings that result from changes in the device
A2 Analog Signal Conditioning. The signal acquired by the
temperature through the operating ambient temperature range.
CVH is sampled.
The device comes from the factory pre-programmed with coeffi-
A3 A-to-D Converter. The analog signal is digitized and handed cient settings to allow compensation of linear shifts of angle with
off to the Digital Front End stage. temperature.
• Digital Front End In this preprocessing stage, the digitized P2a Prelinearization Rotation (Optional, but required if lin-
signal is conditioned for analysis. earization used). The linearization algorithms require input func-
tions that are both continuous and monotonically increasing. The
D1 Digital Signal Conditioning. The digitized signal is deci- LR bit sets which relative direction of target rotation results in an
mated and band pass filtered. increasing angle value. The bit must be set such that the input to
D2 Raw Angle Computation. For each sample, the raw angle the linearization algorithm is increasing.
CVH
A1 Element
Analog
Front End
A2 Analog Signal
(Applied Magnetic Conditioning
Signal Detection)
A to D
A3 Converter
(Optional) P2a
Prelinearization
Rotation
P2b
(Optional)
Gain Offset
Minimum/
P3 Maximum
Angle Check*
P4 Gain Adjust*
Microprocessor P4b
(Angle Processing) (Optional)
P4a Prelinearization
(Optional) 0 Offset
Harmonic
Linearization (Optional) P4c SRAM
Segmented
Linearization
(Optional) EEPROM
P5 Postlinearization
0 Offset
(Optional) P5a
Postlinearization
Rotation
(Optional)
P6 Angle Clamping*
P7 Angle Rounding
to 12 Bits
(Optional) P7a
Angle Primary Serial Interface
Inversion
(Optional)
Die Adjust
* Short Stroke Applications Only
P2b Gain Offset (Optional). Allows zeroing out of the angle P4c Segmented Linearization (Optional). Applies user-pro-
prior to applying Gain. Set via the GAIN_OFFSET field. Angle = grammed error correction coefficients (set in the LINC registers)
Angle - GAIN_OFFSET. to the raw angle measurements. Use the SL bit to enable seg-
mented linearization.
P3 Minimum/Maximum Angle Check (Short Stroke Appli-
cations Only). The device compares the raw angle value to the P5 Postlinearization 0 Offset (Optional). This computation
angle value boundaries set by the user programming the MIN_ assigns the final angle offset value, to set the low expected angle
ANGLE_S or MAX_ANGLE_S fields. If the angle is excessive, value to code 0 in the output dynamic range, after all linearization
an error flag is set at ERR[AH] (high boundary violation) or and processing has been completed. Set using the ZERO_OFF-
ERR[AL] (low boundary violation). This feature is useful for SET field.
applications that use angle strokes less than 360 degrees (short
P5a Postlinearization Rotation (Optional). This feature allows
stroke). (Note: This feature is only active if the Short Stroke bit
the user to chose the polarity of the final angle output, relative to
has been set.)
the result of the Prelinearization Rotation direction setting (LR
P4 Gain Adjust (Short Stroke Applications Only). This bit bit, described above). Set using the RO bit.
adjusts the output dynamic range of the device. For example, if
P6 Angle Clamping (Short Stroke Applications Only). The
the application only requires 45 degrees of stroke, the user can
A1335 has the ability to apply digital clamps to the output signal.
set this field such that a 45-degree angular change would be
This feature is most useful for applications that use angle strokes
distributed across the entire 4095 → 0 code range. Set using the
less than 360 degrees. If the output signal exceeds the upper
GAIN field. (Note: This feature is only active if the Short Stroke
clamp, the output will stay at the clamped value. If the output
bit has been set.)
signal is lower than the lower clamp, the output will stay at the
P4a Harmonic Linearization (Optional). Applies user-pro- low clamp value. Set using the CLAMP_HI and CLAMP_LO
grammed error correction coefficients (set in the LINC registers) fields. (Note: This feature is only active if the Short Stroke bit
to the raw angle measurements. Use the HL bit to enable har- has been set.)
monic linearization.
P7 Angle Rounding to 12 Bits. All of the internal calculations
P4b Prelinearization 0 Offset (optional but required if for angle processing in the A1335 take place with 16-bit preci-
Segmented Linearization is used). The expected angle values sion. This step rounds the data into a 12-bit word for output
should be distributed throughout the input dynamic range to opti- through the Primary Serial Interface.
mize angle post-processing. This is mostly needed for applica-
P7a Angle Inversion (Short Stroke Application Only). Rota-
tions that use full 360-degree rotations. This value establishes the
tion within the high and low clamp values. [CLAMP_HI - (Angle
position that will correspond to zero error. This value should be
- CLAMP_LO)]. (Note: This feature is only active if the Short
set such that the 360 ≥ degree range corresponds to the 4095 ≥ 0
Stroke bit has been set.)
code range. Setting this point is critical if segmented linearization
is used. This is required prior to going through linearization, as P8 Die Adjust (Optional). Rotates final angle 180 degrees. Used
the compensation requires a continuous input function to operate to compensate for the 180 degree offset between die in dual SoC
correctly. Set using the LIN_OFFSET field. packages.
• ROM Checksum In addition to setting the undervoltage (UV) flag, a VCC ramp
Verification of the ROM checksum may be configured to take will also change the state of the output pins (SDA/MISO and
place at power-on. In addition, the checksum is continuously SENT) as the part enters and exits the reset condition. This is
recalculated in the background during normal operation shown in Figure 2.
(independent of power-on configuration). This test may be
For more information on diagnostic features and flags, refer to
initiated at any time by the system microcontroller via an
the programmers guide for a more complete description of the
Extended Access Command (0xFFE0). If the self-test was
available flags and settings.
initiated via the Extended Access Command, the failing
checksum is stored in the CmdStatus SRAM register (0x00). A
bad ROM checksum asserts the Self-Test Failure Flag, ST.
VCC (V)
POR
3.8
3.7
POR
UV UV
Error Error
Flag Flag
Set Set
Angle Angle t
State of SDA/MISO High Output Accurate Output High
and SENT Pins Impedance Accuracy Angle Output Accuracy Impedance
Reduced Reduced
0 0 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 ... 0/1 0/1 0/1 0/1 0/1
MSB
Using the 4 bits of the Chip Select field, die can be selected
via their ID value, allowing up to four die to be individually
addressed and providing for different group addressing schemes.
If Chip Select is all zeros or the A1335 is operating in SPI mode
(ISEL pin set to a logic high), no ID comparison will be made,
allowing all A1335s to be addressed at once.
Figure 6: General Format for Serial Interface
Example: If Chip Select = 1010, all die with ID3 or ID1 will be
Commands
selected.
A brief description of each bit is provided in Table 5.
Note: If the sharing a SENT line with multiple chips/dies, reading
Table 5: Manchester Command General Format must be done one die at a time.
Parameter Table 7: Chip Select
Bits Values Description
Name
Chip Select
Used to identify the beginning of
2 Synchronization 00 ID3 ID2 ID1 ID0
a serial interface command
0 [As required] Write operation
1 Read/Write
1 [As required] Read operation
Used to select a set of target
4 Chip Select 0/1
chips/die, based on ID value.
6 Address 0/1 [Read/Write] Serial address
Requested serial register
16 Data 0/1
contents (Write operation only)
3 CRC 0/1 Incorrect value indicates errors
Access Code
Synchronize Chip Select (16 bits) CRC
Pulse Sequence
0 0 0 0/1 0/1 0/1 0/1 1 1 1 1 1 1 0/1 0/1 0/1 0/1 . . . 0/1 0/1 0/1 0/1 0/1
MSB
Access Codes:
Options Manchester Access Code = 0x62D2
Selects Manchester output on the SENT pin.
The Manchester Access Code operates as a broadcast pulse, meaning the Chip Select field is inconsequential. For
example, if two A1335s configured with ID0 and ID1 respectively are sharing a common VCC line, a Manchester
Examples
Access Code with a Chip Select Value of 0x1 results in both sensors entering Manchester Serial Communication
mode.
Exit Code
Synchronize Chip Select (16 bits) CRC
Pulse Sequence
0 0 0 0/1 0/1 0/1 0/1 1 1 1 1 1 1 0/1 0/1 0/1 0/1 . . . 0/1 0/1 0/1 0/1 0/1
MSB
Options None
Similiar to the Manchester Access code, acts as a broadcast pulse. To exit the serial communication mode, the Exit
Examples
Code can be any value besides the Access Code (such as 0x0000).
Read/Write
Serial Register
Synchronize Chip Select Address CRC
Pulse Sequence
0 0 1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
MSB
Options None
Examples
Related Commands
Read/Write
Serial Register Data
Synchronize Chip Select Address (16 bits) CRC
Pulse Sequence
0 0 0 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 . . . 0/1 0/1 0/1 0/1
MSB MSB
(LSB)
2048 (1000 0000 0000)
12 to 27 12 to 27 12 to 27 12 to 27
56 ticks ticks ticks ticks ticks
tSENT
Figure 9: General Format for SENT Message Frame
Figure 10: Synchronization and Calibration Pulse □□ Any reset other than a POR or Hard/Soft reset
within the SENT Message Frame • Temporarily sets but clears after the following conditions pass:
The Synchronization and Calibration pulse is 56 ticks wide, mea- □□ Processor in “Idle Mode” (not generating new angle
sured from falling-edge to falling edge, and delineates the start of readings).
a new message frame. The host microcontroller uses this pulse to □□ POR/Hard/Soft Reset
rescale the subsequent nibble values to correct for clock variation
between the controller and the sensor. Soft Error Flag:
• Latched temporarily, clears on next SENT frame unless
Status and Communication Nibble condition is still asserted.
SENT_FIXED SENT_FIXED SENT_FIXED SENT_FIXED SENT_FIXED SENT_FIXED □□ Any unmasked errors asserted
□□ Processor in “Idle Mode”
56 ticks
Synchronization
12 to 27 ticks
Status
12 to 27 ticks
Data 1
12 to 27 ticks 12 to 27 ticks
Pause
b) ID data: Die ID bits set via SA0 and SA1 pins.
Nibble Name Data 6 CRC
tSENT • ID[1]: Value set by the logic level of the SA1 pin.
Figure 11: Status and Communication Nibble c) Serial Data: Two bits, consisting of the SerialSync and Seri-
within the SENT Message Frame alData bits. Together they form the Short Serial Message (per
J2716 Section 5.2.4.1).
The Status and Communication Nibble (SCN) provides diagnos- • SerialSync: Indicates the start of a 16-bit serial message
tic information along with other status and environmental data.
• SerialData: Serial data, transmitted one bit at a time, MSB
Nibble contents are controlled via the SCN_MODE field within
first.
EEPROM. By default, contents of the SCN are not included in
the 4 bit CRC at the end of each SENT frame. The CIS bit within Table 16: SCN Bit Contents
EEPROM enables CRC coverage of the SCN contents. It should SCN_ Bit 3 Bit 2 Bit 1 Bit 0
be noted that this option is not specified in the J2716 SENT stan- MODE
dard. With the CIS bit set the CRC is no longer compliant with 000 0 0 Soft Hard
that outlined in the SENT specification. 001 SerialSync SerialData Soft Hard
The SCN has three different types of bit values which may be 010 ID[1] ID[0] Soft Hard
present, depending on the SCN_MODE setting. These are: 011 0 0 0 Soft+Hard
a) Soft/Hard Error: Overall condition of the A1335, separated 100 0 0 ID[1] ID[0]
into Soft and Hard error flags. Detailed error information can 101 SerialSync SerialData ID[1] ID[0]
be obtained via the expanded data nibbles, set via DATA_ 110 Soft Hard ID[1] ID[0]
MODE, or through the slow serial communication. 111 SerialSync SerialData 0 Soft+Hard
Self-Test and ID Nibble This nibble is particularly useful when sharing SENT lines and
The Self-Test and ID (ST&ID) nibble is optional. It is included using DATA_MODE 4 or 5, as it allows the Self-Test diagnostic
as one of the extended nibbles when using DATA_MODEs 4-7. results and corresponding sensor ID to be quickly determined
This nibble consists of three data bits (MSB is always 0), shown without a significant latency penalty (only one nibble to the
below: SENT frame).
Bit 3 Bit 2 Bit 1 Bit 0 SENT Status Bit Description
0 ST ID[1] ID[0]
The A1335’s extensive status and error flags may be read at any
Figure 13: ST & ID Nibble time via I2C or SPI protocols, or by entering Manchester Com-
munication Mode. To facilitate error/status flag reporting by way
The ST bit, indicates a failure of one of the three internal of the unidirectional SENT protocol, a selection of these flags are
self-tests (CVH self-test, ROM BIST, RAM BIST). If set, this communicated via extra data nibbles when using DATA_MODEs
indicates significant failure of the sensor, and a reset should be 2 or 6. These status flags are also transmitted via the slow serial
initiated. protocol through the SCN.
ID[0] and ID[1] provide the sensor ID value as determined via The flags are 0 if the condition is clear and 1 if the condition is
the logic values of the SA0 and SA1 pins. true. For transient conditions, the flag will clear after the bit is
presented on the SENT output.
Table 19: SENT Status Flag Definitions
Nibble4[3:2]
Bit Definition
DATA_MODE6
23 (11) Reserved (0)
22 (11) Reset other than POR
21 (11) SRAM hard error
20 (11) EEPROM hard error
19 (11) PC watchdog (microprocessor halted)
18 (11) Watchdog timeout (microprocessor locked up)
17 (10) Self-test error
16 (10) Angle timeout (no update in expected time)
15 (10) Temperature sensor out of range
14 (10) In Idle mode; microprocessor is not updating angle content (device is either in Idle mode or booting/self-test)
13 (10) POR (power-on-reset) occurred
Always (1) when using DATA_MODE 2; indicates upper 12 bits
12 (10)
Always (0) during Serial transmission or when using DATA_MODE 6
11 (01) SRAM soft error
10 (01) EEPROM soft error
9 (01) Interface Error (SPI, Manchester Checksum/bit detect error, SENT contention/slot error)
8 (01) Access error (extended error, memory access error, extended overflow)
7 (01) Angle warning (IIR filter reset, angle slippage [computation too long for ORATE], gain overflow [short-stroke] )
6 (01) Angle limit high
5 (00) Angle limit low
4 (00) Magnetic field high
3 (00) Magnetic field low
2 (00) Overvoltage
1 (00) Undervoltage
0 (00) Always 0, indicates lower twelve bits of status when riding in the extended Data nibbles
SENT CRC Nibble The pulse may behave in one of two ways, based on the SENT_
The CRC nibble is a 4-bit error checking code, implemented per MODE setting.
the SAE-J2716 SENT “recommended” specification. With SENT_MODE set to 2, a Pause Pulse will be inserted
The CRC is calculated using the polynomial x4 + x3 + x2 + 1, until new angle data is available. The inserted Pause Pulse is a
initialized to 0101. minimum of 12 Ticks in length. If a pause longer than 768 Ticks
is required, the pulse will restart requiring a minimum of 12 more
By default, the checksum covers only the contents of the data Ticks.
nibbles (3-6 nibbles). By setting the CIS bit within EEPROM, the
contents of the SCN are included within the CRC nibble. For SENT_MODE values greater than 3-7, the sensor operates in
either triggered or addressable/sequential SENT mode. In these
SENT_FIXED SENT_FIXED SENT_FIXED SENT_FIXED SENT_FIXED SENT_FIXED
modes the sensor outputs a SENT message frame in response
to host action (either a trigger or a function pulse). When not
56 ticks 12 to 27 ticks 12 to 27 ticks 12 to 27 ticks 12 to 27 ticks
responding to the host the sensor will output a Pause Pulse of
Nibble Name
Synchronization
and
Status
and
Data 1
(MSB) Data 6 CRC
Pause
Pulse
indefinite length (i.e. remains high until host a host request).
Calibration Communication (optional)
Figure 14: CRC Nibble within the SENT Message Frame 56 ticks 12 to 27 ticks 12 to 27 ticks 12 to 27 ticks 12 to 27 ticks
Synchronization Status Data 1 Pause
Nibble Name (MSB) Data 6 CRC Pulse
and and
Calibration Communication (optional)
frame, transmitted following the CRC nibble. It acts to “fill-in” Figure 15: Pause Pulse within the SENT Message
the frame until the beginning of the next SENT transmission. Frame
Low High
SENT_MODE 2
5 Ticks 7 to 763 Ticks
CRC
SCN
SCN
sync
sync
data
data
no pause pulse. Angle data is sampled near the end
of the Status and Communication nibble. Maximum
0012 (1) SENT age at time of sampling is 2ORATE × 32 µs. Depending
message SENT message 1 SENT message 2 on Tick time and ORATE setting, same data may be
TSENT1 TSENT2
transmitted multiple times. This mode provides the
quickest data delivery rate
pause
CRC
SCN
SCN
sync
sync
data
Waiting
CRC
sync
SCN
sync
data
period, twait the SCN. Data age may be up to 2ORATE × 32 µs when
latched.
This option is useful when the controller requires a
(previous message) SENT message prompt with minimum “age” of the angle data.
pause
Waiting
CRC
SCN
sync
data
SlotNumber N
F_SYNC (Host) BusIdle FrameReq Dly SENT Frame SensorID 0 (Slot 0) BusIdle
F_SYNC (Host) BusIdle FrameReq Dly SENT Frame SensorID 0 (Slot 0) BusIdle
Figure 21: SSENT Sensor Addressing – With Slot Marking (4 Sensors on Bus)
• POR_OFFLINE. When enabled, a Sensor will stay with C_NO_SAMPLE=1 and C_ZERO_SAMPLE=0 will
Offline until the Host issues F_SYNC, or one of the other never sample-and-hold, so will always return current data in
synchronization options takes effect (C_IDLE_SYNC). If response to F_OUTPUT.
disabled, a Sensor will power-up with its SlotCounter set • F_SAMPLE: All sensors except those configured for NO_
to 0, and will go directly Online. This allows the Sensors to SAMPLE=1 will sample and hold their data at the rising edge
initialize without any Host interaction. However, if a Sensor of the pulse. If SAMPLE_ADR=0, this is a BroadcastPulse
gets power-on-reset after the bus is in operation, its counter to a Sensor, and that Sensor will not respond. If SAMPLE_
may be out-of-sync with other Sensors, and this could result in ADR=1, this is also an AddressingPulse to a Sensor, and
bus contention. the addressed sensor will return a SENT frame with either
• IDLE_SYNC. When enabled, a Sensor will monitor the bus the sampled or current data. The SAMPLE_ADR must be
for a long high (BusIdle) period greater than 510 ticks and configured the same for all parts on the bus.
reset its Slot Counter to 0. This option could be used if Sensor • F_DIAG: Sensor(s) will enter self-test Diagnostics based on
polling is expected to always be periodic and continuous, such DIAG_ENABLE and DIAG_ADR options. If configured
that the only extended BusIdle time would be after power-up. with DIAG_ADR=0, the Sensor treats F_DIAG as a
SSENT FUNCTION PULSES BroadcastPulse, does not respond, and immediately enters
Diagnostics unless DIAG_ENABLE=0. If configured with
• F_OUTPUT: Addressed sensor will return a SENT frame
DIAG_ADR=1, the Sensor treats F_DIAG as an Addressing
with sampled magnetic data. If there is data from a sample-
Pulse. The addressed Sensor does not respond, but enters
and-hold operation available (F_SAMPLE or via C_ZERO_
diagnostics if DIAG_ENABLE=1.
SAMPLE=1), then that data is returned, otherwise current
data is sampled and returned. A Sensor configured with • F_SYNC: All Sensors will synchronize their Slot Numbers by
C_ZERO_SAMPLE=1 will sample-and-hold on the rising setting their Slot Counters such that the next Addressing Pulse
edge of the F_OUTPUT pulse for Slot 0. A Sensor configured is for Slot 0.
FrameReqPulse (Host) IncAdrPulses (0-3)(Host) EndAddress > 18 Ticks High SENT Frame (Sensor)
Greater than 8 Ticks Low Host Adds Pulses for Sensor Recognizes the End Addressed Sensor
Width Defines Function SensorIDs 1, 2, or 3 of the Addressing Phrase Responds
SensorID 0 Selected
SensorID 2 FrameReqPulse (Host) IncAdr IncAdr EndAddress SENT Frame (Sensor) BusIdle
SensorID 3 FrameReqPulse (Host) IncAdr IncAdr IncAdr EndAddress SENT Frame (Sensor) BusIdle
Sensors sample their magnetic data based on a combination of SampleAndHold is when the Sensor samples magnetic data on
FunctionPulse and configuration options. There are two types of the rising edge of a specific FunctionPulse and holds it for output
sampling supported: SampleOnOutput and SampleAndHold. in a SENT frame later in time, when addressed. This allows the
data sampling from multiple sensors to be synchronized, with
SampleOnOutput: the tradeoff in latency. The sensor does a SampleAndHold of its
magnetic data in the following cases:
SampleOnOutput is when the Sensor samples magnetic data
within a short time period preceding the transmission of that • An F_SAMPLE function is broadcast, unless the sensor is
data in the SENT frame. This provides the Host with a minimal configured with NO_FSAMPLE = 1.
latency between the data sample and its reception at the Host. • The Host initiates an F_OUTPUT function in SSENT
The sensor uses SampleOnOutput in the following cases: mode, the SlotNumber is for Sensor ID 0, and the sensor is
• An F_OUTPUT function is addressed to that sensor and no configured with ZERO_SAMPLE = 1.
held data is present. Once the Sensor has data held from a SampleAndHold, it trans-
mits it in the SENT frame the next time it is addressed. If the
re
d He sensor is again polled before another SampleAndHold, then that
m ple Sensor will return the same data unless certain events intervene,
Sa in which case the SampleAndHold data is discarded. These
g le
An events are:
ScnNibble DataNibble
• A diagnostic is executed that prevents the SENT interface
F_OUTPUT + Addressing SyncPulse
from obtaining valid magnetic data from the sensors logic
Figure 24: SampleOnOutput Example (CVH_SelfTest).
• The SENT interface is disabled, for instance the SENT line is
taken over by the receipt of a Manchester Access Code.
If a sensor is polled and no SampleAndHold data is available (for enough to flush any internal synchronization or filtering pipe-
instance, if the part comes online after a SampleAndHold has lines, and sees the SENT bus high. This is necessary to guarantee
been issued), it will sample current data. It is not required that that any subsequent low pulses are measured as their full dura-
all Sensors on a shared bus be configured the same for sampling. tion.
This allows a subset of the Sensors on a shared bus to be syn-
chronized for data sample, while others always perform Sample- Bus Sync:
OnOutput. BusSync is the state in which the Sensor determines to which
Addressing Pulse it should respond. For ASENT, this state is
SENSOR STATES: OFFLINE, BUS SYNC, AND ONLINE unnecessary and it will immediately transition from Offline to
Online. For SSENT, the Sensor will first monitor the SENT bus
until it can synchronize its SlotCounter to the other Sensors on
the bus before responding to any Addressing Pulses, but will
always respond to Broadcast Pulses, even in the BusSync state.
All
Co A sensor configured for SSENT will set its SlotCounter and exit
n
Sa figur BusSync to Online when:
mp ed
F_SAMPLE le Se
He ns
re ors • The Host issues a F_SYNC pulse. The sensor immediately
know the next slot is for Sensor ID 0, and can then respond
correctly.
Figure 25: SampleAndHold (SSENT or ASENT) • IDLE_SYNC is enabled and the bus is high (BusIdle) for at
least a fixed (greater than 510 Ticks) period of time.
All
Co • POR_OFFLINE = 0, and the sensor exits power-on-reset.
n
Sa figur
mp ed
le Se
He ns Online:
re ors
In the Online state, the sensor is actively interpreting the shared
bus looking for and responding to Function Pulses. From Online,
F_OUTPUT SLOT 0 SyncPulse ScnNibble DataNibble a sensor will go Offline when:
• It is powered down or reset.
Figure 26: SampleAndHold
SSENT with ZERO_SAMPLE = 1
• It responds to a CVH self test diagnostic request.
• It detects BusContention (SSENT mode).
Offline:
Offline is when the sensor is not actively interpreting the state of USER-INITIATED DIAGNOSTIC SUPPORT
a shared SENT bus. In the Offline state, the Sensor will not drive
The CVH self-test, which validates signal path integrity from the
the SENT bus. A Sensor is Offline:
Analog front-end through the digital detection and processing
• When unpowered, or after power-up circuitry, may be initiated when using any version of the SENT
• After a reset that would reset the SENT logic (POR) protocol (SENT, TSENT,SSENT, or ASENT), provided the
DIAG_ENABLE bit is set within EEPROM.
• During CVH self test
For ASENT and SSENT configurations, diagnostics are initi-
• After BusContention is detected (unless stated otherwise)
ated via the F_DIAG FunctionPulse, unless disabled by DIAG_
The Sensor exits Offline state into BusSync state once its SENT ENABLE=0. The DIAG_ADR option configures a Sensor to
logic becomes functional, after it monitors the SENT bus long interpret this function as Addressing instead of a Broadcast. Sen-
sors configured as Broadcast will enter diagnostics as soon as the For SENT and TSENT configurations, user-initiated diagnostics
F_DIAG pulse is detected. Sensors configured as Addressing will are triggered, if enabled by DIAG_ENABLE=1, by a DiagStomp
only enter diagnostics if they are addressed. Sensors will timeout of the frame. A DiagStomp is a deliberate creation of BusConten-
in response to the F_DIAG, whether or not entering diagnostics tion (Stomp) by the Host during the output of a frame by the Sen-
sor. See the section on BusContention/Stomp for an explanation
of the Stomp. Once the BusContention is detected, the Sensor
releases the SENT bus and initiates the diagnostic.
SyncPulse ScnNibble
F_DIAG
DIAG_ADR=0 Timeout
Options –
The SerialSync and SerialData bits form a 16-bit message, transmitted over sixteen consecutive SENT frames.
The message contents are arranged as shown below:
SCN Bit Nibble #
Examples 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
SerialSync 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SerialData Message ID Data CRC
Short Serial Message
Table 41: EEPROM Registers Map (Factory Reserved Registers Not Shown)
Bits
EADR State
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0x306 – RD LS SB SS 0 IV RO SL HL LR – FI ZERO OFFSET
0x307 – CUST IRR_ERRVAL IIR_FILTER_NUM1
0x308 – ORATE DB FP_ADJ MAXID IIR_FILTER_NUM2
0x309 – UI DH DC SC HAR_MAX (HM) IIR_FILTER_NUM3
0x30A – FR LE LM MAG_HIGH IIR_FILTER_DEN2
0x30B – DM GR LI MAG_LOW IIR_FILTER_DEN3
Linear SEG_LIN_COEFF_2 SEG_LIN_COEFF_1
0x30C
Harmonic HARMONIC_PHASE_1 ADV HARMONIC_AMPLITUDE_1
Linear SEG_LIN_COEFF_4 SEG_LIN_COEFF_3
0x30D
Harmonic HARMONIC_PHASE_2 ADV HARMONIC_AMPLITUDE_2
Linear SEG_LIN_COEFF_6 SEG_LIN_COEFF_5
0x30E
Harmonic HARMONIC_PHASE_3 ADV HARMONIC_AMPLITUDE_3
Linear SEG_LIN_COEFF_8 SEG_LIN_COEFF_7
0x30F
Harmonic HARMONIC_PHASE_4 ADV HARMONIC_AMPLITUDE_4
Linear SEG_LIN_COEFF_10 SEG_LIN_COEFF_9
0x310
Harmonic HARMONIC_PHASE_5 ADV HARMONIC_AMPLITUDE_5
Linear SEG_LIN_COEFF_12 SEG_LIN_COEFF_11
0x311
Harmonic HARMONIC_PHASE_6 ADV HARMONIC_AMPLITUDE_6
Linear SEG_LIN_COEFF_14 SEG_LIN_COEFF_13
0x312
Harmonic HARMONIC_PHASE_7 ADV HARMONIC_AMPLITUDE_7
Linear SEG_LIN_OFFSET SEG_LIN_COEFF_15
0x313
Harmonic HARMONIC_PHASE_8 ADV HARMONIC_AMPLITUDE_8
HAR_MAX>8 HARMONIC_PHASE_9 ADV HARMONIC_AMPLITUDE_9
0x314
HAR_MAX<9 GAIN_OFFSET GAIN (4.8)
HAR_MAX>9 HARMONIC_PHASE_10 ADV HARMONIC_AMPLITUDE_10
0x315
HAR_MAX<10 MAX_ANGLE MIN_ANGLE
HAR_MAX>10 HARMONIC_PHASE_11 ADV HARMONIC_AMPLITUDE_11
0x316
HAR_MAX<11 CLAMP_HIGH CLAMP_HIGH
0x317 – CUSTOMER – SENT_TICK SM SENT_MODE
0x318 – SS ES AW TR SU EU WP WT RC XE ME ST – XO IE CR NR AT AH AL OV UV MH ML
DAW
APPLICATION INFORMATION
Serial Interface Description
The A1335 features I2C-, SPI-, and SENT-compliant interfaces
for communication with a host microcontroller, or Master. A basic
circuit for configuring the A1335 package is shown in Figure 30.
VCC = 5 V VCC
0.1 µF
0.1 µF
VCC 0.1 µF VCC
3.3 V
BYP
BYP 0.1 µF
SA0 CS
SA1 A1335 Host/Master SCLK
1 kΩ 1 kΩ Microprocessor A1335
MOSI
MISO
Host/Master SCL
ISEL ISEL
Microprocessor SDA
DGND
DGND
DGND
AGND
AGND
DGND
DGND
DGND
AGND
(A) Typical A1335 configuration using I2C interface; AGND
(B) Typical A1335 configuration using SPI interface
A1335 set up for serial address 0xC
VCC = 5 V
0.1 µF
VCC
SA0 BYP
0.1 µF
SA1
A1335
Host/Master
SENT
Microprocessor
SCLK
MISO ISEL
DGND
DGND
DGND
AGND
AGND
(C) Typical A1335 configuration using SENT interface (SA0/SA1 may be brought
to BYP or GND to configure Manchester/Shared SENT address)
Figure 30: Typical A1335 configuration
OFF-AXIS APPLICATIONS
8
distance between the sensor and the magnet. Another challenge 7
is overcoming the inherent nonlinearity of the magnetic field 6
vector generated at the edge of a magnet. The device has two 5
+|B|
0G
Figure 32: The magnetic field flux lines run between the north pole and south pole of the magnet. The peak flux
densities are between the poles.
+|B| 360°
Magnetic Detected
Flux Rotation
0G 0°
Zero 90° 180° 270° 360°
Crossing
Figure 33: As the magnet rotates, the Hall element detects the rotating relative polarity of the magnetic field
(solid line). When the center of rotation is centered on the Hall element, the magnetic flux amplitude is constant
(dashed line).
Hall element
Figure 34: Centering the axis of magnet rotation on the Hall element provides the strongest signal in all degrees
of rotation.
daxial(on-axis) daxial(off-axis)
AG (on axis)
Figure 35: The magnetic flux density degenerates rapidly away from the plane of peak north-south polarity. When
the axis of rotation is placed away from the Hall element, the device must be placed closer to the magnetic poles
to maintain an adequate level of flux at the Hall element.
Linearization
Magnetic fields are generally not completely linear throughout sum of ideal periodic waveforms. The A1335 is capable of using
the full range of target positions. This can be the result of non- up to 14 Fourier series components to linearize the output transfer
uniformities in mechanical motion or of material composition. function.
In some applications, it may be required to apply a mathematical
transfer function to the angle that is reported by the A1335. While it can be used for many applications, harmonic lineariza-
tion is most useful for 360-degree applications. The error curve
The A1335 has built-in functions for performing linearization on for a rotating magnet that is not perfectly aligned will most often
the acquired angle data. It is capable of performing one of two have an error waveform that is periodic. This is phenomenon is
different linearization methods: harmonic linearization and piece- especially true for systems where the sensor is mounted off-axis
wise (segmented) linearization. relative to the magnet. Figure 36 illustrates this periodic error.
Segmented linearization breaks up the output dynamic range
An initial set of linearization coefficients is created by character-
into 16 equal segments. Each segment is then represented by the
izing the application experimentally. With all signal processing
equation of a straight line between the two endpoints of the seg-
options configured, the device is used to sense the applied mag-
ment. Using this basic principle, it is possible to tailor the output
netic field at a target zero degrees of rotation reference angle and
response to compensate for mechanical non-linearity.
at regular intervals. For segmented linearization, 16 samples are
One example is a fluid level detector in a vehicle fuel tank. taken: at nominal zero degrees and every 1/16 interval (22.5°) of
Because of requirements to conform the tank and to provide the full 360° rotational input range. Each angle is read from the
stiffening, fuel tanks often do not have a uniform shape. A level ANG[ANGLE] register and recorded.
detector with a linear sensor in this application would not cor-
rectly indicate the remaining volume of fuel in the tank without These values are loaded into the Allegro ASEK programming
some mathematical conversion. Figure 36 graphically illustrates utility for the device, or an equivalent customer software pro-
the general concept. gram, to generate coefficients corresponding to the values. The
user then uses the software load function to transmit the coef-
Harmonic linearization uses the Fourier series in order to com- ficients to the EEPROM. Each of the coefficient values can be
pensate for periodic error components. In the most basic of terms, individually overwritten during normal operation by writing
the Fourier series is used to represent a periodic signal using a directly to the corresponding SRAM.
Meter and
Sender Fill pipe
Linearized rate
Linear Depth
Uniform walls
Angled walls
Figure 36: An integrated vehicle fuel tank has varying volumes according to depth due to structural elements. As
shown in the chart, this results in a variable rate of fuel level change, depending on volume at the given depth,
and a linearized transfer function can be used against the integral volume.
360
270
of the input.
tio
nc
Fu
t
ge
n
io
r
Ta
rs
ve
n
io
In
at
a riz
ne
ut
Li
p
In
tic
ne
ag
90
M
0
0 90 180 270 360
Target Rotational Position (°)
Figure 37b: Any eccentric-
+V
ity is evaluated as an error.
Error Correction (V)
4095
Interpolated Linear Position
(y-axis values represent
n
16 equal intervals)
io
ct
un
tf
pu
ut
n
O
ctio
fun
Magnetic Input Values
ut
Inp
(15 x-axis values read
and used to calculate A
coefficients) xLIN_10
2432
BIN0 Minimum Full Scale Input
on
ncti
n
t fu
io
A u
ct
Inp
un
–xLIN_3
tf
pu
–640
ut
O
0
BIN2
BIN3
BIN16
BIN10
BIN1
A Coefficients stored in
EEPROM
14
0.20 1.70
0.09
D E
1.00 REF
1 2
1 2
Branded Face 0.25 BSC
B PCB Layout Reference View
16X C SEATING PLANE
1.10 MAX GAUGE PLANE
0.10 C SEATING
PLANE
0.30
0.19 0.15
0.65 BSC
0.00
NNNNNNNNNNNN
YYWW
A Terminal #1 mark area
LLLLLLLLLLLL
B Reference land pattern layout (reference IPC7351 TSOP65P640X120-14M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when 1
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) C Standard Branding Reference View
C Branding scale and appearance at supplier discretion N = Device part number
= Supplier emblem
D Hall element, not to scale Y = Last two digits of year of manufacture
W = Week of manufacture
E Active Area Depth = 0.36 mm (Ref) L = Lot number
7.80±0.10
E
D D 8º 0.45 0.65
3.40 1.00 0º 24
24
0.20
0.09
D E1 E2 D
D 2.20 A
1.00 REF
1.65
1 2
1 2
0.25 BSC
24X C
1.10 MAX
SEATING PLANE B PCB Layout Reference View
0.10 C GAUGE PLANE
SEATING
PLANE
0.30
0.65 BSC
0.19
0.15
0.05
A Terminal #1 mark area NNNNNNNNNN
YYWW
B Reference land pattern layout (reference IPC7351 TSOP65P640X120-25M); LLLL
all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias can improve thermal dissipation 1
(reference EIA/JEDEC Standard JESD51-5)
C Standard Branding Reference View
C Branding scale and appearance at supplier discretion N = Device part number
= Supplier emblem
D Hall elements (E1, E2), corresponding to respective die; not to scale Y = Last two digits of year of manufacture
W = Week of manufacture
E Active Area Depth 0.36 mm REF L = Lot number