Lecture 15:

Cascoding

Gu-Yeon Wei
Division of Engineering and Applied Sciences
Harvard University
guyeon@eecs.harvard.edu

Wei 1
 Overview

• Reading
– S&S: Chapter 6.6
• Supplemental Reading
– S&S: Chapter 6.9
– Razavi, Design of Analog CMOS Integrated Circuits: Chapter 4
• Background
– While alluded to earlier, there are different ways of combining the single-
stage amplifiers to improve overall circuit performance. One commonly
used technique is called cascoding. This lecture investigates how
cascoding improves the output resistance and matching characteristics of
current sources and then considers how one might also utilize cascoding in
differential pair circuits to build higher-gain amplifiers.
– Material for this lecture is not found in S&S. The most important part of the
following slides is to understand and be able to calculate how cascoding
increases output resistance.

Wei ES154 - Lecture 16 2

 More Current Mirrors

• We have seen that current mirrors are used both as current sources and active
loads. There is a limitation to current matching arising from the output
resistance, ro of the devices.
• There are some techniques that can be used to increase the effective ro of a
current mirror circuit – utilizing cascoding
• Let’s look at the a couple of commonly used MOS current mirror circuits
– Cascoded current mirror
– High-swing (low-voltage) cascoding

Wei ES154 - Lecture 16 3

 Simple Current Mirror Review

• Let’s review the original simple current mirror circuit

• Currents are governed by the following equations:
IREF
1 W
I REF = I D1 = µ n Cox 1 (VGS1 − Vt ) (1 + λVDS1 )
2
IOUT
2 L
1 W
I OUT = I D 2 = µ nCox 2 (VGS 2 − Vt ) (1 + λVDS 2 )
2 M1 M2
2 L (W/L)1 (W/L)2
– While VGS1=VGS2=VDS1, VDS2 is not guaranteed to be.
So,
I OUT I D 2 (W L )2 1 + λVDS 2
= =
I REF I D1 (W L )1 1 + λVDS1

• For equal W/L’s current mismatch occurs due to differences

in VDS and λ
– Using longer L’s can reduce λ
– Cascoding can make VDS1 ~= VDS2

Wei ES154 - Lecture 16 4

 Cascoded Current Mirror

• Add a cascode device M3 P

– set VB so that VX = VY
IOUT
– IOUT set by current through M2 M3
– M3 buffers VY from variations in VP through a form IREF VB
of feedback relying on the gm of M3
• Analyze with a small signal model and find ROUT X Y
M1 M2
– Apply a test vtst, calculate itst to find ROUT=vtst/itst
(W/L)1 (W/L)2
– notice that vbs3 = vπ= -vx
vtst − v x
itst = ( g m 3 + g mb 3 )(− v x ) +
ro 3
ROUT
v x = itst ro 2
vtst
ROUT = = ro 2 + ro 3 + ( g m3 + g mb 3 )ro 2 ro 3 gm3vπ gmb3vbs3
itst vπ ro3 itst

ROUT ≅ ( g m 3 + g mb3 )ro 2 ro 3 vtst

• Output resistance is significantly increased by the gm3 vx ro2 vbs3

of M3

Wei ES154 - Lecture 16 5

 • How do we bias VB?
– Use another diode to set bias on B
• What is the minimum voltage that P can fall to while
keeping M2 and M3 in saturation? P
IREF
VP min = VGS1 + VGS 0 − Vt M3
IOUT
M0
VP min = (VGS1 − Vt ) + (VGS 0 − Vt ) + Vt B
VDSsat = VGS − Vt X Y
M1 M2
VP min = Vt + 2VDSsat

• Comments:
– To keep both M2 and M3 in saturation, requires
high voltage overhead due to the Vt term
– If VB can be set arbitrarily, then…
VP min ≅ 2VDSsat

Wei ES154 - Lecture 16 6

 High-Swing Cascode

• Also called low-voltage cascode b/c the

voltage across the current source can drop
to a low voltage
P
• Characteristics IREF
IOUT
– Set VB so that VX and VY just greater M0 M3
than VGS-Vt for M1 and M2 to be in
B
saturation
X Y
– M1 and M2 set the currents and VX M1 M2
and VY are ~equal and so good
current matching can be achieved
despite VP variations
– VPmin = 2VDSsat VB generator

Wei ES154 - Lecture 16 7

 • Here is another way to bias the high-swing cascode current source

IREF

M0 P
IOUT
M3
Vt
B
X Y
M1 M2

– Make source follower have very small current to give a Vt drop

– But, VX not equal to VY Æ worse matching

Wei ES154 - Lecture 16 8

 Cascoded Amplifier

• Cascode both the active loads and the differential pair

M7 M8
– Higher effective load resistance
M5 M6 – Higher ro for the differential pair
– Reduces Miller effect (will see later)
vo
Vbias
• However, there are some limitations
M3 M4 – Reduced output swing (must keep all devices in
saturation)
M1 M2
vid

Wei ES154 - Lecture 16 9

 Next Time

• Reading
– S&S Chapter 7
• Supplemental Reading
– Razavi: Chapter 6

• What to look forward to…

– We have completed our analysis of various amplifier topologies and their
DC biasing and small-signal low-frequency operation. Next, we will re-
examine these circuits in the context of high-frequency signals and how
they affect the operation of the three basic MOS single-stage amplifier
topologies, the simple differential pair amplifier, and a differential pair with
cascoding. We will build upon our basic understanding of high-frequency
models for the MOSFET and our ability to calculate and analyze transfer
functions (with Bode plots). We will also learn about a convenient circuit
analysis technique called OCT’s (open-circuit time constants) to facilitate
our analysis of high-frequency MOS amplifiers.

Wei ES154 - Lecture 16 10