Experiment 4th

Subject: Microprogramming
Type: design
Date: 2019-12-5
Purpose: Design and implement a microprogram.
Equipment: PC, TD-CMA experimental system.
Content: 1. Connect the experimental circuit.
MC unit(单元): PC_B - PC&AR unit: PC_B
MC unit: LDPC - PC&AR unit: LDPC
MC unit: LDAR - PC&AR unit: LDAR
MC unit: LOAD - PC&AR unit: LOAD
MC unit: LDIR - IR unit: LDIR
MC unit: SE5～SE0 - IR unit: SE5～SE0
MC unit: SP_B - IR unit: SP_B
MC unit: RI_B - IR unit: RI_B
MC unit: RD_B - IR unit: RD_B
MC unit: RS_B - IR unit: RS_B
MC unit: P<1>～P<3> - IR unit: P1～P3
MC unit: LDSP - IR unit: LDSP
MC unit: LDRi - IR unit: LDRi
MC unit: S3～S0 - ALU & REG unit: S3～S0
MC unit: LDA～LDB - ALU & REG unit: LDA～LDB
MC unit: ALU_B - ALU & REG unit: ALU_B
MC unit: WR - Control bus(控制总线): WR
MC unit: RD - Control bus: RD
MC unit: IOM - Control bus: IOM
IR unit: FZ～FC - ALU & REG unit: FZ～FC
IR unit: R3_B～R0_B - ALU&REG unit: R3_B～R0_B
IR unit: LDR3 to LDR0 - ALU&REG unit: LDR3 to LDR0
IR unit: D7～D0 - CPU internal bus(内总线): D7～D0
PC&AR unit: D7～D0 - CPU internal bus: D7～D0
ALU & REG unit: D7～D0 - CPU internal bus: D7～D0
ALU & REG unit: IN7～IN0 - CPU internal bus: D7～D0
ALU & REG unit: OUT7～OUT0 - CPU internal bus: D7～D0
MEM unit: RD - Control bus(控制总线): XMRD
MEM unit: WR - Control bus: XMWR
MEM unit: A7～A0 - Address bus(地址总线): XA7～XA0
MEM unit: D7～D0 - Data bus(数据总线): XD7～XD0
IN unit: IN_B - Address bus: IOY0
IN unit: RD - Control bus: XIOR
IN unit: D7～D0 - Data bus: XD7～XD0
OUT unit: LED_B - Address bus: IOY1
OUT unit: WR - Control bus: XIOW
OUT unit: D7～D0 - Data bus: XD7～XD0
Timing and Console(时序与控制台): CLK0 - Timing and Console: 30HZ
Timing and console: TS4～TS1 – System bus(系统总线): T4～T1
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Online programming. A microprogram is written to the experimental system using a PC.
Create a new text file with the extension TXT as follows:
$P 00 21 ;IN R1,0 (Input data from input device 0 to register R1)
$P 01 00
$P 02 37 ; MOV R3, R1 (put the data in register R1 into register R3)
$P 03 43 ;ADD R3,[9] (Add the data in the memory unit 9 to register R3)
$P 04 09
$P 05 7C ; OUT 40, R3 (outputs the data in register R3 to output device 40)
$P 06 40
$P 07 80 ; JMP 0 (go to instruction execution in unit 0)
$P 08 00
$P 09 20 ; addend
$M 00 000001; entrance
$M 01 006D42 ;PC->AR, PC+1 (fetch instruction)
$M 02 107070 ; MEM->IR (fetch command), P<1> (analysis command)
$M 03 106004 ;MEM->AR (take the second byte of the IN instruction)
$M 04 183001 ; IO->RD (data input from the input device is fed into register RD)
$M 05 106006 ;MEM->AR (take the second byte of the ADD instruction)
$M 06 101007 ;MEM->A (data in memory is sent to the operator A entry)
$M 07 002608 ; RD->B (data in the register is sent to the operator B entry)
$M 08 04B201 ;A plus B->RD
$M 09 10600A ;MEM->AR (take the second byte of the OUT instruction)
$M 0A 280401 ; RS->IO (data output in the register is output to the output device)
$M 0B 105141 ;MEM->PC (take the second byte of the JMP instruction)
$M 32 006D43 ; PC->AR, PC plus 1 (take the second byte of the IN instruction)
$M 33 003401 ;RS->RD
$M 34 006D45 ; PC->AR, PC plus 1 (take the second byte of the ADD instruction)
$M 37 006D49 ; PC->AR, PC plus 1 (take the second byte of the OUT instruction)
$M 38 006D4B ; PC->AR, PC plus 1 (take the second byte of the JMP instruction)
Where $P is the machine instruction identifier. This is followed by a memory address in
hexadecimal format, ranging from 00 to FF, indicating where the machine instructions are
stored in memory. Then there is the machine instruction in hexadecimal form. The semicolon
is followed by a comment.
$M is the microinstruction identifier. This is followed by a hexadecimal micro address with
a range of 00 to 3F indicating the location of the microinstruction in the control memory.
Then there is a micro-instruction in hexadecimal form with a range of 000000 to FFFFFF. The
semicolon is followed by a comment.
Open the "Composition"(组成) software on the desktop, select the menu item "Dump"( 转储) →
"Load Data"(装载数据), and load the above text file into the experimental system.
Online verification. The microprogram in the experimental system was verified using a PC.
Select the menu item "Dump" → "Refresh Command Area"( 刷 新 指 令 区 ) and click the "Micro
Save" form in the command area to check if it is the same as the micro instruction in the
text file above. If it is different, it can be reloaded or modified manually.
Run online. The microprogram microtravel in the experimental system is run by a PC.
Select the menu item "Experiment"( 实验) → "Comprehensive Experiment"(综合性实验) to open
the data path diagram of this experiment.
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Timing and console switch KK1 is set to "Run"( 运行), switch KK3 is set to "Run", press the
CLR button of the CON unit to clear the micro address register MAR, the instruction
register IR is cleared, and the ALU unit register A And B is cleared.
Press the single-cycle button in the software to complete one micro-instruction each time
you press it. The “Output Area”(输出区) at the bottom of the screen displays the current
micro-instruction and the next micro-instruction.
Please enter the roll number from the input device,plus 20H. Displays the result on the
output device.

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Each rectangle in the figure represents a microinstruction, and the number in the upper
right corner of the rectangle is the position of the microinstruction in the control
memory.
NOP-empty operation PC-program counter AR-address register MEM-memory IR-
instruction register RD-destination register AD-address RS-source register
IO-input and output device A, B-operator inlet
The format of the first byte of the instruction is as follows:
I7 I6 I5 I4 I3 I2 I1 I0
操作码 OP(opcode) RS(Source RD(Destinati
Register) on Register)
In the case of a multi-byte instruction, subsequent bytes may be "immediate", "memory
address", "offset", and the like.
The microinstruction format is as follows:
23 22 21 20 19 18-15 14-12 11-9 8-6 5-0
M23 M22 WR RD IOM S3～S0 A field B field C field MA5～MA0

A B field C field
field
000 NOP 000 NOP 000 NOP
001 LDA 001 ALU_B 001 P<1>
010 LDB 010 RS_B 010
011 LDRi 011 RD_B 011
100 100 100
101 LOAD(PC) 101 101 LDPC(PC+1)
110 LDAR 110 PC_B 110
111 LDIR 111 111

WR: Write
RD: Read.
IOM: fetch (=0) or access peripheral (=1)
S3 to S0: specify the arithmetic function of the operator
A field: Specify which register on the bus to go to.
B field: specifies from which register the number on the bus is coming from.
C field: P<1> specifies whether to execute the branch structure (instruction decoding). If
executed, the lower 4 bits of the microaddress register MAR are determined by the upper 4
bits of the machine instruction (opcode OP), and the upper two bits are determined by the
upper two bits of the current microinstruction address.
The micro address register MAR is used to determine which microinstruction in the micro
address is executed after the current microinstruction is executed.
M5～M0: lower address

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 micro hexadecimal High 5 bits S3～S0 A B field C field MA5～MA0
address field
00 00 00 01 00000 0000 000 000 000 000001
01 00 6D 42 00000 0000 110 110 101 000010
02 10 70 70 00010 0000 111 000 001 110000
03 10 60 04 00010 0000 110 000 000 000100
04 18 30 01 00011 0000 011 000 000 000001
05 10 60 06 00010 0000 110 000 000 000110
06 10 10 07 00010 0000 001 000 000 000111
07 00 26 08 00000 0000 010 011 000 001000
08 04 B2 01 00000 1001 011 001 000 000001
09 10 60 0A 00010 0000 110 000 000 001010
0A 28 04 01 00101 0000 000 010 000 000001
0B 10 51 41 00010 0000 101 000 101 000001
32 00 6D 43 00000 0000 110 110 101 000011
33 00 34 01 00000 0000 011 010 000 000001
34 00 6D 45 00000 0000 110 110 101 000101
37 00 6D 49 00000 0000 110 110 101 001001
38 00 6D 4B 00000 0000 110 110 101 001011

A schematic diagram of the analysis of the instruction process:

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Conclusion.
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I converted my role number which is 25 to hexadecimal
which is 19 and added 20 to it. So the final result
is 39

I enjoyed the experiment, this was one of my best

experience.

Note: Role number 25

Name: Michael Eluchie
Student number: 20184223053107

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