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A Functionally Distributed Vision


System For Parallel Image
Understanding

Guo Qiang, Li Zhong-Rong

Guo Qiang, Li Zhong-Rong, "A Functionally Distributed Vision System For


Parallel Image Understanding," Proc. SPIE 0804, Advances in Image
Processing, (14 October 1987); doi: 10.1117/12.941301

Event: Fourth International Symposium on Optical and Optoelectronic Applied


Sciences and Engineering, 1987, The Hague, Netherlands

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Vision System for
A Functionally Distributed Vision Image Understanding
Parallel Image
for Parallel Understanding

Guo Qiang
Guo Zhong-Rong
Li Zhong -Rong

Harbin Institute
Science, Harbin
Department of Computer Science, of Technology
Institute of
Harbin, P.R. of
Harbin, P.R. China
of China

Abstract
paper, we describe
this paper,
In this design of
the design
describe the distributed multiple
functionally distributed
of aa functionally proce-
array proce-
multiple array
system for parallel vision processing.
ssor system
ssor new architecture
This new
processing. This the power
blends the
architecture blends asso-
of asso-
power of
ciative processor for
ciative processor fast information
performing fast
for performing with the
retrievals with
information retrievals of cellular
capability of
the capability cellular
to process various tasks
array processor to parallel. The
in parallel.
tasks in -based image
pixel-based
The pixel resides in
image resides in an
an
Iconic Array Processor(lAP),
Iconic Array the symbolized
and the
Processor(IAP), and resides in
image resides
symbolized image Array Processor
Symbolic Array
in aa Symbolic Processor
The transfer from iconic to
(SAP). The
(SAP). symbolic is
to symbolic by aa Mapping
accomplished by
is accomplished Multi-Processor(MM
Mapping Multi -Processor(MM
P). The capabilities
P). The of this
capabilities of system allow
this system for feedback
allow for between high
feedback between and low
high and level processing
low level processing
and also
and also support the for mapping
processing for
the parallel processing pixel-based
the pixel
mapping the representation of
-based representation of an
an
image into
image representation(a semantic
symbolic representation(a
into a symbolic used for
network) used
semantic network) -level vision
high-level
for high vision
processing.
Introduction
Dramatic advances
Dramatic declining cost
VLSI and declining
advances in VLSI processor offer
of processor
cost of environment for
offer a new environment for
design of special
design of architectures and
purpose architectures
special purpose algorithms for
parallel algorithms
and parallel in computer
problems in
for problems computer
vision area. Historically,
vision area. special architectures
many special
Historically, many iconic or
for iconic
architectures for data processing
symbolic data
or symbolic processing
were proposed and
were proposed constructed. However,
even constructed.
and even computer vision
as computer
However, as technique matures
processing technique
vision processing matures
the attention is
the attention shifted from
is shifted simple processing
from simple systems to
processing systems more intelligent
to more that not
systems that
intelligent systems not
only can perform
only can processing, but
iconic processing,
perform iconic also apply
but also significant amount
apply significant symbolic processing
of symbolic
amount of processing
and reasoning to
and reasoning operations of
the operations
to the object and
of object scene recognition.
and scene functionally distribu-
The functionally
recognition. The distribu-
ted multiple array
ted multiple system described
processor system
array processor this paper
in this
described in innovative architecture
is aa innovative
paper is architecture
processing.
vision processing.
specially designed for computer vision

The general purpose


The general of a computer
purpose of vision system
computer vision is to
system is analyze image(s)
to analyze image(s) of scene
the scene
of the
domain of interest
domain of content, including
its content,
interest and recognize its extraction of
the extraction
including the information of
-D information
of 33-D of
objects as well
objects as as the
well as description of
the description spatial relationship
of spatial objects in
between objects
relationship between the scene
in the scene
domain. According
domain. to A.R.
According to A.R. Hanson and perspective,1>2 the
Riseman ! s perspective,112
E.M. Riseman's
and E.M. -the computer vision
problem can
problem be described as
can be involving low,
as involving intermediate and
low, intermediate high levels
and high levels of processing. The
processing. The
operations on
of operations
consists of
low level processing consists pixels and
on pixels neighborhoods of
local neighborhoods
and local pixels,
of pixels,
such as segmentation
such as operation to
segmentation operation partition pixels
to partition regions of
into regions
pixels into of similar and texture
color and
similar color texture
properties, and to
properties, lines via intensity and color
to extract lines discontinuities at local edges.
color discontinuities The
edges. The
of low level
result of
result is often a transformed
level processing is with labeled regions
image with
transformed image line
regions and line
segments.
intermediate processing includes
The intermediate
The extraction of
the extraction
includes the features for
the features
of the lines,
regions, lines,
for regions,
vertices well as
as well
vertices as as the entities. The
these entities.
the relations between these processing is
this processing
The result of this is
intermediate representation of image
an intermediate entities, which can
image entities, stored
more naturally match stored
can more
object descriptions
object an interface
descriptions and provide an the low
between the
interface between high levels
and high
low and representa-
of representa-
levels of
tion.

The high level


The high controls the
processing controls
level processing intermediate level
the intermediate of processing
level of the inter-
where the
processing where inter-
mediate symbolic representations
mediate symbolic be related
must be
representations must object descriptions
to object
related to in a know-
stored in
descriptions stored know-
ledge base.
ledge base. The represent information
descriptions represent
The object descriptions the 3-
about the
information about world in
dimensional world
3-dimensional in
a representation that might be used to to form matches. The
model-matches.
form model- of high
result of
The result level proce-
high level proce-
ssing is
ssing is aa symbolic representation of
symbolic representation the content
of the of aa specific
content of image in
specific image terms of
in terms the gene-
of the gene-
ral stored knowledge of the
ral the object classes and
object classes the physical
and the environment.
physical environment.
The rest
The of this
rest of paper is
this paper organized as
is organized In the
follows: In
as follows: next section
the next we describe
section we the cha-
describe the cha-
racteristics of
racteristics design of
our design
of our the system
of the as a machine
system as for parallel
machine for processing. In
vision processing.
parallel vision In
section III
section we consider the
III we this system
of this
the application of in the
system in process of
the process images
transforming images
of transforming
into symbolic representation
into a symbolic high level
for high
representation for processing. In
level processing. section IV
In section conclude this
we conclude
IV we this
discussion.
paper with aa discussion.
System Architecture Description
System Architecture Description

is shown the
Fig.1, it is
In Fig.1, diagram of
block diagram
the block distributed multiple
functionally distributed
of aa functionally pro-
array pro-
multiple array
cessor svstem
cessor for computer vision processing.
system for mainly consists
It mainly
processing. It an iconic
of an
consists of proce-
array proce-
iconic array
ssor(IAP), a mapping
ssor(lAP), multi -processor(MMP), aa symbolic
mapping multi-processor(MMP), array processor(SAP),
symbolic array host computer
processor(SAP), aa host computer
network.
the interconnection network.
and the

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Vol.804Advances
804 AdvancesininImage Processing(1987)
ImageProcessing (1987)

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RowBroadcasting
Row Bus
Broadcasting Bus

| Host Computer )

Fig.1
Fig.1 Block Diagram of Function-
of aa Function-
ally Distributed Vision System
Pig.3
Fig.3 SAP Array Architecture

is intended for processing raw


IAP is
IAP SAP for
images; SAP
raw images; semantic symbolic
processing semantic
for processing represen-
symbolic represen-
of images;
tation of
tation into symbolic
MMP for transforming images into
images; MMP representation for
symbolic representation for high level
high level
is, extracting primitive
processing, that is,
processing, symbolic information
primitive symbolic IAP, assembling
from IAP,
information from these
assembling these
tokens into
symbolic tokens
symbolic and loading
network, and
into a consistent semantic network, network into
this network
loading this SAP.
into SAP.
is a multiprocessor system.
MMP is are based on
system. Both IAP and SAP are two classical
on two architectural
classical architectural
concepts: associative processing
concepts: and cellular
processing and processing.
array processing.
cellular array
IAP Architecture
Previous research has
Previous research that aa mesh
shown that
has shown connected cellular
mesh connected array processor
cellular array well sui-
is well
processor is sui-
for performing basic image processing
table for
table tasks.
processing tasks.
The Iconic
The of sixty
consists of
Iconic Array Processor(IAP) consists thousand processing
-four thousand
sixty-four cells arranged
processing cells arranged
design is
This design
as a 256x256 square array. This to be
intended to
is intended expandable up
be expandable up to square
1024x1024 square
to aa 1024x1024
array, for
array, displays have from
for conventional CRT displays pixeled lines
256 pixeled
from 256 by 256
lines by lines, to
256 lines, lines
1024 lines
to 1024
1024 lines.
by 1024 cell storing
one processing cell
lines. With one information concerning a
storing information a pixel,
pixel, IAP can
IAP can
the basic image processing
accomplish many of the
accomplish including both
operations, including
processing operations, and its
pixel and
both pixel local
its local
of operation,
classes of
neighborhood classes quickly.
very quickly.
operation, very
Each IAP cell 256 bits
cell contains 256 storage, 66 single
of storage,
bits of bit registers,
single bit and aa one
registers, and ALU for
-bit ALU
one-bit for
functions. IAP
logic functions.
and logic
bit serial arithmetic and keeps up
array keeps
IAP array ILLIAC IV
up ILLIAC mode
interconnecting mode
IV interconnecting
i.e. information
i.e. in each
information in can be
cell can
each cell moved North,
be moved East or
South, East
North, South, West on
or West the array
on the so that
array so that
neighboring cells can
neighboring cells with each
communicate with
can communicate other. The
each other. processor allows
The processor broadcast of
global broadcast
allows global of
commands and
commands data from
and data controller to
IAP controller
from IAP to all cells. An
procssing cells.
all procssing activity bit
An activity is set
bit is in each
set in each
cell
cell whenever there is
whenever there match between
is aa match the content
between the of aa cell
content of and data
cell and broadcast by
data broadcast the IAP
by the IAP
controller. Comparison operations
controller. Comparison as great
such as
operations such than (or
great than less than),
(or less and minimum
maximum and
than), maximum minimum
searches, operations may
searches, and arithmetic operations performed in
be performed
may be parallelononall
in parallel allcells. shows
Fig.2 shows
cells.'Fig.2
basic function block diagram of
the basic
the of each IAP processing
each IAP cell.
processing cell.

/
/One-Bit
ALU \ mask
the accumulator bit, which is also used for
communication.
Y - - -- the second accumulator bit, which is also
used as SR output register bit.
C - - -- the carry bit, used for arithmetic operations.
A - - -- the activity bit, used for enabling or disabling
this PC on any
his PC operation.
given operation.
any given
B---- the second activity bit, used as a temporary
SR F-'i Y signal storage for activity flag.
r --r S---- the sum register bit, which is also used as SR
ESWN input register bit.
A +---4 B
PCs 1 1
SR - -- the shift reglster(S bits), used for storing
ISL information concerning one pixel.
PCM - --the
PCM localmeraory(256
thelocal bits), used
memory(256 bits), for PC
used for operatloi
PC operations.
ISL- -- the interconnection selecting logic.
SSWM PCs
RS4N the4 4 neighboring(3a3t,
PCs- --the nelghboring(Rast, South, West, North)
3outh, 'West, North)
processing cellsCPCa).
processing cells(PCS).

Data Bus
P

Pig.2
Fig.2 The Basic Function Diagram of
The Cell
IAP Cell
of Each IAP
SPIE Vol.
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SAP
SAP Architecture

The
The Symbolic Array Processor(SAP)
Processor(SAP) mainly
mainly consists
consists ofof aa 2-
2-dimensional square array,
dimensional square array, 22-MGC
-MCC
(2-dimensional
(2- dimensionalMesh
Mesh Connected
Connected array
array of
of Computer),
Computer),-' of
of identical cells which
identical processing cells which are
are
interconnected
interconnected "both and locally
both globally and locally asas shown
shown in
in Fig.3.
Pig. 3. The
The processing
processing cells
cells are
are micro-
micro-
programmable so they can operate
programmable so operate independently.
independently.
In 2-MCC
2 -MCC array,
array, aa processing
processing cell
cell can
can locally
locally communicate
communicate to
to one
one of
of its
its 44 neighbors
neighbors or
or
broadcast along its row or column.
broadcast column. With row and column broadcasting, single pro-
broadcasting, data in any single pro-
cessing
cessing cell
cell can be
be broadcast toto all
all PCs
PCs in
in 22 steps.
steps. Information
Information in
in aa particular
particular cell
cell can
can be
be
retrieved either
either by its content(as in associative
associative memory) or by that
memory) or that cell's
cell's address.
address. The
The
associative
associative concept
concept alone
alone is
is not
not sufficient
sufficient forfor designing
designing efficient
efficient architectural
architectural structure
structure
for AI.
AI. This
This is
is because
because retrieval operations
operations in AI AI are
are more
more complex simple words;
complex than simple words; most
most
frequently we
frequently we need to
to match subgraphs
subgraphs oror other
other patterns.
patterns. Also,
Also, we
we need
need toto pursue several
pursue several
hypotheses
hypotheses in parallel, this is
parallel, and this is not possible
possible with simple
simple associative
associative processors.
processors.
The SAP's
The SAP's architecture
architecture blends the power
blends the power of
of associative
associative processors
processors for
for performing
performing fast
fast
information retrievals
retrievals with the
the capability of
of cellular
cellular array processors to process
processors to process various
various
tasks in parallel;
tasks parallel; and the
the regularity of
of this
this array
array is
is an
an important
important feature
feature which makes
makes fea-
fea-
sible
sible its
its VLSI implementation.

processing cell
Each processing cell contains
contains a content addressable
addressable memory(CAM), unit(PU) and
memory(CAM), processing unit(PU)
control unit(CU)
control unit(CU) asas shown
shown in
in Fig. 4. The
Fig.4. The cell
cell also
also has
has constant
constant number
number of
of registers
registers and
and flags
flags
Processing
Processing unit
unit has
has simple
simple microinstructions
microinstructions such
such as
as AND,
AND, OR,
OR, NOT,
NOT, RESET(
RESET( a flag ), MASK(a
flag ), MASK(a
field
field of
of aa string),
string), MATCH(a
MATCH(a string).
string). There
There are
are two
two types
types of
of data
data transfer
transfer instructions
instructions that
that
can be
can be executed
executed by
by the
the processing
processing cell:
cell: Route
Route data
data to
to one
one of
of the
the four
four nearest
nearest neighbors;
neighbors; and
and
Broadcast data toto a row of processing cells or a column of cells.cells. At any time
time only
only one
one type
type
of
of data
data routing
routing instruction
instruction can
can be
be executed
executed by
by the
the PC.
PC. Further,
Further, ifif broadcast
broadcast instruction
instruction is
is
executed
executed only
only one
one PC
PC per
per row( or column)
row(or column) can
can send
send aa value
value to
to all
all processing
processing cells
cells in
in its
its row
row
column) .
(or column).

Row and Column


Column Broadcasting is powerful communication mechanism. mechanism. Suppose only PCs in a
particular
particular row
row have
have a data item
item and wewe wish
wish toto compute
compute for
for example, the Max
example, the Max ofof these
these numbers
numbers
then, we
then, we can use
use row and column
column broadcasting
broadcasting buses
buses toto simulate
simulate aa tree
tree structure.
structure. In In step
step 0,
0,
data in PC's (0,2k)
(0,2k) andand (0,2k
(0,2k+l),
+1), O^k^^N/2-1
0.k4N/2 -1, , use
use column bus 2k 2k and
and 2k
2k+1+1 and
and row
row bus
bus kk to
to
the Max
compute the Max ofof the
the data
data in
in PC's
PC's (0.2k)
(0,2k) and
and(0,2k
(0,2k+l).
+1) general, in the
In general,.in the jth
jth step,
step, where,
where,
0<:j^
04j4lolo^-1
I -1 Me*
Max ofof data
data in. PC's (0,2k2'),
in,PC's (0,2k2i ), and
and (0,(2k
(0, (2k+1 )2J ) , 0,<k«N/2J
+1)2'), -1 is
0.k4N /21-1 is computed
computed using
using
2k2 J and
column bus 2k2' and (2k
(2k+l)2J
+1)2' and row bus j. j.
Data
Data representation
representation for for the
the object
object processed
processed in in the
the SAP
SAP isis in
in aa semantic
semantic network
network form.
form. AA
semantic network
semantic network consists
consists of of nodes
nodes and
and arcs
arcs connecting
connecting thethe nodes.
nodes. The
The nodes
nodes of of the
the network
network
objects or concepts and arcs represent the
represent objects the relations between the the objects.
objects. Usually,
Usually,
one cell
one cell is
is assigned
assigned to to each
each node
node ofof the
the semantic
semantic network.
network. TheThe relations
relations associated with with
that node
that node are
are stored
stored in in the
the CAM.
CAM. An
An entry inin the
the CAM
CAM consiste
consiste of of several
several fields; complex
fields; complex
matching and masking of of individual
individual fields
fields can
can be
be achieved.
achieved.

(1 -1,) J)
Processing Cell(i,J)
lI /0 Buffer 1
How Broadcast Bue
Column Broadcast Hua
CU
Buay Val CAM
PC memory

áU
Block keg.
}

Input UP
IAP
Queue Plug Bito """Controller
ontroller

SAP
ontroller
m I Ieeatetera
o Routing
Logic Mem.

from
II /0 Buffer lAP

Fig.4 SAP Cell Architecture


Fig.5 MMP Architecture

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A dvancesininImage
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Even though both IAP and SAP share the same same characteristics processing and
associative processing
characteristics of associative and
cellular array processing, neither
array processing, of them
neither of can be
them can solveininreal
alonetotosolve
used alone
be used real-time
-time the en-
the en-
range of
tire range
tire This is
algorithms. This
of vision algorithms. because the
is because complexity of
the complexity IAP cell
of IAP cell is simple to
too simple
is too to
perform complex symbolic processing and
perform size of
the size
and the SAP is
of SAP small to
too small
is too parallel
perform parallel
to perform
efficiently. AA comparison
image processing efficiently.
image comparison between IAP and
between IAP is shown
SAP is
and SAP shown as follows:
as follows:
Features IAP SAP
Array Size Large Small
256x256 64x64
PGM
PCM Small Large
0(10 2 ) bits
0(102) 0(10*)
0(104) bits
PC Structure Serial ALU Processing Unit
Bit Registers Communication Unit
Logic Control Unit
Control
Data Representation Numeric Symbolic
Mode of SIMD SIMD
Operation Associative Associative
MIMD
It seen that
It can be seen array processors
both array
that both are required
processors are in order
required in high-performance
buildhigh
ordertotobuild -performance
vision system.
real -time vision
real-time
MMP Architecture
Multi-Processor(MMP)
The Mapping Multi-
The f s functions
Processor(MMP)'s are to
functions are to extract primitive symbolic informa-
symbolic informa-
produced in IAP,
tion produced
tion these symbolic
IAP, to assemble these into aa consistent
descriptions into
symbolic descriptions semantic
consistent semantic
network, to load this
network, and to into SAP
network into
this network for high
SAP for -level processing.
high-level MMP performs
Also, MMP
processing. Also, performs
complicated data transfers.
complicated data Fig.5, it
In Fig.5,
transfers. In shown the
is shown
it is diagram of
block diagram
the block of MMP structure. It
MMP structure. It
consists
consists of eight processors, modules, one
memory modules,
processors, kk memory networkand
synchronizationnetwork
one synchronization input
oneinput
andone --
output The multi
output alignment network. The operate in MIMD mode.
-processors operate
multi-processors mode.

Each processor has


Each processor local memory
its own local
has its which contains
memory which software and
contains software data, as
temporary data,
and temporary as
well as its
well as control unit(CU)
own control
its own to realize
unit(CU) to operating mode.
realize MIMD operating The processors
mode. The share aa
processors share
global memory which is
global into k modules.
is distributed into Interconnection INp
modules. Interconnection IN2 allows parallel acce-
IN acce-
ss processors to
of processors
ss of memory modules
to memory the coordinated
under the
modules under planning of
coordinated planning of their own Memory Map-
ping Units(MMU).
ping The synchronization network INj
Units(MMU). The facilitates interprocessor
IN3 facilitates interactions. AA
interprocessor interactions.
key component ofof MMP is the crossbar
is the network INi,
interconnection network
crossbar interconnection which links
INj, which MMP to
links MMP and
IAP and
to IAP
transfer of
The transfer
SAP.. The
SAP segment information
of segment from IAP
information from to MMP
IAP to is done
MMP is sequentially at
done sequentially the block
at the block
level; however,
level; however, sufficient parallelism is because data
achieved because
is achieved in each
data in each block transmit-
are transmit-
block are
simultaneously. An alignment network is
ted simultaneously.
ted is placed between IAP and MMP
IAP and that each
such that
MMP such IAP
each IAP
cell can
cell transmit data to any processor
can transmit in MMP. The
processor in routing of
The routing data in
of data network is
this network
in this con-
is con-
trolled by MMP
trolled system. The
MMP operating system. performed by
function performed
The major function is to
MMP is
by MMP to construct sema-
construct aa sema-
ntic network from thethe primitve produced in
primitve information produced in IAP. This is
IAP. This is a complicated tasktask and
and
solution is
solution is not unique. It
not unique. depends upon
It depends prior knowledge
upon prior MMP receives
knowledge MMP from the
receives from Host Computer
the Host Computer
about the type
about the network to
semantic network
of semantic
type of be constructed.
to be This also
constructed. This knowledge of
implies knowledge
also implies of the
the
allocation ofof nodes and relations of semantic network
of semantic network into SAP processing
into SAP cells.
processing cells.
transfer of
The transfer
The through INi;
takes place through
of data from MMP to SAP takes MMP processor
one MMP
IN, ; one is assi-
processor is assi-
one row of SAP processing cells.
to one
gned to are controlled by a distributed
operations are
cells. MMP operations
operating system running
operating system on MMP
running on processors. MMP's
MMP processors. operations are
MMP's operations correlated with
are correlated IAP and
the IAP
with the and
SAP with the
SAP with aid of
the aid their controllers.
of their General purpose
controllers. General microprocessors can
purpose microprocessors be used
can be to build
used to build
MMP.

The Iconic to
The Transformation from Iconic Symbolic
to Symbolic
system, the
this system,
In this process from
the transformation process iconic to
from iconic to symbolic into
symbolic can be divided into
four subprocess. An
four subprocess. example is
An example presented in
is presented this section
in this to show
section to how the
show how representa-
the iconic representa-
of a simple
tion of
tion into aa semantic
transformed into
simple object is transformed semantic network representation stored
network representation on SAP.
stored on SAP.
The simple
The object, aa cube,
simple object, is shown
cube, is in Fig.6.
shown in has three
It has
Fig.6. It surfaces S1,
three surfaces S2, and
S1, S2, S3, and
and S3, and
seven vertices A,B,C,D,E,F
seven vertices and G-.
A,B,C,D,E,F and Assume the
G. Assume raw image
the raw is handled
image is very well
handled very the segmenta-
well by the segmenta-
tion process,
tion process, the be divided
can be
the whole process can divided into four steps
into four as follows:
steps as follows:
1; The
STEP 1: symbols of the
The RSV symbols are extracted from
image are
the image from IAP. attributes
IAP. Their required attributes
depend on the
depend on complexity of
the complexity the scene
of the and the
scene and segmentation algorithms.
the segmentation this particular
In this
algorithms. In particular
case, we only
case, we extract regions
only extract and segments
regions and together with
segments together their attributes.
with their region attri-
The region
attributes. The attri-
butes are area,
butes perimeter, and
area, perimeter, line segments
bounding line
and bounding segment attributes
and segment
segments and length,
are length,
attributes are
slope, and
slope, the bounded
and the regions for
bounded regions segments. Each
for segments. cell contains
Each cell 256 bits
contains 256 of memory
bits of which are
memory which are
assigned as
assigned as follows: 16 bits
follows: 16 for pixel
bits for localtion, 88 bits
pixel localtion, for gray level
bits for value, 22
level value, bits for
22 bits for
flag, 18 bits for region label,
property, 44 bits for region property flag,
region property, local
label, 4 bits for local

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connectivity,
connectivity, 22 bits
bits for cell type
for cell type (R,S,V,
(R,S,V, or
or midpoint)
midpoint) flag,
flag, and
and the
the rest
rest bits
bits for
for tempora-
tempora-
storage.
ry storage.
The amount
The amount of data to
of data to stored
stored in
in region and
and segment
segment cells
cells is
is large,
large, but
but other
other cells
cells might
might
contain
contain nothing.
nothing. Therefor, the attribute
Therefor, the attribute values associated with regions
regions and
and segments
segments are
are
stored
stored inin the
the nearby
nearby unused cells using
unused cells using region
region property flag toto indicate
indicate type
type of
of data
data and
and
pixel location
pixel to indicate
location to indicate the
the dominating
dominating cell.
cell. Using
Using this
this mechanism,
mechanism, the
the data
data is
is distribu-
distribu-
ted as broadly as possible
ted as broadly as possible to to achieve
achieve parallel
parallel processing
processing of
of data
data transfer
transfer from
from IAP
IAP to
to MMP.
MMP.
STEP 2:
STEP 2: The
The data
data is transfered from
is transfered from IAP to
to MMP
MMP in
in this
this step.
step. All
All attribute
attribute values
values of
of the
the
same type
same associated
associated withwith
one one entity
entity (R or
(R or S) S)
areare transferredtotoMMP
transferred MMPsimultaneously.
simultaneously. At
At
first,
first, IAP
IAP controller
controller broadcasts
broadcasts region
region property
property flag
flag to
to all
all cells,
cells, the
the cells
cells having
having diffe-
diffe-
rent flag
rent flag are
are consequently
consequently turned
turned off.
off. Read responder
responder operation
operation isis then
then applied to output
applied to output
required
required information.
information. In
In this
this case,
case, regions
regions 31,
S1, 32
S2 and
and S3,
S3, and
and their
their attributes
attributes are
are extrac-
extrac-
ted.
ted. Then
Then follows
follows the
the extraction
extraction of
of segments
segments CD,
CD, AD,
AD, AB,
AB, BC,
BC, AE,
AE, EF,
EF, BF,
BF, FG
FG and
and CG,
CG, and
and
their attributes.
STEP 3:
STEP J>: AA semantic
semantic network
network representatio
representationn of
of the
the cube
cube is
is illustrated
illustrated in
in Fig.7
Fig.7 .. Each
Each
regionU) and
region(R) and segment(s)
segment(s) is
is assigned
assigned to
to one
one SAP processing
processing cell.
cell. The
The attributes
attributes ofof regions
regions
and
and segments
segments areare stored
stored in
in the
the associated
associated node
node as
as list
list of
of propreties.
propreties. The
The nodes
nodes and
and rela-
rela-
tions
tions constituting
constituting the the network are
are denoted
denoted as
as fellows:
fellows:
Nodes Relations between nodes
S1, S2,
S1, S2, S3 : Regions; : R1 : Component region;
R1 :

AB, AD,
AB, CD, BC,
AD, CD, BC, AE,
AE, EF,
EF, BF,
BF, FG, CO : Segments;
FG, CG R2 :: Bounded by;
R2 : by;
R3 : Adjacent;
R3 :

R4 :: Has
Has length;
R5 :: Has
R5 Has slope(orientation),
slope(orientation).

Symbol SAP Cell


Cell Poiner
P 3iner Mem.
Mem.
Prev.
Prev. Next
Name Type Plag IAP Add, SAP Add, Pointer Pointer
31
S1 R 00 (58,7) (3,1)
(9,1) R3(4,1)/S2 R2(4,3)/1B
R2 4,3)/AB
R2 6,5)/BC
R3(6,5)/33 R2(6,5)/BC
R2 (8,3)/CD
R2 8,3)/CD
6.O/AD
R2 (6,1)/AD
R3 4.O/S2
R3(4,1)/32
R3(3,5)/33
R3(9,5)/33
32
32 R
3 00 (30,7) (4,1) R3(3.1)/31 R2(4,3)/A3
R3(9,1)/31 R2(4,3)/A9
R3(8,5)/S3 R2(3,3)/AE
R3(8,5)/33 R2(3,3)/4.E
R2(2,6)/EF
R2(2,6)/EP
R2 3,6)/3?
R2(3,6)/9?
R3(8,1)/31
R3 8,1)/31
R3(3,5)/S3
R3 8,5)/33
S3
33 R 00 (58,38) (8,5) R38,1)/S1 R2(6,5)/BC
R3(8,1)/S1 R2(6,5)/3C
Fig.6 A Cubic Object R3(4,1)/S2 R2 3,8)/B?
R3(4,1)/32 R2(3,8)/8?
R2(*,S)/PG
a24,e)/?G
R2(7,6)/C3
R2(7,8 )/CG
R3(3,1)/S1
R1(13,1)/31
R3(4,l)/32
R3(4,1)/32
AB 3 01 (31,22) (4.3)
(4,3) R2(8,1 )/31
R2(9,1)/91
R2(4,1 )/32
R2(4,1)/52
BC - 01 (44,3?)
(44,37) (6,5)
(6,5) R2(3,1 )/S1
R2(9,1)/51
R2(S,5)/33
R2(5,5)/33
CD 3, 0
01 (S3, 22)
(59,22) (9,3) R2(3,1)/S1
R2(9,1)/S1
AI>
AD 3 0
01 (44,61) (6,1)
(5,1) R2(3,1)/S1
R2(9,1)/S1
AS
AN 3 0
01 (20,20)
(22,20) (3,3)
(3.3) R2(I,1)/S2
R2(1,1)/92
E? S 0
01 (12,42) (2,6)
(2.6) R2(4,1)/S2
3?
B? 33 0
01 (20,46) (3,6) R2U.D/S2
02(4,1)/32
R2(3,5)/33
92(9,5)/33
?G
?G 3
o 0
01 (27,57) (4,8)
(4,9) R2(8,5)/33
R2(8,5)/53
CG o3 0
01 (50,46) (7,6) R2(8,5)/33

Fig.8 Allocation of
of Nodes in
in SAP
SAP

Fig.7
Fig.7 The Semantic Network Represen-
The Represen-
tation of A Cubic Object
Object

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/ SPIEVol.
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ImageProcessing
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After the image
After the image data is
is locaded into the MMP,
into the MMP, the
the relations
relations between
between nodes
nodes have
have to
to be
be con-
con-
structed.
structed. There are two types
There are types of
of relations in
in this
this example:
example:
Relations between two
two nodes allocated
allocated in
in different
different cells,
cells, such
such as
as R2(s1,
R2(s1, CD);
CD);
Relations between one
one entity(region
entity(region or
or segment)
segment) and
and its
its attributes,
attributes, such
such as
as R4(CD,L1),
R4(CD,L1),
where
where L1 CD and
L1 is a value for CD and is
is not
not assigned
assigned to
to aa separate
separate cell.
cell.
The
The construction of the
the second type
type of
of relations isis easy
easy since
since their
their data
data come
come from
from the
the
same
same IAP cell. However,
IAP cell. construction of
However, the construction of the
the first
first type
type is
is more
more difficult
difficult because
because MMP
MMP has
has
to identify
to identify the
the SAP
SAP cell
cell where
where each
each node
node is
is going
going to
to be
be placed
placed and
and then
then inform
inform all
all other
other
concerned processors about the
concerned the location
location of
of that
that node.
node. One
One possible
possible solution
solution is
is that
that SAP
SAP will
will
be
be located
located as Pig.8 .. Notice
as shown in Fig.8 Notice that this figure corresponds to to the
the semantic
semantic network
network
of Fig.7
Pig.7 . .

STEP 4: is ready
4: Once data is ready to
to send
send to
to SAP,
SAP, MMP
MMP transmits
transmits blocks
blocks of
of data
data as
as shown
shown in
in Fig.8
Pig.8
into SAP cell.
into corresponing SAP cell.

Conclusions
In this paper,
In paper, we
we have
have introduced
introduced aa functionally
functionally distributed
distributedmultiple
multiple-array architecture
-array architecture
which
which is
is capable
capable of
of performing
performing aa broad
broad range
range of
of parallel
parallel algoruthma
algoruthms inin computer
computer vision
vision
processing. This system
processing. This system consists
consists of
of aa low
low-level iconic array
-level iconic array processor,
processor, a ahigh
high-level sym-
-level sym-
bolic
bolic array
array processor,
processor, aa mapping
mapping multiprocessor
multiprocessor system
system and
and aa host
host computer.
computer. WeWe briefly
briefly
discussed the structure of these
discussed the these processors
processors and
and indicate
indicate the
the major
major steps
steps required
required toto trans-
trans-
image from
fer an image iconic to
from iconic to symbolic
symbolic representation.
representation. Usually,
Usually, because
because of the lack
of the of aa
lack of
symbolic
symbolic processor,
processor, in some computer
computer vision
vision systems
systems many
many symbolic
symbolic processing
processing tasks
tasks are
are done
done
in
in iconic
iconic domain. The architecture of
domain. The of our
our system
system allows
allows the
the extraction
extraction of
of primitive
primitive symbolic
symbolic
information
information from domain, and
from iconic domain, and then
then the
the capability
capability ofof performing
performing complex
complex symbolic
symbolic pro-
pro-
cessing domain.
cessing in symbolic domain.

References
1.
1. Hanson,
Hanson, A.A. R.
R. and
and Riseman, E. E. M.,
M., "VISION:
"VISION: AA Computer
Computer System
System for
for Interpreting
Interpreting Scenes"
Scenes"
in
in Computer
Computer Vision Systems, A.R.
Vision Systems, A.R. Hanson and and E.M.
E.M. Riseman,
Riseman, Eds.,
Eds., Academic
Academic Press,
Press, New
New York,
York,
PP. 303-333,
pp. 303 1978.
-333, 1978.
2.
2. Riseman,
Riseman, E. E. M.
M. and Hanson,
Hanson, A.A. R.,
R., "A"A Methodology
Methodology for
for the
the Development
Development of of G-eneral
General
Knowlege-Based
Knowlege -Based Vision
Vision System",
System ",Proc.
Proc. IEEE
IEEE 1984
1984 Workshop
Workshop on
on Principles of of Knowlege
Knowlege-Based
-Based
Systems,
Systems, pp.pp. 159
159-170,
-170, 1984.
3.
3. Weems,
Weems, C.C. et
et al., "Iconic and Symbolic
al., "Iconic Symbolic Processing
Processing Using
Using aa Content
Content Addressable
Addressable Array
Array
Processor",
Parallel Processor ", Proc.
Proc. IEEE
IEEE 1985
1985 Conf.
Conf. onon Computer Vision andand Pattern
Pattern Recognition,
Recognition, pp.pp.
598-607,
598 -607, 1985.
4. Selfridge,
Selfridge, P. P. G.
G-. and
and Mahakian, S., S., "Distributed
"Distributed Computing
Computing for
for Vision:
Vision: Architecture
Architecture
and aa Benchmark
Benchmark TestTest", Trans. on
", IEEE Trans. on Pattern
Pattern Anal.
Anal. Machine
MachineIntell.,
Intell.,Vol.
Vol.PAMI
PAMI-7,pp
-7,pp 623623-626,
-626,
1985.
1985
5.
5. Duff,
Duff, M. J. B., "
M. J. * CLIP4
CLIP4 ",", in Special Computer
Computer Architectures for for Pattern
Pattern Prcessing,
Prcessing,
K. S. Fu
K. S. Pu and T. T. Ichikawa,
Ichikawa, Eds.,
Eds., CRCCRC Press,
Press, Boca
Boca Raton,
Raton, Florida,
Florida, pp.
pp.6565-86, 1982.
-86, 1982.
6.
6. Potter,
Potter, J.J. L.,
L., " " Pattern Processing on STARAN STARAN ",
", in
in Special
Special Computer
Computer Architectures
Architectures
for Pattern Processing,
Processing, K. K. S.
S. Fu
Pu and
and T.
T. Ichikawa,
Ichikawa, Eds.,
Eds., CRC
CRC press,
press, Boca
Boca Raton,
Raton, Florida,
Florida,
87-102,
pp. 87 1982.
-102, 1982.
7.
7. Michael
Michael Hord, R. and Stevenson,
Hord, R. Stevenson, D. D. K.,
K., "" The
The ILLIAC IV Architecture and and Its
Its Suitabi-
Suitabi-
lity for Image Processing
Processing", ", In
In Special
Special Computer
Computer Architectures for for Pattern
Pattern Processing,
Processing,
K. S.
K. S. Fu
Fu and
and T.
T. Ichikawa
Ichikawa Eds.,
Eds., CRC
CRC Press,
Press, Boca
BocaRaton,
Raton, Florida,
Florida, pp.
pp.103
103-126, 1982.
-126, 1982.
8. Prasanna Kumar V. V. K. Raghavendra, "An
K. and Raghavendra, "An Enhanced Mesh Connected VLSI Architecture
Architecture
for
for Parallel Processing",", Proc.
Parallel Image Processing Proc. IEEE
IEEE 1985
1985 Conf.
Conf. on
on Computer
Computer Vision
Vision and
and Pattern
Pattern
Recognition, pp. pp. 620
620-626, 1985.
-626, 1985.

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