Paging

Paging is a memory management scheme that eliminates the need for contiguous allocation of physical
memory. This scheme permits the physical address space of a process to be non – contiguous.

Logical Address or Virtual Address (represented in bits): An address generated by the CPU

Address generated by CPU is divided into

 Page number(p): Number of bits required to represent the pages in Logical Address Space or
Page number
 Page offset(d): Number of bits required to represent particular word in a page or page size of
Logical Address Space or word number of a page or page offset.
Physical Address is divided into
 Frame number(f): Number of bits required to represent the frame of Physical Address Space or
Frame number.
Frame offset(d): Number of bits required to represent particular word in a frame or frame size of
Physical Address Space or word number of a frame or frame offset.

The hardware implementation of page table can be done by using dedicated registers. But the usage of
register for the page table is satisfactory only if page table is small. If page table contain large number of
entries, then we can use TLB (translation Look-aside buffer), a special, small, fast look up hardware
cache.

 The TLB is associative, high-speed memory.

 Each entry in TLB consists of two parts: a tag and a value.

  When this memory is used, then an item is compared with all tags simultaneously. If the item is
found, then corresponding value is returned.

Main memory access time = m

If page table are kept in main memory,
Effective access time = m(for page table) + m(for particular page in page table)

Types of paging
(A) Page table -has page table entries where each page table entry stores a frame number and
optional status (like protection) bits.
Page table entry has the following information –
 1. Frame Number – It gives the frame number in which the current page you are looking
for is present. The number of bits required depends on the number of frames.Frame bit
is also known as address translation bit.
2. Number of bits for frame = Size of physical memory/frame size
3. Present/Absent bit – Present or absent bit says whether a particular page you are
looking for is present or absent. In case if it is not present, that is called Page Fault. It is
set to 0 if the corresponding page is not in memory. Used to control page fault by the
operating system to support virtual memory. Sometimes this bit is also known
as valid/invalid bits.
4. Protection bit – Protection bit says that what kind of protection you want on that page.
So, these bit for the protection of the page frame (read, write etc).
5. Referenced bit – Referenced bit will say whether this page has been referred in the last
clock cycle or not. It is set to 1 by hardware when the page is accessed.
6. Caching enabled/disabled – Some times we need the fresh data. Let us say the user is
typing some information from the keyboard and your program should run according to
the input given by the user.
7. Modified bit – Modified bit says whether the page has been modified or not.
(B) Inverted Page Table- An alternate approach is to use the Inverted Page Table structure that
consists of a one-page table entry for every frame of the main memory. So the number of page
table entries in the Inverted Page Table reduces to the number of frames in physical memory
and a single page table is used to represent the paging information of all the processes.
Through the inverted page table, the overhead of storing an individual page table for every
process gets eliminated and only a fixed portion of memory is required to store the paging
information of all the processes together.
Each entry in the page table contains the following fields.

 Page number – It specifies the page number range of the logical address.

 Process id – An inverted page table contains the address space information of all the processes
in execution. Since two different processes can have a similar set of virtual addresses, it
 becomes necessary in the Inverted Page Table to store a process Id of each process to identify
its address space uniquely.

 Control bits – These bits are used to store extra paging-related information. These include the
valid bit, dirty bit, reference bits, protection, and locking information bits.

 Chained pointer – It may be possible sometimes that two or more processes share a part of the
main memory. In this case, two or more logical pages map to the same Page Table Entry then a
chaining pointer is used to map the details of these logical pages to the root page table.

The operation of an inverted page table is shown below:

   

The virtual address generated by the CPU contains the fields and each page table entry contains the
other relevant information required in paging related mechanism. When a memory reference takes
place, this virtual address is matched by the Memory-Mapping unit(MMU), the Inverted Page table is
searched and the corresponding frame number is obtained. If the match is found at the i th entry then the
physical address of the process is sent as the real address otherwise if no match is found then
Segmentation Fault is generated. 

(C) Hashed Page Tables: in hashed page tables, the virtual page number in the virtual address is
hashed into the hash table. They are used to handle address spaces higher than 32 bits. Each entry in
the hash table has a linked list of elements hashed to the same location (to avoid collisions – as we can
get the same value of a hash function for different page numbers).

For each element in the hash table, there are three fields –

1. Virtual Page Number (which is the hash value).

2. Value of the mapped page frame.

3. A pointer to the next element in the linked list.

(D)Clustered Page Tables are similar to hashed page tables except that each entry in the hash table
refers to many pages rather than one single page (as in a hashed page table). Hence, a single entry of a
clustered page table can store the mappings for multiple physical page frames.