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Redundant IO S7 1500 DOC V1 0 en
Redundant IO S7 1500 DOC V1 0 en
LRedIO Library
https://support.industry.siemens.com/cs/ww/en/view/109767576
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Table of contents
Legal information ......................................................................................................... 2
1 Introduction ........................................................................................................ 4
1.1 Task ...................................................................................................... 4
1.2 Solution................................................................................................. 4
1.3 Principle of operation............................................................................ 6
1.3.1 The LRedIO library ............................................................................... 6
1.4 Components used ................................................................................ 9
2 Engineering ...................................................................................................... 10
2.1 Hardware setup .................................................................................. 10
2.1.1 Digital input ......................................................................................... 10
2.1.2 Digital output ...................................................................................... 10
2.1.3 Analog input ....................................................................................... 11
2.1.4 Analog output ..................................................................................... 11
2.2 Configuration ...................................................................................... 12
2.2.1 TIA Portal project hardware overview ................................................ 12
2.2.2 Assigning parameters to the modules ................................................ 13
2.2.3 TIA Portal project block integration .................................................... 14
2.3 Interface description ........................................................................... 17
2.3.1 LRedIO_RedDI block ......................................................................... 17
2.3.2 LRedIO_RedDQ block........................................................................ 19
2.3.3 LRedIO_RedAI block.......................................................................... 20
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1 Introduction
1.1 Task
The new generation of fault-tolerant S7-1500R/H controllers integrates extensive
procedures to achieve system redundancy at the control level. For some
applications, however, high availability at field level or module level is also
required. The LRedIO library was created for this purpose.
The blocks of the LRedIO library coordinate the redundant signal processing in the
CPU on the software side. They must be called in the user program, and the
parameters must be assigned depending on the input and output modules used.
1.2 Solution
Diagram
The following diagram shows the most important components of the solution:
Figure 1-1
S7 – 1500H S7 – 1500H
LRedIO LRedIO
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Synchronization
PN (MRP)
Digital
AI – AI –
Sensor/
signal signal
Switch
converter converter
Analog
Contactor Actuator
Setup
The layout shown in figure 1 maps the basic structure of redundant I/O devices on
an S7-1500 using the example of an S7-1500H system. The ET 200SP stations
have the same structure, but this is not necessarily mandatory. Only the redundant
modules must be of the same type (same MLFB and firmware). The two redundant
ET 200SP stations are handled via the function blocks from the LRedIO library,
which are called cyclically in the user program.
Benefits
The solution presented in this document offers you the following advantages:
• Connection of I/O devices in redundancy mode
• Pre-configured blocks
• Easy handling
Required knowledge
The following knowledge is required:
• Basic information on handling TIA Portal
• Basic information on handling SIMATIC S7-1500
• Basics in handling redundant S7-1500 R/H systems
• Basic information on handling ET 200
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Overview
The LRedIO library supplies the following function modules:
Table 1-1
Module
Module
Figure 1-2 shows the structure in schematic form down to the field level. There are
two IO systems in this case which creates a structural redundancy. In Figure 1-3
the connection options are shown in general.
Figure 1-3
Module 2
Module 2
Module 1
Module 1
Sensor / Sensor 1/ Sensor 2/
Actuator Actuator 1 Actuator 2
S7 – 1500H S7 – 1500H
LRedIO LRedIO
Synchronization
PN (MRP)
Digital
AI – AI –
Sensor/
signal signal
Switch
converter converter
Analog
Contactor Actuator
The blocks of the LRedIO library coordinate the redundant ET 200SP stations.
Figure 1-4 shows the structure of the application example. Different sensors and
actuators with different wiring are connected. The value status of each redundantly
switched channel is evaluated to determine whether the supplied values are valid.
The value status is available as of Standard (ST) module class. The flowchart from
Figure 1-5 shows a general sequence of functions of the Red_IO blocks.
Flow chart
Figure 1-5
Start
Parameter
assignment OK / No
Analysis of input
values OK
Yes
Value status 1 No
OK
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Yes
No
Value status 2 Value status 2
OK OK
No
Yes Yes
Channel
Redundant two-
Single-channel passivated / last
channel
operation valid value /
operation substitute value
End
First, the input parameters are checked for the correct value ranges to prevent the
block from starting with invalid values. The channels are then checked for valid
value status, and the operation or provision of the process value is derived.
Note Other similar products not in the above list can be used. Changes in the example
code (such as other addresses) may be necessary.
Note The application example shown was implemented with an S7-1517H system, but
the blocks are standard code and work with both an S7-1515/1513R system and
standard S7-1500 CPUs. The family of I/O devices is defined here with the
ET 200SP as well; however, the ET 200MP also provides a value status, which
means that modules of this family can also be used.
2 Engineering
2.1 Hardware setup
2.1.1 Digital input
Figure 2-1
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Figure 2-2
Figure 2-3
ET 200SP ET 200SP
Station 1 Station 2
T1 T2
temperature temperature
sensor sensor
W1 measuring W2 measuring
converter converter
D1 D2
Analog control
valve 4 – 20 mA
2.2 Configuration
2.2.1 TIA Portal project hardware overview
Figure 2-5
It consists of an S7-1500H system and, for this example, two identical ET 200SP
stations. Their design may differ from that described.
The stations are structured as follows:
Figure 2-6
The value status must be activated in the individual modules. The option for this
can be found in the module parameter settings of the individual modules.
For this purpose, the value status option must be activated in the module
parameters. These value statuses now appear as inputs in the IO tags of the module.
Figure 2-8
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Note All diagnostics can be activated for digital inputs, analog inputs and analog
outputs. For digital outputs, the "wire break" diagnostics must be deactivated.
However, this error is still detected by the block but it does not generate an entry
in the diagnostic buffer and the module does not output a warning by the LED
flashing in red.
To integrate the blocks into the user program, first open the global library LRedIO.
Copy all blocks from the library to the Program Blocks folder and drag them into your
user program.
Figure 2-9
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Figure 2-10
Now, the previously activated value status and the inputs or outputs that are to be
made redundant must be connected at the blocks. Here a separate block must be
used for each channel pair.
Interconnection of digital input:
Figure 2-11
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Figure 2-15
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Figure 2-16
Figure 2-17
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Figure 2-18
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1 Adjustment process: A special adjustment process is carried out to prevent more than 100% current
being applied to the actuator at the analog outputs after reintegration. For this purpose, the outputs are
ramped up or down gradually so that each output supplies 50% of the required current in normal operation
(redundant operation). For more information on how the adjustment process works, refer to the section
3.1.3.
2.4 Operation
After startup of the CPU, an initial acknowledgment at the "ack" input must be
made for the first start of the blocks.
Table 2-9
Status Description
16#0000 No error
Discrepancy error
16#8400
Timeout of the set discrepancy time, output passivated2
Discrepancy error
16#8401
Timeout of the set discrepancy time, substitute value at output
Discrepancy error
16#8402
Timeout of the set discrepancy time, last valid value
Table 2-10
Status Description
16#0000 No error
Table 2-11
Status Description
Table 2-12
Status Description
16#0000 No error
Table 2-13
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Error Reaction
4With the block LRedIO_RedDQ, "ackReq" is already true when the error occurs. Otherwise, a failed
channel could not be reintegrated during operation.
3 Useful information
If an actuator in the field level is connected to two digital outputs, the reintegration
procedure of a faulty signal differs. If a positive edge is detected at the "ack" input,
the output switches on again, regardless of this value status is present or not. If the
value status follows the acknowledgment signal within two seconds, the device
switches to normal operation (redundant operation). If no positive value status has
been detected at the block after two seconds, the block switches back to single-
channel operation.
Figure 3-1
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The "discrepancy" and "discrepancyTime" inputs span a validity range within which
the two values of the input channels may move at the analog input block. If one of
the two channels is outside this validity range for too long, a previously
parameterized reaction is initiated by the block (see section 2.5). To prevent signal
flutter, the user can define a hysteresis range. The signal deviation must return to
this range so that the faulty signal can be reintegrated.
Figure 3-2
ChannelChannel
characteristic of analog
characteristic of values
18000 analog values
Signal characteristic 17000
16000
Signal characteristic
Validity
15000 range
14000
Channel 1
13000
Channel 2
12000
Hysteresis
11000
10000
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Time in s
Time in s
In Figure 3-3 the trace shows a run from the loss of the value status to the
reintegration of the invalid channel. The call time of the LRedIO_RedAQ block is
approx. 1 ms here, the reintegration time was set to 300 ms.
Figure 3-4
With a call time of 10 ms, the reintegration time of 300 ms requires approximately
30 steps for the adjustment. The distances between these steps are much larger.
4 Appendix
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