EVA GUPTA

www.linkedin.com/in/guptaeva eg3207@columbia.edu +1-(347)8304649

EDUCATION
Columbia University New York, NY
Master of Science in Electrical Engineering Dec 2023
• Courses: SOC, Formal Verification of HW SW, Advance Logic Design, Heterogeneous Computing for data and signal processing.

Manipal University Jaipur Rajasthan, IN

Bachelor of Technology in Electronics and Communication Engineering May 2022
• Courses: Digital System Design and HDL, MOS VLSI Design.
• CGPA: 9.01/10.00.

SKILLS
• Languages: Verilog, Python, CUDA, OpenCL, SystemC, System Verilog.
• Tools: HSPICE, ModelSim, Quartus Prime, git, vim, Jupyter notebook, MATLAB.

PROJECTS
64 tap, half-precision FIR filter design, and synthesis Nov 2022 - Present
• Designing of 64 tap FIR filter from scratch of half-precision data type, will include a golden model in MATLAB, RTL Design,
synthesis, gate-level stimulation, STA, and memory compilation.

GPU Acceleration of Chaotic Maps-based Image Encryption Nov 2022 - Present

• Deploying parallelizing and localizing the encryption and decryption functions of the image using the Henon Map Algorithm.
• Validating the performance of the parallelization to the serial implementation in CPU on execution time, encryption quality, pixel
autocorrelation, and sensitivity with the secret key.

Accelerating a Convolution Neural Network (CNN) for Image Classification Nov 2022 - Present
• Experimenting to accelerate DWARF-7 Convolution Neural Network (CNN).
• Designing one accelerator which is optimized to implement one particular layer of DWARF-7 CNN.
• Working on two metrics, component level, and system level for DWARF-7 CNN to optimize the Pareto curve, and throughput.

Verification of FIFO using Questa PropCheck Formal Tool Nov 2022 - Present
• Working on Questa PropCheck to verify the functioning of the FIFO.
• Using SystemVerilog assertions to assert and cover properties for FIFO.

Reversible Logic Gates Nov 2021 - Dec 2021

• Analyzed HSPICE software, where basic logic gates were implemented, and then reversible logic gates and combinational circuits were
implemented.
• Collaborated with a team of three to optimize the functioning of logic gates and combinational circuits.

Social distance and alarming systems Apr 2021 - Jun 2021

• Oversaw widespread COVID-19, and made a device to alarm a person about social
distancing.
• Accomplished circuit on TinkerCAD operating Arduino UNO along with embedded C programming and managed a team of five people.

PROFESSIONAL EXPERIENCE
Defence Research and Development Organisation Bangalore, IN
Project Intern Jan 2022 - May 2022
• Developed a project on "Detection of most frequently occuring research words using LDA" with almost 10,000 words.
• Collected data from over 12 research papers on cognitive science and AI, extracted selected data and made new files of 10,000
words deploying python.
• Plotted almost 10,000 words operating matplotlib and operated K-Means CLustering and LDA topic modeling on these words.

Maven Silicon Bangalore, IN

Design Intern May 2021 - Jun 2021
• Stimulated basic logic gates, for example, MUX, Adder, Subtractor using Verilog and RTL synthesis.
• Accelerated 6 different codes of AHB to APB Bridge on ModelSim and Quartus Prime.