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TITLE : Construction and Analysis of Multiplexer circuit.

DATE OF
:
EXPERIMENT

Lab Number : 13

Instructor :

NAME : Afaq Ahmad

ROLL NO : 210501032

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Objectives:
1. Design and implementation of 4x1 Multiplexer.
2. Design and Implementation of 4x1 Multiplexer using 2x1mux.

Equipment:
1. IC 74153.
2. IC 74157.
3. Logic gates IC’s.
4. Connecting wire.
5. Digital Trainer.

Theory:
Multiplexer:
Multiplexer is a combinational circuit that has maximum of 2n data inputs, ‘n’ selection lines and
single output line. One of these data inputs will be connected to the output based on the values of
selection lines.

Since there data input. Multiplexer is also called as Mux.

The most basic type of multiplexer device is that of a one-way rotary switch and its graphical
symbol are shown as,

2x1 Multiplexer:
We can build a simple 2-line to 1-line (2-to-1) multiplexer from basic logic NAND gates as
shown. t A is 0 or at low logic. While as the select input goes high or 1 we want to see I0 at then
output Q.

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Similarly, for 4x1 multiplexer you can design it as follow.

4x1 Multiplexer:
4x1 Multiplexer has four data inputs A, B, C & D, two selection lines a & b and one output Q.
The block diagram of 4x1 Multiplexer is shown in the following figure.

One of these 4 inputs will be connected to the output

based on the combination of inputs present at these

two selection lines. Truth table of 4x1 Multiplexer is

shown below.

the output equation is written as,

and the combinational logic diagram is as follow.

Similarly, higher order multiplexer can also be designed accordingly.

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Like you want to make 4x1 multiplexer

using 2x1 multiplexer as follow,

Demultiplexer:
It inverse of Multiplexer. As in mux we have more inputs and only one output, but in
Demultiplexer we have multiple output and only one input with some of select inputs.

In this example we saw 1x4 de-Mux which have one input D which is one, and four output as y0,
y1, y2 and y3 while two select lines s0 and s1 are used to perform this operation.

If we write the output equation it can be like

0
=( s 0 s 1+ s 1 s0 + s0 s ,+s 0 s 1 ) D
P
As o/p is Y0, Y1, Y2 and Y3 depending on the switch position.

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We can also say that it behaves as decoder, the select switches act as a input while the data input
behave as enable bit. As in encoder we have bit and three data input to perform function while in
de-Mux data input act as switches while enable bit act as data input here

Task 1:

Truth Table

Select Input
b a D C B A Q
0 0 x x x 1 1

0 1 x x 1 x 1
1 0 x 1 x x 1
1 1 1 x x x 1

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Task 2

Truth Table
Input Select Input Outputs

D S1 S0 Y3 Y2 Y1 Y0
D 0 0 0 0 0 D

D 0 1 0 0 D 0

D 1 0 0 D 0 0

D 1 1 D 0 0 0

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