Tunable Impedance Matching Networks for
Agile RF Power Amplifiers
Holger Maune, Mohsen Sazegar and Rolf Jakoby
Microwave Engineering, Technische Universität Darmstadt, Germany
Abstract—The efficiency is one of the most critical parameters
in the design of RF power amplifiers. For classical power
amplifier (PA) the efficiency drops dramatically in the back-off
region. One possibility of enhancing the properties of the PA is
the implementation of a load modulation as used in the Doherty
topology. The idea of using an adaptive impedance matching
network at the output of the transistor is presented and analyzed
in this paper. The topology of the matching network enables the
connection of the matching circuit directly to the transistor. The
matching network has been designed using the minimum mean
square error method and realized on a BST thick film substrate.
The measured input impedance is in the range of several ohms
for a load of 50 Ohm as required for power amplifiers.
Index Terms—Tunable Components, Ferroelectrics, BST,
Power Amplifier
I. I NTRODUCTION
The research on materials and systems for tunable mi-
crowave devices has gained attraction within the last years.
An application, which particularly would benefit from the
implementation of tunable components, are universal radio
frequency (RF) transceivers. In the last years, different blocks
of a transceiver such as tunable filters, phase shifters, reconfig-
urable multiband matching networks, and tunable multiband
antennas have been proposed and implemented by different
technologies.
An unsolved problem up to now is the efficiency of power
amplifiers (PA) when used over a wide frequency band or
with high peak to average power ratio (PAPR). Recently,
different possibilities for the efficiency enhancement of power
amplifiers have been proposed such as adaptive load modu-
lation as used in Doherty amplifiers or adaptive biasing [1].
These solutions usually are optimized for a single frequency
point and hence are narrowbanded. The idea of using tunable
matching networks (TMN) at the input and the output of
the transistor as shown in Fig. 1, enables an active load
modulation, which can be adapted for different frequencies
and power levels. The tunable matching network at the output
of the transistor has the highest influence on the efficiency of
the PA because of the high power level. In addition, the high
power level requires components with a high power handling
capability and high linearity. The input matching network
shows a lower influence to the efficiency and hence a static
broadband matching network can be used for a not optimal
solution.
Barium-Strontium-Titanate (BST) is one of the most
promising functional materials in the frequency range up to
L H
TMN PA TMN RL
Figure 1: Concept of the tunable power amplifier with tunable
impedance matching networks (TMN) at input and output of
the transistor.
15 GHz. Generally, as semiconductor varactors, all devices
based on BST thin and thick film technology have very fast
tuning speed in the ps-range [2]. Compared to semiconductors
BST thick film varactors offer two major advantages: (1) they
can be fabricated by using a very simple and cost efficient
processing technology [3] and (2) they can be designed
for highly linear operation [4], however, to the expense of
requiring high tuning voltages. The drawback of high tuning
voltages has to be put into perspective to the low leakage
current (nA-range) of the device enabling powerless tuning of
the devices.
Based on these unique properties, BST thick film devices
can offer a solution for the implementation of tunable match-
ing networks requiring high linearity, especially at the output
of tunable power amplifiers.
II. S UITABLE T OPOLOGIES OF T UNABLE M ATCHING
N ETWORKS
Tunable impedance matching networks for agile power
amplifier have to fulfill certain requirements such as power
handling capability and linearity, resulting in several possible
topologies for the realization of tunable networks. In order
to place the matching network as close as possible to the
transistor, its series branch has to carry the DC supply
voltage for the transistor. Only varactors can be used for
the realization of the tunable elements due to the lack
of electronically tunable inductors. The often used series
connection of a fixed inductor and a varactor cannot be
used, due to the requirement of DC transport. In addition
to the requirement of a purely inductive series path of the
matching networks, the varactors have to be placed in the
parallel branches of the matching network. The most common
structure for this case are L- and Π-networks. Beside of
a two dimensional tuning possibility of the network the
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 VDC
LChoke
L
IN C1 C2 RL
Vt1 Vt2
Figure 2: Tunable impedance matching network with Π-
topology for output matching. The matching network (dashed
box) is realized on a single substrate with integrated decou-
pling of the tuning voltages for the varactors C1 and C2 .
Π-network has the advantage of higher linearity as compared
to e.g. T-networks at the cost of higher required capacitance
values [5]. The two dimensional tuning possibility of the
Π-network enables an almost independent combination of
the real and imaginary part of the input impedance within
their design regions. Figure 2 shows the simplest topology
for a Π-network with the two varactors C1 , C2 and the series
inductance L. The bias and supply voltage for the transistor is
fed through the choke inductor LChoke and the series inductor
of the matching circuit L.
As the varactors have the full RF voltage swing at their
terminals, specially designed varactors with high linearity
have to be used. These varactors consist of an anti-serial
varactor pair as sketched in Fig. 3. This topology enables a
the tuning voltage for the varactor is possible without any
additional external components by implementing high resistive
lines. The disadvantage of using these varactor in this certain
application, is the fact that both terminals have a different DC
potential caused by the supply voltage VDC of the transistor.
The tunability of the varactor pair τC,Σ is reduced to
τC (Vt ) + τC (Vt −VDC ) − 2τC (Vt )τC (Vt −VDC )
τC,Σ (Vt ) = (1)
2 − τC (Vt ) − τC (Vt −VDC )
with τC is the tunability of the varactor. Vt and VDC are
the tuning voltage and the supply voltage of the transistor,
respectively. This drawback does not show a big influence
to the tunability of the varactor, because Vt  VDC usually
holds for BST thick-film varactors, resulting in a tunability of
the varactor pair, which is > 90 % of the tunability without
different DC potentials (VDC = 0). With improved biasing
strategies this drawback can be turned into an advantage with
a tunability of even more than 100 % of the tunability without
different DC potentials.
III. D ESIGN OF T UNABLE M ATCHING N ETWORKS
The design of tunable matching networks for power ampli-
fiers is divided into two independent steps. In the first step the
component values of the matching network are determined. In
the second step the varactor geometries are derived from the
calculated component values.
The network design is the result of an optimization pro-
cess with different boundary conditions such as maximum
tunability τC,max , maximum capacitance value C0,max which
can be achieved at the working frequency in dependence on
the linearity requirements [4]. The cost function C of the
optimization algorithm is the mean square error (MSE) of the
mismatch at the input of the network for all desired input
impedances
v  
l l  Z (m) − Z (τ , τ , Z ) 
u M
C C
u in L 
1 2
wg C = t ∑ min  (m) (2)


∀τ ,τ
m=1 C1 C2 Z
A B
Vt
Figure 3: Schematic sketch of a anti-serial varactor pair
for high power applications with the most important design
parameters gap width g, finger width w, and length l. The
center pad and the high resistive line (light gray) are used to
feed the tuning voltage Vt , while the outer connectors of the
IDC are connected to the DC ground of the tuning circuit by
the general circuits A and B.
reduction of the necessary tuning voltage by a factor of two
while keeping the linearity of the device at very high levels
[4]. Furthermore, the integration of the feeding network for
 + Z in (τC1 , τC2 , Z L ) 
with the tunabilities of both varactors
τC1/2 ∈ [0 . . . τC,max ] , (3)
the load impedance at the output of the matching network
Z L , and the desired input impedances Z (m) at the input of
the matching network. The presented tunable network was
designed to be used together with a GaN-HEMT power bar
device from the Ferdinand-Braun-Institute, with desired input
impedances of
Z in = [5 Ω . . . 8 Ω] + j · [8 Ω . . . 14 Ω] , (4)
which have been calculated using load-pull measurement data.
For the operation frequency of 2 GHz the optimization algo-
rithm calculated the component values for an ideal matching
network as C1 (0) = 7.45 pF, C2 (0) = 10.94 pF and L = 1.16 nH.
The maximum tunability of the varactors have been considered
as limited to τC,max = 0.3. Figure 4 shows the achieved input
impedances in comparison to the design values. The design
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Requirements
ADS results
MSE results Z0 = 50 Ω
L
C1 C2 RL
Z In
Figure 4: Results for the input impedance (red) of the opti-
mization algorithm for the required input impedances (blue
box) with the given topology from the inset and a maximum
tunability of 30 %. For comparison, the ADS simulation results
of the complete matching network are also added (green).
shows a very good match between the requirements and the
achieved values.
The transistor is comprising of five cells with eight fingers
of 250 µm length. Based on the topology of the transistor
the layout of the matching network was adapted to meet the
requirements of a direct connection to the transistor die. For
this purpose the necessary bond wires as well as a geometry
adaption section between transistor and matching network
was implemented using the ADS software from Agilent. The
optimized layout consists of five identical matching sections
in parallel, every one connected to one transistor cell of
the power bar. The optimized component values have been
calculated to C1 (0) = 2 pF, C2 (0) = 2.2 pF and L = 2.3 nH. The
region of input impedances which can be achieved with the
adapted design is also shown in Fig. 4. Additionally, the split
into parallel branches enhances the linearity of the matching
network.
In a second step, the component values calculated before
are translated into the geometry of the varactors, realized in
planar technology as interdigital capacitor, by using conformal
mapping [6]. The geometry is derived by a multidimensional
optimization process which has to be taken into account many
different parameters such as the series resonance frequency,
the linearity, the geometry efficiency, and the necessary tuning
voltage, which are all dependent on the gap width [7].
DC paths Inductance High resistive line
Varactor 1 Varactor 2
Bond wire
150µm GSG
150µm GSG
probe
probe
1mm
Measurement Geometry Impedance Measurement
adapter adaption matching adapter
network
Figure 5: Schematic of the fully integrated matching network.
The RF lines and the DC lines are shown in yellow and blue,
respectively. Bond wires are printed in orange.
IV. R EALIZATION
The varactors have been designed for a BST thick film,
where the gap width of the varactors have been chosen as
20 µm, ensuring a high linearity of the device [4]. The number
of fingers is chosen to 40 which reduces the necessary length
of the device, which further results in a higher series resonance
frequency of the component around 10 GHz. The length of
the varactors are adapted to meet the requirements of the
capacitance values and are given with l1 = 2 × 145 µm and
l2 = 2 × 230 µm for the first and the second varactor respec-
tively. The overall schematic of the tunable matching network
is shown in Fig. 5. At the input of the matching network
a geometry adaption section is used to enable a connection
to the power bar. It has an equal length of all branches at
the design frequency of 2 GHz. Furthermore, the matching
network is surrounded by two measurement adaption sections,
enabling the measurement of the matching network on wafer
for prototype verification. For the final integration with the
transistors these section will be cut away. The inductor can
either be realized by surface mounted inductor coils or with
bond wires. The feeding network for the bias voltages of the
varactors are integrated by using separated gold lines and high
resistive lines for the connection between rail and varactor,
enabling a synchronous tuning of the varactors in all branches.
The matching network finally has been realized in planar
technology with interdigital capacitors (IDC) on top of a BST
thick film with a thickness of 4 µm and an untuned relative
permittivity of εr (0) = 400, which has been screen printed
on a standard Alumina (Al2 O3 ) substrate. The electrodes are
made from plated gold with a height of 3 µm. All components
(except the inductors and the bond wires) have been realized
in two lithography steps by using the chromium seed layer for
the high resistive lines for DC biasing. The fabrication process
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 DC paths Inductance High resistive line
Varactor 1 Varactor 2
Bond wire
150µm GSG
150µm GSG
probe
probe
1mm
DC contacts
Figure 6: Microphotograph of the fabricated matching net-
work.
can be reviewed in detail in [3]. A microphotograph of the
whole matching network is shown in Fig 6. Due to adhesion
problems, the inductors have been realized using bond wires
instead of using high quality inductor coils. This will result in
a reduction of the tuning range due to a too small inductance
value.
V. M EASUREMENT
The network has been measured with a standard VNA in a
50 Ω environment with two independent tuning voltages in the
range from 0 V to 200 V. The circuit has been connected by
two 150 µm GSG on-wafer probes for the RF connection and
two needle probes for the DC connection. The input impedance
Z in for a load of RL = 50 Ω is shown in Fig. 7. The measure-
Z0 = 50 Ω
f = 2 GHz
f = 1.64 GHz
Figure 7: Achievable input impedances of the matching net-
work Z in terminated with RL = 50 Ω for two different frequen-
cies.
ment results are in a good agreement with the simulations,
however, due to the low impedance, the matching range is very
narrow. Also the voltage range used for measurements could
be increased further. The breakdown of the bias voltage can be
expected around 400 V without any passivation. If the voltage
can be increased, the tunability of the varactors and hence the
impedance range could be increased further. The insertion loss
of the matching network is with up to 6 dB very high. Other
publications already presented BST thick films with higher
quality, resulting in a lower insertion loss. The fabrication
process for BST thick films tailored to the requirements of
high power applications is ongoing, with promising results.
To investigate the nonlinear behavior source-pull measure-
ments are necessary. Π matching networks show the worst
linearity for high impedances [5]. Beside the known fact of
very high linearity properties of varactors based on BST thick
films [4] the linearity of the whole matching network is not
expected to drop dramatically.
VI. C ONCLUSION AND O UTLOOK
This paper described the design routines for a tunable
impedance matching network for high power amplifiers in the
lower GHz-range utilizing unique properties of BST thick-
films. It could be shown that low impedances as necessary for
power amplifiers could be directly matched to a 50 Ω load.
No additional efforts have to be carried out to feed the supply
voltage to the transistor. The implementation of the tunable
matching network would benefit from a higher quality factor
of the BST thick film. Beside an ongoing improvement of the
material’s properties, next steps will include the optimization
of the component in means of lower insertion loss, the mea-
surement of the nonlinear behavior of the matching network
as well as the integration with the transistor, followed by
characterization of the agile RF power amplifier.
ACKNOWLEDGMENT
The authors thank the Ferdinand-Braun-Institut, Leibniz-
Institut für Höchstfrequenztechnik, Berlin for providing the
transistors and helpful discussions. Further, the authors want to
gratefully acknowledge the Karlsruhe Institute of Technology,
Institute for Materials Research III for ferroelectric substrate
preparation. This work was partly supported by the DFG Re-
search Training Group 1037 "Tunable integrated components
in microwave technology and optics".
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