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POST
This Power-On Self Test (POST) may include testing some of the following things:
Video adapter
Cards inserted into slots, such as conventional PCI
Floppy drive
Temperatures, voltages, and fan speeds for hardware monitoring
CMOS used to store BIOS setup configuration
Keyboard and Mouse
Network controller
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Optical drives: CD-ROM or DVD-ROM
SCSI hard drive
IDE, EIDE, or Serial ATA Hard disk drive
Security devices, such as a fingerprint reader or the state of a latching switch to detect
intrusion
USB devices, such as a memory storage device
Integrated peripherals
Disk controllers for a floppy disk drive, up to 2 PATA drives, and up to 6 SATA drives
(including RAID 0/1 support)
integrated graphics controller supporting 2D and 3D graphics, with VGA and TV output
integrated sound card supporting 8-channel (7.1) audio and S/PDIF output
Fast Ethernet network controller for 10/100 Mbit networking
USB 2.0 controller supporting up to 12 USB ports
IrDA controller for infrared data communication (e.g. with an IrDA-enabled cellular
phone or printer)
Temperature, voltage, and fan-speed sensors that allow software to monitor the health of
computer components.
CPU sockets
A CPU socket (central processing unit) or slot is an electrical component that attaches to a
Printed Circuit Board (PCB) and is designed to house a CPU (also called a microprocessor). It is
a special type of integrated circuit socket designed for very high pin counts.
3.Intel 845 chip set
Major Features of All Intel 845 Series Chipsets
The 845-series chipsets include the following models:
845
845GL
845GV
845G
845GE
845E
845PE
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Physical memory organization
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2.Cache memory
Cache memory, also called CPU memory, is random access memory (RAM) that a computer
microprocessor can access more quickly than it can access regular RAM. This memory is
typically integrated directly with the CPU chip or placed on a separate chip that has a separate
bus interconnect with the CPU.
Cache entries
Data is transferred between memory and cache in blocks of fixed size, called cache lines. When
a cache line is copied from memory into the cache, a cache entry is created. The cache entry will
include the copied data as well as the requested memory location (now called a tag).
Cache performance
The proportion of accesses that result in a cache hit is known as the hit rate, and can be a
measure of the effectiveness of the cache for a given program or algorithm.
The index describes which cache row (which cache line) that the data has been put in. The index
length is bits forr cache rows.
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4.Shadow memory
Shadow memory is a technique used to track and store information on
computer memory used by a program during its execution. Shadow memory consists
of shadow bytes that map to individual bits or one or more bytes in main memory.
Shadow memory is a technique used to track and store information on computer memory used
by a program during its execution. Shadow memory consists of shadow bytes that map to
individual bits or one or more bytes in main memory. These shadow bytes are typically invisible
to the original program and are used to record information about the original piece of data.
The technique is utilized by memory-error checkers that can store information on which parts of
memory have been allocated to the program being checked. This shadow memory is then used
for detecting and reporting incorrect accesses of memory, even though the program may not be
crashing due to a segmentation fault or similar. An error checker may also store additional
information on memory such as which bits have defined and which ones do not. Memcheck, part
of the Valgrindsuite uses this to detect undefined behavior resulting from acting on or printing
undefined memory values.
Use of shadow memory is however not limited to memory-error checkers, as what information is
stored in these shadow bytes is not fixed. It is for instance used by ThreadSanitizer, a data
race detector.
Shadow memory can be both implemented and used a lot of different ways, and have
different performance characteristics. Memcheck for instance tracks values withbit precision,
while AddressSanitizer, part of the clang compiler, is comparatively very fast. Memcheck, as all
Valgrind tools, use binary translation and instrumentationto run code manipulating the shadow
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memory corresponding to program memory use. AddressSanitizer on the other hand is created
on compile-time and inserts error-checking code inline into a program during compilation. Its
shadow-memory implementation uses a huge reservation of virtual memory for its shadow
memory, giving very different performance characteristics.
Shadow RAM is a copy of Basic Input/Output Operating System (BIOS) routines from read-only
memory (ROM) into a special area of random access memory (RAM) so that they can be
accessed more quickly. Access in shadow RAM is typically in the 60-100 nanosecond range
whereas ROM access is in the 125-250 ns range. In some operating systems such asDOS, certain
BIOS routines are not only used during the boot or startup of the system, but also during normal
operation, especially to drive the video display terminal. In Windows and OS/2, however, these
routines are not used and the use of shadow RAM is not necessary. In some systems, the user can
turn the use of shadow RAM off or on.
Also known as shadow RAM, shadow memory is the essentially a duplication of the routines
inherent in the basic input/output operating system or BIOS of a computer system. This duplicate
or shadow memory reserve is then housed in a protected area of the systems random access
memory or RAM, making it easy to retrieve the copy when and as needed. Depending on the
type of operating system used, the shadow memory may be used at startup and at certain times
during the operation of the device. Other operating systems do not require the use of this type of
memory, and may even often users the option of shutting down the duplicate memory as a means
of allocating resources elsewhere.
4.DDR
In computing, a computer bus operating with double data rate (DDR) transfers data on both the
rising and falling edges of the clock signal. This is also known as double pumped, dual-pumped,
and doubletransition. The term toggle mode is used in the context of NAND flash memory.
In computing, a computer bus operating with double data rate (DDR) transfers data on both the
rising and falling edges of the clock signal. This is also known as double pumped, dual-
pumped, anddouble transition. The term toggle mode is used in the context of NAND flash
memory.
The simplest way to design a clocked electronic circuit is to make it perform one transfer per full
cycle (rise and fall) of a clock signal. This, however, requires that the clock signal changes twice
per transfer, while the data lines change at most once per transfer. When operating at a high
bandwidth, signal integrity limitations constrain the clock frequency. By using both edges of the
clock, the data signals operate with the same limiting frequency, thereby doubling the data
transmission rate.
This technique has been used for microprocessor front side busses, Ultra-3 SCSI, graphics RAM
(the AGP bus and GDDR), main memory (both RDRAM and DDR1 through DDR4), and
the HyperTransport bus on AMD'sAthlon 64 processors. It is more recently being used for other
systems with high data transfer speed requirements – as an example, for the output of analog-to-
digital converters (ADCs).
DDR should not be confused with dual channel, in which each memory channel accesses two
RAM modules simultaneously. The two technologies are independent of each other and many
motherboards use both, by using DDR memory in a dual channel configuration.
Describing the bandwidth of a double-pumped bus can be confusing. Each clock edge is referred
to as a beat, with two beats (one upbeat and one downbeat) per cycle. Technically, the hertz is a
unit of cycles per second, but many people refer to the number of transfers per second. Careful
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usage generally talks about "500 MHz, double data rate" or "1000 MT/s", but many refer
casually to a "1000 MHz bus," even though no signal cycles faster than 500 MHz.
DDR SDRAM popularized the technique of referring to the bus bandwidth in megabytes per
second, the product of the transfer rate and the bus width in bytes. DDR SDRAM operating with
a 100 MHz clock is called DDR-200 (after its 200 MT/s data transfer rate), and a 64-bit (8-byte)
wide DIMM operated at that data rate is called PC-1600, after its 1600 MB/s peak (theoretical)
bandwidth. Likewise, 1.6 GT/s transfer rate DDR3-1600 is called PC3-12800.
Some examples of popular designations of DDR modules:
DDR-200, PC-1600 100 MHz 100 MHz 0.2 GT/s 1.6 GB/s
DDR2-800, PC2-6400 200 MHz 400 MHz 0.8 GT/s 6.4 GB/s
DDR3-1600, PC3-
200 MHz 800 MHz 1.6 GT/s 12.8 GB/s
12800
DDR4-3200, PC4-
400 MHz 1600 MHz 3.2 GT/s 25.6 GB/s
25600
DDR SDRAM uses double-data-rate signalling only on the data lines. Address and control
signals are still sent to the DRAM once per clock cycle (to be precise, on the rising edge of the
clock), and timing parameters such as CAS latency are specified in clock cycles. Some less
common DRAM interfaces, notably LPDDR2,GDDR5 and XDR DRAM, send commands and
addresses using double data rate.
5.Common memory errors
There are several different types of memory errors, in which people may inaccurately recall
details of events that did not occur, or they may simply misattribute the source of a memory. In
other instances, imagination of a certain event can create confidence that such an event actually
occurred.
Types of common memory errors
Blocking
The feeling that a person gets when they know the information, but can not remember a specific
detail, like an individuals name or the name of a place is described as the "tip-of-the-
tongue" experience.The tip-of-the-tongue experience is a classic example of blocking,
ransience
Transience refers to forgetting what occurs with the passage of time. [3] Transience occurs during
the storage phase of memory, after an experience has been encoded and before it is
retrieved.[3] As time passes, the quality of our memory also changes, deteriorating from specific
to more general
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Absentmindedness
Absentmindedness is a gap in attention which causes memory failure. In this situation the
information does not disappear from memory, it can later be recalled. But the lack of attention at
a specific moment prevents the information from being recalled at that specific moment. A
common cause of absentmindedness is a lack of attention.
False memories
False memories, sometimes referred to as confabulation, refer to the recollection of inaccurate
details of an event, or recollection of a whole event that never occurred. Studies investigating
this memory error have been able to successfully implant memories among participants that
never existed, such as being lost in a mall as a child (termed the lost in the mall technique) or
spilling a bowl of punch at a wedding reception.
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