Professional Documents
Culture Documents
FEaTUrES DEScrIpTION
■
Optimized for Fast Transient Response
The LT®1963A series are low dropout regulators
■
Output Current: 1.5A
optimized for fast transient response. The devices are
■
Dropout Voltage: 340mV
capable of supplying 1.5A of output current with a
■
Low Noise: 40µVRMS (10Hz to 100kHz) dropout voltage of 340mV. Operating quiescent current
■
1mA Quiescent Current is 1mA, dropping to
■
No Protection Diodes Needed < 1µA in shutdown. Quiescent current is well controlled; it
■
Controlled Quiescent Current in Dropout
does not rise in dropout as it does with many other
■
Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V regula- tors. In addition to fast transient response, the
■
Adjustable Output from 1.21V to 20V LT1963A regulators have very low output noise which
■
< 1µA Quiescent Current in Shutdown makes them ideal for sensitive RF supply applications.
■
Stable with 10µF Output Capacitor*
■
Stable with Ceramic Capacitors* Output voltage range is from 1.21V to 20V. The
■
Reverse Battery Protection LT1963A regulators are stable with output capacitors
■
No Reverse Current as low as 10µF. Internal protection circuitry includes
■
Thermal Limiting reverse bat- tery protection, current limiting, thermal
■
5-Lead TO-220, DD, 3-Lead SOT-223 limiting and reverse current protection. The devices
and 8-Lead SO Packages are available in fixed output voltages of 1.5V, 1.8V,
2.5V, 3.3V and as an adjustable device with a 1.21V
reference voltage. The LT1963A regulators are available
applIcaTIONS in 5-lead TO-220, DD, 3-lead SOT-223, 8-lead SO and
■
3.3V to 2.5V Logic Power Supplies 16-lead TSSOP packages.
■
Post Regulator for Switching Supplies L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents including 6118263, 6144250.
TYpIcal applIcaTION
Dropout Voltage
3.3V to 2.5V Regulator 400
350
2.5V
+ OUT 300
DROPOUT VOLTAGE
1.5A
IN +
VIN > 3V 10µF* 10µF*
LT1963A-2.5 250
SŇ DN SENSE 200
1963A TA01
E C O T 0
*TANTALUM, L T L I 15 0
GND 10 50
CERAMIC OR E R Y C 0 0 1963aff
ALUMINUM
196
pIN cONFIGUraTION
TOP VIEW
GND 1 16 GND
NC 2 15 NC
FRONT VIEW FRONT VIEW
SENSE/ OUT 3 14 IN
5 SENSE/ADJ* 5 ADJ*
OUT 4 13 IN
4 OUT 4 OUT 17
TAB IS OUT 5 12 IN
GND 3 GND 3 GND
2 IN SENSE/ADJ* 6 11 NC
2 IN
1 SŇ DN 1 GND 7 10 SŇ DN
SŇ DN
Q PACKAGE GND 8 9 GND
TAB IS T PACKAGE
5-LEAD PLASTIC DD GND 5-LEAD PLASTIC TO-220
FE PACKAGE
*PIN 5 = SENSE FOR LT1963A-1.5/LT1963A-1.8/ *PIN 5 = SENSE FOR LT1963A-1.5/LT1963A-1.8/ 16-LEAD PLASTIC TSSOP
LT1963A-2.5/LT1963A-3.3 LT1963A-2.5/LT1963A-3.3 EXPOSED PAD (PIN 17) IS GND. MUST BE
= ADJ FOR LT1963A = ADJ FOR LT1963A SOLDERED TO THE PCB.
TJMAX = 150°C, JA = 30°C/ TJMAX = 150°C, JA = 50°C/ *PIN 6 = SENSE FOR LT1963A-1.5/LT1963A-1.8/
W W LT1963A-2.5/LT1963A-3.3
= ADJ FOR LT1963A
TJMAX = 150°C, JA = 38°C/
W
OUT OUT 1 8 IN
3
TAB IS SENSE/ADJ* 2 7 GND
GND 2 GND
GND 3 6 GND
1 IN NC 4 5 SŇ DN
S8 PACKAGE
ST PACKAGE
8-LEAD PLASTIC SO
3-LEAD PLASTIC SOT-223
TJMAX = 150°C, JA = 50°C/ W *PIN 2 = SENSE FOR LT1963A-1.5/LT1963A-1.8/
LT1963A-2.5/LT1963A-3.3
= ADJ FOR LT1963A
TJMAX = 150°C, JA = 70°C/
W
1963aff
196
196
196
Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 6: To satisfy requirements for minimum input voltage, the LT1963A
may cause permanent damage to the device. Exposure to any Absolute (adjustable version) is tested and specified for these conditions with an
Maximum Rating condition for extended periods may affect device external resistor divider (two 4.12k resistors) for an output voltage of 2.4V.
reliability and lifetime. The external resistor divider will add a 300µA DC load on the output.
Note 2: Absolute maximum input to output differential voltage can not Note 7: Dropout voltage is the minimum input to output voltage differential
be achieved with all combinations of rated IN pin and OUT pin needed to maintain regulation at a specified output current. In dropout, the
voltages. output voltage will be equal to: VIN – VDROPOUT.
With the IN pin at 20V, the OUT pin may not be pulled below 0V. The total Note 8: GND pin current is tested with V IN = VOUT(NOMINAL) + 1V and a
measured voltage from IN to OUT can not exceed ± 20V. current source load. The GND pin current will decrease at higher
Note 3: The LT1963A regulators are tested and specified under pulse load input voltages.
conditions such that TJ ≈ TA. The LT1963AE is 100% tested at TA = 25°C. Note 9: ADJ pin bias current flows into the ADJ pin.
Performance at –40°C and 125°C is assured by design, characterization
and correlation with statistical process controls. The LT1963AI is Note 10: SŇ DN pin current flows into the SŇ DN pin.
guaranteed Note 11: Reverse output current is tested with the IN pin grounded and the
over the full –40°C to 125°C operating junction temperature range. The OUT pin forced to the rated output voltage. This current flows into the OUT
LT1963AMP is 100% tested and guaranteed over the –55°C to 125°C pin and out the GND pin.
operating junction temperature range. Note 12: For the LT1963A, LT1963A-1.5 and LT1963A-1.8 dropout voltage
Note 4: The LT1963A (adjustable version) is tested and specified for these will be limited by the minimum input voltage specification under some
conditions with the ADJ pin connected to the OUT pin. output voltage/load conditions.
Note 5: Operating conditions are limited by maximum junction Note 13: For the ST package, the input reverse leakage current increases
temperature. The regulated output voltage specification will not apply due to the additional reverse leakage current for the SŇ DN pin, which is
for all possible combinations of input voltage and output current. tied internally to the IN pin.
When operating at maximum input voltage, the output current range
must be limited. When operating at maximum output current, the input
voltage range must be limited.
196
400 IL = 1.5A
DROPOUT VOLTAGE
300 300
TJ ≤ 25°C
250 300 250
200 TJ = 25°C 200
IL = 0.5A
150 200
150
100 100 IL = 100mA
100
50 50
0 IL = 1mA
0 0
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 –50 –25 25 50 100 125
75
0
OUTPUT CURRENT (A) OUTPUT CURRENT (A) TEMPERATURE (°C)
1963A G01 1963A G02 1963A G03
1.52 1.82
1.0
QUIESCENT CURRENT
OUTPUT VOLTAGE
OUTPUT VOLTAGE
1.51 1.81
0.8
1.50 1.80
0.6
1.49 1.79
0.4
1.48 1.78
0.2 1.47 1.77
0 1.46 1.76
196
VIN = 6V
RL = ∞, IL = 0 VSHDN = VIN
–50 –25 25 75 100 125 –50 –25 25 75 100 125 –50 –25 0 25 75 100 125
50
0 50 0 50
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
1963A G04 1963A G40 1963A G05
LT1963A-2.5 Output Voltage LT1963A-3.3 Output Voltage LT1963A ADJ Pin Voltage
2.58 3.38 1.230
IL = 1mA IL = 1mA IL = 1mA
2.56 3.36 1.225
OUTPUT VOLTAGE
196
10 10
QUIESCENT CURRENT
QUIESCENT CURRENT
8
8 8
6
6 6
4
4 4
2
2 2
0
0 1 2 3 0 0
4 5 6 7 8 9 10 0 1 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10
2
INPUT VOLTAGE (V) INPUT VOLTAGE (V) INPUT VOLTAGE (V)
1963A G41 1963A G09 1963A G10
LT1963A-3.3 Quiescent Current LT1963A Quiescent Current LT1963A-1.5 GND Pin Current
14 TJ = 25°C RL = ∞ VSHDN = VIN
1.4 TJ = 25°C RL = 4.3k VSŇ DN = VIN 25
TJ = 25°C VSŇ DN = VIN
12 *FOR VOUT = 1.5V
1.2
20
10
QUIESCENT CURRENT
1.0
QUIESCENT CURRENT
8 15
0.8
RL = 150, IL = 10mA*
6 RL = 5, IL = 300mA*
0.6 10
4
0.4 RL = 15, IL = 100mA*
2 5
0.2
0
0 0
0 1 2 3 4 5 6 7 8 9 10 0 2 6 8 10 12 14 16 18 20 0 1 2 3 4 5 6 7 8 9 10
4
INPUT VOLTAGE (V) INPUT VOLTAGE (V) INPUT VOLTAGE (V)
1963A G11 1963A G12 1963A G42
LT1963A-1.8 GND Pin Current LT1963A-2.5 GND Pin Current LT1963A-3.3 GND Pin Current
25 25 25
TJ = 25°C VSŇ DN = VIN TJ = 25°C TJ = °C
*FOR VOUT = 1.8V VSŇ
DN = VIN V = VIN
20 20 *FOR 20
GND PIN CURRENT
15 15 15
RL = 8.33, IL = 300mA*
RL = 11, IL = 300mA*
10 10 10
RL = 6, IL = 300mA*
RL = 18, IL = 100mA* RL = 180, IL = 10mA*
RL = 25, IL = 100mA*
5 5 5 L = 33, IL = 100m
196
LT1963A GND Pin Current LT1963A-1.5 GND Pin Current LT1963A-1.8 GND Pin Current
10
TJ = 25°C VSŇ DN = VIN 100 100
*FOR VOUT = 1.21V TJ = 25°C VSŇ DN = VIN 90 TJ = 25°C VSŇ DN = VIN
90
*FOR VOUT = 1.5V *FOR VOUT = 1.8V
8
80 80
RL = 4.33, IL = 300mA*
70 70 RL = 1.2, IL = 1.5A*
GND PIN CURRENT
LT1963A-2.5 GND Pin Current LT1963A-3.3 GND Pin Current LT1963A GND Pin Current
100 100 100
TJ = 25°C VSŇ DN = VIN TJ = 25°C VSŇ DN = VIN TJ = 25°C VSŇ DN = VIN
90 90 *FOR VOUT = 3.3V 90
*FOR VOUT = 2.5V *FOR VOUT = 1.21V
80 80 80
70 RL = 2.2, IL = 1.5A*
70 70
RL = 1.67, IL = 1.5A*
GND PIN CURRENT
GND Pin Current vs ILOAD SHDN Pin Threshold (On-to-Off) SHDN Pin Threshold (Off-to-On)
100 1.0 0 1.0 0
VIN = VOUT (NOMINAL) +1V
90 0.9 IL = 1mA 0.9 IL = 1.5A
80 0.8 0.8
70
SŇ DN PIN THRESHOLD
SŇ DN PIN THRESHOLD
0.7 0.7
GND PIN CURRENT
60 0.6 0.6
IL = 1mA
50 0.5 0.5
40 0.4 0.4
30 0.3 0.3
20 0.2 0.2
10 0.1 0.1
0 0 0
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 –50 –25 25 50 100 125 – –25 0
75 5
1963aff
196
SHDN Pin Input Current SHDN Pin Input Current ADJ Pin Bias Current
5.0 7 VSŇ DN = 20V 5.0
4.5 4.5
6
4.0 4.0
5 3.5
2.5
TJ = 125C
1.5 2.0
1.5
1.0
1.0
0.5
0.5
VOUT = 100mV
0 0
0 2 4 6 8 10 12 14 16 18 20 –50 –25 25 50 100 125
75
0
INPUT/OUTPUT DIFFERENTIAL (V) TEMPERATURE (°C)
1963A G27 1963A G28
3.0 0.6
2.5 0.5
2.0
LT1963A-3.3 0.4
1.5 TJ = 25°C LT1963A
VIN = 0V 0.3
1.0 LT1963A-2.5 CURRENT FLOWS INTO 0.2
OUTPUT PIN
0.5
VOUT = VADJ (LT1963A) 0.1
0 VOUT = VFB (LT1963A-1.5/1.8/-2.5/-3.3)
0
0 1 2 3 4 5 6 7 8 9 10 –50 –25 25 75 100 125
0 50
OUTPUT VOLTAGE (V) TEMPERATURE (°C)
1963A G29 1963A G30
196
RIPPLE REJECTION
50 2.0
70
40 IL = 100mA
68 1.5
30 COUT = 100µF TANTALUM
+10 1µF CERAMIC 66 1.0
20 COUT = 10µF TANTALUM
10 5A
64 IL = 0.7
VIN = VRIPPL P-P E AT f = 120Hz
OUT(NOMINAL) +1V + 0.5V 0.5
IL = 0.75A
0 VIN = VOUT(NOMINAL) +1V + 50mVRMS RIPPLE 62
0
10 100 1k 10k 100k 1M –50 –25 25 75 100 125 –50 –25 25 75 100 125
0 50 0 50
FREQUENCY (Hz) TEMPERATURE (°C) TEMPERATURE (°C)
1963A G31
1963A G32 1963A G33
5
OUTPUT NOISE SPECTRAL DENSITY
LT1963A-1.5
0
LOAD REGULATION
LT1963A LT1963A-2.5
LT1963A-1.8 LT1963A-3.3
–5 LT1963A-2.5 0.1
LT1963A-3.3
–10
VIN = VOUT(NOMINAL) +1V (LT1963A-1.8/-2.5/-3.3) LT1963A
LT1963A-1.8
–15 VIN = 2.7V (LT1963A/LT1963A-1.5) LT1963A-1.5
IL = 1mA TO 1.5A
–20
–50 0.01
–25 25 75 100 125 10 100 10k 100k
0 50 1k
TEMPERATURE (°C) FREQUENCY (Hz)
1963A G34 1963A G35
30
LT1963A-1.5 LT1963A
VOUT
25
100µV/DIV
20
15
10
5
0 0.001 0.01 0.1 1 10
0.0001 LOAD CURRENT (A) 196
196
VOLTAGE
50 0
OUTPUT
OUTPUT
0 –50
–50 –100
–100 –150
0.6 1.5
VIN = 4.3V
LOAD
CURRENT
0.4
LOAD
CURRENT
1.0 CIN = 33µF TANTALUM
0.2 COUT = 100µF TANTALUM
0.5
+10 1µF CERAMIC
0
0
0 2 4 6 8 10 12 14 16 18 20 0 50 100 150 200 250 300 350 400 450 500
TIME (µs) TIME (µs)
1963A G38 1963A G39
196
7V. It has a bias current of 3µA which flows into the + SŇ DNSENSE +
VIN LOAD
pin. The ADJ pin voltage is 1.21V referenced to ground GND
LT1963A
regulators into a low power shutdown state. The output will Figure 1. Kelvin Sense Connection
196
Adjustable Operation
The adjustable version of the LT1963A has an
output voltage range of 1.21V to 20V. The output
voltage is set by the ratio of two external resistors as
shown in Figure
2. The device servos the output to maintain the voltage at
the ADJ pin at 1.21V referenced to ground. The current
in R1 is then equal to 1.21V/R1 and the current in R2 is
the current in R1 plus the ADJ pin bias current. The
ADJ pin bias current, 3µA at 25°C, flows through R2
into the ADJ pin. The output voltage can be calculated
using the formula in Figure 2. The value of R1 should
be less than 4.17k to minimize errors in the output
voltage caused by the ADJ pin bias current. Note that in
shutdown the output is turned off and the divider
current will be zero.
The adjustable device is tested and specified with the
ADJ pin tied to the OUT pin for an output voltage of
1.21V. Specifications for output voltages greater than
1.21V will be proportional to the ratio of the desired
output voltage
to 1.21V: VOUT/1.21V. For example, load regulation for an
output current change of 1mA to 1.5A is – 3mV typical
at VOUT = 1.21V. At VOUT = 5V, load regulation is:
(5V/1.21V)(–3mV) = –12.4mV 196
196
Ceramic Capacitors
Extra consideration must be given to the use of
ceramic capacitors. Ceramic capacitors are
manufactured with a variety of dielectrics, each with
196
50mV/
50mV/
RESR
RESR
50 10
100 20
50mV/
50mV/
RESR
RESR
50 10
100 20
VOUT = 5V VOUT = 5V
0 IOUT = 500mA WITH 0 IOUT = 500mA WITH
500mA PULSE 500mA PULSE
COUT = 10µF COUT = 100µF
20 5
50mV/
50mV/
RESR
RESR
50 10
100 20
Figure 5 Figure 8
VOUT = 1.2V
A IOUT = 500mA WITH 500mA PULSE
COUT =
A = 10µF CERAMIC
B = 10µF CERAMIC II 22µF/45mΩ POLY
C = 10µF CERAMIC II 100µF/35mΩ POLY
50mV/
B
RESR
Figure 9
1963aff
196
20
40
BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF
0 20
X5R
–20 0 X5R
CHANGE IN VALUE
CHANGE IN VALUE
–20
–40
–40
–60 Y5V
Y5V –60
–80
–80 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF
–100 –100
0 2
6 8 12 14 16 –50 –25 25 75 100 125
4 10
0 50
DC BIAS VOLTAGE (V) TEMPERATURE (°C)
1963A F10 1963A F11
Figure 10. Ceramic Capacitor DC Bias Characteristics Figure 11. Ceramic Capacitor Temperature Characteristics
Overload Recovery
Like many IC power regulators, the LT1963A-X has safe
op- erating area protection. The safe area protection
decreases the current limit as input-to-output voltage
increases and keeps the power transistor inside a safe
operating region for all values of input-to-output
voltage. The protection is designed to provide some
output current at all values of input-to-output voltage up
to the device breakdown.
When power is first turned on, as the input voltage
rises, the output follows the input, allowing the regulator
to start up into very heavy loads. During the start-up, as
the input voltage is rising, the input-to-output voltage
differential is small, allowing the regulator to supply
large output currents. With a high input voltage, a
problem can occur wherein removal of an output
short will not allow the output voltage to recover.
Other regulators, such as the LT1085, also exhibit this
phenomenon, so it is not unique to the LT1963A-X.
The problem occurs with a heavy output load when the
input voltage is high and the output voltage is low.
Common situations are immediately after the removal
of a short- circuit or when the shutdown pin is pulled
high after the input voltage has already been turned on.
The load line for such a load may intersect the output
current curve at two points. If this happens, there are two
stable output operat- ing points for the regulator. With
this double intersection, the input power supply may
need to be cycled down to zero and brought up again to
make the output recover.
Thermal Considerations
The power handling capability of the device is limited
by the maximum rated junction temperature (125°C).
The power dissipated by the device is made up of two
components:
1. Output current multiplied by the input/output
voltage differential: (IOUT)(VIN – VOUT), and
2. GND pin current multiplied by the input voltage: (IGND)
(VIN).
The GND pin current can be found using the GND
Pin Current curves in the Typical Performance
Characteristics. Power dissipation will be equal to
the sum of the two components listed above.
The LT1963A series regulators have internal
thermal limiting designed to protect the device during
overload conditions. For continuous normal conditions,
the maxi- mum junction temperature rating of 125°C
must not be exceeded. It is important to give careful
consideration to all sources of thermal resistance from
junction to ambi- ent. Additional heat sources
mounted nearby must also be considered.
For surface mount devices, heat sinking is
accomplished by using the heat spreading capabilities
of the PC board and its copper traces. Copper board
stiffeners and plated through-holes can also be used to
spread the heat gener- ated by power devices.
196
196
The output of the LT1963A can be pulled below ground In circuits where a backup battery is required,
without damaging the device. If the input is left open several different input/output conditions can occur.
circuit or grounded, the output can be pulled below The output voltage may be held up while the input is
ground by 20V. For fixed voltage versions, the output either pulled to ground, pulled to some intermediate
will act like a large resistor, typically 5k or higher, voltage, or is left open circuit. Current flow back into
limiting current flow to typically less than 600µA. For the output will follow the curve shown in Figure 12.
adjustable versions, the output will act like an open
circuit; no current will flow out of the pin. If the input is When the IN pin of the LT1963A is forced below the
powered by a voltage source, the output will source the OUT pin or the OUT pin is pulled above the IN pin,
short-circuit current of the device and will protect input cur- rent will typically drop to less than 2µA. This
itself by thermal limiting. In this case, grounding the can happen if the input of the device is connected to
SŇ DN pin will turn off the device and stop the output a discharged (low voltage) battery and the output is
from sourcing the short-circuit current. held up by either a backup battery or a second
regulator circuit. The state of the SŇ DN pin will have no
The ADJ pin of the adjustable device can be pulled above
effect on the reverse output current when the output is
or below ground by as much as 7V without damaging
pulled above the input.
the device. If the input is left open circuit or grounded,
the ADJ pin will act like an open circuit when pulled
below ground
5.0
and like a large resistor (typically 5k) in series with a LT1963A
4.5 VOUT = VADJ
diode when pulled above ground.
4.0 LT1963A-1.5
REVERSE OUTPUT CURRENT
regulated 1.5V output from the 1.21V reference when 1.0 TJ = 25°C
VIN = 0V
the output is forced to 20V. The top resistor of the 0.5 CURRENT FLOWS
INTO OUTPUT PIN
0
resistor divider must be chosen to limit the
current into the ADJ pin to less than 5mA when the ADJ
0 1 2 3 4 5 6 7 8 9 10
pin is at 7V. The 13V difference between OUT and ADJ OUTPUT VOLTAGE (V) 1963A F12
196
L1 500µH
LT1963A-3.3 INOUT
3.3V OUT
L2 1N4148 1.5A
10VAC AT
+ + 22µF
10000µF SŇ DNFB GND
115VIN 34k*
1k
90-140
VAC
10VAC AT
115VIN
2.4k
C1A
+ 200k
POINTS + 1/2
1N4148
22µF 750Ω LT1018
– 0.1µF
+V
C1B
750Ω +V
0.033µF
A1
1/2
LT1018 1N4148
LT1006
10k10k
+V
10k
1µF
+V
= NTE5437
LT1963A
R2 0.01Ω INOUT
R6 6.65k
SŇ DN SŇ DNFB GND
R7 4.12k
R3R4 R5
2.2k2.2k 1k
3 + 8
2 – 1/2 1
LT1366
4
C3 0.01µF
1963A TA05
196
.060
(1.524) .390 – .415
.256 .060 TYP (9.906 – 10.541) .165 – .180
(6.502) (1.524) (4.191 – 4.572) .045 – .055
(1.143 – 1.397)
15° TYP
.004 +.008
.060 .183 .059 –.004
.330 – .370
(1.524) (4.648)
(8.382 – 9.398) (1.499) TYP
( +0.203
0.102–0.102 )
.095 – .115
(2.413 – 2.921)
.075
(1.905) DETAIL A
.067 .013 – .023 .050 ±.012
.300 +.012
(7.620) (1.702) (0.330 – 0.584) (1.270 ±0.305)
. –.020 .028 – .038
BSC
(
+0.305
BOTTOM VIEW OF DD PAK 3.632 (0.711 – 0.965)
–0.508
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK ) TYP
DETAIL A
0° – 7° TYP 0° – 7° TYP
.420
RECOMMENDED SOLDER PAD LAYOUT .080
.420 .276
.350 .325
.205
.585 .585
.320
.090 .090
196
.245
MI .160 .005
N .150 – .157
.228 – .244 (3.810 – 3.988)
(5.791 – 6.197) NOTE 3
.030 .005
TYP
RECOMMENDED SOLDER PAD LAYOUT 1 2 3 4
.010 – .020
(0.254 – 0.508) 45□ .053 – .069
(1.346 – 1.752)
.008 – .010 .004 – .010
(0.203 – 0.254) 0– 8 TYP (0.101 – 0.254)
.016 – .050
.014 – .019 .050
(0.406 – 1.270)
(0.355 – 0.483) (1.270)
NOTE: INCHES TYP BSC
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) SO8 0303
196
.130 – .146
(3.30 – 3.71)
.039 MAX
.059 MAX
.090
BSC
.181 MAX
.0905
(2.30) .033 – .041
RECOMMENDED SOLDER PAD LAYOUT
BSC (0.84 – 1.04)
10 – 16
.024 – .033 .012 .0008 – .0040
(0.60 – 0.84) (0.31) (0.0203 – 0.1016)
.181 MIN
ST3 (SOT-233) 0502
(4.60)
BSC
196
.230 – .270
(5.842 – 6.858)
.570 – .620
.028 – .038 .620
.460 – .500 (14.478 – 15.748)
(0.711 – 0.965) (15.75)
(11.684 – 12.700)
.330 – .370 TYP
.700 – .728
(8.382 – 9.398)
(17.78 – 18.491)
SEATING PLANE
.152 – .202
.260 – .320 (3.861 – 5.131)
(6.60 – 8.13)
196
.155 – .195*
(3.937 – 4.953)
.013 – .023
(0.330 – 0.584)
.067
BSC .135 – .165
(1.70)
(3.429 – 4.191) * MEASURED AT THE SEATING PLANE
T5 (TO-220) 0801
196
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev
J) Exposed Pad Variation BB
4.70 DETAIL A
(.185) 4.90 – 5.10*
3.58 (.193 – .201) 0.56
(.141) (.022)
3.58 REF
(.141)
NOTE 5 0.53
16 1514 13 12 1110 9 (.021)
NOTE 5 REF
DETAIL A IS THE PART OF
6.60 0.10
2.94 3.05 THE LEAD FRAM FEATURE
4.50 0.10 FOR REFERENCE ONLY
(.116) (.120) DETAIL A
2.94 6.40 NO MEASUREMENT PUROSE
SEE NOTE 4
(.116) (.252)
BSC
1.05 0.10
0.65
0.09 – 0.20 0.50 – 0.75 (.0256) 0.05 – 0.15
(.0035 – .0079) (.020 – .030) BSC (.002 – .006)
0.195 – 0.30
FE16 (BB) TSSOP REV J 1012
(.0077 – .0118)
NOTE: TYP
1. CONTROLLING DIMENSION: MILLIMETERS 5. BOTTOM EXPOSED PADDLE MAY HAVE METAL PROTRUSION
MILLIMETERS IN THIS AREA. THIS REGION MUST BE FREE OF ANY
2. DIMENSIONS ARE IN EXPOSED TRACES OR VIAS ON PBC LAYOUT
(INCH
3. DRAWING NOT TO SCALE *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
196
p
196 a
t
e
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
n
However, no responsibility is assumed for its use. Linear Technology Corporation makes no
28 representa- tion that theFor more information
interconnection of its circuits as described herein will not infringe on existing
t
For more information ri
ghts.
LT1963A
1963aff
27
LT1963A Series
TYpIcal applIcaTION
Adjustable Current Source
R5
0.01Ω
LT1963A-1.8
IN OUT LOAD
C1
+ R1
VIN > 2.7V 1k SŇ DN FB
10µF
LT1004-1.2 GND
R2 R4 R6 R8
C3
80.6k 2.2k 2.2k 100k
1µF
R3
2k
R7
2 8 470Ω
+ 1/2 1
LT1366
3
C2 –
NOTE: ADJUST R1 FOR 3.3µF
0A TO 1.5A CONSTANT CURRENT 1963A TA04
rElaTED parTS
PART NUMBER DESCRIPTION COMMENTS
LT1175 500mA, Micropower, Negative LDO VIN: –20V to –4.3V, VOUT(MIN) = –3.8V, VDO = 0.50V, IQ = 45µA, ISD 10µA,
DD, SOT-223, PDIP8 Packages
LT1185 3A, Negative LDO VIN: –35V to –4.2V, VOUT(MIN) = –2.40V, VDO = 0.80V, IQ = 2.5mA, ISD <1µA,
TO220-5 Package
LT1761 100mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 20µA, ISD <1µA
ThinSOT™ Package
LT1762 150mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 25µA, ISD <1µA, MS8 Package
LT1763 500mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 30µA, ISD <1µA, S8 Package
LT1764/ 3A, Low Noise, Fast Transient Response, VIN: 2.7V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD <1µA,
LT1764A LDO DD, TO220 Packages
LTC1844 150mA, Very Low Drop-Out LDO VIN: 6.5V to 1.6V, VOUT(MIN) = 1.25V, VDO = 0.08V, IQ = 40µA, ISD < 1µA,
ThinSOT Package
LT1962 300mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.27V, IQ = 30µA, ISD <1µA, MS8 Package
LT1964 200mA, Low Noise Micropower, VIN: –0.9V to –20V, VOUT(MIN) = –1.21V, VDO = 0.34V, IQ = 30µA, ISD 3µA,
Negative LDO ThinSOT Package
LT1965 1.1A, Low Noise, Low Dropout Linear 290mV Dropout Voltage, Low Noise: 40µVRMS, VIN: 1.8V to 20V, VOUT: 1.2V to 19.5V,
Regulator stable with ceramic caps, TO-220, DD-Pak, MSOP and 3mm × 3mm DFN Packages
LT3020 100mA, Low Voltage VLDO, VIN: 0.9V to 10V, VOUT(MIN) = 0.20, VDO = 0.15V, IQ = 120µA, ISD <3µA,
VIN(MIN) = 0.9V DFN, MS8 Packages
LT3023 Dual, 2x 100mA, Low Noise VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 40µA, ISD <1µA,
Micropower, LDO DFN, MS10 Packages
LT3024 Dual, 100mA/500mA, Low Noise VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 60µA, ISD <1µA,
Micropower, LDO DFN, TSSOP Packages
LT3080/ 1.1A, Parallelable, Low Noise, Low 300mV Dropout Voltage (2-Supply Operation), Low Noise: 40µVRMS, VIN: 1.2V to 36V,
LT3080-1 Dropout Linear Regulator VOUT: 0V to 35.7V, current-based reference with 1-resistor VOUT set; directly parallelable
(no op amp required), stable with ceramic caps, TO-220, SOT-223, MSOP and 3mm ×
3mm DFN Packages; “–1” version has integrated internal ballast resistor
1963aff