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CS501 Assignment No2 Spring 2023

Solution

Q#1:
(a) What will be the logic levels on the external FALCON-A buses
when each of the given
FALCON-A instruction is executing on the processor? Complete the
table 1 given above. All numbers are in the decimal number system,
unless noted otherwise.
estions No 01 20 marks
Address Data
RTL
Instruction Bus Bus MRead MWrite
Equivalent
<15..0> <15..0>
Load r7,
R[7]M[14+R[5]] 1248h 2D7Fh 1 0
[14+r5]
Addi r2, r4,
R[2]R[4]+31 unknown ???? ? ?
31
Jump [52] PCPC + 52 unknown ???? ? ?
Store r1,
M[R[3]+49R[1] C338h 01B4h 0 1
[r3+49]
Sub r5, r7,
R[5]R[7]- R[6] unknown ???? ? ?
r6
Shift r2, r6, R[2](4α0)©
unknown ???? ? ?
4 R[6]<15…4>
mov r3, r2 R[3]R[2] unknown ???? ? ?
Jz r4, [-32] R[4]=0:PCPC-32 unknown ???? ? ?

(b) Specify memory-addressing modes for each of the FALCON-A

instructions given.

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Falcon A Instruction Addressing mode

Load r7, [14+r5] Indexed addressing mode with displacement

Addi r2, r4, 31 immediate

Jump [52] relative

Store r1, [r3+49] Indexed addressing mode with displacement.

Sub r5, r7, r6 register

Shift r2, r6, 4 register

mov r3, r2 register

Jz r4, [-32] relative

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