mathematics
Article
Robust Tracking Control of Dual-Active-Bridge DC–DC
Converters with Parameter Uncertainties and Input Saturation
Nguyen Ngoc Nam and Sung Hyun Kim *






Citation: Nam, N.N.; Kim, S.H.
Robust Tracking Control of
Dual-Active-Bridge DC–DC
Converters with Parameter
Uncertainties and Input Saturation.
Mathematics 2022, 10, 4719. https://
doi.org/10.3390/math10244719
Academic Editors: Fangzheng Gao
and Zhongcai Zhang
Received: 17 November 2022
Accepted: 9 December 2022
Published: 12 December 2022
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Attribution (CC BY) license (https://
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4.0/).
Mathematics 2022, 10, 4719. https://doi.org/10.3390/math10244719
Department of Electrical, Electronic and Computer Engineering, University of Ulsan, Daehak-ro 93,
Nam-Gu, Ulsan 680-749, Republic of Korea
* Correspondence: shnkim@ulsan.ac.kr
Abstract: This paper proposes a method for robust tracking control synthesis of dual-active-bridge
(DAB) DC–DC converters with parameter uncertainties and input saturation. In the proposed method,
the nonlinear function of the phase shift ratio is expressed as a control input, and the phase shift ratio
is determined by the one-to-one relationship with the control input. Especially, the proposed method
is developed with consideration of the input saturation phenomenon that occurs physically in the
phase shift ratio of DAB DC–DC converters. Furthermore, based on the proposed method, a set of
exponential constrained stabilization conditions for DAB DC–DC converter systems with parameter
uncertainties is provided to ensure a fast convergence rate. Finally, to verify the effectiveness of the
proposed control method, various simulation results are provided and compared with the well-known
improved model phase shift control (IMPSC) and load current feedforward (LCFF) control methods.
Keywords: dual-active bridge (DAB); robust control; input saturation; isolative bidirectional DC–DC
converter
MSC: 93C05
1. Introduction
Isolated bidirectional DC–DC (IBDC) converters have been widely used in energy
storage systems (ESSs) for DC microgrids or smart girds [1], automotive applications [2],
and solid-state transformer (SST) applications [3]. Thus, many IBDC topologies have
been discussed in both academia and industry, including dual-flyback converters [4],
dual-Zeta converters [5], forward-flyback converters [6], dual-push–pull converters [7],
dual-half-bridge converters [8], and dual-active bridge (DAB) converters [9]. Among
all these types of IBDC converters, the DAB converter has been regarded as one of the
most-promising topologies due to its distinct advantages such as inherent soft switching,
bidirectional power transfer capability, symmetrical structure, and high power density.
When developing the DAB DC–DC converter, the main challenges arise from the input
voltage fluctuation, the output load change, and the output voltage or power reference
variation. Furthermore, it is worth noticing that the transient response performance of the
DAB DC–DC converter can be deteriorated by the parameter uncertainty of the converter.
For this reason, various control strategies have been proposed such that the DAB DC–DC
converter has more improved transient response performance. As one of the most intuitive
techniques, References [10] and [11] proposed a method of using a proportional–integral
(PI) controller to regulate the output voltage. However, the drawback of this method is that
the output voltage performance deteriorates as the load current changes.
In order to prevent the output voltage performance degradation despite the change of
the load current, the linearized control method [12,13], model phase shift control (MPSC)
method [14], and load current feedforward (LCFF) control method [15,16] have been pro-
posed by taking the output the load current as the measured disturbance. Thereafter, based
on the MPSC method, the work in [17] proposed an improved model phase shift control
https://www.mdpi.com/journal/mathematics
Mathematics 2022, 10, 4719 2 of 19

(IMPSC) to achieve a fast dynamic response on the output voltage. However, the disadvan-
tage of the proposals in [10–17] is that the phase shift ratio is still affected by the uncertainty
of the internal inductance. To solve the problem arising from this parameter uncertainty,
a virtual direct power control (VDPC) for DAB DC–DC converters was proposed in [18].
The main advantage of the VDPC is that the phase shift ratio can be determined without
utilizing inductance information. However, the VDPC method (as well as MPSC, LCFF con-
trol, and IMPSC) has the disadvantage that one additional current sensor must be used to
measure the output load current, and the uncertainty of the load resistance and capacitance
on the output side cannot be taken into account. To avoid the addition of such a current
sensor, Reference [19] proposed a method of designing a nonlinear disturbance observer
(NDO) that can estimate the output load current. However, it should be noted that the NDO
was also designed without consideration of parameter uncertainty. Recently, in [20,21],
a moving discretized control set model-predictive control (MDCS-MPC) was proposed
as a potential technique applicable to DAB DC–DC converters, where the trial and error
method is used to find the best phase shift value. However, MDCS-MPC requires the use of
a trial and error approach to obtain the optimal phase shift value and the implementation
of an artificial neural network approach to find the weighting matrix of the cost function.
Furthermore, MDCS-MPC provides no way to handle the problems of the disturbance
and uncertainties present in power converter systems. As an alternative, the disturbance
estimation method was introduced in [22,23], but it also has the weakness of having to
set too many tuning parameters therein. Recently, an adaptive model predictive control
for the DAB DC–DC converter was investigated based on the MDCS-MPC method [24].
This method enables the selection of the trapezoidal and triangular modulation to reduce
switching losses.
To fill the gap discussed above, this paper proposes a method for robust tracking
control of DAB DC–DC converters with parameter uncertainties and input saturation.
Furthermore, the proposed control method is developed so that the DAB DC–DC converter
can be robust against sudden changes in the input voltage source and load resistance. To
be specific, the contributions of this paper are summarized as follows:
• Different from the the aforementioned methods, this paper provides a method to
consider the phase shift nonlinearity term as a control input. Accordingly, this method
opens the possibility that the phase shift ratio can be determined by designing a robust
control input for DAB DC–DC converter systems with parameter uncertainties.
• In order to achieve a fast convergence rate, this paper proposes an effective method
for exponential saturated control synthesis of DAB DC–DC converter systems with
parameter uncertainties. Based on several convex optimization techniques, the overall
stabilization conditions are formulated in terms of the linear matrix inequality (LMI),
which offers a set of optimal control gains for DAB DC–DC converter systems.
• Indeed, the input saturation of DAB DC–DC converters has not been taken into
account in the control design process until now. Thus, to overcome this lack of
research, this paper proposes a method to analyze the saturation phenomenon that
occurs physically in the phase shift ratio of DAB DC–DC converters and reflect its
effect on the control design.
• In order to demonstrate the effectiveness of the proposed control method, our results
are compared to the aforementioned IMPSC and LCFF control methods. Furthermore,
to verify the robustness of the proposed method and to show the effect of saturated
input, various scenarios are produced by considering changes in the source voltage
and load resistance.
The rest of the paper is organized as follows. Section 2 presents the modeling of
the DAB DC–DC converter system. Section 3 proposes the feedback control design, and
Section 4 provides the simulation results. Finally, the paper is concluded in Section 5.

Notations: For any matrix P , P ≥ 0 (P > 0) means that P is real symmetric and positive
semidefinite (definite). In symmetric block matrices, (∗) is used as an ellipsis for terms
Mathematics 2022, 10, 4719 3 of 19

induced by symmetry. For any square matrix Q, He{Q} = Q + Q T ; diag(·) stands for a
block-diagonal matrix; col(v1 , v2 , · · · , vn ) = [v1T v2T · · · vnT ] T ; λmin (.) and λmax (.) denote the
minimum and maximum eigenvalues of the corresponding matrix, respectively; and sign(·)
returns the sign of the corresponding argument. For any matrix P > 0, E (P , 1) stands for an
ellipsoid defined as E (P , 1) = x ∈ Rn  x T P x ≤ 1 ; for a scalars̄ and a matrix N ∈ R1×n ,
 
n

L( N, s̄) stands for a linear region defined as follows: L( N, s̄) = x ∈ R  | Nx | ≤ s̄ .

2. System Description and Preliminaries

So far, various types of modeling for a DAB DC–DC converter system have been
proposed such as the discrete-time model [25,26], generalized average model [27], reduced-
order model [28,29], and improved reduced model [30]. Among these methods, the reduced-
order model, presented in [28,29], exhibits the best choice in the aspects of complexity and
accuracy [31], which will be utilized in this paper.
Figure 1 shows the topology of a two-stage single phase for a dual-active-bridge (DAB)
DC–DC converter, where:
• v1 and v2 (t) are the given constant input voltage and the measurable output voltages,
respectively;
• v p (t) is the output voltage on the primary bridge (Bridge 1);
• vs (t) is the input voltage on the secondary bridge (Bridge 2);
• i (t), iC (t), and i R (t) are the output current, the capacitor current, and the load current,
respectively;
• i L (t) is the phase shift inductor current;
• L is the total inductance consisting of the external inductance and the transformer
leakage inductor;
R is the equivalent load resistance satisfying R ∈ Rmin , Rmax , where Rmin and Rmax
 
•
are known;
• C1 is the capacitance on the input side;
C2 is the capacitance on the output side such that C2 ∈ C2min , C2max , where C2min and
 
•
C2max are known.

Bridge 1 Bridge 2 i iR

S1 S3 S5 S7 ic
iL L
v1 C1 vp vs C2 v2 R
n:1
S2 S4 S6 S8

Figure 1. The topology of a dual-active-bridge converter.

The considered DAB DC–DC converter consists of two bridges connected through
an inductor L and an isolated transformer, and there are four gate drives on each bridge,
where the switches S1 to S8 are used to control the gate drives. In general, the DAB DC–DC
converter uses single-phase-shifted (SPS) square-wave modulation to control its power.
Figure 2 shows the operating waveforms of this converter based on SPS square-wave
modulation [9].
Mathematics 2022, 10, 4719 4 of 19

!, " t
!, " t
#, $ t
#, $ t
!

%
#$
t
"

&" /2 ! /2

Figure 2. Operating waveforms of the DAB converter using SPS modulation.

To be specific, a pair of switches S1/S2, S3/S4, S5/S6, and S7/S8 operates comple-
mentarily, as shown in Figure 2.
Furthermore, the duty ratio of the primary and secondary bridges is fixed at 50%,
and the phase shift ϕ(t) = πd(t) is adjustable to control the output voltage tracking the
reference.
Especially, since the current i L (t) is affected by (v p (t) − vs (t)) and L, the transferred
power from the primary bridge to the secondary bridge is generated by the phase shift ϕ(t).
Thus, as in [32], the power of the considered converter is obtained as follows:

nv1 v2 (t)
p(t) = d(t)(1 − |d(t)|) (1)
2 fs L

where d(t) ∈ [−0.5, 0.5] denotes the phase shift ratio, n denotes the transformer turns ratio,
and f s denotes the switching frequency.
In addition, the transferred power is expressed as follows:

p ( t ) = v2 ( t ) i ( t ). (2)

Thus, from (1) and (2), it follows that

nv1
i (t) = d(t)(1 − |d(t)|). (3)
2 fs L

Furthermore, by the Kirchhoff current law, it is given that

dv2 (t)
C2 = i ( t ) − i R ( t ). (4)
dt
Thus, by substituting (3) and i R (t) = v2 (t)/R into (4), it is obtained that

v̇2 (t) = κ1 v2 (t) + κ2 v1 u(t) (5)

where
1 n
κ1 = − , κ2 = , u(t) = d(t)(1 − |d(t)|).
RC2 2 f s LC2
Mathematics 2022, 10, 4719 5 of 19

Accordingly, using the first-order Euler approximation with the sampling time Ts , the
discrete-time model of (5) is represented as follows:

v2 ( k + 1) = ρ1 v2 ( k ) + ρ2 v1 u ( k ) (6)

where
Ts nTs
ρ1 = 1 − , ρ2 = > 0, u(k) = d(k)(1 − |d(k)|).
RC2 2 f s LC2

In addition, since R ∈ Rmin , Rmax and C2 ∈ C2min , C2max

   
, the system coefficients
are also bounded as ρ1 ∈ ρmin max and ρ ∈ ρmin , ρmax , which can be rearranged
 
1 , ρ 1 2 2 2
as follows:

ρ1 = α1 + β 1 ∆1 , ρ2 = α2 + β 2 ∆2

where

ρmax + ρmin ρmax − ρmin

α1 = 1 1
, β1 = 1 1
, | ∆1 | ≤ 1
2 2
ρmax + ρmin ρmax − ρmin
α2 = 2 2
, β2 = 2 2
, |∆2 | ≤ 1.
2 2

Remark 1. In (6), the replacement u(k ) = d(k )(1 − |d(k)|) is reasonable because the
phase shift ratio d(k) can be reconstructed by u(k ) according to the following one-to-one
relationship:
 q
 1 − 1 − u(k), for u(k) ∈ [0, 0.25]
2 4
d(k) = q (7)
− 1 + 1 + u(k), for u(k ) ∈ [−0.25, 0].
2 4

The purpose of this paper is to design a controller that allows the output voltage v2 (k)
to track the reference voltage v̄ref
2 . To effectively address this reference tracking problem,
this paper adds the following accumulator:
 
w(k + 1) = w(k ) + v̄ref
2 − v2 ( k ) (8)

with w(0) = 0. As a result, letting x T (k) = v2T (k) w T (k) and combining (6) and (8), we
 

can obtain

x (k + 1) = A∆ x (k) + B∆ u(k ) + D v̄ref

2 (9)

subject to the following input saturation:

u(k ) ∈ [−0.25, 0.25] (10)

where

A∆ = A + E∆1 H1 , B∆ = B + E∆2 H2
     
α1 0 α2 v1 0
A= , B= , D=
−1 1 0 1
E T = 1 0 , H1 = β 1 0 , H2 = β 2 v1 .
   
Mathematics 2022, 10, 4719 6 of 19

In addition, based on (6) and (8), the steady-state values of x1 (k), x2 (k), and u(k ) are
given, respectively, as follows:

2 fs L 2 f s L ref
x̄1 = v̄2 = v̄ref
2 , x̄2 = w̄, ū = v̄2 = v̄ . (11)
nRv1 nRv1 2

However, since R is bounded, it ishard to directly obtain ū from (11).

That is, based on R ∈ Rmin , Rmax , it is given that


 
2 fs L 2 fs L
ū ∈ v̄ 2 , v̄ 2 .
nRmax v1 nRmin v1

Thus, ū can be represented as follows:

ū = ū∗ + δu (12)

where ū∗ is the central value in the steady state and δu is the uncertain constant value, i.e.,

Rmax + Rmin f s Lv̄2 Rmax − Rmin

   
f s Lv̄2
ū∗ = , | δu | ≤ δ̄u = . (13)
nv1 Rmin Rmax nv1 Rmin Rmax

Accordingly, it follows from (9) that

x̄ = A∆ x̄ + B∆ ū∗ + δu + D v̄ref T
 T
x̄2T


2 , x̄ = x̄1 (14)

where x̄1T and x̄2T are the steady-state values of x1T and x2T , respectively,. By letting

v2 (k) − v̄ref
 
e(k ) = x (k ) − x̄ = 2 , ũ(k) = u(k) − ū∗
w(k ) − w̄

the error system model is described as follows:

e(k + 1) = A∆ e(k) + B∆ ũ(k) − δu . (15)

Subsequently, let us establish ũ(k ) as follows:

 
ũ(k) = ν(k) + ν̄ i.e., u(k) = ν(k) + ν̄ + ū∗ (16)

where ν(k ) is a feedback control input and ν̄ ∈ [−δ̄u , δ̄u ] is a tuning control component
used to eliminate δu .
Then, based on (16), the closed-loop system is described as follows:


e(k + 1) = A∆ e(k) + B∆ ν(k ) + B∆ ν̄ − δu . (17)

In addition, (10) and (16) lead to the following constraint:

1 1
− − ū∗ − δ̄u < ν(k) < − ū∗ + δ̄u . (18)
4 4
As a result, since the tuning control component can be set as ν̄ = δu by making the
steady-state error zero in real-time, this paper focuses on designing a feedback control that
stabilizes the following system subject to (18):

e(k + 1) = A∆ e(k ) + B∆ sat(ν(k), s̄), (19)

where
1
sat(ν(k), s̄) = sign(ν(k)) · min s̄, |ν(k)| , s̄ = − ū∗ + δ̄u .

(20)
4
Mathematics 2022, 10, 4719 7 of 19

The following lemmas will be used for our main derivation.

Lemma 1 ([33]). Let X, ∆, and Y be real matrices with appropriate dimensions. Then, if ∆
satisfies ∆∆ T ≤ I, then for a scalar e > 0, it holds that

He{ X∆Y } ≤ eXX T + e−1 Y T Y. (21)

Lemma 2 ([34]). For a single control input ν(k), if |s(k )| ≤ s̄ holds, then

2  
sat(ν(k), s̄) = ∑ µi ( k ) Gi ν(k ) + Gic s(k ) (22)
i =1

where Gi denotes an
element of the set G ∈ {0, 1} and Gic = 1 − Gi , and

µ(k) = col µ1 (k), µ2 (k) belongs to the standard simplex.

Consequently, the control law subject to the input saturation is designed by combin-
ing (16) and (22) as follows:

u(k ) = sat(ν(k )) + ν̄ + ū∗ . (23)

3. Feedback Control Design

To begin with, let us establish the feedback control input and the auxiliary control
input, respectively, as follows:

ν(k) = Fe(k) (24)

s(k ) = Ne(k) (25)

where F ∈ R1×2 and N ∈ R1×2 are the variables to be designed later. In addition, let us
consider the following Lyapunov function:

V (k ) = e T (k) Pe(k ) (26)

where 0 < P ∈ R2×2 . Then, it holds that

c1 ||e(k )||2 ≤ V (k ) ≤ c2 ||e(k)||2 (27)

where c1 = λmin ( P) and c2 = λmax ( P).

The following lemma provides the exponential stabilization conditions and the corre-
sponding invariant ellipsoid set for (19).

Lemma 3. Suppose that it holds that

∆V (k) + αV (k) < 0 (28)

−1
e(0) ∈ E ( P, γ ). (29)

Then, the saturated system (19) is robustly and exponentially stable, where the error
state satisfies that e(k) ∈ E ( P, γ−1 ).

Proof. From (28), it follows that

V (k) < (1 − α)k V (0) = e−µk V (0) (30)

where µ = − ln(1 − α). Furthermore, based on (27) and (30), it is obtained that
r
c2 −0.5µk
||e(k)|| < e ||e(0)||. (31)
c1
Mathematics 2022, 10, 4719 8 of 19

Thus, Condition (28) guarantees the exponential stability of (19). In what follows,
by (28), it is given that

k −1 k −1
V ( k ) − V (0) = ∑ ∆V (ι) < −α ∑ V (ι) < 0 (32)
ι =0 ι =0

which leads to V (k) − V (0) < 0. Thus, by (29) (i.e., e T (0) Pe(0) = V (0) ≤ γ−1 ), it holds that
x T (k) Px (k) = V (k ) < V (0) < γ−1 , which means x (k) ∈ E ( P, γ−1 ). Therefore, E ( P, γ−1 )
becomes the invariant ellipsoid set, as well as the domain of attraction.

The following theorem provides the robust stabilization conditions for (19), formulated
in terms of linear matrix inequalities (LMIs).

Theorem 1. For a prescribed ξ ∈ (0, 1) and a given initial error state e(0), suppose that
there exist P̄ > 0, F̄, N̄, e, and γ such that the following conditions hold:

−ξ P̄
 
(∗) (∗) (∗)
 A P̄ + B( Gi F̄ + Gic N̄ ) − P̄ + 2eEE T 0 0 
0> , i = 1, 2 (33)
 H1 P̄ 0 −e 0 
H2 ( Gi F̄ + Gic N̄ ) 0 0 −e
2
 
s̄ P̄ (∗) 1
0≤ , s̄ = − ū∗ + δ̄u (34)
N̄ γ 4
 
γ (∗)
0≤ . (35)
γe(0) P̄

Then, the saturated system (19) is robustly and exponentially stable, and the feedback
control gain and the auxiliary control gain are obtained as F = F̄ P̄−1 and N = N̄ P̄−1 ,
respectively.

Proof. By the Schur complement, Condition (34) is converted into 0 ≤ P̄(s̄2 P − γ−1 N T N ) P̄,
which ensures s̄−2 N T N ≤ γP, i.e.,

E ( P, γ−1 ) ⊂ L( N, s̄). (36)

In addition, Condition (34) is converted into γ2 e T (0) Pe(0) ≤ γ, which is equivalent

to (29) because γ > 0. Thus, based on Lemma 3, Conditions (28), (34), and (35) lead to

e(k) ∈ E ( P, γ−1 ) ⊂ L( N, s̄). (37)

Accordingly, by Lemma 2, it is given that

2  
sat(ν(k), s̄) = ∑ µi ( k ) Gi F + Gic N e(k) (38)
i =1

by substituting (38) into (19), it is obtained as follows:

!
2  
e ( k + 1) = A∆ + ∑ µi (k) B∆ Gi F + Gic N e(k ) = A(µ(k))e(k) (39)
i =1

where
2  
A(µ(k)) = ∑ µi (k)Ai , Ai = A∆ + B∆ Gi F + Gic N .
i =1
Mathematics 2022, 10, 4719 9 of 19

Now, the remaining task is to obtain an LMI-based condition from (28). For this task,
based on (39), let us first represent (28) as follows:

0 > ∆V (k) + αV (k ) = V (k + 1) − (1 − α)V (k)

 
= e T (k) P P̄AT (µ(k)) PA(µ(k)) P̄ − (1 − α) P̄ Pe(k)

where ∆V (k) = V (k + 1) − V (k) and P̄ = P−1 . Then, we can see that (28) is ensured by

0 > P̄AT (µ(k )) PA(µ(k)) P̄ − (1 − α) P̄ (40)

for which the Schur complement becomes

  2  
−(1 − α) P̄ (∗) −(1 − α) P̄ (∗)
0>
A(µ(k)) P̄ − P̄
= ∑ µi ( k ) Ai P̄ − P̄
. (41)
i =1

Furthermore, due to the standard simplex of µ(k), Condition (41) can be converted into
" #
−(1− α) P̄ (∗)
0>  (42)
A∆ P̄ + B∆ Gi F̄ + Gic N̄ − P̄

where F̄ = F P̄ ∈ R1×2 and N̄ = F P̄ ∈ R1×2 . Next, using A∆ = A + E∆1 H1 and B∆ =

B + E∆2 H2 , Condition (41) is rearranged as follows:
 
−ξ P̄ (∗)
0>
A P̄ + B( Gi F̄ + Gic N̄ ) − P̄
∆1 0
   
0 0 H1 P̄ 0
+ He (43)
E E 0 ∆2 H2 ( Gi F̄ + Gic N̄ ) 0

where ξ = (1 − α) ∈ (0, 1). Since ∆ = diag(∆1 , ∆2 ) satisfies that ∆∆ T = diag(∆21 , ∆22 ) ≤ I,

by Lemma 1, Condition (43) holds if

ET
    
−ξ P̄ (∗) 0 0 0
0> +e
A P̄ + B( Gi F̄ + Gic N̄ ) − P̄ E E 0 ET
 T  
−1 H1 P̄ 0 H1 P̄ 0
+e . (44)
H2 ( Gi F̄ + Gic N̄ ) 0 H2 ( Gi F̄ + Gic N̄ ) 0

Finally, by the Schur complement, Condition (44) is converted into (33).

Remark 2. The smaller the value of ξ, the larger the value of α is, which accelerates the convergence
speed of the error state to zero.

For a more detailed explanation, Figure 3 presents the block diagram of the proposed
control scheme, where only the source voltage v1 and the output voltage v2 are required to
be measurable.
In addition, the procedure of designing the phase shift ratio d(k) is summarized
as follows:

Step 1. Calculate ū∗ , δ̄u , and s̄ from (13) and (20), respectively, by considering the lower
and upper bounds of C2 and R.
Step 2. For a given initial value e(0), obtain F̄, N̄, and P̄ by solving (33)–(35) in Theorem 1.
After that, generate the control input u(k ) = sat( F̄ P̄−1 e(k)) + ν̄ + ū∗ according
to (23).
Step 3. Based on (7), obtain the phase shift ratio d(k) from u(k), and apply d(k) to the
single-phase-shift pulse modulator.
Mathematics 2022, 10, 4719 10 of 19

Figure 3. Block diagram of the robust control for the DAB DC–DC converter with steady-state error
and input saturation.

4. Simulation Results
For accurate verification, the performance of the controller designed for DAB DC–DC
converters was analyzed using the PSIM software tool [35]. Furthermore, to demonstrate
the effectiveness of the proposed method, our results were compared with the IMPSC
method [17] and the LCFF control method [14]. For a specific simulation, the system
parameters were set as shown in Table 1.

Table 1. System parameters.

Parameter Symbol Value

Input voltage v1 100 V
Phase-shifting inductance L 50 × 10−6 H
Switching frequency fs 20 kHz
Transformer turns ratio n 1
Input/output capacitor C1 /C2 440 × 10−6 F/440 × 10−6 F
Min/Max output capacitor C2min /C2max 420 × 10−6 F/480 × 10−6 F
Nominal load resistance R 50 Ω
Min/Max load resistance Rmin /Rmax 10 Ω / 100 Ω

Based on such a setting, for ξ = 0.999, Theorem 1 provides

F = [−0.2389 0.0614], N = [−0.1539 0.0603].

For comparison, the control gains of the IMPSC and LCFF control methods are de-
signed based on the phase margin at 85 degree and the cutoff frequency at 4500 Hz such
that its own optimized performance can be achieved.
Mathematics 2022, 10, 4719 11 of 19

Remark 3. It is worth noticing that the IMPSC and LCFF methods require an additional current
sensor, but the proposed method can be implemented only with input and output voltage sensors.
That is, the number of measuring sensors can be reduced through the proposed control method.

In the first simulation, the reference tracking control was performed for nominal
systems with R = Rmin = Rmax and C2 = C2min = C2max , where v̄ref 2 = 40 V. Figure 4 shows
the simulation results of the DAB DC–DC converter during the start-up process. As shown
in Figure 4a, the charging time of the capacitor output was 12.5 ms for both the IMPSC
and LCFF control methods. On the other hand, the proposed control method took only
8 ms to reach the capacitor output to the steady-state value, which illustrates that the
proposed control method requires a shorter charging time and has an improved overshoot
response compared to other methods. In addition, Figure 4b–d show the inductor current
of the IMPSC, the LCFF control, and the proposed control method, respectively, during the
start-up process.
Figure 5 shows the simulation results of the DAB DC–DC converter for the case where
ref
v̄2 steps up from 40 V to 45 V at t = 0.2 s. Specifically, from Figure 5b–d, it can be found
that the IMPSC and the LCFF control methods required 11.5 ms and 12.5 ms, respectively, to
approach the output voltage to its the steady-state value, and the proposed control method
required only 6.2 ms relatively. Furthermore, the proposed control method provided a
smooth transient response without overshoot, but the IMPSC and LCFF control methods
generated an overshoot response with a maximum value of 2.2 V. Conversely, Figure 6
shows the simulation results for the case where v̄ref 2 steps down from 45 V to 40 V at
t = 0.3 s. As shown in Figure 6b–d, for the IMPSC, the LCFF control, and the proposed
control methods, the settling times are given as 9.3 ms, 14.2 ms, and 7 ms, respectively. That
is, from Figure 6, it can be seen that the proposed control method provides a better time
response than the other methods.

Figure 4. Simulation results of the IMPSC, the LCFF control, and proposed control schemes during
the startup process.
Mathematics 2022, 10, 4719 12 of 19

Figure 5. Simulation results of the output voltage when the reference steps up from 40 V to 45 V at
t = 0.2 s.

Figure 6. Simulation results of the output voltage when the reference steps down from 45 V to 40 V
at t = 0.3 s.

In the second simulation, the load resistance was set to be changed to show the
robustness of the proposed control method. Figure 7 shows the simulation results for the
Mathematics 2022, 10, 4719 13 of 19

case where R steps up from 50 Ω to 100 Ω at t = 0.2 s. As shown in Figure 7a, the change in
the load resistance decreased the load current by 0.4 A at t = 0.2 s and caused a maximum
overshoot of 1.25 V on the output voltage. To be specific, for the IMPSC, the LCFF control,
and the proposed control methods, the settling times are given as 22 ms, 14 ms, and 10 ms,
respectively, which reveals that our method achieved a shorter settling time than the other
methods. Conversely, Figure 8 shows the simulation results for the case where R steps down
from 100 Ω to 50 Ω at t = 0.3 s. As shown in Figure 8, the change in the load resistance
increased the load current by 0.4 A at t = 0.3 s and caused a maximum overshoot of 0.2 V
on the output voltage. To be specific, for the IMPSC, the LCFF control, and the proposed
control methods, the settling times are given as 81 ms, 42 ms, and 42 ms, respectively,
which illustrates that the proposed method exhibited a smoother transient response and
smaller oscillation than the other methods. Thus, from Figures 7 and 8, it can be seen that
the proposed control method provided better performance than the other methods.
In the third simulation, the source voltage was set to be changed to show the robust-
ness of the proposed control method. Figure 9 shows the simulation results for the case
where v1 steps down from 100 V to 85 V at t = 0.2 s, where vref 2 = 40 V. As shown in
Figure 9b–d, the IMPSC method caused a maximum overshoot of 4.26 V, the LCFF control
method caused a maximum overshoot of 4.7 V, and the proposed control method caused a
maximum overshoot of 4.26 V. Overall, the transient response quickly disappeared as the
output voltage converged to the reference voltage. Specifically, for the IMPSC, the LCFF
control, and the proposed control methods, the settling times are given as 15.6 ms, 16 ms,
and 9 ms, respectively, which reveals that our method required a shorter settling time than
the other methods. That is, from Figure 9, it can be seen that the proposed control method
is the most excellent for improving the performance among the three control methods.

Figure 7. Simulation results of the output voltage when load steps up from 50 Ω to 100 Ω.
Mathematics 2022, 10, 4719 14 of 19

Figure 8. Simulation results of the output voltage when load steps down from 100 Ω to 50 Ω.

Figure 9. Simulation results of the output voltage when the input voltage steps down from 100 V to
85 V.
Mathematics 2022, 10, 4719 15 of 19

Conversely, Figure 10 show the simulation results for the case where v1 steps up from
85 V to 100 V at t = 0.3 s. As shown in Figure10b–d, the IMPSC and the LCFF control
methods required 12.5 ms and 21.5 ms, respectively, to approach the output voltage to its
steady-state value, and the proposed control method required 10 ms relatively. Thus, from
Figure 10, it can be seen that our method had a shorter settling time than other methods.
Finally, the fourth simulation is given to verify the effect of the proposed control method
on the input saturation of DAB DC–DC converters. Figure 11 shows the transient response
of the output voltage for the control system with/without input saturation. As shown in
Figure 11b, the input saturation occurred during the time from t = 3.9 ms to t = 5.8 ms
when the control signal ν(k ) became less than −s̄ = −0.241. In addition, Figure 11a shows
that the controller designed without input saturation considerations required a settling
time of 13.5 ms, but our control method, which can cope with the saturation phenomenon,
required a settling time of 8 ms. Thus, it can be seen that the proposed control method has
more advantages when the input saturation occurs.
To verify whether the proposed method can work well in the case of the no-load condition,
Figure 12 shows the simulation results of the output voltage when the no-load condition
was applied from t = 0.15 s to t = 0.25 s. It can be seen from Figure 12 that the output
voltage of the DAB DC–DC converter was not affected by the no-load condition when
the no-load situation occurred from t = 0.15 s to t = 0.25 s. In addition, the result shows
that the proposed method worked well when the reference changes from 40 V to 45 V at
t = 0.2 s under the no-load condition.

Figure 10. Simulation results of the output voltage when the input voltage steps up from 85 V to
100 V.
Mathematics 2022, 10, 4719 16 of 19

Figure 11. Simulation results of the output voltage when applying with/without input saturation.

Figure 12. Simulation results of output voltage when the no-load condition is applied.

To validate the efficacy of the proposed method in the steady state, Figure 13 shows
the simulation for the error between the reference and the output voltage.
As shown in Figure 13, the steady-state error is given 0.3 V, 0.38 V, and 0.01 V for the
IMPSC, LCFF control, and the proposed methods, respectively, which indicates that the
proposed method exhibited the best performance compared to other methods under the
steady-state condition.
Mathematics 2022, 10, 4719 17 of 19

Figure 13. Simulation results for the error between the reference and the output voltage in the
steady-state condition.

5. Concluding Remarks
This work focused on developing a robust tracking control design for DAB DC–DC
converters with parameter uncertainties and input saturation. From the obtained results,
the following two advantages of the proposed method were verified:
(1) The fast transient response of DAB DC–DC systems was achieved by solving an
exponential stabilization problem;
(2) The output voltage performance for the change of voltage source and load resistance
was further improved through the proposed method over the IMPSC and LCFF
control methods.
In the future, the proposed method will be further generalized so that it can be
combined with the sampled data control scheme.

Author Contributions: Conceptualization, N.N.N.; methodology, S.H.K. and N.N.N.; software,

N.N.N.; validation, S.H.K. and N.N.N.; formal analysis, S.H.K. and N.N.N.; investigation, S.H.K. and
N.N.N.; resources, S.H.K.; data curation, S.H.K. and N.N.N.; writing—original draft preparation,
S.H.K. and N.N.N.; writing—review and editing, S.H.K. and N.N.N.; visualization, S.H.K. and
N.N.N.; supervision, S.H.K.; project administration, S.H.K.; funding acquisition, S.H.K. All authors
have read and agreed to the published version of the manuscript.
Funding: This work was supported by the National Research Foundation of Korea Grant funded by
the Korean Government (NRF-2018R1D1A1B07041456).
Conflicts of Interest: The authors declare no conflict of interest.

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