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 INPUT OUTPUT
MOTOR
(Electric power) (Rotation)

Measurement Plotter
External Output signal Audio/visual
and Communication
environment CPU conditioning Indication Outputs
actuation module
module
module Display
Actuators Signal conditioning Processor ADC/DAC
Sensors nterfacing Software Amplifier
Bus communication Control algorithm

Feedback
module
Feedback
signal
 Input Measurement Output
true value system measured value
 Gear Hair spring

Pointer
Link

Sector
and
Bourdon pinion
tube
Stationary
socket

Pressure
connection
 Display
Input Outputs
quantity measured
being Signal
Sensor Record value
measured conditioner
of
(True value) variable
Transmit
 Characteristics of measurement system

Static Dynamic
characteristics characteristics

Accuracy Speed of response

Resolution Fidelity
Precision Lag
Repeatability
Sensitivity
Linearity
 Full scale reading 500
No. of divisions 100
1
  1 scale division
10
1 1
5 V
10 2


 Hysteresis
error
Percentage
output

0 nput ( range)
 Y
100 Theoretical
specified
maximum

Maximum deviation
Output ( F.S.) 50 Terminal based
straight line

0 X
0 50 100
nput ( range)

Terminal linearity

Y
100
ndependent
Straight line
Deviation

Output ( F.S.) 50

0 X
0 50 100
nput ( range)

Independent linearity

Y
100

Best fit line

Output ( F.S.) 50

0 X
0 50 100
nput ( range)

Least square linearity

Maximum deviation of output from idealized straight line
 100
Actual reading
 Output voltage
Input temperature

Output voltage

200

3.5

Input temperature
3.5

0.01
Output

100 %
Steady
state value
90 %

Response time

Settling time

0 Time

Rise time
(0 - 90 %)
 Sensing element
Input Output
(Sensor)
 Sensor
Transducer
o/p

Input Signal Output

physical Transducer signal
conditioner
 Vi
– +

Slider motion
L

A B
Resistance
wire
x

– Vo
+

x Vo

L Vi

Vs

Output
voltage
Vo

Rmin
Rmax Wiper position
 Rotating shaft
controls position
of wiper arm
a
c b

OHMs Wiper
5 k

2.5 k  = (360º – ) 7.5 k

0 k A  10 k
B

 

 

50 mm

A B

Slider position is at center

A R1 = 3850  R2 = 6150  B

Slider position





 
 max


Vout V
 max

82
Vout  10
350
Vout

 tot
 tot

Linearity   tot .  350º
01

100 100

 

Output Maximum  Min. value given


Input Full range

12  0
320
 12
850

  


Power P
Current I
P

V /R


 PR 50  10 3  8  10 3
xi 2

xT 5

Output Max. – Min. value given

 100
Input Full range

10
750
 S1 S2

Vi

Hollow
former

Primary
S1 S2
winding

Movable
plunger

Motion

Primary
S1 S2
winding Ferrite core

V1 V2

S1 S2
 Movable
core

S1
V1

Vin Vo Differential o/p

S2

V2

Motion

V1 S1
V2 S2
Vo V1  V2

V1 V2
S1 S2

Vi Vo


 Vi

Vo
0 Core at null

Vo

Core below null

0

Vo

Core above null

0

|Vo|

Linear
range
x

Residual voltage

–  = 180º  = 0º +

Core displacement
 
Vo
Core displacement from centre

Vo

x

Vo m x

 


 
 Body
Body 

Bore  S P S
1 2

Core

S P S
1 2

(a)

A.C. Output

Core position

(b)

Excitation

S S
1 2

Output
(c)

Linear range
 

Position of core
Secondary voltage 
Range of core displacement
x1
Vs 
x
( 20)
10
50

Secondary voltage (V s )
Range of core displacement (x)

10
50


  0.003
1.5




Vo

Vo
x
5
1


Vo 5 x
2 x  2  1 

Vo

Vo 5   0.75
Vo
Vo

5x
3
  0.6
5


 

Output current 3  10 3
Displacement 0.75



 
10
100
1

10
1
 
0.8

bt 3
12
0.025  ( 0.005) 3
2.6  10 –9 m 4
12
 FL 3 30  ( 0.3) 3
 
3EI 3  200  10 9  2.6  10 –9

5.9  10 –4 m

x 5.19  10 –4

F 30
0.0173  0.6 0.0104 V N
20
100
2
 0.2
10
0.04
0.0104
20
0.0104

Sec-1 Primary Sec-2

Core

Input
shaft

x x Angular motion
 


r 0 A
d

r
0 8.854  10 12

m2
 Max

Capacitance
('C') Non - linear
d

Min Max
0 Distance ('d')

Plate moves
and changes 'd'

A
d Overlap area C
Linear

area
Plate moves
and changes 'A'

Dielectric
moves
  cm 2

r

 



 
d

d


 A
d1

8.85  10 12  500  10 6

0.4  10 3


Change in capacitance C (C 1  C)
Change in distance d ( d   d)

(C 1  C)
(d1)

0.5  10 3 m
A

d

(8.85  10 12  500  10 6 )

(0.5  10 3 )

(11.0625  8.85) p F

0.1 mm

25 mm  25 mm

 0  r  A
d

10  6
 10 3

10 9
0
36 

r

10 9 ( 625  10  6 ) 6 . 25  10 13

36  (1  10 3 ) 113 . 09  10 3

10  12

10  3
5 . 52

1. 4

End loops

Grid
Active
grid length
Alignment
marks

End loops

Backing and Solder tabs

encapsulation
 A
R1
R3

+
D VG B
–

R2 Rx

C
 Strain gauge

Mechanical Optical Electrical

strain gauge strain gauge gauges

Semiconductor
Wire gauges
gauges

Bonded Unbonded Foil

gauges gauges gauges

(
 L

A

R  L A
 
R  L A

A D
2
A D
R  L 2D
  
R  L D

R R
L L

R R R R

L L Axial strain
L

L
D

D
  D D

L L

 

L L

 
1  2  a
Resistance change due Resistance change due Resistance change due to change in
to change in length to change in area resistivity or piezoresistance effect

 





L

R/ R
L/ L

 R / 120
0.005 / 0.25

0.005
 L 4  120
0.25

R 

R1 R


   


 
  
 




 R 
 
 R  t
( s   g ) G   t





 High-frequency magnetic field

T
a
Amplitude
r Output
L C detecting
g circuit
circuit
e
t 1 2 3

Oscillation circuit
 VH

Magnet

Lines of
N
force

Directional
magnetic
field (H)

Constant + + + + + +
current flow
+
VH Hall
voltage
–
– – – – – –

P-type
semiconductor
hall element + – i

DC supply
   

Copper
Voltmeter
– +

(COLD) (HOT)
T1 Junction 1 Junction 2 T2

Constantan
 Meter
or
Sensing recorder
junction

Reference
junction

2700 


 80

70

an
nt
n
nta

sta
60 n sta

on
co

c
n
Iro

el-
Thermal ntan
m
50
nsta
e.m.f. ro co
Ch
per
(mV)
40 Cop

m
30 /R hodiu
tinum
ti nu m-Pla
Pla
20

10

0 Temp. ºF
2 4 6 8 12 14 16 18 22 24 26 28
1000 2000 3000

 
 R1 R2

+
–

RTD R3 V
 1 1 
RT R 0e   – 
 T T0 
Resistance

Resistance

TR
Temperature Temperature
R0 T0
T0




 Active side
Passive side
Strip
bends
when
temperature
changes (b) Curved bimetallic strip

(a) Flat bimetallic strip

Fixed end

Fixed
end
Pointer

Free end
Free end

Scale
(d) Helical bimetallic strip
(c) Flat spiral bimetallic strip
 Fixed end
Free end Low expansion
To coefficient
k1

k2 High expansion
k2 < k1 coefficient

T < To

t{3(1  m) 2  (1  mn)[m 2  1/ mn]} /6( h -  l)(T2 – T1 )(1+ m) 2

 l
 h
 T

v R R
Resistance

Resistance
Voltage

T T T
Temperature Temperature Temperature

 
Quantity
measured Transducer Signal Value
processor Recorder
or sensor
 R R
L L

 r 0
 r 0

 Active side
Passive side
Strip
bends
when
temperature
changes (b) Curved bimetallic strip

(a) Flat bimetallic strip

Fixed end

Fixed
end
Pointer

Free end
Free end

Scale
(d) Helical bimetallic strip
(c) Flat spiral bimetallic strip
 

 10 12
30 cm  20 cm 0.06 m 2

1.2  10 –3 m

0 8.854  10 12

r
 0 r A
d

8.854  10 12  1.006  0.06

1.2  10 –3

4.453  10 14

Change in capacitance
Change in distance

c 4.453  10 14
d 1.2  10 –3

3.7108 10 9
 INTA RST 6.5 TRAP
INTR RST 5.5 RST 7.5 SID SOD

Interrupt control Serial I/O

control

8-Bit internal data bus

(8) (8) (8) (8) (8) (8)

Accumulator Temp. reg. Flag flip-flops Instruction B reg. C reg.
register (8) (8)
D reg. E reg.
(8) (8)
Instruction Instruction H reg. L reg.
decoder decoder (16) Register
and and Stack pointer array
machine machine
(16)
cycle cycle
Program counter
encoding encoding
(16)
Incrementer/
Decrementer
address latch
Power +5V
supply GND
Timing and control
X1
X2 Clk
Gen Control Status DMA Reset (8) (8)
Address buffer Address buffer
Clk out RD WR ALE S0 S1 IO/M HLDA Reset out
Ready Hold Reset in
A15 - A8 AD7 - AD0
Address bus Address/Data bus
 A15
Address bus
A0

Memory Input
8085 Output Real
world
MPU
D7
D0 Data bus

Control bus
 Accumulator A (8) Flag Register

B (8) C (8)

D (8) E (8)

H (8) L (8)

Stack pointer (SP) (16)

Program counter (PC) (16)

Data bus Address bus

16
8 Lines
Lines

Bidirectional Unidirectional

D7 D6 D5 D4 D3 D2 D1 D0
 +5 V GND

1 2 40 20
Serial SID 5 X1 X2 Vcc Vss X1 1 40 VCC
I/O SOD 4
ports X2 2 39 HOLD
28
A15 RESET OUT 3 38 HLDA
High-order
A8 address bus SOD 4 37 CLK(OUT)
TRAP 6
21
SID 5 36
Externally initiated signals

RST 7.5 7 RESET IN

19
RST 6.5 8 6 35
AD0 TRAP READY
RST 5.5 9 Multiplexed
INTR 10 address / data RST 7.5 7 34 IO / M
AD7 bus
RST 6.5 8 33 S1
READY 35 12
RST 5.5 9 32 RD
HOLD 39
INTR 10 31 WR
RESET IN 36
8085A
8085A INTA 11 30 ALE
acknowledgment

AD0 S0
External signal

INTA 11 12 29
HLDA 36 30 AD1 13 28 A15
ALE
29 S0 AD2 14 27 A14
33 S1 Control AD3 15 26 A13
34 and
IO / M status AD4 16 25 A12
32
RD signals
31 AD5 17 24 A11
WR
AD6 18 23 A10
AD7 19 22 A9

3 37 Vss 20 21 A8

RESET OUT CLK OUT

(a) Functional pin diagram (b) Pin configuration

TRAP
RST 7.5
RST 6.5 (Inputs)
RST 5.5
INTR
INTA (Active low output)
 Input A Q
Output

Enable E

A Q
Y
B
E
 Rising edge Falling edge or negative edge
or
positive edge

1T - state
 SIGNAL T1 T2 T3 T4

CLOCK

A15 - A8 Higher order memory address Unspecified

Lower-order
AD7 - AD0 Decode (D7 - D0)
memory addr.

ALE

IO/M,S1,S0 IO/M = 0, S1 = 1 S0 = 0

RD
 SIGNAL T1 T2 T3

CLOCK

A15 - A8 Higher order memory address

Lower-order
AD7 - AD0 Data (D7 - D0)
memory addr.

ALE

IO/M,S1,S0 IO/M = 0, S1 = 1 S0 = 0

RD

SIGNAL T1 T2 T3

CLOCK

A15 - A8 Higher order address

Lower-order (D7 - D0)

AD7 - AD0 address Data

ALE

IO/M,S1,S0 IO/M = 0, S1 = 0 S0 = 1

WR
 SIGNAL T1 T2 T3

CLOCK

A15-A8 I/O Port address

I/O Port
AD7-AD0 Data (D7 - D0)
address

ALE

IO/M,S1,S0 IO/M = 1, S1 = 1 S0 = 0

RD
 Opcode fetch Memory read Memory read Memory write

T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13

CLK

AD0 - AD7 FFH 32H 00H 6AH 01H 52H 6AH C7H

A8 - A15 41H 42H 42H 52H

ALE

RD

WR

IO/M,S0,S1 0,1,1 0,0,1 0,0,1 0,1,0

Address Mnemonics Opcode

4105 INR M 34H

Opcode fetch Memory read Memory write

T1 T2 T3 T4 T5 T6 T7 T8 T9 T10
CLK

AD0 - AD7 05H 34H 50H 12H 50H 13H

A8 - A15 41H 42H 42H

ALE

RD

WR

IO/M,S0,S1 0,1,1 0,0,1 0,1,0

 M1 (Opcode fetch) M2 (Memory Read)
T1 T2 T3 T4 T1 T2 T3

CLK

High-order High-order
A15 - A8 20H Unspecified 20H
memory address memory address

Low-order Low-order

AD7 - AD0 00H 06H Opcode 01H 43H Data

Memory address Memory address

ALE

IO/M,S1,S0 Opcode
Status IO/M = 0,S1 = 1, S0=1
fetch IO/M = 0,S1= 1. S0 = 0 Status

RD

Address Mnemonics Opcode

2000 MV IB, 43H 06H

2001 43H
 Signal T1 T2 T3 T4

Clock

A15 - A8 Higher order memory address Unspecified

AD7 - AD0 Lower order

Opcode for MOV A,B 
memory addr

ALE

IO/M , S1, S0 IO/M = 0, S1 = 1, S0 = 1

RD



 T1 T2 T3 T4

IO / M
IO / M = 0, S1= 1 = S0
S1, S0

A15
PCH = 10H Unspecified
A18

AD7
PCL = 00H 41 H
AD0

ALE
RD


 
 Arithmetic and logic unit
(ALU)

Accumulator
Working registers

Program counter Stack pointer (SP)

(PC)

Interrupt
Clock circuit
circuits
 Timer/counter Stack pointer (SP)
ALU

Accumulator(A)

Interrupt Registers
circuits

Internal
ROM Internal
RAM

Clock circuit
I/O ports

Program counter
External Counter
interrupt input

Interrupts 4K 128 Timer 1

control Flash RAM Timer 0

CPU

Bus 4 I/O port Bus

Osc.
control control

P0 P2 P1 P3
Address/data
 C2
XTAL2
30 pF
Crystal
C1
XTAL1
30 pF

GND

P1.0 1 40 Vcc
P1.1 2 39 P0.0 (AD0)

P1.2 3 38 P0.1 (AD1)

P1.3 4 37 P0.2 (AD2)

P1.4 5 36 P0.3 (AD3)

P1.5 6 35 P0.4 (AD4)

P1.6 7 34 P0.5 (AD5)

P1.7 8 33 P0.6 (AD6)

RST 9 32 P0.7 (AD7)

(RXD) P3.0 10 31 EA/VPP
8051
(TXD) P3.1 11 30 ALE/PROG
(INT0) P3.2 12 29 PSEN
(INT1) P3.3 13 28 P2.7 (A15)
(T0) P3.4 14 27 P2.6 (A14)
(T1) P3.5 15 26 P2.5 (A13)

(WR) P3.6 16 25 P2.4 (A12)

(RD) P3.7 17 24 P2.3 (A11)

XTAL2 18 23 P2.2 (A10)

XTAL1 19 22 P2.1 (A9)

GND 20 21 P2.0 (A8)

EA

PSEN
p
 GROUP GROUP A I/O
A PORT A PA7-PA0
POWER +5 V CONTROL (8)
SUPPLIES GND

GROUP A I/O
PORT C PC7-PC4
Upper
BI-DIRECTIONAL (4)
DATA BUS
D7-D0
DATA
BUS
BUFFER 8-BIT
INTERNAL GROUP B
DATA BUS I/O
PORT C PC3-PC0
Lower
(4)

RD
WR READ/ GROUP B I/O
GROUP
A1 WRITE PORT B PB7-PB0
B
CONTROL (8)
A0 CONTROL
LOGIC
RESET

CS
PA3 1 40 PA4
PA2 2 39 PA5
PA1 3 38 PA6
PA0 4 37 PA7
RD 5 36 WR
CS 6 35 RESET
GND 7 34 D0
A1 8 33 D1
A0 9 32 D2
PC7 10 31 D3
8255A
PC6 11 30 D4
PC5 12 29 D5
PC4 13 28 D6
PC0 14 27 D7
PC1 15 26 VCC(+5 V)
PC2 16 25 PB7
PC3 17 24 PB6
PB0 18 23 PB5
PB1 19 22 PB4
PB2 20 21 PB3
RD WR CS A1 A0

RD WR CS A1 A0

RD WR CS A1 A0
 PA PA6 - PA7 PA PA
8 8
2 PCU PC4 - PC7 2 PCU PC
5 PCL PC0 - PC3 5 PCL
5 5
PB PB0 - PB7 PB PB0 - PB7

All output Port A and port C acting as

O/P. Port B acting as I/P

D3 D2 D1

D0

D1

D2

D3

D4

D5

D6

D7
+5V +5V
Logic 1

Vo
Logic 0 Logic 0

Key released Key pressed Key released

 +5V 0,1
1,0

To I/P circuit
1,0 0,1

+5V

10 K 10 K 10 K 10 K

10 K
RESET PA3

10 K
IOWR PA2

10 K
IORD PA1

10 K
PA0
D7 - D 0 8255

A2 A1 PB3

A1 A0 PB2

PB1
A15
A12
A13 CS PB0
A14
A0
 Start

Initialise 8255 row, column

counter & key code reg

No Key
closed ?

Yes

Wait for Debounce

Set row counter

Is row
Ground one row counter = 0 ?

Read column counter

Decrement row counter

Set column counter Yes

No Is column
Check for key pressed counter = 0 ?

Is the No Increment code register

key
Decrement column counter
found ?

Yes

Transfer code to
accumulator

Stop
 f b
a
e c
g
dp
d

(a) Seven-segment LED display module

a b c d e f g dp a b c d e f g dp

Common cathode Common anode

(b) Common cathode type seven-segment LED (c) Common anode type seven-segment LED

a a a
f b b b b
c g g
e c e c
d d d
a a a
f b f f b
g g g c
c c e c
d d
a a a
f b f b f b f
g g g g
e c c e c e c
d d d
a a a
f b f f
e g g g
e c e e
d d d
 37 

2.2 K
PA0
PA1
D0 D1 D2 D3 D4 D5 D6 D7
PA2
PA3
2N2907
PA4
PA5
+5V
PA6
PA7 2N22222

8255A

PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7

Fig. 3.6.3 Interface of 7 segment display through 8255 A

 VCC

A1 A0 PA7
A15 A2 A1

A8

A0 CS
PA0

PB7
A7

A3
D7 - D 0 PB0

IORD RD

IOWR WR
PC3 10 K
Reset Reset
PC2
PC1 +5 V
PC0

GND
 MSB
b4
b3
Analog i/p Digital
signal ADC o/p
b2

b1
LSB
 3 1 28 2
Analog
4 2 27 1 inputs
Analog
inputs 5 3 26 0
6 4 25 A
7 5 24 B Address
SOC 6 23 C
EOC 7 ADC 22 ALE
0808/
DB3 8 0809 21 DB7

9 20 DB6
OUTPUT CONTROL
10 19 DB5
CLK
11 18 DB4
VCC
REF + 12 17 DB0

GND 13 16 REF
DB1 14 15 DB2
 SOC CLOCK

I/P0 EOC

I/P1 Control and

timing unit and
I/P2 S.A.R.
I/P3 8 Channel
analog
I/P4 multiplexer
I/P5
I/P6 O/P 8-bit
Latch O/P
I/P7 256 R
Register
ladder and
switch tree

C B A
Address lines O/P
Vref + Vref – Enable


CLOCK

START

ALE

EOC

OE

O/P
 Vref+
Vref+

CS +5 V
+5 V VCC Clock up

D0 - D 7 PA7 - PA0 O7 - O0
Analog
EOC I/P2
PC7 ADC i/p voltage
A2 0808
PC0
A1 SOC
OE GND
8255
Reset ALE
+5 V A B C

PB0
IORD
PB1
PB2
IOWR
 Vref–
Vref+

CS +5 V
+5 V VCC Clock up

D0 - D 7 PA7 - PA0 O7 - O0
Analog
EOC I/P2
PC7 ADC i/p voltage
A2 0808
PC0
A1 SOC
OE GND
8255
Reset ALE
+5 V A B C

PB0
IORD
PB1
PB2
IOWR
 D7 D6 D5 D4 D3 D2 D1 D0

Vi
2n 24

Input
Resolution in V LSB

Vi 7. 5
2n 1 16  1
4 . 25
 
0 .5


1 1

f 1  10 6

 Tc T(n  1) 

VT
Vin
Vin

V in
Resolution
V in
6 . 000

40  10 3
V in
6.035
 
40  10 3
(TC) max 

(10111011) 2

(1  128)  ( 0  64)  (1  32)  (1  16)  (1  8)  ( 0  4)  (1  2)  (1  1)

 
 7. 28

 7. 28
 b 1 , b 2 , b 3 .... b n  .

Vo K V V ref b 1 2  1  b 2 2  2  ........  b n 2  n 
V ref
KV
bn
Vo
V FS
MSB
V FS K V V ref b1
b2
V fs Digital
Analog output
Vo  input DAC
2
bn
V fs LSB
Vo 
2n

Reference
voltage
 Vref

R 2R 4R 8R

b0 b1 b2 b3
1 0 1 0 1 0 1 0

I0 I1 I2 I3
–
Iin
Vo
+

V ref
V
2n – 1
 R R R 2R
Vs

2R 2R 2R 2R

Bit 3 Bit 2 Bit 1 Bit 0 R

–
Vout


+
VR –

LSB MSB
Sw0 Sw1 Sw2

2R 2R 2R R

–
2R VC R VB R VA
+ +
Vo
–
b0 = 1 b1 = 0 b2 = 0
VLC 1 16 Compensation
Iout 2 15 Vref (–)

V– 3 14 Vref (+)
Iout 4 13 V+
0800
B1 5 12 B8 LSB
B2 6 11 B7
B3 7 10 B6
B4 8 9 B5
 2.5 K
CS 14 5V
D0 - D 7 PA7 - PA0 B 1 - B8
5K
4
–
IOR 15
8255 2.5 K 2
DAC0808
741
0.01 F
3 + Vo
IOWR 16 2

–12 V 3 13 +5 V or
0.1 F VCC
1 +12 V

AD0
D0
AD7 Vref
D7 8
D0 Rf
PA
D7
IOR RD D8
PCL
8255 D11 DAC
IOW WR
4 Iout –
Reset Reset
A0 A0 +
+ Vout
A1 A1
–
From CS
address
decoder


5 ms
8 s

5 ms

585
 1
 
5 MHz

8 . 547 s
0.2 s
 +5 V
Clock
Input VREF(+) VCC OE ALE
12 11 9 22
CLK D0 LED1
10 21
EOC
7 D1 LED2
20
SC
6
Analog D2 LED3
IN0 19
Input 25
IN1 D3 LED4 Programming logic :
27 18
IN2 Configure 8255 I/O ports
28 ADC D4 LED5
8 8085 sends SOC command to ADC
IN3 0808
1 8085 waits for EOC signal from ADC
D5 LED6
IN4 15
2 8085 reads 8-bit temperature value from port A
IN5 D6 LED7 8085 compares the value with set point value
3 14
IN6 8085 generates the control signal to control load
4 D7 LED8
17
IN7
5
Vref(–)
16
25 24 23 13
A B C GND

+12 V

38.6 K
33 K
+12 V 10 K +12 V

ADC 8085
10 K
converter Microprocessor
IC 0808 unit
Water –12 V
38.6 K
10 K 10 K
Heater

Differential amplifier
using (op-amp)
Sensor (AD590)
 PA3 1 40 PA4

PA2 2 39 PA5

PA1 3 38 PA6

IN3 1 28 IN2 PA0 4 37 PA7

IN4 2 27 IN1 RD 5 36 WR
IN5 3 26 IN0 CS 6 35 RESET

IN6 4 25 ADD A gnd 7 34 D0

IN7 5 24 ADD B A1 8 33 D1

START 6 23 ADD C A0 9 32 D2

EOC 7 ADC 22 ALE PC7 10 8255 31 D3

–5 0808 –1 (MSB) PPI
2 8 21 2 PC6 11 30 D4
–2
OUTPUT ENABLE 9 20 2 PC5 12 29 D5
–3
CLOCK 10 19 2 PC4 13 28 D6
VCC –4
11 18 2 PC0 14 27 D7
–8 (LSB)
VREF(+) 12 17 2 PC1 15 26 VCC

GND 13 16 VREF(–) PC2 16 25 PB7

–7 –6
2 14 15 2 PC3 17 24 PB6
PB0 18 23 PB5

PB1 19 22 PB4

PB2 20 21 PB3
 +5V +5V

VCC VCC
ALE

Enable
address A1
A8-A15
+ VCC latch A0
IC 74373

Bi- +12 V
directional Stepper motor
Reset IN D0-D7
buffer
SW C IC 74245
A
GND
+ VCC

E1 E2 A1 B
8085 O0 8255
C1 RD C A1 Current
O1 driver
X1 WR B
A1 circuit C
IO/M A O2
A1
3:8 O3
X2 Decoder
D
C2 IC 74138 O4
IOR
O5 RD
IOW
O6 WR
O7

Reset out Reset

A5 A6 A7

E1 E2 O0 CS
A14
GND A15 A4 C GND
O1
A3 B
A2 A O2
3:8 Fig.O43
Decoder
IC 74138 O4
O5

O6

O7
 PB2 PB3 PB4 PB5 PB6 PB7

PC1PC2PC3
PA,PA,PC,
G Y R
G Y R N

W E

S
PA2 PA1 PA0
PA5 PA4 PA3
R Y G
R Y G

PC6 PC5 PC4

PB5 PB6 PC7
 To 8085
Microprocessor 220 
D0 - D 7 D0 - D 1 PA7
.
. +5 V
PA0

220 
A0 A0 PB7
.
8255 . +5 V
A1 A1 PB0

220 
IOW WR PC7
.
. +5 V
PC0
CS CS
Inverted LED
buffer
 N

R 1
Y 1
G 1

W E

R Y G R Y G
3 3 3 4 4 4
R 2
Y 2

S G 2

PA 0 R1 PB0 R3

PA1 Y1 PB1 Y3

PA 2 G1 PB2 G3

PA 3 R2 PB3 R4

PA 4 Y2 PB4 Y4

PA 5 G2 PB5 G4
 +12 V

Free
wheeling
diode 230 V AC
50 Hz
5.1 K
AD0 PA0 BC547
D0
AD7 D7 PA1
PA2
PA3
A0 A0
PA4
A1 A1 PA5
8255 PB0 +12 V
IOR RD
PB1
Free
IOW WR PB2 wheeling
PB3 diode
RESET OUT RESET PB4
OF 8085 5.1 K
PB5 BC547
CS

A2 A
A3 B
A4 C
74LS138 Y0
A5 G1
A6 G2
A7 G
 20 ms 0°

1 ms 90°

1.5 ms 180°

2 ms Angular rotation
 C2 U1
39
P0.0/AD0
19 38
22 pF XTAL1 P0.1/AD1 5V
37
P0.2/AD2
X1 36
P0.3/AD3
35
C1 P0.4/AD4
18 34
P0.5/AD5
XTAL2 33
Crystal P0.6/AD6
22 pF 9 32
11.0592 MHz RST P0.7AD7
21
P2.0/A8
C3 22
P2.1/A9
P2.2/A10 23
29 PSEN 24 + 88.8
P2.3/A11
10 F 30 ALE 25
P2.4/A12 Servo motor
5V 31 26
R1 EA P2.5/A13
10 K 27
P2.6/A14
28
P2.7/A15
1 10
P1.0 P3.0/RXD
2 11
P1.1 P3.1/TXD
3
P1.2 12
4 P3.2/INT0
P1.3 13
5 P3.3/INT1
P1.4 14
6 P3.4/T0
P1.5 15
7 P1.6 P3.5/T1
8 P3.6/WR 16
P1.7
17
P3.7/RD

AT89S52

PIN 40-Vcc, PIN 2-GND

V CC




PA3 1 40 PA4
PA2 2 39 PA5
PA1 3 38 PA6
PA0 4 37 PA7
RD 5 36 WR
CS 6 35 RESET
GND 7 34 D0
A1 8 33 D1
A0 9 32 D2
PC7 10 31 D3
8255A
PC6 11 30 D4
PC5 12 29 D5
PC4 13 28 D6
PC0 14 27 D7
PC1 15 26 VCC(+5 V)
PC2 16 25 PB7
PC3 17 24 PB6
PB0 18 23 PB5
PB1 19 22 PB4
PB2 20 21 PB3
 CS A1 A0

CS

CS A7 A6 A2
D7 D6 D5 D4 D3 D2 D1 D0

0 X X X S/R

Don't care bits, Bit select 1 = Set

normally put to 0
0 = Reset

D3 D2 D1 Particular bit of
port C selected
0 0 0 Bit 0
0 0 1 Bit 1
0 1 0 Bit 2
0 1 1 Bit 3
1 0 0 Bit 4
1 0 1 Bit 5
1 1 0 Bit 6
1 1 1 Bit 7
 D7 D6 D5 D4 D3 D2 D1 D0

1 0 0 1 1 0 0 0 = 98H

I/O Mode 0 Port A Port CU Port B Port CL

mode for port A input input not used output

D7 D6 D5 D4 D3 D2 D1 D0

1 0 0 1 1 0 1 0 = 82H

I/O Mode 0 Port A Port CU Mode 0 Port B Port CL

mode for port A output output for port B input output
D7 D6 D5 D4 D3 D2 D1 D0

1 1 X X X 1/0 1/0 1/0

PC2-PC0
1 = Input
0 = Output

Port B
1 = Input
0 = Output

Group B mode
0 = Mode 0
1 = Mode 1
 PC3 INTRA

PA7-PA0

PC7 OBFA

INTE
PC6 ACKA
1

INTE PC4 STBA

2
PC5 IBFA
WR

RD PC2-PC0 I/O
 D7 D6 D5 D4 D3 D2 D1 D0

OBFA INTE1 IBFA INTE2 INTRA X X X

Group A Group B






 Programming
devices

CH1 CH4

CPU
nputs CH2 CH5 Outputs
Memory

CH3 CH6

/P O/P
Module Module
Power
supply
 Address bus

Program
Control bus
panel

User Input/
Battery System Data
program CPU Clock output
ROM RAM
RAM unit

Data bus

I/O system bus

Buffer Latch

Opto- Driver
coupler interface

Input Drivers Ex:Relays

channels

Output
channels
 1

Operating
4 2
cycle



 PLC

Protection Optocoupler
nput diode
from
sensor To CPU

Voltage
divider
circuit
 5V

24 V
nputs nput To input module
channel (digital output)
110 V

240 V
 24 V, 100 mA

110 V, 1 Amp
From output Output Switching
module channel outputs
240 V, 1 Amp

240 V, 2 Amp

+ +

nput Output
module module
nput
device
– –
Output
load

Load –
Optocoupler
+ +
nput Output
device load
nput Output
module module

Load +
Current
flow

Optocoupler –

PLC
 Rung - 1

Rung - 2

Rung - 3
Power
lines

END End rung

 PBI PB
(Normally open) (Normally closed)

Lever pushed
down by contact

Button to operate
switch
 Normally open Normally closed
limit switch limit switch

Pressure
limit switches

NO NC

Temperature
limit switch

NO NC

Level
limit switches

NO NC

Normally open (NO) Normally closed (NC)

input contact input contact
 Relay coil CR

Contactor
(solenoid)

Two position valve

Motor M

Light
 Output
nput
 A B Lamp
A Input A Input B Output
AND Y = AB
B

Output = Lamp
Symbol AND circuit PLC AND logic

AND system

X400 X401 Y430

A Lamp Input A Output

A
OR
B
B

Input B Output = Lamp

Symbol OR circuit PLC OR logic
 OR system

X400 Y430

Y401

Bubble indicates
inversion
Switch
NOT A Lamp Input A Output
A A

Output = Lamp
Symbol NOT circuit PLC NOT logic

A
 Input 1 Output
NOT A Lamp
A AB AB
AND
B
B

A AB
NAND Input 2
B
Output = Lamp
Symbol NAND circuit PLC NAND logic

AB NAND system

X400 Y430

X401
 A B Lamp
NOT
A A+B A+B
OR
B NOR circuit

Input A Input B Output

A A+B
NOR
B
Output = Lamp
Symbol PLC logic

A+ B NOR system

X400 X401 Y430

AND
A
A AB
NOT Input A Input B Output
B
B
B
AB
OR
A

NOT A Input A Input B

AB Output = Lamp
PLC XOR Logic
B
AND Simplified
A AB
XOR
B
 XOR System
A B

X400 X401 Y430

X400 X401

nput A Output B Output

Output
X 400 X 401 Y 430
Motor output

Y 430

Y 430 Y 431
Lamp for power
not applied

Y 430 Y 431
Lamp for power
applied
 TON

Timer ON Delay (EN)

Time T4:1 (DN)
Time Base 1.0
Preset 100
Accum 0

I:010 TON
Timer ON Delay (EN)
When the input condition is true, the Time T4:0 (DN)
processor increments the accumulated value Time Base 1.0
of T4:0 in 1 second increments.
Preset 10
Accum 0

T4:0 0:020
Sets the output when the timer is timing
( )
DN

T4:0 0:030
Sets the output when the timer is done timing
( )
DN
 On
Input condition A Off
On
Timer-enable bit Off
On
Timer-timing bit Off 4s 10 s
On
Timer-done bit Off

Timer accumulated 0
value

CR017
IN001
CM On
CR017
Off
8
CR018 Sec
CR017 On
GM CR018
TON Off
CR017 8 Sec.
IN001 IN001
On Off
 TOFF

Timer Off Delay (EN)

Time T4:2 (DN)
Time Base 1.0
Preset 150
Accum 0

I:012 TOFF
Timer Off Delay (EN)
When the input goes false, the Time T4:0 (DN)
processor starts incrementing the accumulated Time Base 1.0
value in T4:0 in 1 second increments until the input
Preset 100
goes true.
Accum 0

T4:0 0:015
Sets the output when the timer is timing
( )
TT

T4:0 0:030
Resets the output when the timer is done timing
( )
DN
 Start Stop Main motor
M1
( ) Rung 1
O:0/0
I:0/0 I:0/1

O:0/0
EN
TOFF ( ) Rung 2
T4:1
O:0/0
Preset 15 ( ) DN

Lub. motor
M2
( ) Rung 3
T4:0/DN O:0/1
I:012 RTO
Retentive Timer ON (EN)
When the input is true, the processor starts Timer T4:10 (DN)
incrementing the accumulated value of in T4:10 in Time base 1.0
1 second increments. The timer values remain
when the input goes false. Preset 9
Accum 0

I:017 T4:10
Resets the timer
(RES)

True
Timer input
False
Timer T4:10 On
enable bit Enable bit is reset
Off when input I:012
Accum = Preset is opened
9
8
7
Accumulated value retained when 6
rung condition goes false 5
4
3
2
1
0
Accumulated value
On
T4:10 Done bit
Off
Output device On
(Controlled by
done bit) Off

Reset input On
I:0017 Off
0 1 2 3 4 5 6 7 8 9 10 11 12 13
Time in seconds
IN_sensor_object
CU
CTU
IN_switch_reset OUT_counts_reach ed

R Q ( )

25 PV CV 0 parts_counted


 Inputs Ladder logic program Outputs
L1 L2
I:1/0 CTU
Rung 1 Count-up counter CU
PB1 (Count) Counter C5:1 Red PL
Preset DN
PB1 (Count) 7
Accumulated O:2/0 R
0
I:1/0
C5:1/DN O:2/0
O:2/1 G
Rung 2
Green PL
PB2 (Reset) Counter done bit Red PL

I:1/1 C5:1/DN O:2/1

Rung 3
Counter done bit Green PL

I:1/1
C5:1
Rung 4 RES
PB2 (Reset)
 IN_sensor_object
CU
CTD
OUT_counts_reach ed

Down counters LD Q ( )

25 PV CV 0 parts_counted

Ladder logic progam

Inputs Enter Output

switch
CTU
Enter Count-up counter CU Lot full
switch light
Counter C5:1
Preset 150 DN
Accumulated 0
Exit
switch
CTU
Exit Count-down counter CD
switch
Counter C5:1
Preset 150 DN
Accumulated 0
Lot full
C5:1/DN light

Reset

Reset
C5:1
RES
 IN_sensor_A IN_sensor_B
CU
CTUD
IN_sensor_B IN_sensor_A OUT_counts_reached

CD QU ( )

IN_switch_reset
R QD

LD

25 PV CV 0 parts_counted
 Inputs Ladder logic program Output
L1 L2

PB1 Count
up

PB1 UDC Light Light

PB2 Count
down PR: 003

PB2 AC: 000

PB3
Reset

PB3
 IR coil

Internal
relay Energizing the
coil activates
Contacts the contact
Input 1 IR1 Start Stop IR

Input 2 IR

Input 3 Input 4 IR2 IR Output 1

IR1 Output IR Input Output 2

IR2 IR Input Output 3

END
END

(a) An output controlled by (b) Starting of multiple outputs

two input
 X400
MOV S D
D1 D2

Source Destination
address address

Compare
instruction
Value 1
True 1 X400
Compare > S D
Value 2 False 0

Source Destination
data data
address address
K = 90 IR Alarm K = 90 Y430
> S D > S D S Y430
Y430

IR
 S D  S D R Y430
K = 75 K = 75
 Source Source
BIN S D BCD S D
Destination Destination

Coil number

MR0111
0004 Number of
IN0073 lines to be
Enable skipped
Line no. IN0201 CR0031

IN0202 CR0032

MCR0132
IN0203 0003
3

IN0204 CR0033
4

IN0205 CR0034

5 Three lines irrevocably

turned off when
MCR0132 is off
IN0206 CR0035

CR0036
IN0207
7

IN0208 CR0037
8
 Main program
Program
scan

JMP JUMP

This portion
of program
is skipped,
not scanned

LBL JUMP DESTINATION

Program
scan
16

03
JMP
17 121 ON
121 OFF
18

19

20

21
127 011
03
22 LBL
04
08
23
Main program
Subroutine
LBL

JUMP
(JSR)

(RET)

Return to next line following JSR

Line
21

121 02
JSR
22
107 121 ON
03
121 OFF
23

Subroutine
area
04
02
107
LBL

108

109 RET

24

25
 Stir (Motor operated)
Vin

LH

Temperature switch (Ts)

Vout

LL

H
 Start Stop
CR1 01 02
Rung 1
16
CR1
16
(Level limit)
CR1 Vout
LH 16 03 11
Vin Rung 2
08

Vin Vo 08 11
S Rung 3 09

Vin ON
08 ON
TR1 Rung 4
32
30 min. 1800
CR1 Vin TR1 Ts 16 08 32 04
H Rung 5 10

Vin 32 05 08
TR1 LL
Vo Rung 6 11
 SW2
Motor

SW3

Gripper
SW1

MOTOR
M
SW 1-1 (Relay
coil)
M-2 SW 3-1
Direction
D
SW 1-2 (Relay
coil)
D-1 SW 2-1
Gripper

(Solenoid)
D-2 CW
Motor
D-3
(DPDT)
M-1
CCW
 P CR1

Q CR2

R CR3

CR11 CR21

CR12 CR31 X

CR22 CR32
 Furnace element 1

Element 2

Power Neutral
Start
line Stop line
Heater
Rung 1

CR1
TR1
120
Overheating
sensor
CR1 Element 1
Rung 2

Element 2
Rung 3

Closed after
120 sec.

Rung 4 (END)
 Indication panel

RUN STOP

Proximity
switch

Box

Conveyor
Motor
Local control panel

START Emergency
STOP
Start Emergency
PB1 stop
PB2
CR1

LS1

CR1-1
STOP
R

CR1-2
RUN
G

CR1-3

CR1-4 OL
 Input module Ladder logic program Output module
wiring connections PB1 PB2 LS1 wiring connection
L1 Internal L2
I:3 I:3 I:3 relay

0 1 2
PB1 OL
O:4/1 M
I:3/0 Internal
relay
PB2 PL1 PL1
I:3/1 O:4 O:4/2 R

LS1 Internal 2
I:3/2 relay PL2
PL2 O:4/3 G
O:4

Internal 3 Legend:
Legend: relay
M M: Motor
PB1 : Start
O:4 OL: Overload relay
PB2 : Stop
R: Stop indication
LS1 : Proximity Internal 1
switch G: Run indication
relay
 Feeder

Motor 3

Lo
ad
ce
ll 1

Motor 1

Load cell 2 Motor 2

 I:1/0 I:1/1 O:2/0
000
Start Stop Master coil
O:2/0

Master coil

O:2/0 O:2/1
001
Master coil Motor 3

O:2/0 I:1/2 O:2/2

002
Master coil Load cell 1 Motor 1

O:2/0 O:2/2 O:2/3

003
Master coil Motor 1 Motor 2
I:1/3

Load cell 2

004 END
 prox 1 prox 2

L1 24V
24V
start E1 E1.IN0 E1.IN2 E2 soI1
OUT0
IN0 ( ) OUT0
IN1 E1.IN4 OUT1
prox 1 TON
IN2 Timer ON -Delay (TON) (ON) OUT2 soI2
soI1 soI2
IN3 Timer T4:L8 OUT3
Timer basa 1s (ON)
prox 2 IN4 Preset 5 OUT4
IN5 Accum 0 OUT5
IN6 ON OUT1 OUT6
0V 0V
IN7 ( ) OUT7
COM COM

[END]
 PB1 CR1 CR2 SOL

Hardwired relay
control circuit
LS1

(PB1) (CR1) (CR2) SOL

Equivalent ladder
diagram program
A B D Y

C
(LS1)
 1.0

PB1 PB2 S1 S2

I1 I2 I3 I4

1.1
2 O1 O2
4

Y1 Y2 Y1 Y2
5 3
1

(a) Pneumatic diagram (b) PLC wiring diagram

Memory M1

I1 Set-reset
Memory signal from I1 sets and
1 Set O/P memory signal from I2 resets.

Reset

M1 I3 O1 M1 = 1, I3 = 1, Output O1 = 1, Y1 is ON
2

I4 O2 I4 = 1, Output O2 = 1, Y2 is ON

(c) Ladder diagram




10 s


Input

ON
OFF
Output
On-delay timer
Input 1 IR Output
( )

Output

Input 2 IR
( )

 Personal computer User interface

Sensors Controller Actuators

Process
IN 1 IN 1 IN 2
Y Y
IN 2
NOR gate Ladder logic for NOR gate

IN1 IN2
M
 Variable reluctance
stepper motor

Stator
1

3 2

Rotor

2 3
Windings
1

Metal teeth
Winding 1 energized Winding 2 energized Winding 3 energized Winding 1 energized

N N
1 1 1 1

2 3 S2 3 2 3N 2 3

3 2 3 2N 3 2 3 2
S
1 1 1 1
S S

Permanent magnet
stepper motor

Stator
1

N
S S
2 2
N N
S

Windings
Rotor
1

Permanent
magnet poles
 Hybrid
stepper motor

Stator
1

N
S S
2 2
N N
S
Windings
Rotor
1

Permanent
magnet poles and
metal teeth
 Torque

Pull-out torque

Slew range
Pull-in torque

Pull-in Pull-out Maximum Speed

speed speed pull-out
speed
Maximum
pull-in
speed
 Servomotor

A.C. servomotor D.C. servomotor Special servometer

Armature controlled Field controlled

 Error
amplifier
Comparator Variable Motor Load
Pulse width to output
voltage converter

Control signal Position sensor Gear box

 A.C.
supply

90º Reference winding

Control Rotor
voltage
form
servoamplifier

Control
winding
 Fixed phase AC supply
Stator

Amplifier Rotor

Control
phase
Gears

Syn
generator
Stator
Rotor

Control
transformer AC supply

Input
 Load

Servo
Position controller Servo
PLC
controller (amplifier) motor

Position
command

Feedback
encoder
 End
Rigid
effector
body 2

Rigid body 1

Moving
base
 Signal Voltage Transient
regulator projection +12 V
conditioning

Engine speed
sensor
Ignition coil
Engine To ignition
drivers
temperature coil
sensor
Throttle
position
Fuel injector To fuel
Mass flow drivers injector
air sensor

Oxygen
sensor Microcontroller for
engine management
system Solenoid Idle speed
Knock drivers
sensor actuator

Oil pressure
sensor

Fuel pressure Solenoid

Engine gas
sensor drivers
regulation valve

Analog inputs ADC

SPI Data bus
SCI Data bus
Analog outputs DAC drivers
 Fuel pump Pressure
Fuel tank
regulator
Fuel filter
Ignition coil

Distributor

Oxygen
sensor
Air
flow

Mass air
Temp flow sensor
sensor Idle
Throttle speed
position actuator
Sensor sensor
wheel
Electronic
control
Speed unit
sensor
 Pivot Barrier

Connecting rod
Limit switch for barrier down

Cylinder

Solenoid B

Piston
Solenoid A
 PLC
X101 - Switch activated when
entrance barrier up
E
V
X102 - Switch activated when
entrance barrier down
N
+24 V
X103 - Switch activated when
L car at exit barrier
X100
X104 - Switch activated when
car at exit barrier up
X101
X105 - Switch activated when
X102 car at exit barrier down
Y200
Y200 - Solenoid valve A for
X103 entrance barrier
Y201
Y201 - Solenoid valve B for
X104 entrance barrier
Y202 Y202 - Solenoid valve A for
X105
Y203 exit barrier

Y203 - Solenoid valve B for

exit barrier
X100 M100 Y201 Y200
Coin operated input
X100 is required to lift the entrance barrier
Y200 energies solenoid A
X200

X103 T450
When the barrier is in upward position input
X101 starts timer

T450 M100
After 205 the internal relay M100 energised

M100 X102 Y200 Y201

This results in Y201 energising solenoid B
of entrance barrier and barriers comes down
Y201

X103 M101 Y203 Y202

Car operated input X103 is required to lift the
exit barrier. Y202 then energises solenoid A
of exit barrier
Y202

X104 T451
Input X104 starts timer when barrier up

T451 M101
After 205 the internal relay M101 energised

M101 X105 Y202 Y203

This results in Y203 energising solenoid B
of exit barrier and barrier comes down
Y205

END
So a s
lik
, t wi
e
his tc Escalator
m h, ri
Pass detection switch: 1
at gh drive Y003 X003
ac t?
ts
Illumination
lamp Y000

Pass detection switch: 0

X001

Pass detection Pass detection

switch: 0 switch: 1
X001 X003
Y000 Illumination lamp ON

Self hold
Y000
Y003 Escalator drive

END
 360º
7. 5º

48  10
 7.5 
1800 
 1.8 
1800 
Semester - VII (Mechanical Engineering)
Course 2013


Semester - VII (Mechanical Engineering)
Course 2013


Semester - VII (Mechanical Engineering)
Course 2013


Semester - VII (Mechanical Engineering)
Course 2013

p

Semester - VII (Mechanical Engineering)
Course 2013



Semester - VII (Mechanical Engineering)
Course 2013

360
1.8
5  360 1800
1800
nP
1.8


 bt 3 0.025  0.005 3
2.6  10 – 9 m 4
12 12

FL 3 30  0.3 3

3EI 3  200  10 9  2.6  10 – 9

5.19  10 – 4 m 4

x 5.19  10 – 4
F 30

20
100
2
 0.2
10
0.04
0.0104
20
0.0104

10 12
