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    IC-M700PRO - Service Manual

    Uploaded by

    Akhil Viswanathan

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    © All Rights Reserved
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    (0) ICOM SERVICE MANUAL SSB RADIO TELEPHON IC—-M7OOPRO Icom Inc. INTRODUCTION DANGER This service manual describes the latest service information for the IC-M700PRO SSB RADIO TELEPHON at the time of publication. 2 versions of the IC-M700PRO have been designed. This service manual covers each version, VERSION MARINE GENERAL IC-M700PRO To upgrade quality, any electrical or mechanical parts and internal circuits are subject to change without notice or obligation. NEVER connect the transceiver to an AC outlet or to a DC power supply that uses more than 16 V. This will ruin the transceiver. DO NOT expose the transceiver to rain, snow or any liquids. DO NOT reverse the polarities of the power supply when connecting the transceiver. DO NOT apply an RF signal of more than 20 dBm (100 mW) to the antenna connector. This could damage the transceiv- er's front end. ORDERING PARTS REPAIR NOTES Be sure to include the following four points when ordering replacement parts: 1. 10-digit order numbers 2. Component part number and name 3. Equipment model name and unit name 4. Quantity required «SAMPLE ORDER> 1110003140 IC LATISON IC-M700PRO MAIN UNIT S pieces 8810008560 Screw PH M3 x8 SUS ZK IC-M700PRO Rear panel 10 pieces Addresses are provided on the inside back cover for your convenience. 1, Make sure a problem is internal before disassembling the transceiver. 2. DO NOT open the transceiver until the transceiver is dis- connected from its power source. 3, DO NOT force any of the variable components. Turn them slowly and smoothly. 4. DO NOT short any circuits or electronic parts. An insu- lated tuning tool MUST be used for all adjustments. 5. DO NOT keep power ON for a long time when the trans- ceiver is defective, 6, DO NOT transmit power into a signal generator or a sweep generator. 7. ALWAYS connect a 50 dB to 60 dB attenuator between the transceiver and a deviation meter or spectrum ana- lyzer when using such test equipment. 8. READ the instructions of test equipment thoroughly before connecting equipment to the transceiver. SECTION SECTION SECTION SECTION SECTION SECTION ‘SECTION SECTION SECTION SECTION 1. RECEIVER CIRCUITS. 2 TRANSMITTER CIRCUITS. TABLE OF CONTENTS SPECIFICATIONS INSIDE VIEWS CIRCUIT DESCRIPTION PLL CIRCUITS... PORT ALLOCATIONS... ADJUSTMENT PROCEDURES PREPARATION BEFORE SERVICING. PLL ADJUSTMENT... ‘TRANSMITTER ADJUSTMENT. eee - . a4 RECEIVER ADJUSTMENT. Ant PARTS LIST MECHANICAL PARTS AND DISASSEMBLY ‘SEMI-CONDUCTOR INFORMATION BOARD LAYOUTS FRONT UNIT MAIN UNIT ... PLL UNIT AND PA BOARD. FILTER AND TERMINAL BOARDS. BLOCK DIAGRAM VOLTAGE DIAGRAM SECTION 1 SPECIFICATIONS GENERAL + Frequency coverage Receive 500 kHz~29.9909 MHz Transmit 1,8000-2.9999 MHz 4,0000-4.9999 MHz 6,0000-6.9999 MHz _8,0000-8.9999 MHz 12,0000-13,9999 MHz _16,0000-17.9999 MHz 18,0000-19.9999 MHz 22.0000-22.9999 MHz 25.0000-27.50000 MHz + Mode ‘JRE (USB), H3E (AM), J28 (AFSK), F1B (FSK), R3E, ATA (CW) (Available modes differ with version) + Number of channels, +160 channels (max.}—3 groups of 60 channels each + Antenna impedance 509 (nominal) + Usable temperature range :=B0°C to +60°C; ~22°F to +140°F + Frequency stability 1 810 Hz (-30'C to 460°C; -22°F to +140°F) (420 Hz above 15 MHz) + Power supply requirement 118.6 V DC #16% Negative ground + Current drain (at 13.6 V DC) : Transmit (max. output power) 30A Receive (max. audio output) 2.5 A + Dimensions (projections not included): 291.4(W)x116.4(H)x315(D) men; 111842(W)x41982(H)x1 219420) in + Weight (with ant, battery case and cells): 7.9 kg; 17 Ib 7 oz + Remote connector NMEA D-sub 9-pin (female) + ACC 1 connector DIN 8-pin (female) + ACC 2 connector : DIN 7-pin (female) TRANSMITTER + Output power (at 13.6 V DC) +160, 60, 20 W PEP (60, 20 W PEP only above 24 MHz) + Spurious emissions, ~75 dB typical + Cartier suppressions 65 dB typical + Unwanted sideband suppression 275 dB typical + Microphone impedance 600 2 RECEIVER + Sensitivity : UGE, ROE, J2B, A1A 0.35 pV typical (1.8000-29.9999 MHz) (for 1248 SINAD) 1.0 pV (1.6000-1.7999 MHz) 6.3 pV (0.5000-1.6999 MHz) HSE (for 1008 S/N) 2.2 UV typical (1.8000-29.9999 MHz) 6.3 LV (1.6000-1.7999 MHz) 32 wV (0.5000-1.5999 MHz) + Spurious response rejection 80 dB (1.6000-29.9999 MHz) + Audio output power 5.0 W typical (at 10% distortion with a 4 © load) + Audio impeadance 41082 + Clarity variable range #150 Hz Ail stated specifications are subject to change without notice or obligation. SECTION 2 Eo) a SES + PA, FILTER AND TERMINAL UNITS Drive amplifiers (24001, Qso02: 2803133) Low-pass filters. (FILTER board) Thermal switches (sa001, $4002) Power detector Power amplifiers circuit (Q4003, Q4004: 28C2803) PA board - MAIN, PLL AND LOGIC UNITS Bp" 41st mixer eireuit ms (st IF filter MAIN unit (FLA: FL-120) 1st IF amplifier (08: 3SK131) 2nd mixer circuit a 4 PLLIC : (IC3005: LC7153M) BFO ODS IC i: (C3002: $C-1287) ops Ic (ic3001: $C-1246) Relerence oscillator 30.000000 MHz PLL unit (9001: CR-282) 8V regulator IC LOGIC board (1C2006: wPC7SLO8T) 5V regulator IC (C2005: wPC75LO5T) SECTION 3 CIRCUIT DESCRIPTION 3-1 RECEIVER CIRCUITS 9-1-1 RF FILTER CIRCUIT (MAIN UNIT) Received signals {rom the antenna connector pass through the transmit/eceive switching relay (FILTER board RL4317) and are then applied to the MAIN unit (via J2) ‘The signals pass through the protection relay (RL2), 1.6 Mbz cut off high-pass filer (L2-L4, C4-C8, C629) and are then applied to one of nine bandpass fiters (including one low-pass fitter for below 2.0 MHz). These fers are selected by the fiter control signals (B0-B8) as described inthe table below. The fitered signals pass through the 30 MHz cut-off low- pass fiter (L71, L72, C130-C194, C818) and are then applied to the 1st mixer circuit (Q6, Q7). “RF FILTERS USED Frequency [Control] Entrance | Frequency |Conval] Entrance] (i) "| signal | colt | (Mz) — | signal | "coil os-1900[ Bo | tao | 10-1390] Bs | 28 z2e00 | or | 16 |ii7e00| 66 | 3 Sao | o2 | us [ve2acc0[ er | ie S500 | 63 | 118 [2420000] se | Lae Ta900 | os | ws 9-1-2 1ST MIXER AND IF CIRCUITS (MAIN UNIT) The 1st mixer circuit converts the received signals into a fixed frequency, 69.0115 MHz 1st IF signal using the PLL ‘output frequency. By changing the PLL frequency, only the desired frequency is picked up at the pair of crystal fiters (Flta, FI1b) at the next stage. The IF amplifier (Q8) and resonator circuits are designed between the fiter pair. The PLL output signal (1LO) enters the MAIN unit via J3 and is amplified at the 1st LO amplifier {(Q8) and then applied to the 1st mixer (Q8, Q7) + RECEIVE FREQUENCY CONSTRUCTION 3-1-3 2ND MIXER AND IF CIRCUITS (MAIN UNIT) ‘The 1st IF signal from the crystal fiter (FI1b) is converted again into a 9.0115 MHz 2nd IF signal at the 2nd mixer cir- ‘uit (052, L66, L67). The 60 MHz 2nd local signal (2L0) centers the MAIN unit from the PLL unit via J4 to be applied to the 2nd mixer. The 2nd IF signal is passed through the noise blanker gale (015, D16) and amplified at the 2nd iF amplifier (Q16) and, then applied to one of the 9 MHz IF fiers as described below. The passed signal is amplified at the two stage 2nd, {F amplifiers (Q32, Q33) and is applied to a demodulator cir- cuit (039 for H3E or 1C10 for JSE and others) + 2ND IF FILTERS USED MODE Used fier Control signal WBE, RSE, FSK. Fi SELB: low, HES: low HSE Fara | SELB: low, HES: high FSk narrow, [Optional narrow] Fi ae a ‘SELB: high, H3EB: low 3-1-4 NOISE BLANKER CIRCUIT (MAIN UNIT) ‘The noise blanker circuit cuts off the IF circuit line at the ‘moment of receiving a pulse-type noise. ‘A portion of the 2nd IF signal between resonator circuits, (183, L84 after stage of the 2nd mixer, O52) is amplified at the noise ampitiors (Q9, 1C8, Q11). The signal is then detected at the noise detector (D17) to convert the noise ‘components to DC voltages. The signals are then applied to the noise blanker switch (Q13, G14). At the moment the detected voltage exceeds. the Q13's threshold level, 14 outputs a blanking signal to, close the noise blanker gate (015, 016) by applying reverse- biased voltage. Q15 tums the noise blanker circuit ON and OFF. HOE Bateatr tstmixer 2ndmixer — For T 06,07 FitaFlib —DS2 FIFA LPF or ‘crystal, ‘ental posse Bre iter thee Other modes Demodulator 05-20.099 MHz 1 e901 MHz I 8.0115 MHz Ic ‘Ast Lo: 2nd LO: 60.0 MHz BFO. 69.5115-09.0114 MHz BE, J2B, ROE, FSK: 9.0120 MHz FSK narrow, 128 narrow: 9.0123 MHz ANA 9.0116 MHz The detected voltage is also applied to the noise blanker AGC circuit (@12, Q10) and is then fed back to the noise ampiter (IC8) as a bias voltage. The noise blanker AGC cir- cuit prevents closure of the noise blanker gate for long peri- ‘ods by non-pulse-type noise. The time constant of the noise blanker AGC circuit is determined by R58 and C114, 9-1-5 DEMODULATOR CIRCUIT (MAN UNIT) This circuit mixes the 2nd IF and BFO signals to pick up the AF components (except HSE mode). The 2nd IF signal from the 2nd IF amplifier (Q33) is applied to the balanced mixer (C10, pin 6). The 9.0116-9.013 MHz BFO signal from the PLL unit is also applied to 1C10 (pin 8). AF signals are out- put from pin 3 and are then applied to the AF circuit. 3-1-6 H3E DETECTOR CIRCUIT (MAIN UNIT) ‘The 2nd IF signal from the 2nd IF amplifier (Q33) is applied to the AM detector circuit (039) to be demodulated into AF signals. The detected signals are amplified at the buffer amplifier (Q45) and then applied to the AF circuits. 3-1-7 AGC CIRCUIT (MAIN UNIT) The AGC (Automatic Gain Control) circuit reduces IF ampli- fier gain to prevent the receiver circuit trom distorting and to keep the audio output at a constant level A portion of the IF signals from the 2nd IF amplifier (Q33) is detected at the AGC detector circuit (D31) and is then applied to the AGC amplifier (Q41) to control the AGC time constant line. The reference voltage of the AGC line is con trolled by the “RFG" line which comes from the CPU for the RE gain setting When receiving a strong signal, the detected voltage increases and the voltage of the AGC line is decreased by the AGC amplifier (Q41) via the ~5 V voltage line. The AGC. line is used for the bias voltage of the IF amplifiers (Q8, Q16, 232, 233), so that these amplifiers reduce gain. ‘When the strong signal disappears, the AGC line voltage is released by C245/R268 and C670/RB13. ‘The AGC switch (Q42, 038) turns the AGC circuit OFF when the AGC OFF function activates. The AGC-fast switch (Q131) sets the AGC line as fast-release during scanning and ATA made selection, 3-1-8 S-METER CIRCUIT (MAIN UNIT) The S-meter indicates the AGC level on the display, since the AGC level varies with the received signal strength. The AGC bias voltage (AGC time constant line) from the AGC amplifier (Q41) is inverted and amplified at the meter ampitier (1C19b). The amplified signal is applied to the CPU, via the “RSM” fino 3-1-9 AF AMPLIFIER CIRCUITS (MAIN UNIT AND LOGIC BOARD) AF signals from the demodulator or HE detector circu pass through the active low-pass fer (IC20b) and squelch gate (IC12a), and are then applied to the electronic volume, Control (1C38). The CPU (pin 37) outputs the volume contrat, signal (1 to 5 V) according to the [VOLUME] control setting ‘The AF output signals from IC36 (pin 9) are applied to the LOGIC board via J23. The signals are amplified at the AF power amplifier (C2007) and then applied to the intemal speaker via the microphone connector (pins 3 and 4) and external [SP] jack via the MAIN unit ‘The speaker switch relay (RL2001) is connected to the (-) terminal of the internal speaker for the [SPEAKER] switch function. 31-10 SQUELCH CIRCUIT (MAIN UNIT) The transceiver has two squelch circuits, voice activated squelch for JSE/H3E and S-meter squelch for AIAIFSK. (1) AF ACTIVATED SQUELCH ‘A portion of the AF signal from the active low-pass fiter (1C20b) is amplified at the limiter amplifier (\C20a) and is then applied to the one-shot muiti-vibrator (IC22c, 1C22d). The one shot muitrvibrator functions as an F-V converter which generates a signal only when audio signals are received. The output signals pass through the NOR gate (IC22b) and, then the 3 Hz low-pass filter (IC21a) to remove the remain- ing noise components. The fitered signal is applied to the window comparator (IG21b). The NOR gate (IC22b) deacti- vates the audio activated squelch during A1AFSKN2B, ‘mode operation. «AGC eeu a ee a _& 7 aCe en av CW, SCAN rine Aap en cre = sy Lg cc oF conta owe ‘The comparator outputs “High” when the integrated signals exceed the reference voltage. C269, R310 and R780 are used as a time constant circuit. The resulting signal output {rom IC22a is inverted at Q48 and is then applied to the CPU as the “SQL S" signal. The CPU controls the squelch gate (1G12a) when the "SQLS" signal is received. (2) SMETER SQUELCH The S-meter signal from C19 is applied to the squelch ‘comparator (IC19a) to close or open the squelch circuit. The reference voltage is adjusted by R257 and then applied to the (-) terminal of the comparator (IC19a). When the S~ ‘meter signal exceeds the reference voltage, the comparator ‘outputs “High” to the CPU via IC22a and Q4é in the same manner as the voice activated squelch circut. 3-2 TRANSMITTER CIRCUITS 3-2-1 MICROPHONE AMPLIFIER CIRCUIT (LOGIC BOARD) The AF signals from the [MICROPHONE] connector are amplified at the AF amplifier ((C2008a) and are applied to the balanced modulator (MAIN uni; IC8) via the AF switch {IC38b). The microphone AGC circuit (02008, 02009, £22008) controls the amplifier gain to prevent signal distor- tion. Extemal modulation inputs from the ACC and NBDP sockets fr a 2-tone emergency signal from the CPU are applied to the balanced modulator directly via AF switches (IC38, Ic39), 3-2-2 MODULATION CIRCUIT (MAIN UNIT) (1) J3E AND J2B MODES ‘The balanced modulator is used for J3E and J2B modes to ‘add the audio signal to the BFO frequency and outputs the IF signal while suppressing the BFO signal. ‘The AF signals from the microphone ampli or external audio from the modulation terminals are applied to the bal- ‘anced modulator (IC9, pin 6). The BFO signal from the PLL Unit is applied to IC8 (pin 8) as a cartier signal. A double sideband signal is output from IC9 (pin 3) andis then applied to the 9 MH fiter(FI2) to create an SSB signal + MODULATOR CIRCUIT e208, R238 and R239 adjust the balanced level of 109 for max mum cartier suppression. In J2B mode, the BFO frequency is shifted 1.7 kHz to set the transmit frequency the same as, the displayed frequency. The SSB signal from Fi2 is amplified at the 9 MHz amplifiers (Q17-019) and is then applied to the mixer circuit (D2). The switching diode (019) is turned ON when R8 voltage disappears. (2) H3E AND R9E MODES ‘An SSB signal is applied to the IF amplifier (218) in the same manner as with J3E/J2B mode. The BFO signal from ‘the PLL unit is amplified at the buffer amplifier (Q30) and is ‘then applied to the IF amplifier (Q18) as a carrier signal to be added to an SSB signal, R211 and R212 adjust the car- rier levels in H3E and R3E modes, respectively. (9) A1A AND FSK MODES The CW8 or FSK8 voltage are applied to the balanced mod- Ulator (IC9, pin 6) to upset the balance and create a carrier, signal. InAtA mode, the CW keying circuit ((C18a) controls the bias, voltage of the IF amplifiers (Q18, Q19) and T/R switching diode (019) to switch the cartier transmission. In FSK mode, BFO frequency is shifted in the PLL unit to create the mark and space frequencies. 9-2-8 1ST MIXER CIRCUIT (MAIN UNIT) ‘The amplified signal from the IF amplifier (Q17) is mixed with a 60 MHz LO signal atthe 1st mixer circuit (052) to pro- ‘duce a 69.0115 MHz IF signal. The mixer is commonly used with the receiver 2nd mixer. ‘The 69.0115 MHz IF signal passes through the fitter (FI1b) and is then applied to the 2nd mixer circuit. 3-2-4 2ND MIXER CIRCUIT (MAIN UNIT) The filtered signal is mixed with a PLL output frequency (1LO: 69.5185-99.0155 MHz) at the 2nd mixer circuit (23, (Q4) to produce an RF signal which is the same frequency as, the displayed one. Balance upset during CW, FSK 5 6 Microphone } Sa COW koying conto e ji ‘Modulator Fi ene once 2tone ata as cosas 02 Note Nore Nav a “iter 1 ‘ACC (1) socket (6'y’2) 7 7 ® cer Sa ‘BFO from the PLL unit (MHz) eaeree ma rom the PLL uni (M2 i on nee 5 6. GE, R3E, H3E,J28: 9.013 GD) socket [595° Po aN AIA: 9.0116 1380 FSK: 9.0113 (center) FSK narrow 9.0105 (center) 28 9.1008 During tuning sons 3-2-5 RF FILTER CIRCUIT (MAIN UNIT) ‘The RF signal passes through the low-pass fier (L55, L56, ©89-C93, C620, 0628) and is then amplified at the RF amplifier (Q2). The amplified signal is applied to one of nine RF fiers. These RF filters are commonly used with the receiver circuit Which consists of eight high-pass filters and one low-pass fi- ter. The filtered signal is amplified at the RF amplifier (Q1) and is then applied to the PA board via J1. 9-2-6 POWER AMPLIFIER CIRCUIT (PA AND FILTER BOARDS) This circut provides a stable 150 W (at 13.6 V DC) of output power. The RF signal from the MAIN unit is amplified at the pre-driver (Q4008), driver (Q4001, @4002), and power amplifier (24003, 24004), The driver and power amplifiers from class AB push-pull cir- cuits, Bias voltage to these transistors is produced by diodes (04001-D4003) which have temperature junctions with the transistors. The amplified signal is then applied to one of eight low-pass fiters to suppress high harmonic components. The fitered signal passes through the power detector circuit (L4341) and transmivreceive switching relay (RL4317) and is then applied to the antenna connector. + LOW-PASS FILTERS USED Frequency [oon] Frequency [Contra Enwranco is) | signal (itz) | eignal | ool Os-1999 | to [Also [10-1390] 1s | ALASTT z2909 | it | RL803 | ya-17.9000 Saa09 | 2 [Anasos| 19-19.000| 16 | PLASIS 5 13 _| Lazar | 20-21 968 —_ 8 Aso7 22-23,.999 | L7 | RL4315 7-000 | t+ | Lasoo | 34-58990 +ALC CIRCUIT MAIN UNIT High power set (R164) Low power during tune (26) 20W low power set (2182) Curtent AF Current APC 3-2-7 ALC CIRCUIT ‘The transceiver has two ALC (Auto Level Control) loops for ‘constant output power over all marine bands and for high power setting (1) IF ALC CIRCUIT (MAIN UNIT) A portion of the IF signals from the IF ampiiier (Q17) is applied to the IF ALC circuit. The signal is amplified at Q126 and then detected at the ALC detector (D46). The detected signal is amplified at the ALC amplifier (IC17b) and is then applied to the comparator (IC17a). ‘The reference voltage for the comparator is set by R184, ‘The antenna tuning control voltage (TUNE) is also affected by the reference voltage to decrease the IF signal level. ‘The comparator output controls the gate bias of the IF ampli- fier (Q19), so that the IF signal level is determined by the ret- erence voltage of the comparator (IC17a). (2) RF ALC CIRCUIT (FILTER BOARD AND MAIN UNIT) ‘The RF output power level is detected at 04309 of the power detector circuit (L4341, 04309, 04910) in the FILTER, board, The detected signal (‘FOR" signal) is applied to the RF ALC amplifier (1C16a) in the MAIN unit. ‘The amplified signal enters the transmit gain controller (1C16b) which functions as an inversion amplifier. The gain ‘controller decrease the gain of the IF amplifier (22) to con- ‘tant output power from different amplifier gains which are ‘occurred by their frequency characteristics. PA BOARD 24001 FILTER BOARD. ‘24003 PC control (2111) Low power during tune (@21, 022) AF ALC CIRCUIT 3-2-8 APC CIRCUIT ‘The APC (Auto Power Control) circuit protects the power amplifiers on the PA unit from high SWR and excessive cur- rent (1) SWR APC (FILTER BOARD AND MAIN UNIT) ‘The reflected wave signal appears and increases on the antenna connector. When the antenna is mismatched, 1D4310 of the power detector circuit (04309, 04310, L4341) in the FILTER board detects the signal and applies it to the ‘APC amplifier (Q23) in the MAIN unit. The output signal decreases the bias voltage of the RF ALC amplifier to reduce the output power. (2) CURRENT APC (PA BOARD AND MAIN UNIT) The power transistor current is detected from the different voltages between both terminals of a 0.012 © resistor (F24026) on the PA board. The detected voltage is applied to the differential amplifier (IC4002b). When the current of the final transistors is more than 30 A, the detected voltage is applied to the APC amplifier controler (Q111) in the MAIN unit to reduce the gate-2 voltage of the IF amplifier (22) and thus reduce the output power. 9-2-9 TEMPERATURE DETECTION (PA UNIT) ‘Thermal switches (S4001, $4002) protect the final transis- tors from excessive temperatures. When the temperature ‘exceeds 0 °C (122 “F), $4002 is tumed ON to start the ‘cooling fan. When the temperature exceeds 110°C (280 ‘F), 84001 is turned ON to control the “POC2" line and sets the power to 60 W. 3-210 RF METER CIRCUIT (MAIN UNIT) The output of the ALC amplifier (IC16a) is applied to the CPU (pin 31) to indicate the transmit power level on the dis- play. {or antenna current meter indication, the "ANT" signal from ‘an optional AT-130E is applied to the OPU (pin 32). 3-3 PLL CIRCUIT 3-0-1 GENERAL The PLL unit generates a 1st LO frequency (69.5155- 199.0115 MHz), 2nd LO frequency (60 MHz) and a BFO fre~ ‘quency (9.01-9.013 MHz) for the MAIN unit. The 1st LO PLL adopts a mixerless dual loop PLL system. The BFO uses a DDS and a 2nd LO as a fixed frequency double that the crystal oscillator. 3-3-2 1ST LO PLL (PLL UNIT) The 1st LO PLL contains a main loop and reference loop as. ‘a dual loop system. The reference loop generates a 10.6510, 40.75 MH2 frequency using a DDS circuit, and the main loop generates a 69.5115 to 99.0115 MHz frequency using the relerence loop frequency. (1) REFERENCE LOOP PLL ‘The oscilated signal atthe reference VCO (23005, 03003) {sampled at the butfer amplifiers (€3008, Q3011) and is then applies to the DDS IC (1C3001, pin 46) The signal is then divided and detected on phase with the DDS generat- ed frequency. -puLcinour Bierce van 900 com aster cos = coaiione [Programmable] [Programmable] 1 coo cote Doubler 2L0 PO feoome Ss peat cone (AD Fa] Pome sates 5vop v0 cow Pet ML ene f aso1t Pesan ‘divider nti 1BaSe | {atther -—-O $8 oe-earsmne Terre aoe Reference OSC (3001; 30.0 MH2) The detected signal output from 163001 (pin 56) is convert- €d into a DC voltage (lock voltage) at the loop fiter (R3018, 3019, C3044) and then fed back to the varactor diode (03003) in the VCO circuit. (2) MAIN LOOP PLL The oscillated signal at the main loop VCO (3003, D3004) is amplified at the buffer amplifiers (3004, 03008) and then applied fo the PLL IC (IC3005, pin 14). The signal is then divided and detected on phase with the reference loop ‘output frequency. The detected signal output from 163005 (pins 9, 10) is con- verted into a DC voltage (lock voltage) at the loop fiter and then fed back to the varactor diode (03004) in the VCO cir- cuit The oscillated signal is amplified at the butter amplifiers (3004, 3021, 03024) and then applied to the MAIN unit as a tsi LO signal 3-3-3 2ND LO AND REFERENCE OSCILLATOR CIRCUITS The reference oscillator (X8001) generates 30.0 MHz fre- ‘quency used for the both DDS ICs as a system clock and for the LO output. The oscillated signal is doubled at the deriv- ‘er (C3002) and picked up the 60 MHz frequency at the res- ‘onator circuit (L3004, L3005). The 60 MHz signal is applied to the MAIN unit as a 2nd LO signal 3-3-4 BFO CIRCUIT ‘The DDS IC (163002) generates a 10-bit digital signal using the 30 MHz system clock. The digital signal is converted to ‘an analog wave signal at the D/A converter (R3120-R3139). The analog wave is passed through the low-pass fier (13097, L038, ©3154-C3158) and is then applied to the MAIN unit as the BFO signal 3-4 PORT ALLOCATIONS 3-4-1 CPU (MAIN unit; 10132) Pin | Port lnumber | name Description input por for the GPU reset signal 1 | RES |When receiving a "LOW" pulse, the CPU is reset. Data input port from the sub CPU ‘| 10__| PXDO | tne LOGIC boats. Data output port tothe sub GPU in the| 1 | TPO |Logoc board. Outputs low power contol signal for 17_| POC? | 60 w power. Ouiputs low power control signal for 18 | Poot | Po power GW keying input. 20 | CWIN | "High : when key is closed. Outputs a “SEND” contro! signal for 21 | ASEN | the ACC socket. Outputs a°SEND" control signal for T| 22. | CSEN |and RB voltage ine control Low: for transmit Outputs an alarm control signal to act vate the 2-lone emergency alarm| 23 | ALMS | encoder. High : alarm on Outputs a tone switching signal for th| 24 | ALMc |2-tone emergency alarm encoder. High : high tone (Ouiputs a clock signal to the EEPROM| 25 | SL facts Data bus line for the EEPROM 2 | SPA lacts4), (Outputs a cloak signalto the EEPROM| a7 | St factss). Data bus line for the EEPROM 28 | Soa |eta5) 30__| RSM Input port for the S-meter indication. 31 | MFOR [Input port for the RF-meter indication. Input port forthe squelch detected si aa_| sais |nat High : when squelch opens. input port for the tansmitreceive| 34 | TRC [switching signal (Outputs FF gain control signal to the| 38 | RFE lac circuit (Ouiputs AF gain control signal to the 87 | AFG | tectronic volume control (1C36). [Ouiputs the * tuner start pulse fo an 39 |_STAT | optional AT-130. ao. | acer [uev® © Be sana (iro San (Ouipuis @ strobe signal to the main 41 | STBI loop PLL IC (13005). (MAIN unit; 16132)-Continued Pin Port number | name Description [Ouiputs @ strobe signal to the refer- 42 | STB2 | ence loop DDS IG (163001). Outputs a strobe signal to the BFO 48 | STBS [eLLic «cso0) 49_| DATA [Outputs data to PLL and DDS ICs. so. | ox. [OuPubacocksignalto PLL ana DDS| [Ouiputs an AF mute signal for squelch] st_| saic | function High : squelch closed, [Outputs an external NBDP equipment 52 | NBS. |control signal. Low : during NBDP data output [Outputs a "noise blanker signal. 83 | AGCS | “High : noise blanker is on [Outputs an AGC-OFF signal. 54 | NMS [Low : during NBDP data output. a5 | pao [up & srobe Sonal Tor an iil 57-60 |P17—P14] Input ports for an initial matrix. (Ouiput band signals for RF LPF ang| 61-64 | PD-PA | BDF selection. 28, ROE, 65.67 | fise | Outputs mode signals. Input por for an optional AT-130. 68 | KEY Low : during tuning. ‘Outputs an antenna tuner tuning con-| 70 | TUNE |trol signal for transceiver’ power/mode control. Outputs @ narrow fiter selection sig-| nal 71 | FSEL |" Low : tor an optional narrow fiter selection ‘Ouipuis a program scan control signal 72 | PROG |for "AGC fast” and “audio squelch" deactivation SECTION 4 ADJUSTMENT PROCEDURES 4-1 PREPARATION BEFORE SARVICING Mm REQUIRED TEST EQUIPMENT. EQUIPMENT GRADE AND RANGE EQUIPMENT GRADE AND RANGE Oupalvotage —136V 00 “lo generate (Frequency range: 900-9000 Hr DC power supply Current capacity 30Aor more cee eres Measuring range 314500 mv Measuring range: 10-200 W Frequency range: 01-00 MH fr powermneter — |rrequomy range /1e-00une [SNA et Oa w-seaw (terminated type) Impedance 502 9 (-127 to -17 dBm) a ies Sens Frequenoy range: 00-100 MHz Frequency range 0.1-100 MHz ‘e0pe | Measuring range 001-10 V Frequency counter | Frequency accuracy: £1 pom or better eae pom or beter TG mavalmeter | Measuring range: 10 mVv-10V Tap — Frequency ange :0.1-100Mitz | External speaker : eee ‘Measuring range 001-10 V 6 Wor more Power atenuaton 150 or 60 8 [DC vormeter Input impedance: 50 kQ/V DC or beter | Attenuator Capacity $60 W or more [Frequency minmum Atieast 90MH2 [DC ammeter Measurement capabity: 1 A/S A150 A ‘Spectram analyzer | Spectraum bandwidth : 100 kHz or more MCONNECTIONS. ac. J tolExT SP) Attenuator ‘Spectrum mivotmeter | SS S060 03 analyzer BF power meter ‘Speaker 200 W502 + [MICROPHONE] connector (front view) ‘Standard sonal Tudo generator generator Connect pins 3 and 4 3/ tau) |CAUTION: for AF output 7 DO NOT connect the Sona generator vie ranemting. DC power supply] 10 DC power receptacle is 6 VOR (0¢ 136 ¥) ‘ann iemzo0PRO to MICROPHONE} 4-2 PLL ADJUSTMENTS "ADJUSTMENT MEASUREMENT ADJUSTMENT | ADJUSTMENT CONDITION VALUE Eoam UNIT | LOCATION uniT_[absust| REFERENCE] 1|- Display Wrequency 7.9909 MHz | PLL [Connect a digtal/32V PLL | 3089 Loop Lock | | - Mode HBE mutimeter or oscio- VOLTAGE + Receiving ‘009e to check point 2 | Display requency 0.0800 MHz Es [More than 1.5 V Verity IMAIN LOOP | +|- Display frequency 0.5000 MHz | PLL |Gonnect a digitall40V PLL 3024 Lock vouT- | | Receiving rultimeter or oscilo-| Jace scope to check point 113006. 2 |= Display Trequency = 29.0008 MHz Mors than 10V REFERENCE | 1 | Wat for 5 min. alter power ON. | PLL [Connect an RF vol-| Maximum level PLL FREQUENGY| |- Terminate P3002 to ground with a meter to check point] (More than +2 dBm) 50 0 resister. P3002. + Receiving 2 [Connect @ Frequency | 60:000000 MHz 13008 Jcounter to check point Pao. + MAIN AND PLL UNITS (©3049 Reference loop lock voltage adjustment 133004 Reterence oop lock vot check point 3005 Main loop o al 7 SANTI Te P9002 Reterence frequency check point L303 | frequency 113004) Reterence {C3008 } @dusiment 4-3 TRANSMITTER ADJUSTMENTS "ADJUSTMENT MEASUREMENT ADJUSTMENT | ADJUSTMENT CONDITION VALUE FONT: UNIT | LOCATION UNIT_[ADJUST| OLING GUR-| + | Display frequency = 122000MHz| PA |Gut the lead wire| 100 mA PA | Ra0ze IRENT + mode BE (W011) and connect |For drive ‘Apply no audio signel to the ‘a. DC ammeter (1 A) transistors) [MICROPHONE] connector. to the cut points + Transmiting “After adjustment, re-slder the lead wire (W011). (For tinal [2 | Display trequency : 122800 MHtz| PA [Unsolder Ra026 and] 500 mA PA | Ra026 lransisiors) | |+ mode ASE connect the DC| Apply no audio signal to the Jammeter (8 A) tothe IMICROPHONE} connector. unsoldered points, + Transmiting ‘Ater adjustment, re-soider R4026, licapc 1 |- Display requency :22.0000 MHz] Rear [Connect a 0G]S0A PA] Ra031 Mode JE Panel [ammeter (60 A) + Preset R031 on the PA unit tothe between the 0G! maximum counterclockwise posi Power supply and DC tion power receptacle /-Connect @ dummy load (10 A) (OC input between lead of 24035 (power ine) ‘and EP4009 (power ground) on the Paunit. + Connect an audio generator to the [MICROPHONE] connector and set as: Frequency 31.6 kHz Level 2100 mV rms + Connect an RF power moter tothe [ANT] connector. + Transmiting ‘After adjustment, remove the dunnmy load, Jswn DETEC-| 1 |= Display trequency 22.0000 MHz] Roar [Connect an AF[140W ‘Audio | Output Hror + Mode HE Panel |power meter to the jaenera-| level ‘Ground the lead of R645 on the TANT] connector. tor MAIN unit witha wir. 2 |+ Connect an audio generator to the| MAIN’ [Connect a DO volt-| Minimum Tovel FILTER | Ca392 [MICROPHONE] connector and set moter to R150. Frequency: 1.5 kHz “Transmiting ‘After adjustment, remove the wire from F545. frransmit | 1+ Display irequency : 12.2300 MHz] Rear [Connect an RF[Maximum output power| MAIN | Adjust in PEAK + Mode JE Panel |power meter to the sequence| + Ground the lead of R545 on the TANT) connector. 9, 188, MAIN unit witha wire. 5, 164, + Connect an audio generator to the so [MICROPHONE] connector and set as: Frequency: 1.5 kHz Level 3mv + Transmiting ‘Alter adjustment, remove the wie from RBAS: + PAAND FILTER BOARDS: ICAPC check point 4022 ing current orale transistors aqustment 4025 tang cron (for final transist W011 ting curoot Sgvsment or dive vansistors checkpoint el nee fe ie J ry vo wt 1 cs Cl — yp ©4392 SWR detector 4026 ‘ing current [I (for final transistors) Ig) adjustment. aaa if 8 IC APC 7 reparaten ag et Obes @ <_ 0.8 dumeny} iy ureter A ons 4031 IC APC adjustment + MAIN UNIT R150. swA detector check point R545 SWR detector ‘transmit peak reparation “Transm peak | tO adustment 1 | lea TRANSMITTER ADJUSTMENTS (continued) ‘ADJUSTMENT ADJUSTMENT | ADJUSTMENT CONDITION MEASUREMENT VALUE PORT UNIT | LOCATION unit [ADJUST| FrmaNswir | 1|-Display Fequency = 12.2800 MHz | Rear [Connect an RF|140W MAIN | RIBe Gan + mode AIA Panel |power meter to te| + Tranemiting [ANT] connector. 2 | Display Fequency 1 163650MHz | MAIN [Connect a dgiallO5V R26 + Transmiting muttimete to R159, Joureut | +|- Display frequency : 12.2800 MHz | Rear [Connect an RF|45W MAIN | R2iT POWER + Mode HOE Panel power meter to the| Apply no audio ‘signal to the TANT] connector [MICROPHONE] connector Transmiting 2 | Mode 7 RSE ow rai + Transmiting 3 | Mode aA 140 W Ries “Transmiting IGARRIEA [7] Display frequency : 122300 MHz | Rear [Connect a specium|Minimam carior tevel| MAIN | Adjust jsuPPREssion| | Mode HNGE Panel analyzer or RF vot-| (Less than ~40 48) atomatey Apply no audio signal to the meter to the (ANT) R236, {MICROPHONE} connector connector via an: R239 “Transmiting attenuator. FrONE T= Display kequency = 122800 MHz | Fear [Connect an AF/1OW MAIN | F205 PoweR * Ground the lead of L108 (KEY | Panel power meter to the fine) on the MAIN unit with a wie. TANT, connector. + Transmiting PoweR [7 | While pushing the (SOL) and [ENT]| Rear [Connect an AF[I7W ‘Audio | Output METER ‘witches, turn power ON. Panel |power meter to the’ genera-| level + Display frequency : 12.2300 MHz TANT] connector. tor + Mode SBE + Connect an aucio generator tothe [MICROPHONE] connector and set 2] as: Push the (DIMMER) | Font | (OMMER] Frequency: 1.6 kHz switch Panel Level 100 mv + Set the transmit power: (PO-1] 20 W Per) “Transmiting lac T= Display equency = 122800 MHz | MAIN |Gonnect_an_oscilo-|70 mV pew Toaie | 2070 lure + Mode JE scope to F243 + Disconnect BFO plug (5) on the MAIN uns. + Connect an audio generator tothe [MICROPHONE] connector and set Froquency : 1.5kHz Level 150m +“ Transmiting Mic GAIN [1 |= Display frequency : 122900 Mz | Rear [Connect an _AF[100W Logic | Ra06s + Mode SBE Panel |power meter to the ‘Connect an audio generator to the [ANT] connectr. [MICROPHONE] connector and set as: Frequency 1.6 kH Level 1omv + Transmiting + MAIN UNIT AND LOGIC BOARD R159 ‘Transmit gain cheek point Transmit (pag gain adjustment [R184 L108 Tune power preparation R205 Tune power adjustment Ries Rent | Somer Rata pz) suppression 238 J agjusiment 2066 Mic gain adjustment 2070 Mic miter adjustment 4-4 RECEIVER ADJUSTMENTS ‘ADJUSTMENT ENT ADJUSTMENT | ADJUSTMENT CONDITION ee VALUE POINT UNIT | LOCATION UNIT [ADJUST| RECEWER | 1 |= Display frequency 21820MHz | Rear [Connect an AC mil |Muximum output ievel | MAIN | Adjust in GAIN + Mode we Panel | voltmeter to the [EXT sequence! ‘Noise blanker — : OFF /SP] jack with a 40 74, U75, + Squelch OFF }dummy load 78, L79) + Speaker OFF 83, LB4, + AGC : ON Les, L92, + RF gain 19 Ls3 + R228 (MAIN unt): Max. clockwise + R257 (MAIN unit). : Max.counter clockwise R900 (MAIN unit) : Center + Connect a standard signal genera- tor to the (ANT] connector and set Frequency: 2.1815 MHz Level 105 pV" (113 dBm) modulation: OFF + Receiving [CLARITY | 1 |- While pushing the [SQL] and [OL]| Set the [CLARITY] contralto the center postion and | Front [CLARITY] switches, turn power ON, push the [DIMMER] switch, Panel ~ Display frequency Rear [Connect an AC mili-] 1.0. Front_| [VOLUME] + Mode 2 d3E Panel_ | voltmeter tothe (EXT| Panel + Connect a standard signal gonera-| SPJ jack with a 40 tor to the (ANT] connector and set [dummy toad. as: [TOTAL GAIN Frequency: 12.2318 MHz Level 10.32 mv" (87 Bm) modulation: OFF + Receiving 2 | Set the signal generator lo OFF (n0] 30 48 (32 mV) MAIN | R223 output), [METER | 1|-Whie pushing the (SQL) and [T|Functon | SIRF meter Push the [DIMMER] | Font |[OIMMER] ONLY] switchs, turn power ON. | alsplay swith, Panel + Display trequency : 12.2800 MHz + Mode WBE 2|+ Connect a standard signal genera- Tih dot just appears Verily for to the [ANT] connector and set while pushing the as: [DIMMER]. "Frequency: 12.2315 MHz Level mv" = (-47 cam) + Receiving INOISE ~ Display frequency : 12.2300 MHz | MAIN [Connect an oscllo-| Adjust the maximum| MAIN | L8O, LBt IBLANKER, + Mode 2uBE scope to RSS, noise wave displayed + Connect a standard signal genera- Jon the oscitoscope. tor to the [ANT] connector and set Frequency: 12.2318 MHz Level 32 pv" (-87 dBm) ‘Add the following signal into the signal generator output LI “This output level ofthe standard signal generator (SSG) is indicated as SSG's open circu, + Receiving 4-8 + MAIN UNIT Noise bianker{L80 agusmen {ig L59 Noise blanker ‘check point L74 79 Receiver gain] C78 agjusiment |U83 Les R223. Total gain adjustment 4-9 SECTION 5 PARTS LIST [FRONT UNIT] [LOGIC BOARD] REF | ORDER REF | ORDER Rar | ORDE DESCRIPTION Radon DESCRIPTION 2007 | 500005880 CABLE ‘Pose fraor2 |osooosat0| SRESISTOR —_ AKTSKAI 1 wa h2e08 | ssccoossso | cab. oPo-s22 fR20'3 |Yoso006830|SAESISTOR —FRTSK2AL47 Ka Wwas0e | sao000s870 | CABLE oPe24 fRoove |Tosocosai0| SAESISTOR —FATSK2AL 47 kt w2610 | 200005880 | CABLE P0522 fronts | 7oso00e680|/SAESISTOR — FRTOK2AN 1 kat we | eoccoassso | caste opo-z2 rane | Tosoo0ees0| SRESISTOR — FRTSR2AI 1 iat 22017 | 7020006860|SRESISTOR AK7SK2AL 1004s. fr2o%a | 7osn006600|SRESISTOR —AKTSKIAJ1 KS. [s2a01 | 2260002270 | swrrcx sPz2120.0101 (Tv3) fr2019 | 7020006880|SRESISTOR —AK/SK2AL 470 ka. franzo | oa0006870| S RESISTOR AKTSK2AL 2202. raves | 7os0006670| S RESISTOR AKTSK2AL 2202. [seeeos|astoco0e7:| SPEAKER F77G00-6205 france | 0006860| S.RESISTOR —AKTSK2A! 10042. fr2na9 | 7spo06680|S-RESISTOR —AKTSK2AL 7 KS. 2040 | 7030006620] RESISTOR AKTSK2AL 39K. lws: |esoonseo70] mower —_sx0as peanvFR raves |7030006750|S.RESISTOR — AKTSK2AI4.7 WAL }ws2 |esoonssoao| w.oTHER —_-Sxzo86 P2802FF f2ve2 | 7090006690) S.RESISTOR — AK/SK2AL 47 Ka. 2043 | 7090006780) S.AESISTOR — AK7SK2AI 5 ka. 202s | 7020006780|S.RESISTOR — AKTIK2AI 10%. 2045 | 7090006760/SAESIGTOR —AK7SK2AI 10K 2026 | 7030006780|SAESISTOR —AK7SK2AL 10K 2047 | 7090007030] SRESISTOR AK/SK2AS Ka [LOGIC BOARD] }r2048 |7030006690|S.RESISTOR — AKTSK2AL tke 2029 | 7030006690) SAESISTOR — AKISK2AI 47 Ka No. | ONO DESCRIPTION 0ss | 70;0006680| RESISTOR -ROLGXJ47 2 R20ss |7030006780|/SAESISTOR —RKTSK2AL 10 ko 12001 | 40006590 [S16 HOSSBEDAADEF 2056 | 7010006840 SAESISTOR —KTSMZAJ 1. iczone | 40008130 | S16 HOB6100. 2057 |7030006690| SAESISTOR —PKTSKZAL 1 kat 2003 |: 10001680 | $16 ‘S8054ALBAMT 2058 | 7010006670] RESISTOR RDISKJ3.3.0 iczons | 8000480 |S.16 pPCTALOST }:2059 | 7030008750 |S.RESISTOR — BKTOKZAS47 1. 12008 | 80001400 | S16 npCraLosT }a2080 | Toxoo086%0|SRESISTOR —AKTSK2AN 1000 ic2007 | 1110009060 fic pPcr2siH fRooss | 7os00066«0|SAESISTOR —AKTIK2AN 100.0 ic2008 | 10003910 | S10 Nanas (11) feeose |7os0006720|SRESISTOR — RKTOKZAJIA0 fr2oss | 7o20006660|SAESISTOR AKTSK2AS 2200 fe206s | 70000850|SRESISTOR — AKTSKZAJ 2K. Ja2ooe | rssocos410] TRANSISTOR 2501625 Us 2085 | o0006860) SFESISTOR —AKTSK2AI 100k. Ja2o0s | 1s20000720| TRANSISTOR 2881015 ¥ 2065 7510008240 TRIMMER KVSFOGOA 104. [c20os | iss0003410| s.TRANSISTOR 25C1625 Ls }r2067 |7030006810|SRESISTOR —RKTSKDAI 22K. Ja2oos | 1sso0ns410| STRANSISTOR 2501625 16 }r2083 7030006840) SRESISTOR —AKTSKOAI 6B KO. [G2oor | iss00n2250| TRANSISTOR OTCHIEK Tra7 fr20ea | ano06600| S RESISTOR —AKTIK2AI 1 kit la2o0e | se00n2250|S:TRANSISTOR OTCHI4EK Tia7 2070 | 7810004230] TRIMMER KVSFB0A 1004S. [c2009 | ssoonse10| "TRANSISTOR 2sC1623 Ls 2071 |7030006760|SRESISTOR — RKTSK2AI 47 fazor0 | scoo00s40|S:TRANSISTOR 2sD14482-71 2072 | 7as0o06e80| SRESISTOR — AKSK2AI 690.0 focoit |:so00n2250|S:TRANSISTOR OTCIIAEK Ti47 207s | 7020006670) SRESISTOR — AKTSKDAL 470.0 fo20%e | sso00n22s0|S TRANSISTOR —OTCH MEK Tia7 207s | 7a90006690|S.RESISTOR — AKTSK2AI 47 Ja20%3 | se00n2250|S:TRANSISTOR OTCIIMEK Tia7 2077 | 7000008600) S-RESSTOR —AKTSK2AL 18 kA 207s | 7090006780) SAESISTOR — AKTSKDAI 10 KO fRa0re | 7as0006600|SAESIGTOR — AKTOK2AI 18 xO e200: | s750000800 |. o10De 185188 (ESSA) }R20e0 |7030006780| SAESISTOR —RKTEKOAJ 10k2 Fozoae | 17300n2800|S ZENER Ro. iMT2— 2081 | 7030008800 /S.AESISTOR —AKTSK2AI 18 KO }>2003 | 1750000800] s DIODE 185154 (TEB5A) fR20g2 | 7020006780/SAESISTOR —AK/SK2AI 10K2 }o200s | 17so000800 |S DIODE 155184 (TEB5A) Rane | 7020008600/S.AESISTOR —AKTIKZAL 162 }o2005 | 17s0000800 | §. 0100 155184 (TEB5) anes | 70s0005600/SAESISTOR —AK/SKZAI 182 }>2008 | 1750000800 | §. 01006 185464 (TEBE) 2085 |7030005800|S.AESISTOR — RKTOKZAI 47 ka pacar | +7s0000800 | §.BIODE 188184 (TESSA) 2086 | 7020008810 SAESISTOR —AKTOK2AJ 22 ko Davos | 1750000800 /s D100 185184 (TEB6R) }22087 | 7090006700 |SRESISTOR — AKTIK2AY 19H. }b2009 | 1750000800 |S DIODE 135184 (TEBE) JR2osa | 7030006890 |S.AESISTOR —RKTSK2AI 47H. p2ct0 | 1750000800 | s.D:00 135184 (TEBER) iczooe | aos011420|s.cenAWic GMO B 472K SOPT }x2001 | sosooo0s:0| xTaL crsi3 (C2003 4030011420 |S.CERAMIC —_GRNeOB 472K SOPT [C2008 | ans0011420 S.CERAWIC GAMO B 472K SOPT (C2005 | a090011490|S.CeRaNC — GAMAd CH 1209 OPT 1.2002 |e9:0000420] con BLOIAN-AG2-001 (C2005 | <030011490|S.CERANIC — GAMAO CH 120) S0PT 2008. |9x0009490] con BBLOTRNT-AS2-001 [C2o0r | s030011430/SCERAMIC GMO B 103K SOPT 2008 | 200004840 | S con. Nuszas22T-1010 [C2008 | 1510008060) ELECTROLYTIC. GYKIHe2NJ TP. 2008. | 910009430 | Con BLOTAN'-A62-001 [2009 | ana0011420|S.CeRAMIC GAMA B 100K SOPT 2008 | 200002840 | s:co1. NLg2as227-1010, fc2or2 | asrooosse0| ELECTROLYTIC UVXIEARTM OA L2007 |ezoo00%8«0| s.coiL NLSeas227-1014 Jc2ora | sn20011«20|SceRAMIC | GRMAOB 472K soPT 2008 |s20000%8c0| s.coit NUszasoor-1010 Jcovie |ans0011«20|SceRaMic GAMA) 8 472K s0PT 2000 [200004840 | s:Co1L NUseaszeT40N - SCERAMC GAMO 472« SOPT SCERAMC — GAMOB 472K SOPT Jc2017 |aozoorr420 |SceRamc —GRMMO6 472K sO>T freocs |7o90005790|SRESISTOR — AKTIK2AL 15402 Icz0%e |sos0011420 |S.ceRAMIC —_GRMadB 472K SOT 2005 | 7030005710|SRESISTOR —AK7SK2AI 15 AO. Ic20%9 | osoor1420 |SceRAwiG —_GRMOB 472K SOPT 2007 | 7030008720 |SRESISTOR — AK7SK2AJ27 Ka [Goaa0 |asiooots70 [ELecTROWTIC UVRICIO2M PA }r2c09 | 7030008890 | SRESISTOR —AKTOK2AI 47 a. Icaoes |sozo0r1420 |SceRAMIC | GRMAOB 472K sOPT ocr |7030008800| SESISTOR —AK7SK2A) 47 a0. [Gea22 | astoooseso [ELECTRoWnC UPFICA7IM PH ‘S-Surlace mount [LOGIC BOARD) [LOGIC BOARD} REF | ORDER REF | ORDER madlioan DESCRIPTION REF | ORDE DESCRIPTION [San0s |sna00%1486) SCERAWNG _— GFONOB 03K S0PT fst | ec00036000| CABLE ‘S006 PERO AOTALD Geos |ssroo00s%0| ELECTROLYTIC UvXICATOM OA fsa | se00036100| Caste ‘Sra008 Paveoae00s.0 [S2o0s |ssroncesdo| ELECTROLYTIC. UVRICIOIM DA ss saronzat2| CABLE 'SX1652 J LEAD SET (17LO [Seoae |ssroo0es%0| ELECTROLYTIC. UvXIC47OM OA [Sacer |snsoorre20| SCERANNC GRONcO 8 472K SOPT ceaes |asioooesco| euectrowrnc UvxiezzoM Oa ean ooso01sos| Poo aasce ones |asiooneseo| ELECTROLYTIC. Uvx\e220M DA fePeo0d soves20re0| TUBE IRRAK 07 20 men JS2000 |saea0t1«20| ScenaMc Grasso 472K soPT Geos |ssronnce7o| ELECTROLYTIC. UVXiHoROM DA Sees |ssraooeeoo| ELECTROLYTIC. UvXMO%0M OA JSeese |ssrooneeao| ELECTROLYTIC UvXIMO%0M DA ease |asiooneeo| ELECTROLYTIC UVKIEARPM DA eaas |éstoogeseo| ELECTROLYTIC UVKIEMRPM DA cose |asioomsan| eLecTROLnC Uvxtca7OM OA \Geosr |siooosse| ELECTROLYTIC UVKIEaarM OA [SENSOR1 BOARD] {G2088 |HENSGT-16F-0KB-1680 Seoco |zesnaceeso| SWITCH S168 (Sara) oes |2asnnnzaso| SWITCH W168 (SxrHPM) sanze | asoozzeo| swircn Sh. ts8 (oxrtPa oso: |esroorerzo| connecrToR —onFe-eT sanzs |eooozzen| switcr Sits (eta) seoee |zesnanzzeo| SmITcH Shs (Sera) seo |zzsnonezeo| SWITCH W.168 (Sx-HPM) rau oron.ca] Poo 2679 Seo |2asonnzaeo| SWITCH SW.156 (SKHPN) seazr [easoozzeo| swmron SW (SKHPN) .2007 est00%6670] CONNECTOR © eoaB EHS js2008 |6510018730] CONNECTOR —«10FE-BT [R2 BOARD) coos Jesiootera0| CONNECTOR —OSFE-ST \se0%0 fest00%8720| CONNECTOR OGFE-ST nod Ronee DESCRIPTION pots féstaoter20| CONNECTOR —OBFEST Lore Jesiooie7a0] CONNECTOR — OGFE-ST esos | rvcore7e] VARIABLE Poon TeF-TOHB-1692 Leora [estoniario|connecton res 92¢ Hears festontario| connecton TBs 52F .2s0r | esraorereo connecTon —oare-8t wore {roaoooroi] suMPER —_MCRIOEZHI JPW vars |rosoooro| SauMPER —— MGRIDEZHI Jew sor] orrooease| Po sone ors |Poaoooroo| SauMPER —— MCRIDEZ Jew waots |roasnoro%o| SauMPER RIDE JPW wane |razoooro| S2uMPeR —-MERIDEZAI JPW woes |ri2ao000%0| JUMPER PW O2A L ‘S=Surlace mount [MIG BOARD] [MAIN UNIT] REF] ORDER REF | ORDER, eed hres DESCRIPTION ae oe DESCRIPTION fa 6510002210] CONNECTOR aAS-SHAWTAUTA Faro | 1590000660] S TRANSISTOR OToTTaEUATIOB {izace | s5i00te720) CONNECTOR 10FEBT favi | 130002660] S TRANSISTOR 2504116-GR (TEESFY fai2 | 1s90000660| TRANSISTOR OTCTT4EUA TICE, Jo13 | 00000660] 5 TRANSISTOR CTETTaEUATIOS P2301] 0910044821} Pos 8.45054 Joss | tso000t320| STRANSISTOR OTATT4EUATIO5 fois | :ssoon2600| STRANSISTOR 25CsT16-GR (TERSA Joss | tsoon00se0| S-TRANSISTOR —OTOHAEUATIO6 fose | issoonzee0| STRANSISTOR 25C8116-GR (TEBSA loss | tesono0440| STRANSISTOR 2501619-770 Joss | tseoc00080| STRANSISTOR OTOHTAEUA IO8 [MAIN UNIT] Jase | tssonn0ee0| STRANSISTOR —DTCHAEUa 06 fasr | issoonzes0] STRANSISTOR 2508116-GR (TEBEA re | Oar DESCRIPTION Joss | 1530003000] STRANSISTOR —2$036475-T0 fasa | issoo02e90| STRANSISTOR 250s116-GR (rEasAD ics | rseo0001s0| 16 “TORRTESAF TH fos0 | issooozeco| Stransisron 2scstte.Gn (teas) ics | r80000130] 516 TOERTBGAF (TP) Jost | is4ooo0840| S TRANSISTOR 250t619-770 168 180000130) 5.16 TERTESAF TP) Jose | ts4ooo08e0| S TRANSISTOR 2501619-770 res | tvopostao| 1c Uareon Joss | isso002600] S TRANSISTOR | 2504116.GR (TEBBAY ics | rto009960| S16 vPCIOGTORET (MS) Jo65 | is90000860] S TRANSISTOR. DTOnseuATIO9 exo | Hv000s360) S16 HPCIOS7GR-ET MS) Jo55 | iso0o006e0] S TRANSISTOR OTCIHaeUATIO5 cw | isoonre%0| S16 bpoworrses foro | isso002680] S TRANSISTOR _2504116-0R (TEASFY fe12_ | raooooea0] S16 Tawooe (120 Jari | ts90001300| TRANSISTOR OTATI4EUATIO6 1616 | sr0000960| Sc Naas far2 | tsso0008c| STRANSISTOR OTCrIsEUA TION ctr | s110000860| $16 Nowassaner Jars | iss0001300| STRANSISTOR —OTATT4EUAT1O6 ore | s1000086| §1¢ Nansen fore | isso002820] TRANSISTOR 25¢4116-GR (TEBBA) cio | s1o0se0| S16 ruwassentT! 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