Honor 9 Lite PDF SCHEMATIC
Honor 9 Lite PDF SCHEMATIC
Diagram
Schematic
1 2 3 4 5 6
MODEM Schematic
Baseband Schematic 31. RF Interface
32. RF Transceiver
1. Contents
A 33. APT Power
2. Block Diagramm
34. Primary ASM A
3. SOC PWR1
35. RF Switch
4. SOC PWR2
36. MMPA
5. SOC PWR3
37. Matching Circuit of MMPA
6. SOC HS Interface 38. Reserved
7.
8.
SOC GPIO Interface
SOC RF Interface
o m
39. TRX_B1/2/3/4 TRX/G1900 RX
40. TRX_B3/7/20_CA
9.
10.
SOC GND
PMU LDO
. c
41/42/43. Reserved
44. TRX_B5/6/19/8
B
11.
12.
PMU BUCK/Codec
PMU MISC
c h 45. TRX_B12/17/20/28
46. PRX_G1800/G850/G900 B
13.
14.
15.
HI6422
eMCP
Battery and USB Te 47. TRX_B38/40
48. TRX_B7
16. Scharger and LCD Power
1 49. Reserved
li e
50. Diversity_ASM
17. LCD/TP Interface
51. DRX_B7
18. DPS_ALS
19.
20.
21.
Flash LED
Camera Interface
ISP Reserved o b 52. DRX_B3/7/20_CA
53. DRX_B38/40/2
54. DRX_B1/3/4
.M
C 55. DRX_B5/6/19/20/8
22. Codec Reserved
56. DRX_B12/17/28 C
23. Audio RCV/MIC
24. Headphone
w 57/58/59. Reserved
60. HI1102_DCDC
25.
26. X-Sensor1 w
Audio Smart PA Reserved 61. HI1102 RF
27.
28.
29.
NFC Reserved
SIM/SD Card
FPC Interface
w 62. HI1102 BB
63. HI1102 POWR
67. ANTENNA Match
D
30. Test Point/Shielding
D
1 2 3 4 5 6
1 2 3 4 5 6
2. Block Diagramm
A
A
om
.c
B
c h B
Te
e 1
i l
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
3. SOC PWR1
A
A
o m
10u
10u
10u
c
U300
ALL PDN CAPs MUST CLOSE TO SOC
.
C320
C321
C322
HI6250V100
CPU BIG CPU LITTLE
VDD_CPU_B E13 P13 VDD_CPU_L
VDD_CPU_B_1 VDD_CPU_L_1
h
E14 VDD_CPU_B_2 VDD_CPU_L_2 P15
PWR1 interface 1 of 11
10u
10u
10u
10u
10u
10u
G13 VDD_CPU_B_3 VDD_CPU_L_3 R12
c
H15 R15
4
C309 C306 VDD_CPU_B_5 VDD_CPU_L_5
1 3 1 3 1 3
H17 R16
B
4
VDD_CPU_B_6 VDD_CPU_L_6
C313
C312
C311
C318
C314
C315
1 3 1 3 J12 T14
2
VDD_CPU_B_7 VDD_CPU_L_7 4.3U
J14 T16 SG303 0_DNI 4.3U 4.3U
e
2
G
VDD_CPU_B_9 VDD_CPU_L_9 S
K15 VDD_CPU_B_10 VDD_CPU_L_10 U14
K16 U16 SG304 0_DNI
T
VDD_CPU_B_11 VDD_CPU_L_11
L12 VSS_CPU_L_REMOTE
G
C310 C305 L13
VDD_CPU_B_12
GPU
S
4
VDD_CPU_B_13
1 3 1 3 M13 VDD_CPU_B_14 VDD_GPU_1 H8 VDD_GPU
1
M15 J10
2
10u
10u
10u
M16 VDD_CPU_B_16 VDD_GPU_3 J11
K9 VDD_GPU_REMOTE
G
VDD_GPU_4 S
C302 C301 C308
e
L10
4
VDD_GPU_5
L11 SG306 0_DNI 1 3 1 3 1 3
VDD_GPU_6
C319
C316
C317
K17 M9 VSS_GPU_REMOTE
2
VDD_CPU_B_T VDD_GPU_7 S
N9 4.3U 4.3U 4.3U
i
VDD_GPU_8
L17 VSS_CPU_B_T VDD_GPU_9 N11
VDD_GPU_10 P9
VDD_CPU_B_REMOTE SG301 0_DNI P11
S
S VDD_GPU_11
b
VDD_GPU_T R10
VSS_CPU_B_REMOTE SG302 0_DNI
S
S
R11
o
VSS_GPU_T
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
4. SOC PWR2
A
A
U300
HI6250V100
DDRPHY IO POWER
VDD12_DDR Y27 VDD12_DDR_1 VDD18_IO_1 H23 VOUT2_1V8
Y28 VDD12_DDR_2 VDD18_IO_2 H25
m
T27 VDD12_DDR_3 VDD18_IO_3 H26
U27 VDD12_DDR_4 VDD18_IO_4 J27
1U
1U
1U
1U
1U
1U
10u
V27 F8
C402 C448 C449 C450 VDD12_DDR_5 VDD18_IO_5
o
4 V28 F11
4
VDD12_DDR_6 VDD18_IO_6
1 3 1 3 1 3 1 3 M27 VDD12_DDR_7 VDD18_IO_7 J6
C432
C430
C431
C428
C429
C427
M28 M6
2
2
C405
VDD12_DDR_8 VDD18_IO_8
4.3U 4.3U 4.3U 4.3U M29 P7
c
VDD12_DDR_9 VDD18_IO_9
P27 VDD12_DDR_10 VDD18_IO_10 AB9
.
K27 VDD12_DDR_11 VDD18_IO_11 AC11
K28 VDD12_DDR_12 VDD18_IO_12 AC12
PWR2 interface 2 of 11
VDD18_IO_13 AB17
DDRPHY_PLL VDD18_IO_14 AB18
h
VOUT5_1V8 R27 AVDD18_PLL_DDR VDD18_IO_15 AB24
VDD18_IO_16 AB26
C410 1U
B MIPI VDD18_IO_17 AB28
c
J21 AVDD18_CSI_1 VDD18_IO_18 AC19
1U
J22 AVDD18_CSI_2 VDD18_IO_19 AC20
AC22 C447 B
4
VDD18_IO_20
H19 AC24 1 3
e
AVDD18_DSI VDD18_IO_21
C403
C454 1U
2
PERI VDD18_IO_22 AC25 4.3U
P20 AC26
T
AVDD18_PLL_PERI VDD18_IO_23
VDD08_PERI R21 SYS
AVDD08_PLL_PERI
VOUT0_0V8
10P
VDD08_SYS_1 U24
1
1U
1U
1U
1U
1U
1U
U8 VDD08_ABB_1 VDD08_SYS_3 W24
Y8 VDD08_ABB_2 VDD08_SYS_4 Y25
C411
C413
C451
e
VDD08_SYS_5 AA24
C406
C455
C407
C408
C452 10P V6 AVDD18_ABB_1 VDD08_SYS_6 AB20
il
Y6 AVDD18_ABB_2 VDD08_SYS_7 AB22
AA6 AVDD18_ABB_3 VDD08_SYS_8 M17 C409 1U
AB6 AVDD18_ABB_4
VOUT5_1V8 R7 AVDD18_ABB_CLK SYS PLL
C417 10p T24
AVDD08_PLL_SYS
b
EMMC
VDD08_PERI Place these two Caps around the pins. AD27 VDD08_EMMC_DLL AVDD18_PLL_SYS R25 VOUT8_1V8
USB SDCARD IO
o
H18 AB15 VOUT9_1V8/2V95
VDD08_USB VDD1830_SD
VOUT5_1V8 F18 AVDD18_USB
SIM IO
VOUT10_3V2 G17 AC14 VOUT11_1V8/2V95
AVDD33_USB VDD1830_USIM0
.M
EFUSE VDD1830_USIM1 AC13 VOUT12_1V8/2V95
VOUT21_1V8
C H20 VDD18_EFUSE_SYS
4.7u
4.7u
100n
C
1U
1U
1U
1U
1U
1U
1U
w
C418
C424
C415
C422
C423
C445
C441
C442
C436
C434
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
5. SOC PWR3
A
A
U300
HI6250V100
m
PERI PERI
H9 VDD08_PERI_1 VDD08_PERI_44 U18
H12 VDD08_PERI_2 VDD08_PERI_45 U20
o
H27 VDD08_PERI_3 VDD08_PERI_46 U22
J7 VDD08_PERI_4 VDD08_PERI_47 V9
J18 VDD08_PERI_5 VDD08_PERI_48 V11
J20 V13
c
VDD08_PERI_6 VDD08_PERI_49
J24 VDD08_PERI_7 VDD08_PERI_50 V15
.
J26 VDD08_PERI_8 VDD08_PERI_51 V17
K19 VDD08_PERI_9 VDD08_PERI_52 V19
PWR2 interface 3 of 11
K21 VDD08_PERI_10 VDD08_PERI_53 V21
K23 VDD08_PERI_11 VDD08_PERI_54 V23
h
VDD08_PERI K25 VDD08_PERI_12 VDD08_PERI_55 W10 VDD08_PERI
L7 VDD08_PERI_13 VDD08_PERI_56 W12
c
L20 VDD08_PERI_15 VDD08_PERI_58 W16
10u
10u
1u
1u
1U
1u
1U
1U
1U
L24 VDD08_PERI_17 VDD08_PERI_60 W20
L26 W22
e
VDD08_PERI_18 VDD08_PERI_61
4 4
4 4
4 4
M19 Y9
C506 VDD08_PERI_19 VDD08_PERI_62
C507 C504
C511
C522
C519
C515
C513
C512
C503
C505
C502
C501
M21 VDD08_PERI_20 VDD08_PERI_63 Y11
1 1 3 3 M23 Y13 1 1 3 3 1 1 3 3
T
VDD08_PERI_21 VDD08_PERI_64
M25 Y15
2
VDD08_PERI_22 VDD08_PERI_65
4.3U N7 VDD08_PERI_23 VDD08_PERI_66 Y17
4.3U
2
N13 VDD08_PERI_24 VDD08_PERI_67 Y19 4.3U
1
N14 VDD08_PERI_25 VDD08_PERI_68 Y21
N16 VDD08_PERI_26 VDD08_PERI_69 Y23
N18 VDD08_PERI_27 VDD08_PERI_70 AA10
e
N20 VDD08_PERI_28 VDD08_PERI_71 AA12
N22 VDD08_PERI_29 VDD08_PERI_72 AA14
l
N24 VDD08_PERI_30 VDD08_PERI_73 AA16
P19 AA18
i
VDD08_PERI_31 VDD08_PERI_74
P23 VDD08_PERI_32 VDD08_PERI_75 AA20
P25 VDD08_PERI_33 VDD08_PERI_76 AA22
P26 VDD08_PERI_34 VDD08_PERI_77 AB8
b
R18 VDD08_PERI_35 VDD08_PERI_78 AB11
R22 VDD08_PERI_36 VDD08_PERI_79 AB13
R24 VDD08_PERI_37 VDD08_PERI_80 U26
T9 W26
o
VDD08_PERI_38 VDD08_PERI_81
T11 VDD08_PERI_39 VDD08_PERI_82 AA26
T17 VDD08_PERI_40 VDD08_PERI_83 AB27
.M
VDD08_PERI_43
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
6. SOC HS Interface
U300
A HI6250V100
DDR_CA0 J34 DDR_CA0
DDR DDR
DDR_DQ0 R34 DDR_DQ0 A
DDR_CA1 J32 R31 DDR_DQ1
DDR_CA1 DDR_DQ1
DDR_CA2 H34 T33 DDR_DQ2
DDR_CA2 DDR_DQ2
DDR_CA3 J33 U33 DDR_DQ3
DDR_CA3 DDR_DQ3
DDR_CA4 K32 R33 DDR_DQ4
DDR_CA4 DDR_DQ4
DDR_CA5 E32 U34 DDR_DQ5
DDR_CA5 DDR_DQ5
DDR interface 4 of 11
DDR_CA6 F34 T32 DDR_DQ6
DDR_CA6 DDR_DQ6
DDR_CA7 D33 V34 DDR_DQ7
DDR_CA7 DDR_DQ7
DDR_CA8 E34 W33 DDR_DQ8
DDR_CA8 DDR_DQ8
DDR_CA9 D32 AA34 DDR_DQ9
DDR_CA9 DDR_DQ9
AA33 DDR_DQ10
DDR_DQ10
DDR_CKE0 G33 Y34 DDR_DQ11
DDR_CKE0 DDR_DQ11
m
DDR_CKE1 F33 AC34 DDR_DQ12
DDR_CKE1 DDR_DQ12
AB33 DDR_DQ13
DDR_DQ13
DDR_CS0_N G32 AA32 DDR_DQ14
DDR_CS0N DDR_DQ14
DDR_CS1_N DDR_DQ15
o
H31 DDR_CS1N DDR_DQ15 AD34
M34 DDR_DQ16
DDR_DQ16
DDR_DQM0 U31 K33 DDR_DQ17
DDR_DM0 DDR_DQ17
DDR_DQM1 W32 L34 DDR_DQ18
c
DDR_DM1 DDR_DQ18
DDR_DQM2 P34 P33 DDR_DQ19
DDR_DM2 DDR_DQ19
DDR_DQM3 DDR_DQ20
.
AB32 DDR_DM3 DDR_DQ20 M33
L32 DDR_DQ21
DDR_DQ21
DDR_DQS0_N T29 M32 DDR_DQ22
DDR_DQS0C DDR_DQ22
DDR_DQS0_P T30 P32 DDR_DQ23
DDR_DQS0T DDR_DQ23
h
DDR_DQS1_N W29 AE33 DDR_DQ24
DDR_DQS1C DDR_DQ24
DDR_DQS1_P W30 AD33 DDR_DQ25
DDR_DQS1T DDR_DQ25
DDR_DQS2_N DDR_DQ26
B DDR_DQS2_P
P30 DDR_DQS2C DDR_DQ26 AD32
DDR_DQ27
c
P29 DDR_DQS2T DDR_DQ27 AF34
DDR_DQS3_N DDR_DQ28
DDR_DQS3_P
AA30
AA29
DDR_DQS3C
DDR_DQS3T
DDR_DQ28
DDR_DQ29
AD31
AC30 DDR_DQ29 B
AE31 DDR_DQ30
e
DDR_DQ30
VDD12_DDR R601 240 G30 AF33 DDR_DQ31
DDR_ZQ DDR_DQ31
K30 DDR_CLK_N
T
DDR_CKC
K29 DDR_CLK_P
DDR_CKT
e 1
U300
HI6250V100
i l
b
CSI DSI
CSI0_CLK_N C23 A15 DSI0_CLK_N
CSI0_CLK_N DSI0_CLK_N
CSI0_CLK_P C24 B15 DSI0_CLK_P
CSI0_CLK_P DSI0_CLK_P
CSI0_DATA0_N A24 C15 DSI0_DATA0_N
o
CSI0_DATA0_N DSI0_DATA0_N
HS interface 5 of 11
.M
CSI0_DATA2_P DSI0_DATA2_P
CSI0_DATA3_N C25 A18 DSI0_DATA3_N
CSI0_DATA3_N DSI0_DATA3_N
CSI0_DATA3_P DSI0_DATA3_P
C C26 CSI0_DATA3_P DSI0_DATA3_P A17
CSI1_CLK_N
CSI1_CLK_P
A21
A22
CSI1_CLK_N
CSI1_CLK_P
EMMC
EMMC_CLK AJ31 R602 0 EMMC_CLK C
CSI1_DATA0_N C19 AH32 EMMC_CMD
w
CSI1_DATA0_N EMMC_CMD
CSI1_DATA0_P D19 AJ32 R603 10K
CSI1_DATA0_P EMMC_CALIO
CSI1_DATA1_N B20 AH33
CSI1_DATA1_N EMMC_DLL_TEST
CSI1_DATA1_P A20 AJ30 EMMC_STRB
CSI1_DATA1_P EMMC_STRB
CSI1_DATA2_N D20 AH28 EMMC_DATA0
CSI1_DATA2_N EMMC_DATA0
w
CSI1_DATA2_P D21 AJ28 EMMC_DATA1
CSI1_DATA2_P EMMC_DATA1
CSI1_DATA3_N B21 AH29 EMMC_DATA2
CSI1_DATA3_N EMMC_DATA2
CSI1_DATA3_P B22 AG28 EMMC_DATA3
CSI1_DATA3_P EMMC_DATA3
AG29 EMMC_DATA4
EMMC_DATA4
USB AH30 EMMC_DATA5
w
EMMC_DATA5
SOC_USB_DN A13 AG30 EMMC_DATA6
USB_DM EMMC_DATA6
SOC_USB_DP A12 AH31 EMMC_DATA7
USB_DP EMMC_DATA7
C13 USB_ID EMMC_RST_N/GPIO_056 AH8
B13 USB_VBUS
B12 USB_REXT
200
R604
D
D
1 2 3 4 5 6
1 2 3 4 5 6
m
AG24 B28 GPIO_019_MCAM0_VCM_PWDN HI6250V100
GPIO_217/ISP_GPIO05_BKPWM ISP_GPIO02_MNTRB/GPIO_019
SPI2_DO I2S1_XCLK I2C AO SPI
AH24 D4 GPIO_020_LCD_RST_N I2C0_SCL AG25 E28 FP_SPI0_DI
GPIO_218/ISP_GPIO09_ENC ISP_GPIO06_FSYNC/GPIO_020 I2C0_SCL/GPIO_183 SPI0_DI/GPIO_048
I2C0_SDA FP_SPI0_DO
o
SPI2_CS_N I2S1_XFS AF25 I2C0_SDA/GPIO_184 SPI0_DO/GPIO_049 D29
GPIO_203_SIM_SD_DET AF15 A6 GPIO_021_LCD_TE0 I2C2_SCL AH23 D30 FP_SPI0_CLK
GPIO_219/ISP_GPIO07_ENA ISP_GPIO10_SBPWM/GPIO_021 I2C2_SCL/GPIO_187 SPI0_CLK/GPIO_050
I2C2_SDA AF23 F26 FP_SPI0_CS0_N
UART8_CTS_N/I2C6_SDA LCD_TE0 I2C2_SDA/GPIO_188 SPI0_CS0_N/GPIO_051
AD25 B27 L701 27N ISP_CCLK0_MCAM0 E5
c
GPIO_220/ISP_GPIO08_ENB ISP_CLK0/GPIO_022 SPI0_CS1_N/GPIO_052
UART8_RTS_N/I2C6_SCL ISP_CLK1/GPIO_023 B33 L702 27N ISP_CCLK1_SCAM0 I2C PERI UART5_RXD
L708 27N ISP_CCLK2_FCAM
.
AH26 GPIO_221/ISP_GPIO11 ISP_CLK2/GPIO_024 F23 C29 I2C3_SCL/GPIO_009 SPI0_CS2_N/GPIO_053 B8
A28 ISP_SCL0
UART8_RXD ISP_SCL0/GPIO_025 UART0_RTS_N UART5_TXD
AH25 A27 ISP_SDA0 C34 A7 GPIO_054_FLASH_STROBE
GPIO_222/ISP_GPIO12 ISP_SDA0/GPIO_026 I2C3_SDA/GPIO_010 SPI0_CS3_N/GPIO_054
F29 ISP_SCL1
UART8_TXD ISP_SCL1/GPIO_027 UART0_CTS_N UART5_CTS_N
h
F28 ISP_SDA1 I2C4_SCL AD9 A9 GPIO_055_TP_RST_N
ISP_SDA1/GPIO_028 I2C4_SCL/GPIO_037 GPIO_055/UART5_RTS_N
IO AO E25 I2C4_SDA AF8
ISP_SCL2/GPIO_029 I2C4_SDA/GPIO_038
B GPIO_176_PMU1_EN AD20 GPIO_176 I2C3_SCL * D3 I2C5_SCL/GPIO_039 SPI1_CLK/GPIO_011 A31 BF_PCM_DI
c
AE16 GPIO_177 ISP_SDA2/GPIO_030 F24
* H6 I2C5_SDA/GPIO_040 I2S1_DI
DS2 interface 8 of 11
BF_PCM_DO
AD23 CLK_OUT0/GPIO_179
I2C3_SDA/ONEWIRE
C711 3.9P USIM
SPI1_DI/GPIO_012
I2S1_DO
B30
B
DS1 interface 7 of 11
e
CLK_OUT1/GPIO_180 USIM0_CLK/GPIO_083 SPI1_DO/GPIO_013
AJ16 SYS_CLK USIM0_RST AH10
CLK_SYSTEM USIM0_RST/GPIO_084 I2S1_XCLK
LCD_CABC_PWM AH21 USIM0_DATA AH9 B31 BF_PCM_SYNC
BLPWM_CABC/GPIO_181 USIM0_DATA/GPIO_085 SPI1_CS_N/GPIO_014
LCD_CABC_PWM_BL AF20 AG18 CLK32_SYS USIM1_CLK AG10
T
BLPWM_BL/GPIO_182 CLK_SLEEP USIM1_CLK/GPIO_086 I2S1_XFS
USIM1_RST AF11 F5 GPIO_015_LCD_ID0
PWM_OUT0 USIM1_RST/GPIO_087 SPI1_CS1_N/GPIO_015
AH18 SYSCLK_EN USIM1_DATA AF10 C702 10P
SYSCLK_EN/GPIO_178 USIM1_DATA/GPIO_088
AH27 GPIO_185 SDIO0
1
AF24 GPIO_186/CODEC_SSI PMU IF UART SDIO0_CLK/GPIO_061 AJ13 R709 22 WL_SDIO_CLK
S2P_DI AH19 B2 PMU0_SSI E10 AF14 WL_SDIO_CMD
S2P_DI/GPIO_189 PMU0_SSI/GPIO_002 UART0_CTS_N/GPIO_036 SDIO0_CMD/GPIO_062
C2 PMU1_SSI GPIO_035_HI1102_PWRONAJ7 AH14 WL_SDIO_D0
SLIMBUS_CLK PMU1_SSI/GPIO_003 UART0_RTS_N/GPIO_035 SDIO0_DATA0/GPIO_063
PMU_HKADC_SSI
li e
S2P_DO AG19 S2P_DO/GPIO_190 PMU_HKADC_SSI/GPIO_080 AG6 D11 UART0_RXD/GPIO_033 SDIO0_DATA1/GPIO_064 AE14 WL_SDIO_D1
AH6 PMU_AUXDAC0_SSI D12 AJ12 WL_SDIO_D2
SLIMBUS_DATA PMU_AUXDAC0_SSI/GPIO_081 UART0_TXD/GPIO_034 SDIO0_DATA2/GPIO_065
S2P_CLKL703 47N AF19 D28 AH13 WL_SDIO_D3
S2P_CLK/GPIO_192 PMU_AUXDAC1_SSI UART1_CTS_N/GPIO_057 SDIO0_DATA3/GPIO_066
UART2_RXD PMU_AUXDAC1_SSI/GPIO_082 AH5 D27 UART1_RTS_N/GPIO_058
S2P_SYNC
L704 47N AE19 AE17 PMU_PER_EN GPIO_059_USB_MOS_CTRL E9 IO PERI
S2P_SYNC/GPIO_193 PMU_PER_EN UART1_RXD/GPIO_059
AH17 PMU_RSTOUT_N D8 C28 GPIO_016_GNSS_PWM_SYNC
UART2_TXD SYS_RSTIN_N UART1_TXD/GPIO_060 GPS_REF/GPIO_016/GPS_PWM
AG21 AF17 SOC_RST_PMU_N BFGN_UART_CTS D10 AG8 GPIO_031_FP_ID
GPIO_194/I2S2_DI PMU_RSTOUT_N UART3_CTS_N/GPIO_071 GPIO_031
b
AJ18 PMU0_INT BFGN_UART_RTS B10 AF7
UART2_CTS_N GPIO_191/PMU0_IRQ_N UART3_RTS_N/GPIO_072 GPIO_032
AJ21 AF18 PWR_HOLD BFGN_UART_RX C10 B9 OVP_OVLO_EN
GPIO_195/I2S2_DO GPIO_204/PWR_HOLD UART3_RXD/GPIO_073 GPIO_047
BFGN_UART_TX E11 AE8 GPIO_079_LCD_HWEN
UART2_RTS_N UART3_TXD/GPIO_074 PWM_OUT1/GPIO_079
AF21 BOOT CTRL GPIO_075_MCAM1_PWDN C31 B7
o
GPIO_196/I2S2_XCLK UART4_CTS_N/GPIO_075 GPIO_140/USB_DRV_VBUS
DMIC_CLK BOOT_MODE B6 R714 2.2K BOOT_MODE GPIO_076_MCAM1_RST B32 UART4_RTS_N/GPIO_076
AH20 GPIO_197/I2S2_XFS DFT_EN AH16 GPIO_077_LCD_ID1 C32 UART4_RXD/GPIO_077 SD CARD
GPIO_198_TP_INT AJ22 GPIO_198 TEST_MODE/GPIO_001 D5 GPIO_078_MIPISW_SEL C33 UART4_TXD/GPIO_078 SD_CLK/GPIO_041 AH12 R722 22 SD_CLK
GPIO_199_FP_INT AF22 GPIO_199 E4 UART6_CTS_N/GPIO_067 SD_CMD/GPIO_042 AF12 R702 22 SD_CMD
GPIO_200_OTG_DET AD18 JTAG
.M
GPIO_200 UART0_RXD JTAG_TMS_SD
GPIO_201_KEY_UP AG22 D6 A10 AJ10 R703 22 SD_DATA0
GPIO_201 JTAG_MODE TP701 UART6_RTS_N/GPIO_068 SD_DATA0/GPIO_043
GPIO_202_KEY_DOWN
C GPIO_203_SIM_SD_DET
AH22
AG15
GPIO_202
GPIO_203/CLKIN_AUX
JTAG_SD_MODE
JTAG_SEL0
E6
C4
TP702
TP703
UART6_RXD AJ6
UART0_TXD
UART6_RXD/GPIO_069
JTAG_TCK_SD
SD_DATA1/GPIO_044 AH11 R704 22 SD_DATA1
GPIO_203_SIM_SD_DET
C705 1N_DNI
AJ15 GPIO_205/I2S3_DO
UART7_RXD/DMIC_DATA
JTAG_SEL1
JTAG_TCK_SWCLK/GPIO_004
C3
A3
TP704
TP706
UART6_TXD AH7
UART0_RXD_M
UART6_TXD/GPIO_070
JTAG_TDI_SD/UART6_RXD
SD_DATA2/GPIO_045 AG12 R705 22 SD_DATA2 C
AG26 B4
w
GPIO_206/I2S3_DI JTAG_TMS_SWDIO/GPIO_005 TP707 UART0_TXD_M JTAG_TDO_SD/UART6_TXD
B3 AG13 R706 22 SD_DATA3
C706 1N_DNI UART7_TXD/DMIC_CLK JTAG_TRST_N/GPIO_006 TP708 SD_DATA3/GPIO_046
AF26 B5
GPIO_207/I2S3_XCLK JTAG_TDI/GPIO_007 TP709 JTAG_TRST_N_SD
AF16 A4 AD15
GPIO_208/I2S3_XFS JTAG_TDO/GPIO_008 TP710 VDD_ODIO_BIAS
AE22 GPIO_209/GPIO_ASP1
1U
w
GPIO_210_BFGN_HOST_WAKEUPAJ27 LTE CTRL
GPIO_210/GPIO_ASP2
GPIO_211_PMU1_IRQ_N AD21 AE28 LTE_INACT
GPIO_211/GPIO_ASP0 LTE_INACTIVE/GPIO_089
GPIO_212_AG_IN AE25 GPIO_212/GPIO_ASP3 FRAME_SYNC/UART1_CTS_N_M
C701
GPIO_213_WL_HOST_WAKEUP AE26 AF28 LTE_RX_ACT
GPIO_213/GPIO_ASP4 LTE_RX_ACTIVE/GPIO_090
GPIO_214_RF0_DET0 AD17
w
GPIO_214 UART1_RXD_M
AE29 LTE_TX_ACT
LTE_TX_ACTIVE/GPIO_091
UART1_TXD_M
AD29 ISM_PRIORITY
ISM_PRIORITY/GPIO_092
UART1_RTS_N_M
D
R707
1 2 3 4 5 6
1 2 3 4 5 6
8. SOC RF
A
A
U300
HI6250V100
RF IQ ANT SEL
CH0_RXA_I_N W4 AG4 RF_GPIO0_B2/G1900_SPDT
CH0_RXA_I_N ANTPA_SEL00/GPIO_112
CH0_RXA_I_P V4 AH2 RF_GPIO1_B3_LNA
CH0_RXA_I_P ANTPA_SEL01/GPIO_113
CH0_RXA_Q_N W3 AG3
CH0_RXA_Q_N ANTPA_SEL02/GPIO_114
m
CH0_RXA_Q_P W2 AG2 RF_GPIO3_B40_LNA
CH0_RXA_Q_P ANTPA_SEL03/GPIO_115
CH0_RXB_I_N W1 P4
CH0_RXB_I_N ANTPA_SEL04/GPIO_116
CH0_RXB_I_P Y1 P5
CH0_RXB_I_P ANTPA_SEL05/GPIO_117
CH0_RXB_Q_N Y2
o
CH0_RXB_Q_N ANTPA_SEL06/GPIO_118 P3
CH0_RXB_Q_P Y3 N1
CH0_RXB_Q_P ANTPA_SEL07/GPIO_119
CH0_RXC_I_N AC1 N2
CH0_RXC_I_N ANTPA_SEL08/GPIO_120
CH0_RXC_I_P AB1 N3
c
CH0_RXC_I_P ANTPA_SEL09/GPIO_121
CH0_RXC_Q_N AB5 N4
CH0_RXC_Q_N ANTPA_SEL10/GPIO_122
CH0_RXC_Q_P AB4 RF_GPIO11_ANT0_SW1
.
CH0_RXC_Q_P ANTPA_SEL11/GPIO_123 M1
CH0_RXD_I_N AB2 M2 RF_GPIO12_ANT0_SW2
CH0_RXD_I_N ANTPA_SEL12/GPIO_124
CH0_RXD_I_P AA2 M3 RF_GPIO13_ANT0_SW3
CH0_RXD_I_P ANTPA_SEL13/GPIO_125
CH0_RXD_Q_N AA4 K1 RF_GPIO14_ANT0_SW4
RF interface 6 of 11
CH0_RXD_Q_N ANTPA_SEL14/GPIO_126
h
CH0_RXD_Q_P Y4 M5 RF_GPIO15_DIV_ANT1
CH0_RXD_Q_P ANTPA_SEL15/GPIO_127
CH0_TX_I_N U2 L2 RF_GPIO16_DIV_ANT2
CH0_TX_I_N ANTPA_SEL16/GPIO_128
CH0_TX_I_P U3
B CH0_TX_Q_N CH0_TX_I_P ANTPA_SEL17/GPIO_129 L4
c
T1 CH0_TX_Q_N ANTPA_SEL18/GPIO_130 K2
CH0_TX_Q_P U1 CH0_TX_Q_P ANTPA_SEL19/GPIO_131
ANTPA_SEL20/GPIO_132
L5
K3 B
AF3 J1 RF_GPIO2_B1_LNA
e
CH1_RXA_I_N ANTPA_SEL21/GPIO_133
AF2 CH1_RXA_I_P ANTPA_SEL22/GPIO_134 J2 RF_GPIO4_B41_LNA
AF1 CH1_RXA_Q_N ANTPA_SEL23/GPIO_135 H2
AE1 G1
T
CH1_RXA_Q_P ANTPA_SEL24/GPIO_136
AD3 CH1_TX_I_N ANTPA_SEL25/GPIO_137 G2 RF_GPIO25_B34_SPDT
AD2 CH1_TX_I_P ANTPA_SEL26/GPIO_138 J4
AC3 CH1_TX_Q_N ANTPA_SEL27/GPIO_139 F1
1
AC4 CH1_TX_Q_P FE2_MIPI_DATA
ANTPA_SEL28/GPIO_103 F2
RF CTRL FE2_MIPI_CLK
li e
ABB_CLK_19M2 C803 1N R1 CH0_TCXO_IN ANTPA_SEL29/GPIO_104 J5
GPIO_093_FP_RST AE10 GPIO_093/CDMA_GPS_SYNC FE1_MIPI_DATA
CH0_AFC_PDM/CH1_AFC_PDM ANTPA_SEL30/GPIO_105 H4
COM2RF_CH0_AFC_PDM FE1_MIPI_CLK
RF0_APT_PDM AJ4 CH0_APT_PDM/GPIO_094
CH1_APT_PDM RF MIPI
RF0_RFIC_RESET AJ3 AF6 MIPI0_SCLK
CH0_RF_RESETN/GPIO_095 FE0_MIPI_CLK/GPIO_106
b
RF0_RFIC_SSI AH4 AF5 MIPI0_SDA
CH0_RF_SSI/GPIO_096 FE0_MIPI_DATA/GPIO_107
RF0_RFIC_TCVR_ON AH3 G3 GPIO_108_APT_EN0
CH0_RF_TCVR_ON/GPIO_097 FE1_MIPI_CLK/GPIO_108
FE1_MIPI_DATA/GPIO_109 G4
E2
o
CH1_APT_PDM/GPIO_099
H5 CH1_RF_RESETN/GPIO_100 RF OTHER
D1 CH1_RF_SSI/GPIO_101 FLASH_MASK/GPIO_110 B11 GPIO_110_FLASH_MASK
D2 CH1_RF_TCVR_ON/GPIO_102 GPS_BLANKING/GPIO_111 B29
GPIO_098/CDMA_GPS_SYNC E26 GPIO_098_CDMA_GPS_SYNC
ET
.M
T4 ET_TX_N ABB
T5
C ET_TX_P ABB_TEST
ABB_IBIAS
R3
R2 R801 22K
ABB_VREF T3
C
w
2.2u
22N
C801
C820
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
9. SOC GND
A
A
U300 U300
HI6250V100 HI6250V100
AD28 VSS_EMMC_DLL VSS_27 D25 J28 VSS_85 VSS_138 P10 U300
R20 AVSS_PLL_1 VSS_28 D26 J29 VSS_86 VSS_139 P12 HI6250V100
T25 AVSS_PLL_2 VSS_29 D31 J30 VSS_87 VSS_140 P14 W13 VSS_242 AC33
m
VSS_191
VSS_30 E7 J31 VSS_88 VSS_141 P16 W15 VSS_192 VSS_243 AD7
R4 AVSS_ABB_1 VSS_31 E8 K4 VSS_89 VSS_142 P17 W17 VSS_193 VSS_244 AD8
R5 AVSS_ABB_2 VSS_32 E12 K8 VSS_90 VSS_143 P18 W19 VSS_194 VSS_245 AD10
o
T2 AVSS_ABB_3 VSS_33 E15 K10 VSS_91 VSS_144 P22 W21 VSS_195 VSS_246 AD11
T6 AVSS_ABB_4 VSS_34 E17 K11 VSS_92 VSS_145 P24 W23 VSS_196 VSS_247 AD12
T8 AVSS_ABB_5 VSS_35 E18 K12 VSS_93 VSS_146 P28 W25 VSS_197 VSS_248 AD13
U4 E19 K13 P31 W27 AD14
c
AVSS_ABB_6 VSS_36 VSS_94 VSS_147 VSS_198 VSS_249
U5 AVSS_ABB_7 VSS_37 E21 K14 VSS_95 VSS_148 R6 W28 VSS_199 VSS_250 AD16
.
V2 AVSS_ABB_8 VSS_38 E22 K18 VSS_96 VSS_149 R9 W31 VSS_200 VSS_251 AD22
V3 AVSS_ABB_9 VSS_39 E23 K20 VSS_97 VSS_150 R14 Y10 VSS_201 VSS_252 AD24
V5 AVSS_ABB_10 VSS_40 E29 K22 VSS_98 VSS_151 R17 Y12 VSS_202 VSS_253 AD26
GND2 interface 10 of 11
V8 AVSS_ABB_11 VSS_41 E31 K24 VSS_99 VSS_152 R19 Y14 VSS_203 VSS_254 AD30
GND2 interface 11 of 11
W5 AVSS_ABB_12 VSS_42 E33 K31 VSS_100 VSS_153 R23 Y16 VSS_204 VSS_255 AE6
W8 AVSS_ABB_13 VSS_43 F3 L9 VSS_101 VSS_154 R26 Y18 VSS_205 VSS_256 AE11
GND1 interface 9 of 11
B Y5 AVSS_ABB_14 VSS_44 F4 L14 VSS_102 VSS_155 R28 Y20 VSS_206 VSS_257 AE13
c
AA3 AVSS_ABB_15 VSS_45 F6 L15 VSS_103 VSS_156 R30 Y22 VSS_207 VSS_258 AE20
AA5
AA8
AVSS_ABB_16
AVSS_ABB_17
VSS_46
VSS_47
F9
F10
L16
L19
VSS_104
VSS_105
VSS_157
VSS_158
R32
T10
Y24
Y26
VSS_208
VSS_209
VSS_259
VSS_260
AE23
AE27 B
AB3 F13 L21 T12 Y31 AE30
e
AVSS_ABB_18 VSS_48 VSS_106 VSS_159 VSS_210 VSS_261
AC5 AVSS_ABB_19 VSS_49 F14 L23 VSS_107 VSS_160 T13 Y32 VSS_211 VSS_262 AE32
AC6 AVSS_ABB_20 VSS_50 F15 L25 VSS_108 VSS_161 T15 Y33 VSS_212 VSS_263 AF9
AD4 F16 L27 T18 AA9 AF13
T
AVSS_ABB_21 VSS_51 VSS_109 VSS_162 VSS_213 VSS_264
AD5 AVSS_ABB_22 VSS_52 F19 L28 VSS_110 VSS_163 T22 AA11 VSS_214 VSS_265 AF30
AD6 AVSS_ABB_23 VSS_53 F20 L29 VSS_111 VSS_164 T26 AA13 VSS_215 VSS_266 AF31
AE2 AVSS_ABB_24 VSS_54 F22 L31 VSS_112 VSS_165 T28 AA15 VSS_216 VSS_267 AF32
1
AE3 AVSS_ABB_25 VSS_55 F27 L33 VSS_113 VSS_166 T31 AA17 VSS_217 VSS_268 AG5
AE4 AVSS_ABB_26 VSS_56 F31 M4 VSS_114 VSS_167 U9 AA21 VSS_218 VSS_269 AG9
AE5 AVSS_ABB_27 VSS_57 F32 M8 VSS_115 VSS_168 U11 AA23 VSS_219 VSS_270 AG16
li e
AF4 AVSS_ABB_28 VSS_58 G6 M10 VSS_116 VSS_169 U13 AA25 VSS_220 VSS_271 AG27
A1 VSS_1 VSS_59 G12 M11 VSS_117 VSS_170 U15 AA27 VSS_221 VSS_272 AG31
A2 VSS_2 VSS_60 G15 M12 VSS_118 VSS_171 U17 AA28 VSS_222 VSS_273 AG32
A14 VSS_3 VSS_61 G16 M14 VSS_119 VSS_172 U19 AA31 VSS_223 VSS_274 AG33
A33 VSS_4 VSS_62 G18 M18 VSS_120 VSS_173 U21 AB10 VSS_224 VSS_275 AH1
A34 VSS_5 VSS_63 G19 M20 VSS_121 VSS_174 U23 AB12 VSS_225 VSS_276 AH34
B1 VSS_6 VSS_64 G28 M22 VSS_122 VSS_175 U25 AB14 VSS_226 VSS_277 AJ1
b
B14 VSS_7 VSS_65 G29 M24 VSS_123 VSS_176 U32 AB16 VSS_227 VSS_278 AJ2
B18 VSS_8 VSS_66 H10 N10 VSS_124 VSS_177 V10 AB19 VSS_228 VSS_279 AJ19
B19 VSS_9 VSS_67 H11 N12 VSS_125 VSS_178 V12 AB25 VSS_229 VSS_280 AJ33
B23 H13 N15 V14 AB29 AJ34
o
VSS_10 VSS_68 VSS_126 VSS_179 VSS_230 VSS_281
B26 VSS_11 VSS_69 H14 N17 VSS_127 VSS_180 V16 AB30 VSS_231
B34 VSS_12 VSS_70 H16 N19 VSS_128 VSS_181 V18 AB31 VSS_232
C6 VSS_13 VSS_71 H21 N21 VSS_129 VSS_182 V20 AC7 VSS_233
C7 VSS_14 VSS_72 H24 N23 VSS_130 VSS_183 V22 AC16 VSS_234
C9 H28 N25 V24 AC17
.M
VSS_15 VSS_73 VSS_131 VSS_184 VSS_235
C12 VSS_16 VSS_74 H29 N27 VSS_132 VSS_185 V26 AC21 VSS_236
C C14
C18
VSS_17
VSS_18
VSS_75
VSS_76
H30
H32
N29
N30
VSS_133
VSS_134
VSS_186
VSS_187
V29
V30
AC23
AC28
VSS_237
VSS_238
C20
C21
VSS_19
VSS_20
VSS_77
VSS_78
H33
J3
N32
N33
VSS_135
VSS_136
VSS_188
VSS_189
V33
W9
AC29
AC31
VSS_239
VSS_240
C
C22 J9 P2 W11 AC32
w
VSS_21 VSS_79 VSS_137 VSS_190 VSS_241
C27 VSS_22 VSS_80 J13
D13 VSS_23 VSS_81 J15
D14 VSS_24 VSS_82 J17
D15 VSS_25 VSS_83 J23
w
D23 VSS_26 VSS_84 J25
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
m
VBAT_SYS C7 VIN_LDO_H_3 OUT11 E5 VOUT11_1V8/2V95 LDO5 ON 500 1.8 CSI/DSI/AVDD/PLL_HV/USB 1.8
OUT12 E6 VOUT12_1V8/2V95
C1002 1u VOUT13_2V85 C1019 4.7u LDO7 ON 200 0.9 AVDDH_ABB
U1000 OUT13 C8
V_FEM_RF_2V85 C1020 1U LDO8 ON 300 1.8 SOC pll/codec CP
o
OUT14 A10
OUT15 B9 VOUT15_2V95 LDO9 OFF 50 1.8/2.95 SD IO
HI6555V100 OUT16 A8 VOUT16_1V8/2V95 C1022 4.7u LDO10 ON 150 3.2 USB_3.0
D10 VOUT17_2V8 C1023 1U LDO11 OFF 50 1.8 SIM0
c
OUT17
OUT19 A7 VOUT19_2V8 C1024 4.7u LDO12 OFF 50 1.8 SIM1
C1003/C1004/C1005 can be deleted C1025 1U LDO13 300 2.85 S camera analog
.
OUT23 B10 OFF
OUT24 A11 VOUT24_2V8 C1026 1U LDO14 OTP 50 2.85 RF FEM
when routing inductance less than 5nH OUT27 A12 VCC27_RFIC0_2V4 C1027 2.2u LDO15 ON 600 2.95 EMMC VDD
OUT34 B7 VOUT34_3V1 LDO16 OFF 800 2.95 SD card
h
MISC1 Interface 1 of 4
LDO17 OFF 50 2.8 LCD TP
c
VBUCK3_2V L6 VIN_LDO_M_2 OUT3 P3 VCC3_RFIC0_1V85 C1030 4.7u LDO20 OFF 400 1.2 M Camera Core
VOUT4_1V8 C1033 4.7u LDO21 150 1.8 sys_efuse
C1003 1u
OUT4
OUT5
N4
R4 VOUT5_1V8 C1032 4.7u LDO22
OFF
OFF 250 1.29 RFIC1 AVDD1 1.29v B
K5 VOUT8_1V8 C1034 4.7u LDO23 ON 50 2.1 HKADC
e
OUT8
OUT21 N6 VOUT21_1V8 C1035 4.7u LDO24 ON 50 2.8 X Sensor AVDD
OUT26 K6 VOUT26_1V7 LDO25 OFF 400 2.85 Camera VCM
P6 V_VIO_1V8 C1037 1U LDO26 ON 50 1.7 19.2_AVDD
T
OUT28
OUT33 P4 VOUT33_1V8 C1038 4.7U LDO27 ON 50 2.4 RF_6362
C1004 1U LDO28 OFF 50 1.8 RF MIPI I/O
LDO29
1
VDD12_DDR F5 VIN_LDO_L1 OUT0 F4 VOUT0_0V8 C1039 4.7u LDO30
OUT7 D5 LDO31 OFF 300 2.8 Vibrator
LDO32 OFF 400 1.1 S Camera Core
li e
LDO33 OFF 150 1.8 M/S Camera I/O
C4 VIN_LDO_L2_1 OUT1 A4 VCC1_RFIC0_1V29 C1042 4.7u LDO34 ON 150 3.2 codec 3.2V
VBUCK2_1V35 C5 VIN_LDO_L2_2 OUT20 A1 VOUT20_1V2 C1043 4.7u
OUT22 A3 USE LDO22,must add 100nF to PINB6
C1005 1U OUT29 A2
OUT32 A5 VOUT32_1V1 C1041 4.7u
b
H17 B4 SG1007 0_DNI
S S S
G G G
DR1 AGND_LDOL S
G15 DR2 AGND_LDOM N5 SG1008 S
0_DNI
LED_RED H16 B8 SG1009 0_DNI VOUT10_3V2 L1001 15N VOUT10_3V2_RF
o
DR3 AGND_LDOH S
LED_GREEN G16 DR4
LED_BLUE H15 B12 SG1001 0_DNI
G
DR5 AGND_COUL S
F14 PGND_DR
6.8N
B16 AGND_OSC
SG1002 0_DNI
G
AGND_OSC S
.M
GND
C1045 1U A13 B14 SG1003 0_DNI
G
LDO_BUF AGND_BUF S
VOUT26_1V7
C C1048 1U
A16 AVDD_OSC
H10
C1049
AGND_AD_DA
VOUT2_1V8
C17
P5
VDD_IO_XO
VDD_IO AGND F8 C
w
2.2u
G
VREF AGND_REF S
C1008 100n B5 VREF_LDO1
B6 VREF_LDO22
0_DNI
0_DNI
AGND_OSC C1036
S S
w
S
S
SG1005
SG1006
w
G G
D
D
1 2 3 4 5 6
1 2 3 4 5 6
22u
SGND M15 HS_FB U1000 SDATA_FLAG
MCLK_49M R7
R8 S2P_SYNC A
ADC_SDATA P9 S2P_DI
C1115 100n R1104 43.2 HS_DET_OUT L9 HSD DAC_SDATA P8 S2P_DO
C1130
MBHC_IN L12 MBHC_IN HI6555V100
C1119 100n R1105 43.2 PVDD_SPK J14 SG1101
H14
G
PGND_SPK
MISC4 Interface 4 of 4
S
EAR_P M17 EAR_P
AGND_CP C1142 47n EAR_N L17 N12 VOUT34_3V1
EAR_N AVDD_MIC
MICBIAS R14 MICBIAS
HS_MICBIAS P14 HS_MICBIAS
SPKOUT_P L1105 96N J17 SPKOUT_P AGND_MIC N13
2.2u
SPKOUT_N L1106 96N K17
m
SPKOUT_N
1U
1U
AVDD_TX L16 VOUT34_3V1
MIC2_P C1150 100n P10 AUXMIC_P AGND_TX K15 AGND
MIC2_N C1151 100n R10 AUXMIC_N
C1116
C1117
C1122
o
AVDD_RX R13 VOUT8_1V8
MIC1_P C1114 100n R11 MAINMIC_P AGND_RX P13 AGND
MIC1_N C1113 100n P11 MAINMIC_N AGND
c
HS_MIC_P P12 HSMIC_P 300mA_Peak
.
HS_MIC_N N11 HSMIC_N AVDD_CP P15 VOUT8_1V8
CPOUTP R16
N10 R15
100n_DNI
100n_DNI
LINEIN_L CPOUTN
M10 LINEIN_R FLY_P M13
h
L13
4.7U
4.7u
FLY_N
1N
1N CAD NOTE:
4.7u
2.2u
2.2u
L11 N14
10u
AVREF AGND_CP
C1124 should close and connect to R13 pin directly
B
c
SG1103
C1147
C1148
2.2U
AGND_CP
B
G
S
C1121
C1146
C1118
C1131
C1127
C1128
C1123
C1124
2A current
e SG1102
C1141
AGND
G
T
S
AGND AGND_CP AGND
2A current
e 1
i l
b
VBAT_SYS J1 IN0_1 LX0_1 H1 LX0 L1101 1U VDD08_PERI
J2 IN0_2 LX0_2 H2
C1102 1u LX0_3 H3 C1129 10U
G1
U1000
o
PGND0_1
G2 PGND0_2 VO0_FB J4 C1111 10U
HI6555V100
D1
D2
IN12_1 MISC2 Interface 2 of 4 LX1_1 E1
E2
LX1 L1102 470N VDD12_DDR
.M
IN12_2 LX1_2 C1132 10U
C1103 1u
10u
D3 IN12_3
C1108 10U
C VO1_FB E4
F2 PGND1_2 LX2_2 C2
C1120 10U
w
C1104 1u VO2_FB D4
C1109 10U
B1 PGND2_1
B2 PGND2_2
w
K1 IN3_1 LX3_1 L1 LX3 L1104 1U VBUCK3_2V
K2 IN3_2 LX3_2 L2 BUCK0 ON 3000 0.8 DDR Core/CSI/DSI Phy emmc phy usb phy...
C1105 1u C1110 10U BUCK1 2000 1.1 VDDQ/VDDCA/VDD2/ODTLDO2
10u
10u
ON
M1 K3 BUCK2 ON 2000 1.35 1.35 buck
PGND3_1 VO3_FB
M2 C1101 10U BUCK3 ON 2000 2.0 2.0 buck
w
PGND3_2
C1107
C1106
G4 DGND_1 DGND_4 G5
H4 DGND_2 DGND_5 J5
H5 DGND_3
D
D
1 2 3 4 5 6
1 2 3 4 5 6
m
1n_DNI
VOUT5_1V8 PCB_ID0
K8 HK_REF U1000 HK0
HK1
K9
K10 PCB_ID1
1U
PCB_ID2
o
J8
HI6555V100 HK2
HK3 E16 TD_DCXO
HK4 J9 RF0_HKADC_PDT
C1201
C1204
c
HK5
HK6 F17 USB_OTG_ADC
ID UP RES DOWN RES Value Code
USB_BOARD_ID
.
HK7 F6
HK8 H9 USB_Connector_ADC VOUT5_1V8 0 NC 0K 0K 07090911
HK9 H11 TD_PA0 1 150K 22K 20K 07092448
MISC3 Interface 3 of 4
HK10 E9 BATT_TS 2 100K 30K 22K 07091172
150K
h
H8 TD_AP 3 200K 100K 30K 07091299
51K
30K
HK11
HK12 J11 TD_CHARGER 4 150K 121K 51K 07091302
5 121K 150K 100K 07091246
B
c
6 51K 100K 121K 07091176
XIN_19M2 R1230 560 RF0_CLK_19M2 7 30K 100K 150K 07092138
B17 B13
B
R1214
R1210
R1208
XIN_19M2 RF0_CLK_19M2
XOUT_19M2 A17 XOUT_19M2 RF1_CLK_19M2 D14 C1208 10P 8 20K 150K 200K 07091406
PCB_ID0 9 150K NC
e
VOUT_PMUD C14 XO_19M2_SEL WIFIBT_CLK_19M2 A14
SYS_CLK_19M2 C16 R1206 33 SYS_CLK PCB_ID1
R2 B15 ABB_CLK_19M2
150K_DNI
T
WIFIBT_CLK_EN ABB_CLK_19M2
SYSCLK_EN N1 SYS_CLK_EN CODEC_CLK_19M2 D17 PCB_ID2
C1205 10P_DNI NOTES:FIGO&Leland BoardID RES
100K
100K
R1217 10K
Mode STAGE R1214 R1211 R1210 R1209 R1208 R1207
1
F15 XIN_32K CLK32_SYS R1 R1240 33 CLK32_SYS
NOTE: R1217 DNI IF USE NFC E15 XOUT_32K CLK32_BT P1 CLK32_BFGN
Leland-AL00A/AL00C V3 150K NC 51K 100K 30K 100K
CLK32_GPS N2
R1209
R1207
e
A15
R1211
XO_32K_SEL
PMU_HKADC_SSI
PMU0_SSI
K12
P7
HKADC_SSI
PMU0_SSI
SRP
SRN
VBAT_SENSE
B11
C11
D11
SRP
SRN
VBATT_VD
i l
b
PMU_AUXDAC0_SSI M8 RFDAC0_SSI RF_AUXDAC0 G8 CH0_TX_APC
N8 RFDAC1_SSI RF_AUXDAC1 G9
E12 C15
o
BUCK1_VOL_SEL NFC_ON
NOTES:FIGO&Leland USB_BoardID RES
K4 TEST_MODE SIM0_HPD N7 GPIO_203_SIM_SD_DET
SIM1_HPD L8 GPIO_203_SIM_SD_DET
Main Board REF. Sub Board REF.
Mode RES code
.M
R1215 R201
VOUT5_1V8 C
w
AGND_OSC BATT_IDC1203 6.8n_DNI
150K
w
X1201
2
R1215
19.2MEG BATT_TSC1202 6.8n_DNI
TH-OUT/GND
USB_BOARD_ID
XIN_19M2 1 3 XOUT_19M2
w
USB_Connector_ADC
12K
TH-IN
4
R1218
VOUT5_1V8
6.8n_DNI
1 2 3 4 5 6
1 2 3 4 5 6
13. HI6422
A
A
VBAT_SYS D6
U1301
HI6422V200
VSYS LX0_1 B4 L1304 240n
m
VDD_CPU_B
o
10u_DNI
LX0_2 B5
A5 IN0_1 LX0_3 B6 instructions for L1301/L1302/L1303/L1304
L1301 240n
10u
10u
A6 H4
c
IN0_2 LX1_1
LX1_2 H5
6422 Type CODE Inductance Value
.
C4 PGND0_1 LX1_3 H6
C1309 10u C5 PGND0_2 LX2_1 H1 L1302 240n VDD_CPU_L
C1321
C1322
C1323
h
J5 IN1_1 LX3_1 B1 L1303 240n VDD_GPU 10100764
OLD 35020791 330nH
J6 IN1_2 LX3_2 B2
B LX3_3 B3
c
G4 PGND1_1
VDD_CPU_B_REMOTE NOTES:
C1308 10u
G5
G6
PGND1_2
PGND1_3
VFB0_P
VFB0_N
D5
D4 VSS_CPU_B_REMOTE
Must Config the software version for new 6422 configuration
B
F1 VDD_CPU_L_REMOTE
e
VFB1_P
J1 IN2_1 VFB1_N F2 VSS_CPU_L_REMOTE
J2 IN2_2 VFB2_P E3 VDD_GPU_REMOTE
D3 VSS_GPU_REMOTE
T
VFB2_N
G1 PGND2_1
G2 PGND2_2 PHASE_CTRL_SET1 J4 R1302 1K VOUT2_1V8
C1306 10u G3 PGND2_3 PHASE_CTRL_SET0 A3
1
SSI_CLK D1 SYS_CLK
SSI_PMU1 D2 PMU1_SSI
A1 IN3_1
li e
A2 IN3_2 PMU1_IRQ_N J3 GPIO_211_PMU1_IRQ_N
1u
AGND1 E4
b
AGND2 E5
F6 VREF AGND3 F4
C1317
E6 F5
1MEG
IREF AGND4
10n
F3
o
SGND
S
SG1304
S
C1313
R1301
1% G
.M
C S
CAD note:Place C1313 close to U1301 first, then R1301
C
SG1301
S
w
G
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
100n
DDR_CA3 N3 M11 DDR_DQ7 D4 F5 NC10 NC64
10u
CA3 DQ7 VDD2_1 VSS13 B7 J14
DDR_CA4 M3 CA4 DQ8 F11 DDR_DQ8 P4 VDD2_2 VSS14 M5 NC11 NC65
B8 K1
DDR_CA5 F3 CA5 DQ9 F10 DDR_DQ9 D5 VDD2_3 VSS15 N5 NC12 NC66
B9 K2
DDR_CA6 E3 CA6 DQ10 F9 DDR_DQ10 G5 VDD2_4 VSS16 R5 NC13 NC67
B10
U1402 K3
C1417
C1418
DDR_CA7 DDR_DQ11 NC14 NC68
DDR_CA8
E2
D2
CA7
CA8
DQ11
DQ12
F8
E11 DDR_DQ12
H5
J5
VDD2_5
VDD2_6
U1401 VSS17
VSS18
T5
L6
B11
B12
NC15 NC69 K12
K13
DDR_CA9 C2 CA9 DQ13 E10 DDR_DQ13 K5 VDD2_7 EDFB232A1MA VSS19 J12 NC16 NC70
B13 K14
DDR_DQ14 NC17 NC71
DDR_CLK_N J2 CK_C
U1401 DQ14
DQ15
E9
D9 DDR_DQ15 VDD12_DDR
P5
D6
VDD2_8
VDD2_9 VSSCA1 C3
B14
C1
NC18 NC72 L1
L2
DDR_CLK_P J3 CK_T EDFB232A1MA DQ16 T8 DDR_DQ16 H6 VDD2_10 VSSCA2 D3 NC19 NC73
m
MISC Interface 1 of 2 C3 L3
100n
100n
100n
100n
100n
T9 DDR_DQ17 J6 G3 NC20 NC74
PWR Interface 2 of 2
DQ17 VDD2_11 VSSCA3 C5 L12
DDR_CKE0 K3 T10 DDR_DQ18 K6 P3 NC21 NC75
NC Interface 2 of 2
CKE0 DQ18 VDD2_12 VSSCA4 C7 L13
DDR_CKE1 K4 CKE1 DQ19 T11 DDR_DQ19 P6 VDD2_13 VSSCA5 F4 NC22 NC76
C8 L14
DDR_DQ20 NC23 NC77
o
DQ20 R8 A8 VDD2_14 VSSCA6 G4
C9 M1
C1411
C1412
C1413
C1414
C1415
DDR_CS0_N L3 CS0_N DQ21 R9 DDR_DQ21 U8 VDD2_15 VSSCA7 J4 NC24 NC78
C10 M2
DDR_CS1_N L4 CS1_N DQ22 R10 DDR_DQ22 A9 VDD2_16 VSSCA8 M4 NC25 NC79
C11 M3
R11 DDR_DQ23 U9 NC26 NC80
c
DQ23 VDD2_17 C12 M7
DDR_DQM0 L8 DM0 DQ24 C11 DDR_DQ24 H12 VDD2_18 VSSQ1 B6 NC27 NC81
C13 M8
DDR_DQM1 DDR_DQ25 NC28 NC82
.
G8 DM1 DQ25 C10 K12 VDD2_19 VSSQ2 C6
C14 M9
DDR_DQM2 P8 C9 DDR_DQ26 E6 NC29 NC83
100n_DNI
DM2 DQ26 VSSQ3 D1 M10
DDR_DQM3 D8 DM3 DQ27 C8 DDR_DQ27 F2 VDDCA1 VSSQ4 F6 NC30 NC84
D2 M11
DQ28 B11 DDR_DQ28 G2 VDDCA2 VSSQ5 G6 NC31 NC85
M12
h
D3
100n
A1 NU1 DQ29 B10 DDR_DQ29 L2 VDDCA3 VSSQ6 M6 NC32 NC86
D4 M13
B1 NU2 DQ30 B9 DDR_DQ30 M2 VDDCA4 VSSQ7 N6 NC33 NC87
D12 M14
DDR_DQ31 NC34 NC88
B T1 NU3 DQ31 B8 H3 VDDCA5 VSSQ8 R6
D13 N1
c
U1 T6 NC35 NC89
NU4 VSSQ9 D14 N3
C1423
C1422
DDR_DQS0_N NC36 NC90
A2
U2
NU5
NU6
DQS0_C
DQS0_T
L11
L10 DDR_DQS0_P VDD12_DDR
L5 VDDD2 VSSQ10
VSSQ11
G9
L9
E1
E2
NC37 NC91 N6
N7
B
A12 G11 DDR_DQS1_N E8 H10 NC38 NC92
e
NU7 DQS1_C VDDQ1 VSSQ12 E3 N8
100n
DDR_DQS1_P
4.7K
U12 G10 H8 K10 NC39 NC93
NU8 DQS1_T VDDQ2 VSSQ13 E12 N9
A13 P11 DDR_DQS2_N K8 B12 NC40 NC94
1u
NU9 DQS2_C VDDQ3 VSSQ14 E13 N10
B13 P10 DDR_DQS2_P N8 D12 NC41 NC95
T
4.7U
NU10 DQS2_T VDDQ4 VSSQ15 E14 N11
100n
100n
100n
100n
T13 NU11 DQS3_C D11 DDR_DQS3_N H9 VDDQ5 VSSQ16 F12 NC42 NC96
F1 N12
1U
U13 D10 DDR_DQS3_P J9 M12 NC43 NC97
C1432
C1430
NU12 DQS3_T VDDQ6 VSSQ17 F2 N13
4.7K R1412
J10 P12 NC44 NC98
VDDQ7 VSSQ18 N14
1
F3 NC45 NC99
R3 NC1 ODT J8 A11 VDDQ8 VSSQ19 T12
F12 P1
C1421
C1425
C1429
C1436
C1435
C1434
C4 H11 NC46 NC100
NC2 VDDQ9 F13 P2
K9 H4 K11 NC47 NC101
100n
e
J11 U11 NC48 NC102
VREFDQ VDDQ11 G1 P9
C1431 1u
l
G2 P11
ZQ0 B3 R1401 240 E12 VDDQ13
NC50 NC104
G12 P12
C1433
i
R1413
VOUT2_1V8
ob
10K
.M
4G LPDDR3:40020431
C
R1411
TP1401 TP1406
w
DAT1 NC/RFU2
EMMC_DATA2
EMMC_DATA3
A5
B2
DAT2
DAT3
NC/RFU3
NC/RFU4
G3
K6 64G EMMC:40060827
EMMC_DATA4
EMMC_DATA5
B3
B4
DAT4
DAT5
U1402 NC/RFU5
NC/RFU6
K7
P7
w
EMMC_DATA6 B5 DAT6
EMMC_DATA7 B6 DAT7 NC/RFU/VSF1 E8
G10
MISC Interface 1 of 2
NC/RFU/VSF2
EMMC_STRB H5 RCLK/DS NC/RFU/VSF3 P10
w
EMMC_CLK M6 CLK RFU/VSF1 E9 VSF1 TP1402
RFU/VSF2 E10 VSF2 TP1403
EMMC_CMD M5 CMD RFU/VSF3 F10 VSF3 TP1404
RFU/VSF4 K10 VSF4 TP1405
PMU_RSTOUT_N K5 RST_N
C1437 1N_DNI A6 VSS1 VCC/VDDF1 E6 VOUT15_2V95
E7 VSS2 VCC/VDDF2 F5
G5 VSS3 VCC/VDDF3 J10
H10 VSS4 VCC/VDDF4 K9
J5 VSS5
K8 VSS6 VCCQ/VDD1 C6 VOUT2_1V8
D C4 VSSQ/VSS1
VCCQ/VDD2
VCCQ/VDD3
M4
N4 VDDI
N2 VSSQ/VSS2 VCCQ/VDD4 P3
D
220n
100n
100n
2.2u
4.7u
10U
N5 VSSQ/VSS3 VCCQ/VDD5 P5
1u
P4 VSSQ/VSS4
P6 VSSQ/VSS5 VDDI C2
C1408
C1424
C1404
C1405
C1416
C1407
C1402
1 2 3 4 5 6
1 2 3 4 5 6
G
S
BATT_CON_TS SG1502
0_DNI
G
S
BATT_TS R1506 68K VOUT5_1V8
G
S
VBATT 1 P1 P2 2 VBATT
3 P3 P4 4 R1521 2.2K BATT_ID
m
5 P5 P6 6 SG1504
VBATT- 7 8 VBATT- 0_DNI
G
P7 P8 S
9 P9 P10 10
C1504 10u_DNI
11 12
o
P11 P12
13 14 SG1505
0
P13 P14 0_DNI
10u
15 16 SRN
G
P15 P16 S
10m
C1507
D1502
R1504
B
h SRP
SG1506
0_DNI VBATT-
G
S
ec B
1T
i l e
b
VOUT2_1V8
1K
R1503
.M
C SOC_USB_DN R1516 6.8 USB_HS_DN C1509 100n
w
0
2
0
2
w
D1522
D1525
1
w
1
D
D
1 2 3 4 5 6
1 2 3 4 5 6
10u
10u
A8
1
PMID_1
B8 PMID_2 SYS_1 A3
m
D1601 need close to U1602
D1601
DZ_A
SYS_2 B3
CHARGE SYS_3 C3 CAD NOTE:
C1604
C1625
USB_INT A4 REGN SYS_4 A2 SYS pin should route from cap side
2
o
SYS_5 C2
C1606 2.2u PGND_1 A6 PGND must double-layer routing
E1 TS PGND_2 B6
A1
.c
BAT_1
BAT_2 B1 C1617 4.7u
VBATT R1602 100K E2 CEN BAT_3 C1
BAT_4 B2 VBATT
VBAT_SYS K7 VIN_WLED
h
ISET_WLED J9
K9 SW_WLED COMP J7
B * WLED *
c
H6 OVP_WLED IFB1 H9
H7 PWM
IFB2
PGND_WLED
H8
K8 VOUT_CLASSD B
1500mA
e
VO_FLASH_FB H3 C1630 22u
VBAT_SYS K5 SYS_FLASH VOUT_FLASH_1 H1 CAD NOTE:
J1 H2 FB From CAP C1630 VO_FLASH_FB route separately from C1630 cap
T
SW_FLASH_1 VOUT_FLASH_2
C1605 10u L1602 1u J2 SW_FLASH_2 FLASH VIN_LED J3
K4 FLASH_A
2.2N_DNI
VOUT_LED
GPIO_110_FLASH_MASK K3 TX_MASK PGND_FLASH_1 K1 1500mA
1
GPIO_054_FLASH_STROBE H4 STROBE PGND_FLASH_2 K2
C1611 4.7U
VOUT_NEG_FB G6 FB From CAP C1611 LB1602
li e
VBAT_SYS C9 SYS_LCD VOUT_NEG G9 1 2 LCD_VSN
L1601 4.7U E9 SW_LCD VOUT_POS F8
Output Current: type 60mA max 80mA
C1609
b
F3 K6
EN_LDO1V8 LDO VOUT_LDO2
VREF B4
I2C4_SCL F2 C4
o
SCL IBIAS
1MEG
I2C4_SDA
10n
F1 SDA
GPIO_180_CHARGER_INT G2 INT AGND_WLED J8
C1618 220n D1 CT AGND_REF D3
PMU_RSTOUT_N G3 J4
AGND_VREF_6522
AGND_IBIAS_6522
RESET AGND_FLASH
R1603
C1601
D2
.M
CONTROL AGND_CHG
C5 J5
AGND_FLASH
DGND_1 AGND_LDO
C E3 C8
AGND_6522
AGND_CHG
DGND_2 AGND_BUCK
AGND_WLED
F5 DGND_3 AGND_DET B5
F4
G5
DGND_4
DGND_5
AGND_BST
AGND_LCD
C6
F6 C
w
0_DNI
0_DNI
0_DNI
0_DNI
0_DNI
0_DNI
S S S S S S
w
S
S
SG1601
SG1602
SG1603
SG1604
SG1605
SG1606
G G G G G G
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
m
GPIO_077_LCD_ID1 LCD_ID1 LCD_D1_P DSI0_DATA1_P_R_2 DSI0_CLK_N 4 3 DSI0_CLK_N_R_2
* GPIO_020_LCD_RST_N LCD_RST 9
11
P9
P11
P10
P12
10
12
LCD_D1_N DSI0_DATA1_N_R_2 DNI
GPIO_021_LCD_TE0 LCD_TE GND
LCD_CABC_PWM PWM_OUT 13 P13 P14 14 LCD_CLK_P DSI0_CLK_P_R_2 R1710 49.9
o
15 P15 P16 16 LCD_CLK_N
17 P17 P18 18 DSI0_CLK_N_R_2
VOUT17_2V8 TP_VCI GND
* VOUT4_1V8 TP_IOVCC 19
21
P19
P21
P20
P22
20
22
LCD_D0_P DSI0_DATA0_P_R_2 R1711 49.9
.c
I2C2_SCL TP_SCL LCD_D0_N DSI0_DATA0_N_R_2
TP_SDA 23 P23 P24 24 T1702 10100702
I2C2_SDA 25 P25 P26 26 GND
GPIO_198_TP_INT TP_INT LCD_D3_P DSI0_DATA3_P_R_2 DSI0_DATA0_P 1 2 DSI0_DATA0_P_R_2
27 P27 P28 28 LCD_D3_N
GPIO_055_TP_RST_N TP_RST 29 P29 P30 30 DSI0_DATA3_N_R_2 *
VOUT4_1V8R1702 GND 31 P31 P32 32 *
2 LCD_VSP LCD_VSP LED_K3 DSI0_DATA0_N 4 3 DSI0_DATA0_N_R_2
h
1
10K_DNI 33 P33 P34 34 LED_K2 DNI
GND 35 P35 P36 36
LCD_VSN LCD_VSN LED_K1
C1772 100p_DNI
82P_DNI
B 37 P37 P38 38
C1719 1n_DNI
c
39 P39 P40 40 1 2 LED3-
*
C1770 100p
C1771 100p
LB1704 10100571
B
1u
1u
GND GND
100p
100p
41 S1 S2 42
C1725 100p
C1726 100p
GND 43 S3 S4 44 GND R1713 49.9
e
C1780
C1702
C1704
1 2 LED2-
2
LB1703 10100571 * DSI0_DATA1_P
T1703 10100702
1 2 DSI0_DATA1_P_R_2
C1728
T
C1709
*
1 2 LED1- *
LB1702 10100571 * DSI0_DATA1_N 4
DNI
3 DSI0_DATA1_N_R_2
1
GND
li e
LB1701 10070019
R1715 49.9
T1704 10100702
DSI0_DATA2_P 1 2 DSI0_DATA2_P_R_2
*
b
*
DSI0_DATA2_N 4 3 DSI0_DATA2_N_R_2
o
R1716 49.9
R1717 49.9
CAP tolerance above 50V!!!
.M
T1705 10100702
DSI0_DATA3_P 1 2 DSI0_DATA3_P_R_2
C VBAT_SYS
D1701
LED+ *
2 1 *
DSI0_DATA3_N 4
DNI
3 DSI0_DATA3_N_R_2 C
R1721
4.7U L1702
4.7U L1703
w
C1703
C1729
R1718 49.9
U1702
w
511K
LM36923HYFFR
1u
4.7u
B3 SW OUT C3
D3 IN
w
LED1 A1 LED1-
I2C4_SDA B2 SDA LED2 B1 LED2-
I2C4_SCL C2 SCL LED3 C1 LED3-
D
D
1 2 3 4 5 6
1 2 3 4 5 6
18. DPS_ALS
A
A
o m
.c
B
c h B
Te
1
li e
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
o m
Main Flash Light
. c
B
FLASH_A 2
LED1903
0 1
c h B
e
3
C1901 15P
1 T
li e
ob
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
S
R2022 1.5K VOUT33_1V8 S
4.7u
SG2052 0_DNI
J2002
J2001
m
0_DNI SG2003 ACTGND 2 1 ACTVDD L2001 22N VOUT25_3V0
C2051
S
P2 P1 26 25
S
DGND 4 P4 P3 3 PWDN_VCM GPIO_019_MCAM0_VCM_PWDN S2 S1
ISP_CCLK0_MCAM0 MCLK 6 5 SCL ISP_SCL0
P6 P5 VOUT13_2V85 AVDD AGND
FLASH NC * 2
P2 P1
1
o
8 P8 P7 7
DATA1_N DGND 4 3
DGND 10 P10 P9 9 MCAM0_D1N P4 P3
DATA1_P ISP_CCLK2_FCAM MCLK 6 5 DGND
MCAM0_D3N DATA3_N 12 P12 P11 11 MCAM0_D1P P6 P5
DGND DGND 8 7 DATA1N CSI1_DATA1_N
MCAM0_D3P DATA3_P 14 13 P8 P7
c
P14 P13 CSI1_DATA3_N DATA3N10 9 DATA1P CSI1_DATA1_P
DGND 16 15 CLK_N MCAM0_CLKN P10 P9
P16 P15 CSI1_DATA3_P DATA3P12 11 CLKN SCAM0_CLKN_SW
MODULE_ID CLK_P MCAM0_CLKP P12 P11
.
18 P18 P17 17
DGND CSI1_DATA2_N DATA2N14 P14 P13
13 CLKP SCAM0_CLKP_SW
DGND 20 P20 P19 19
DATA0_N CSI1_DATA2_P DATA2P16 15 DATA0N SCAM0_D0N_SW
MCAM0_D2N DATA2_N 22 P22 P21 21 MCAM0_D0N P16 P15
DATA0_P DGND 18 17 DATA0P SCAM0_D0P_SW
MCAM0_D2P DATA2_P 24 P24 P23 23 MCAM0_D0P P18 P17
GPIO_017_SCAM0_RST RESET 20 19 DGND
h
DGND 26 25 DGND P20 P19
P26 P25 VOUT32_1V1 DVDD 22 SDA ISP_SDA1
GPIO_018_MCAM0_RST RESET 28 P28 P27 27 SDA ISP_SDA0 * VOUT33_1V8 IOVDD 24
P22 P21
21
23 SCL ISP_SCL1
22P_DNI
22P_DNI
22P_DNI
VOUT20_1V2 VPP
22p_DNI
DVDD_1V2 P24 P23
B 30 P30 P29 29
DVDD_1V1
c
VOUT33_1V8 DOVDD 32 P32 P31 31
28 27
22P_DNI
82P_DNI
82P_DNI
VOUT19_2V8 AVDD AGND S4 S3
34 33
B
15p_DNI
1n_DNI
P34 P33
82P_DNI
82P_DNI
4.7u
8.2p
36 35
100n
e
4.7u_DNI
S2 S1
38 S4 S3 37
R2051 1.5K VOUT33_1V8
C2023
C2019
C2013
C2022
4.7u
R2052 1.5K
T
C2021
C2025
C2017
C2030
C2060
C2062
C2063
C2061
C2053
C2058
C2041
C2042
1
li e
S
G
0_DNI SG2001
25
S1 S2
26
Max Mated High=0.8mm C
w
AGND 1 P1 P2
2 DGND
VOUT13_2V85 AVDD 3 P3 P4
4 MCLK ISP_CCLK1_SCAM0
DGND 5 P5 P6
6 DGND
VOUT33_1V8 DOVDD 7 P7 P8
8 CLK_N MCAM1_CLKN
DVDD 9 10 CLK_P MCAM1_CLKP
w
P9 P10
GPIO_075_MCAM1_PWDN PWDN 11 P11 P12
12 DGND
GPIO_076_MCAM1_RST RESET13 P13 P14
14 DATA0_N MCAM1_D0N
PWSEQ_ID15 P15 P16
16 DATA0_P MCAM1_D0P
MODULE_ID
17
P17 P18
18 DGND
ISP_SDA1
w
SDA 19 P19 P20
20 DATA1_N
ISP_SCL1 SCL 21 P21 P22
22 DATA1_P
VPP 23 P23 P24
24 DGND
8.2p
27 28
2.2U
S3 S4
22P
22P
1U
1U
C2016
C2038
C2024
C2027
C2037
C2008
S
S
D SG2004 0_DNI
1 2 3 4 5 6
1 2 3 4 5 6
* CS0 DERECT *
BACK MAIN
m
R2129 0_DNI
T2109
MCAM0_CLKN 1 2 CSI0_CLK_N
o
*
*
MCAM0_CLKP 4 3 CSI0_CLK_P
0
c
R2126 0_DNI
.
R2128 0_DNI
Front_13M/Rear_2M TO CSI1 MCAM0_D0N 1
T2108
2 CSI0_DATA0_N
h
*
*
MCAM0_D0P 4 3 CSI0_DATA0_P
B
c
U2102 0
HD3SS3212RKSR_CBTL02043ABQ_S90
CSI1_DATA0_N 4 A0_N VDD/NC1 1
R2127 0_DNI
B
CSI1_DATA0_P 3 10 R2111 0_DNI
e
A0_P VDD/NC2
CSI1_CLK_P 8 6 VOUT25_3V0
A1_N VDD/VCC T2110
CSI1_CLK_N 7 A1_P MCAM0_D1N 1 2 CSI0_DATA1_N
2
T
XSD/OEN /PD *
SCAM0_D0N_SW 18 B0_N *
SCAM0_D0P_SW 19 B0_P SEL 9 GPIO_078_MIPISW_SEL MCAM0_D1P 4 3 CSI0_DATA1_P
SCAM0_CLKP_SW 16 B1_N C2101 0
1
SCAM0_CLKN_SW 17 B1_P GND1 5 R2112 0_DNI
GND2 11
MCAM1_D0N 14 C0_N GND3 20
R2104 0_DNI
li e
MCAM1_D0P 15 C0_P
100N
MCAM1_CLKP 12 T2101
C1_N MCAM0_D2N 1 2 CSI0_DATA2_N
MCAM1_CLKN 13 C1_P SINK 21
*
*
MCAM0_D2P 4 3 CSI0_DATA2_P
0
R2103 0_DNI
o b MCAM0_D3N
MCAM0_D3P
R2118
1
4
*
*
0
0_DNI
T2107
2
3
CSI0_DATA3_N
CSI0_DATA3_P
.M
R2120 0_DNI
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
o m
.c
B
c h B
Te
1
li e
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
P1
o m
c
68P
68P
C2302
.
C2303
B
c h B
Te
1
li e
Secondary Mic o b
.M
C
MIC2301
C
w
MICBIAS MA-FRA381-A13-3
1 VDD
MIC2_P 2 OUT
3 GND
MIC2_N
w
4
0_DNI
M1
68P_DNI
22P
22P
1U
w
SG2301
S
C2309
C2308
C2301
C2314
D
CAD note: MIC need differential trace to the codec D
1 2 3 4 5 6
1 2 3 4 5 6
24. Headphone
A
A
1 2 SGND
LB2402
o m
68p_DNI
SGND_CON
SGND_CON
HSR_CON 1 2 R2403 4.7 HSR
HSR_CON
HSL_CON
820
c
HSL_CON
HS_DET_OUT_CON
HS_DET_OUT_CON
D2403
R2414
C2413
MBHC_IN_CON 1 2
MBHC_IN_CON
68p_DNI
HS_GND
HS_GND HS_GND
D2402 HS_GND
Notes:
B
820
c
1 2
MBHC_IN_CON with HS_GND
Must Differential routing from BTB B
R2413
C2414
LB2403
R2409
R2410
100K
100K
1 2
VOUT2_1V8
HS_DET_OUT
100n
R2401 1.1K
1 HS_MICBIAS
li e
2.2U
C2416
HS_GND
C2403
b
HS_GND
MBHC_IN
LB2404
o
1 2 C2406 100n HS_MIC_N
1.1K
47P
.M
C
R2402
C2401
33p_DNI
33p_DNI
C2408 100n HS_MIC_P
w
HS_GND
Notes:
Layout constraints
In order to avoid GND of GSM_PA
w
HS_GND need Single point to Battery-BTB
C2409
C2410
CAD Notes
HS_GND must shape Lay_out
SG2401
w
HS_GND HS_GND
G
S
SG2402
HS_GND
G
S
D
D
1 2 3 4 5 6
1 2 3 4 5 6
o m
.c
B
c h B
Te
1
li e
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
m
ADDR
VOUT2_1V8 8 CS/CS/NC RES/GND/NC 10
J2612 LB2603
VOUT24_2V8 VOUT15_2V95
o
GND 12 P1 1 1 2
4.7U
22P
22P
22P
1 VDD_IO GND/NC 5
4.7u
J2613
22P
22P
c
14 VDD/VS NC 3 P1 1
C2623
C2604
C2606
C2605
C2624
C2625
C2615
c h GND
B
Compass
Te
U2601
1
li e
A2 CAD VDD A1 VOUT24_2V8
100n
100K
100K
I2C0_SDA C3 SDA
b
I2C0_SCL B3 SCL
Hot Area TMP sensor
C2609
C2610
R2604
R2603
U2603
AK09918
o TD_AP TD_CHARGER
6.8N_DNI
A2 B1
.M
100K
100K
SCL VDD
6.8N
C B2 SDA VSS A1
RT2602 NOTEs: RT2601 NOTEs:
DNI Close to SOC 5mm-10mm Close to Scharger 5mm-10mm C
C2614
C2617
T
T
w
RT2602
RT2601
U2601/U2603 place together,co-layout
Status indicator w
w
AP IC TEMP Charger IC TEMP
LED2601
RED 1 LED_RED
BLUE 3 LED_BLUE
D
22P
22P
22P
22P
D
C2618
C2603
C2612
C2613
1 2 3 4 5 6
1 2 3 4 5 6
o m
. c
B
c h B
Te
1
li e
ob
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
SIM0
14241025
VOUT11_1V8/2V95 R2802 4.7K J2801
o
R2815 2.2 10 VCC_OF_SIM1
9 GND_OF_SIM1 GND1 23
C2801 1U GND2 24
25
c
GND3
SD_DATA2 1 DAT2_OF_MSD GND4 26
SD_DATA3
.
2 CD/DAT3_OF_MSD GND5 27
Micro SD CARD
SD_CMD 3 CMD_OF_MSD GND6 28
VOUT16_1V8/2V95 4 VDD_OF_MSD GND7 29
SD_CLK 5 CLK_OF_MSD GND8 30
Micro SD
h
6 VSS_OF_MSD GND9 31
SD_DATA0 7 DAT0_OF_MSD GND10 32
SD_DATA1
B 8 DAT1_OF_MSD GND11 33
c
GND12 34
VOUT2_1V8 R2804 200K
GPIO_203_SIM_SD_DET R2803 1K
21
22
SW/GND
SW/CD
GND13
GND14
35
36 B
37
e
GND15
VOUT12_1V8/2V95 R2801 4.7K GND16 38
USIM1_CLK R2808 47 USIM1_CLK_C 15 CLK_OF_SIM2 GND17 39
10U
16 40
T
DATA_OF_SIM2 GND18
USIM1_RST R2810 100 USIM1_RST_C 17 RST_OF_SIM2 GND19 41
18 VPP_OF_SIM2
VOUT12_1V8/2V95 R2816 2.2 VOUT12_1V8/2V95_CON 19 VCC_OF_SIM2 M1 42
C2830
1
20 GND_OF_SIM2 M2 43
SIM1
li e
1u
C2833
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
A
For Protect£¬should closed to J2901 J2902 A
11S1 S212
U2902 VCHG_USB_CON
39070206
FP_SPI0_CLK 1P1 P22 GPIO_031_FP_ID
VCHG_USB A2 OUT1 IN1 B3 GPIO_093_FP_RST 3P3 P44 FP_SPI0_DO
A3 OUT2 IN2 C2 FP_SPI0_DI 5P5 P66
B2 OUT3 IN3 C3 VOUT2_1V8 7P7 P88 VOUT24_2V8
GPIO_199_FP_INT 9P9 P1010 FP_SPI0_CS0_N
B1 ACOK /VBUS_D
100n_DNI
C1 OVP_OVLO_EN 13S3 S414
22P_DNI
OVLO
10K_DNI
A4 GND1
m
B4
100N
GND2
C4 A1
1n
1n
1u
GND3 EN/GND
1
2
3
4
o
D2901
CAD note:Place Q2901 after D2901 and caps
VBUS/VCC
NC1
NC2
NC3
C2918
C2925
C2924
C2926
C2940
C2904
R2908
D2901 --> Caps --> Q2901
.c
GND1
GND2
GND3
GND4
h
5
6
7
8
B
Main FPC BTB
e c CAM Deco grounding scheme
B
T
J2901
SPKOUT_P 2 P2 P1 1 SPKOUT_N
4 3
1
P4 P3
6 P6 P5 5
USB_Connector_ADC
VOUT2_1V8
8
10
P8 P7 7
9
USB_HS_DN
USB_HS_DP * REMOVE *
li e
P10 P9
USB_BOARD_ID 12 P12 P11 11
VOUT24_2V8 14 P14 P13 13 USB_ID
16 P16 P15 15
V_FEM_RF_2V85 18 P18 P17 17 I2C0_SCL
RF_GPIO12_ANT0_SW2 20 P20 P19 19 I2C0_SDA
RF_GPIO11_ANT0_SW1 22 P22 P21 21 VOUT31_2V8
RF_GPIO13_ANT0_SW3 24 23
b
P24 P23
RF_GPIO14_ANT0_SW4 26 P26 P25 25 FM_ANT
28 P28 P27 27
HS_DET_OUT_CON 30 P30 P29 29 MIC1_N
o
HSR_CON 32 P32 P31 31 MIC1_P
SGND_CON 34 33 MICBIAS
HSL_CON 36
38
P34
P36
P38
P33
P35
P37
35
37 HS_GND
KEY BTB
40 P40 P39 39 MBHC_IN_CON
.M
VCHG_USB_CON 42 S2 S1 41 VCHG_USB_CON
C 44 S4 S3 43 J2904
2199172_1
R2903 2.2K GPIO_201_KEY_UP
w
2 4 R2902 2.2K PWRON_N
14240778
w VCHG_USB_CON
w
Q2901
1 D1 D5 7
2 D2 D4 6
D3 5
S2 8
GPIO_059_USB_MOS_CTRL
D 3 G S1 4
D
200K
0
R2904
1 2 3 4 5 6
1 2 3 4 5 6
BATT_CON_TS TP3013
TP3016 P1 1 P1 1
B VCHG_USB_CON
1 TP3002
TP3001
TP3006
c h J3008
P1 1
J3016
P1 1
B
USB_HS_DP
USB_HS_DN
TP3003
TP3004
Te J3009
P1 1
J3001
P1 1
1
USB_ID 1 TP3005
li e HOLE
BOOT_MODE TP3018
ob 1
J3020
P1 1
J3021
P1 1
J3022
P1
.M
WIFI_TEST TP3064
C
C
UART6_TXD TP3060
w MARK POINT
w
UART6_RXD TP3061
w
D
D
30_Test Point/Shieldin
1 2 3 4 5 6
1 2 3 4 5 6
[Link] Interface
32_RF Transceiver0 RFIC0 IQ Power APC
33_APT Power
A 34_Reserved CH0_TX_I_N VBAT_SYS CH0_TX_APC
CH0_TX_I_P
CH0_TX_Q_N VBATT A
35_TRX B12/17/20/28 PRX_B34 CH0_TX_Q_P
VCC1_RFIC0_1V29
CH0_RXA_I_N
36_MMMB PA SKY77643 CH0_RXA_I_P VOUT2_1V8 CLOCK
CH0_RXA_Q_N
CH0_RXA_Q_P VCC3_RFIC0_1V85
37_TRX B1/2/3/4/5/7/8 CH0_RXB_I_N
CH0_RXB_I_P VCC27_RFIC0_2V4 RF0_CLK_19M2
38_TX MATCHING CIRCUIT of B38/40/41 CH0_RXB_Q_N
CH0_RXB_Q_P GPIO_108_APT_EN0
39_PRX B39/41/38/G850/900/1800/1900
m
CH0_RXC_I_N RF0_APT_PDM
CH0_RXC_I_P
40_TXM SKY77916 CH0_RXC_Q_N
CH0_RXC_Q_P
VOUT5_1V8
o
CH0_RXD_I_N V_VIO_1V8
41_DIV_ANT1_SWITCH CH0_RXD_I_P
CH0_RXD_Q_N V_FEM_RF_2V85
PA temperature
c
CH0_RXD_Q_P
42_DRX B1/4_2/3_5/20_7_8/12/17_28 VOUT10_3V2_RF TD_PA0
.
RF0_RFIC_TCVR_ON
43_DRX B39/41/38/40 RF0_RFIC_RESET
RF0_RFIC_SSI
h
RF0_HKADC_PDT
44_DPDT
B
c
45_DIV_ANT1_TUNER B
e
46_ANTENNA MATCH
T
47_Reserved
GPIO Interface LTE WIFI COEXT NC
48_Reserved
49_Reserved GPIO_214_RF0_ANT0_DET0
1
li e
GPIO_016_GNSS_PWM_SYNC
GPIO_035_HI1102_PWRON
50. backup LTE_TX_ACT
RF_GPIO11_ANT0_SW1 GPIO_210_BFGN_HOST_WAKEUP
51. backup RF_GPIO12_ANT0_SW2 BF_PCM_DO
b
LTE_INACT BF_PCM_DI
52. backup
RF_GPIO13_ANT0_SW3 BF_PCM_SYNC
BF_PCM_CLK
53_Reserved
o
RF_GPIO14_ANT0_SW4
GPIO_213_WL_HOST_WAKEUP
54_Reserved
BFGN_UART_CTS
.M
RF_GPIO0_B2/G1900_SPDT BFGN_UART_RX
C 55_Reserved
RF_GPIO1_B3_LNA BFGN_UART_RTS
BFGN_UART_TX
56_Reserved C
CLK32_BFGN
w
RF_GPIO3_B40_LNA
57_Reserved WL_SDIO_D3
RF_GPIO25_B34_SPDT WL_SDIO_D2
WL_SDIO_D1
58_Reserved
w
WL_SDIO_D0
RF_GPIO2_B1_LNA WL_SDIO_CLK
59_Reserved RF_GPIO4_B41_LNA WL_SDIO_CMD
60_Reserved
61_Reserved
62_Reserved
w RF_GPIO15_DIV_ANT1
RF_GPIO16_DIV_ANT2
MIPI0_SDA D
65_Reserved
66_Reserved
67_WIFI/GPS ANTENNA MATCH
68_Reserved
1 2 3 4 5 6
1 2 3 4 5 6
32_RF Transceiver0
A
A
VCC1_RFIC0_1V29
A14 GND1 VDD1P29_RX1PLL D5
C3215
C3203
B1 GND2 VDD1P29_RX2PLL J8
m
B3 C3205
C4
GND3
GND4
U3201 VDD1P29_RX2VCOBUF L8 1n
10U
10U
C6 GND5 HI6362PILOT
C10
o
GND6 VDD1P29_RXLOA E4
C12 D7 C3207 1n_DNI
Note: HB4 & 5 can be configured to RF Group 1 with degraded RF performance E12
GND7 VDD1P29_RXRFIFB GND
GND8
Only HB3 and HB5 support intra-band non-cont CA, other ports support intra-band cont CA. F3 G4
.c
GND9 VDD1P29_RXRFIFA
MISC2 Interface 2 of 2
J4 GND10 VDD1P29_BIAS D9 VCC1_RFIC0_1V29
J10 GND11 start route from PMU
MRX DRX RF_B7_DRX B15 H13 L3203 47N CH0_RXA_I_N E6 P5
1n
DRX_UHB1 RX_A_I_N GND12 VDD1P29_TX
RF_B41_DRX A12 DRX_UHB2 RX_A_I_P H15 L3204 47N CH0_RXA_I_P K9 GND13
LB1 LB1 J14 L3205 47N CH0_RXA_Q_N K11 P3 C3209 1n_DNI
RX_A_Q_N GND14 VDD1P29_TXLO
h
LB2 LB2 RF_B34_DRX B9 DRX_HB1 RX_A_Q_P K15 L3206 47N CH0_RXA_Q_P K13 GND15
C3206
LB3 LB3 RF_B1_DRX A10 M3 P11 C3210 1n_DNI
DRX_HB2 GND16 VDD1P29_TXPLL
LB4 LB4 B11 G14 L3207 47N CH0_RXB_I_N H5
B DRX_HB3 RX_B_I_N GND17
c
LB5 LB5 RF_B3_DRX B13 DRX_HB4 RX_B_I_P F15 L3208 47N CH0_RXB_I_P P13 GND18 VDD1P29_TXVCOBUF R14
SG3201
LB6 LB6 RF_B39_DRX C14 E14 L3209 47N CH0_RXB_Q_N R2 C3216 1n
U3201 B
G
DRX_HB5 RX_B_Q_N GND19 S
HB1 HB1 RF_B40_DRX D15 DRX_HB6 RX_B_Q_P F13 L3210 47N CH0_RXB_Q_P R4 GND20 VDD1P8_IO L14 VOUT2_1V8
HB2 HB2 R6
e
HI6362PILOT GND21
1n
HB3 HB3 B5 DRX_LB1 RX_C_I_N F7 L3211 47N CH0_RXC_I_N R8 GND22 VDD1P85_RX1VCO A2 C3204
HB4 HB4 RF_B20/B28_DRX A4 E8 L3212 47N CH0_RXC_I_P R10 L12 C3218 1n
DRX_LB2 RX_C_I_P GND23 VDD1P85_RX2VCO
HB5 HB5 A6 G8 L3213 47N CH0_RXC_Q_N R12 VCC3_RFIC0_1V85
T
DRX_LB3 RX_C_Q_N GND24
HB6 HB6 C8 DRX_LB4 RX_C_Q_P H7 L3214 47N CH0_RXC_Q_P L4 GND25 VDD1P85_TXRF_2 P7 VCC3_RFIC0_1V85
UHB1 UHB1 RF_B5/BC0_DRX B7 DRX_LB5 T13 GND26
1n start route from PMU
RF_B8_DRX A8 DRX_LB6 RX_D_I_N E10 L3215 47N CH0_RXD_I_N U4 GND27 VDD1P85_TXVCO T15 C3217
1
UHB2 UHB2 RX_D_I_P F9 L3216 47N CH0_RXD_I_P U6 GND28
RF_B7_PRX
MISC1 Interface 1 of 2
P1 MRX_UHB1 RX_D_Q_N F11 L3217 47N CH0_RXD_Q_N U8 GND29 VDD2P4_BIAS N12 VCC27_RFIC0_2V4
UHB1-2 2496-3800 MHz RF_B41_PRX K1 MRX_UHB2 RX_D_Q_P G10 L3218 47N CH0_RXD_Q_P K5 GND30
li e
D11 GND31 VDD2P4_RX1VCO C2 C3220 1n
RF_B1_PRX H1 MRX_HB1 D13 GND32
C3211
C3221
PRX_B2/G1900/B34_6362 J2 MRX_HB2 TX_I_N N6 CH0_TX_I_N VBIAS_1P0 M13
HB1-3 1447-2170 MHz RF_G1800_PRX K3 M7 CH0_TX_I_P
1n
MRX_HB3 TX_I_P
RF_B3_PRX M1 MRX_HB4 TX_Q_N N8 CH0_TX_Q_N
HB4-6 1805-2690 MHz
RF_B39_PRX L2 MRX_HB5 TX_Q_P M9 CH0_TX_Q_P
1u
RF_B40_PRX N2 MRX_HB6
C3219
2.2U
b
2.2U
D3 F5
C3222
LB1 462.5-894 MHz MRX_LB1 TEST_1
RF_B20/B28L_PRX D1 MRX_LB2 TEST_2 G6
LB2-6 703-960 MHz RF_B28H_PRX E2
o
MRX_LB3
RF_B8_PRX F1 MRX_LB4 GPIO_0 G12
RF_B5/BC0_PRX G2 MRX_LB5 GPIO_1 H11
H3 MRX_LB6 GPIO_2 H9
GPIO_3 M11
RF_TX_B7/B40/B41 39p T5
.M
TXRF_UHB1
C3231 T7 TXRF_UHB2 TCVR_ON J6 RF0_RFIC_TCVR_ON
T9
C TXRF_UHB3
TRSTN L6
RF_TX_GSM_HB39p C3234 U2
RF_TX_B1/B2/B3/B4 T1
TXRF_HB1
TXRF_HB2 RESETN K7 RF0_RFIC_RESET C
39p C3232 T3
w
TXRF_HB3
C3202
POWDETOUT N10 R3202 22K RF0_HKADC_PDT
RF_TX_GSM_LB39p C3235 U10 TXRF_LB1
RF_TX_B5/B8 T11 TXRF_LB2
39p C3233 U12 TXRF_LB3
w
U14 TXRF_LB4 SSI P15 RF0_RFIC_SSI
330p
R3201 close to RFIC
TXDET1 M5 TXFB_1 REXT N14 R3201 56K
N4 TXFB_2
M15 L3201 1N C3223 1n RF0_CLK_19M2
w
FREF_IN
C3201
2.2p
D
D
1 2 3 4 5 6
1 2 3 4 5 6
[Link] Power
A
A
C3303
U3301
6.8N
C3306
A2 L3301 1.5U VDD_PA0
C3305
SW1
GPIO_108_APT_EN0 C2 EN SW2 B2
m
C3 BP FB D4
BZT52C5V6LP_7
10U
56p
D3 MODE ACB1 A4
DZ_A
D3301
B4
o
ACB2
RF0_APT_PDM R3301 1K D2 VCON
PGND1 A1
C3304 1N B1
c
PGND2
VBAT_SYS A3 PVIN1
C3301
C3302
B3 C1
.
PVIN2 SGND
D1 VDD BGND C4 GND
LM3243
h
10U
100n
B
c
GND
B
.M
C A 2.4V=LDO27
C
VBATT=VBATT
MMMB PA
w VCC1/2=APT
VIO 1.8V=LDO28
RF Power SYSTEM
w VBATT=VBATT
w
TXM
VIO 1.8V=LDO28
D
D
TEMP 1.8V=LDO5
1 2 3 4 5 6
1 2 3 4 5 6
34_Primary ASM
A
A
RF_TX_GSM_LB
C3413 3.9p
L3407
C3401
5.1N
5P
o m
c
U3401
RF_TX_GSM_HB L3405 2.2N
.
2 LB_IN TRX14 24 RF_B41_TX_TXM
1 25 RF_B40_TX_TXM
LB_SWOUT TRX13
C3412 1.8p C3408 5P_DNI TRX12 26 RF_B7_TRX_TXM
h
3 27 RF_B39+41_RRX_TXM
HB_IN TRX11
4 HB_SWOUT TRX10 28 RF_B34_PRX_TXM
RF_B2/G1900_TRX_TXM
B TRX9 29
c
MIPI0_SCLK 5 SCLK TRX8 30 RF_G1800_PRX_TXM
MIPI0_SDA RF_B1_TRX_TXM
V_VIO_1V8
6
7
SDATA
VIO
TRX7
TRX6
31
32 RF_B1/B3_TRX_TXM B
33 RF_B5/BC0_TRX_TXM
e
TRX5
CH0_TX_APC R3401 1K 8 VRAMP TRX4 34 R3402 51
VBATT 9 35 RF_B8_TRX_TXM
VCC TRX3
10 36 RF_B28H_TRX_TXM
T
VBATT TRX2
37 RF_B28L_TRX_TXM
TRX1
TXDET1 R3404 33 17 CPL TX_B34/39_Q
GND1 11
180
19 12
180
NC GND2
GND3 13
MAIN_TXM 22 14
ANT GND4
li e
GND5 15
41 16
1
R3407
GND14 GND6
1
R3406
42 GND15 GND7 18
DZ_A
D3402
43 GND16 GND8 20
GND 44 GND17 GND9 21
C3406
C3417
45 23
D3401
4.7N
GND18 GND10
100p
2
46 38
2
GND19 GND11
1U
6P
6P
1n
1n
b
47 GND20 GND12 39
GND13 40
10U
10U
C3414
C3411
C3409
C3403
C3402
C3410
C3404
o
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
35_Reserved
A
A
LB3502
GPIO_214_RF0_ANT0_DET0 1 2 C3509 33P
100N
L3505
o m
G2
G1
C
A
J3503
C3508
1
2
3
4
c
MAIN_TXM L3502 1n 33p PRX_ANT J3501
L3510
.
82N
B
c h B
68n_DNI
L3504
Te
1
li e
J3502
G2
G1
C
A
b
4
1
2
3
DRX_ASM C3501 2.2N DRX_ANT
o
L3503
.M
C
C
68n
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
36_MMPA
A
A
7.5N_DNI
RF_TX_B7/B40/B41 L3603 1.3NH
1.2p
m
C3636
C3640
U3601
o
.c
3 RFIN_H VCC1 29 VDD_PA0
VCC2 30
RF_TX_B1/B2/B3/B4 L3602 1N 12 RFIN_M
VCC2_2 28 VDD_PA0
C3634
C3632
13
100p
RFIN_L1
100p
14 41 RF_B40_PRX_HBRX
7.5N
RFIN_L2 HBRX1
B 42
1.5p
HBRX2
c
C3603 C3638 VOUT10_3V2_RF R3605 51
8 VBATT HB1 33
B
100n
1U
C3604
C3635
V_VIO_1V8 7 VIO HB2 35 PA_OUT_B7
MIPI0_SCLK 6 37 PA_OUT_B40
e
SCLK HB3
MIPI0_SDA 5 SDATA HB4 39 PA_OUT_B41
1 21 PA_OUT_B2
1n_DNI
GND1 MB1
C3620
2 GND2 MB2 23 PA_OUT_B3/2
100p
15 25 PA_OUT_B1 L3651 1.8n_DNI TX_B34/39_Q
1
GND3 MB3
22 26 PA_OUT_B1_2
D3601
GND4 MB4
1
24 GND5 MB5 32 R3636 51
27 GND6
1U
C3621
R3601
C3612
31 GND7 LB1 19 51
2
li e
34 GND8 LB2 18 PA_OUT_B8
RF_TX_B5/B8 L3601 5.6N 36 GND9 LB3 17 PA_OUT_B28H
7.5N_DNI
b
3p
46 GND15 NC3 10
C3601 C3641 47 11
GND16 NC4
48 GND17
49 53
o
GND18 GND22
50 GND19 GND23 54
51 GND20 GND24 55
52 GND21 GND25 56
.M
C
C
w
Close to U3601
100K
C3606
6.8N_DNI
RT3601ソソス Aキナヨテ
T
RT3601
D
D
1 2 3 4 5 6
1 2 3 4 5 6
37_MATCHING_CIRCUIT_of_MMMBPA
ALL Close to U3601
A
C3702
PA_OUT_B5/BC0/B6/B19 C3712 6.8N 33P TX_B5 PA_OUT_B1 L3707 1.8n_DNI TX_B1 PA_OUT_B7 L3728 2.7n TX_B7 A
12n_DNI
51_DNI
C3701
C3704
L3722
51
0.5p_DNI
0.5p
L3724
C3711
L3729
1.8P
o m
12n
51_DNI
C3706
C3714
h .
0.5p_DNI
0.5p
L3713
L3703
B
CLOSE TO U3601
e c B
1 T TX_B3/2
C3707
C3703
L3737
li e
51
1P
0.5p_DNI
0.5p
L3736
C3708
C3705
L3740
.M
C
0.5p_DNI
L3738
1P_DNI
0.5p_DNI
C
w
w
w
D
D
37_MATCHING_CIRCUIT_of
1 2 3 4 5 6
1 2 3 4 5 6
38_Reserved
A
A
Z3801
o m
RF_B1_TRX_TXM C3801 2.7N 6
5
ANT
GND3
RX
TX
1
3 TX_B1_2
c
RF_B1_2_PRX
.
h
7 2
4.3N
GND4 GND1
8 GND5 GND2 4
c B
33n_DNI
e
L3801
L3802
1 T
li e
ob
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
39_TRX B1/B3TRX
china mobile use seprate dup
A
Z3902
L3912
A
C3909 3.6N 6 ANT RX 1 33p
TX 3 33p
5 GND3
7 2 C3910
4.3N
GND4 GND1
8 GND5 GND2 4
CMCC B3:13080322
Latin B2:13080315
L3911
C3911
Share pad
33p_DNI
TX_B3/2
o m
c
C3921 33p_DNI
B
6
2
TX_B1
5
U3901
AI AO 3
h . SHARE PAD
R3915
22 C3908 33p
L3901
5.1N RF_B3_PRX
c
GND
BAND_1_TX
BAND_3_TX/BAND_4_TX
G01341432_MODZH:13080383
V_FEM_RF_2V85
1 2
B
1n_DNI
GND1 VCC
6.2N
4 6
220
e
GND2 PON
C3903コヘC3909 share pad
220
C3904
T
R3903
BAND_1_RX/BAND_4_RX
R3902
L3909
1
ACFM_2113
BAND_3_RX
li e
RF_GPIO1_B3_LNA
33p_DNI
U3902
C3922
VALUE=DNI
ANT
L3908
b
C3907 33P_DNI 3n
o
RF_B1/B3_TRX_TXM C3903 33P_DNI
4.7n_DNI
4.7n_DNI
.M
C
C
L3904 L3903
w share pad
w
2.4N
D
D
1 2 3 4 5 6
1 2 3 4 5 6
40_TRX B2/PRX_GSM1900/B34_PRX
A
A
Z4003
1 UNB_PORT1 UNB_PORT2 4
3.3n_DNI
2 GND1
2.7N_DNI
GND 3 GND2 GND3 5
2.7N_DNI
VALUE=DNI
L4013
share pad
om
L4014
share pad
L4012
RX 1 L4011
1.5n
C4009 33p SHARE PAD
. c
3.3n_DNI
3.3n_DNI
h
TX 3 TX_B2
5 GND3 C4020
B 7 GND4 GND1 2
33p_DNI
c
8 GND5 GND2 4
CMCC B2:13080315 B
Latin B4:13080328
e
L4009
L4001
1 T
li e B2/B34/G1900
b
SHARE PAD
U4001
Z4002
o 1
2
OUTPUT1/J2
GND
VCTL1/VC
INPUT/J1
6
5
RF_GPIO0_B2/G1900_SPDT
.M
RF_B34_PRX_TXM C4001 33P 1 4 C4010 33P 3 4 RF_GPIO25_B34_SPDT
2.7N
UNB_PORT1 UNB_PORT2 OUTPUT2/J3
VCTL2/VC
100K
C
3n_DNI
2 GND1
3 GND2 GND3 5 C
R4002
Close to RFIC
L4003
L4007
w
w
D
D
40_TRX B2/PRX_GSM1900/
1 2 3 4 5 6
1 2 3 4 5 6
41_TRX_B28L/B28H/B20
A
A
18n_DNI
C4110 Z4102
RF_B28H_TRX_TXM 33p_DNI 6 1 C4111 33P_DNI L4113 RF_B28H_PRX
ANT RX
m
TX 3 TX_B28H
5 GND3
7 GND4 GND1 2
51
o
8 GND5 GND2 4 L4112
L4110
VALUE=DNI
c
8.2n_DNI
.
18n_DNI
L4111
c h B
B28L:13080348
B20: 13080283
Te
33p_DNI
Z4101
1 18n_DNI
L4108
li e
RF_B28L_TRX_TXM 6 ANT RX 1 C4104 33P_DNI RF_B20/B28L_PRX
C4103 TX 3 TX_B28L
5 GND3
7 GND4 GND1 2
51
VALUE=DNI
b
8.2n_DNI
o
18n_DNI
L4105
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
42_Reserved
A
A
o m
.c
B
c h B
Te
1
li e
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
43_PRX_G1800
A
A
o m
.c
B
Z4301
c h B
e
RF_G1800_PRX_TXM C4302 33P 1 UNB_PORT1 UNB_PORT2 4 C4301 33P L4303 2.2N RF_G1800_PRX
T
GND1
2.4N
10N
3 GND2 GND3 5
1
li e
L4302
L4301
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
44_TRX B5/8
A
A
Z4402
C4410
RF_B5/BC0_TRX_TXM 33p C4402 2.7N 6 ANT RX 1 C4408 39P C4405 39P L4406 18N RF_B5/BC0_PRX
m
TX 3 TX_B5
5
6.8N
GND3
GND 7 GND4 GND1 2 GND
27N
8 4
o
GND5 GND2
5.1n_DNI c
L4404
.
L4405
L4407
B
c h B
Te
Z4401
1
li e
RF_B8_TRX_TXM C4403 33p 6 ANT RX 1 L4411 33P C4406 33P L4403 15N RF_B8_PRX
TX 3 TX_B8
5 GND3
10N
18N
7 GND4 GND1 2
22N
8 GND5 GND2 4
o b
L4401
L4402
L4408
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
45_PRX_G900
A
A
o m
.c
B
c h B
Te
1
li e
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
46_PRX_B34
A
A
o m
.c
B
c h B
Te
1
li e
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
47_TRX B40
A
A
Z4701
PA_OUT_B40 C4702 33p 1 4 L4707 1N RF_B40_TX_TXM
UNB_PORT1 UNB_PORT2
1N_DNI
2 GND1
4.7N
3.6n
3 GND2 GND3 5
m
L4703 GND L4708
L4702
c o
B
h. B40 TRX use the same SAW path
c
C4720 33p_DNI
33p_DNI C4721 B
RF_B40_PRX_HBRX 33p
SHARE PAD
C4705 L4710
3n 5
U4701
AI AO 3
Te R4702
SHARE PAD
1 GND1 VCC 2
1
V_FEM_RF_2V85
1.3NH
li e
4 GND2 PON 6
1n
220
220
100K
C4714 L4709
C4710 RF_GPIO3_B40_LNA R4701 R4703
100p_DNI
C4713
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
48_TRX B7
A
A
o m
c
Z4801
C4809
.
RF_B7_TRX_TXM 2.7p 6 ANT RX 1 C4810 15p C4806 1.5n L4801 RF_B7_PRX
3 TX_B7 15p
51_DNI
TX
h
2.2n
1.5n
5 GND3
7 GND4 GND1 2
8 4
B GND5 GND2
c
L4802 L4806
L4807
B
Te
1
li e
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
49_TX_B41/PRX_B39+41
A
A
o m
c
Z4901
.
RF_B41_TX_TXM L4912 1.3NH 4 1 10p C4901 PA_OUT_B41
UNB_PORT2 UNB_PORT1
5.1n_DNI
GND1 2
h
5.1n
5.1n
0.5p_DNI
5 GND3 GND2 3
GND
B
c
GND B41 TX SAW:13010683
B
C4902
L4903
e
L4905
L4904
1T
RF_B39+41_RRX_TXM C4906 10p
i l e
2
Z4902
1
b
5.1N
2.7N
GND1 UNBALANCE_PORT-HCH1
3
o
GND2 UNBALANCE_PORT-LCH1
4 GND3
5 6 L4914 3.9N 33p C4907 L4910 2.2N RF_B39_PRX
GND4 UNBALANCE_PORT-LCH2
7 GND5
8 GND6 UNBALANCE_PORT-HCH2 9
10
4.3N
.M
GND7
L4908
L4907
w L4909
w
3N
L4911
D
D
1 2 3 4 5 6
1 2 3 4 5 6
50_Diversity_ASM
A
A
o m
U5001
HI6C18RLCV100
. c
h
13 DRX_ASM
ANT
DRX_B8 DRX_B34
B 2 RX02 RX01 3
c
DRX_B28 14 RX04 RX03 1 DRX_B5/BC0/B6/B19
DRX_B39+41 DRX_B40
DRX_B1/B3/B4
11
9
RX06
RX08
RX05
RX07
12
10 DRX_B7_SAW B
e
V_FEM_RF_2V85 4 VDD SDATA 6 MIPI0_SDA
C5005
8 7 MIPI0_SCLK
T
NC SCLK
15 GND VIO 5 V_VIO_1V8
1n_DNI
1U
1
li e
C5014
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
51_DRX SAW B7
A
A
o m
. c
B
Z5101
c h B
2GND1
OUT4
C5105
33p
Te
L5105 5.6n RF_B7_DRX
5GND2 GND33
L5104
1
33n_DNI
li e
L5101
ob
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
52_DRX_B34
A
A
o m
.c
Z5202 B34:13010613
B
2 GND1
1.3n
7.5n
c
3 GND2 GND3 5
B
e
L5205
L5210
1
li e
ob
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
53_DRX_B40
A
RF_GPIO3_B40_LNA A
100p_DNI
C5311
DRX_B40 1
Z5302
GND
VCC
1
2 V_FEM_RF_2V85
c
4 GND_RF RF_OUT 3 R5302 22
2 GND1
.
7.5n
C5312
3 GND2 GND3 5
1.3n
220
220
h
1N
B GND
R5303
R5301
c
L5305
L5310
Te
1
li e
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
B
A
D
C
1
1
54_DRX B1+3
DRX_B1/B3/B4
C5401
2
2
33p
L5405 5.1n
Z5401
B2/B4:13010616
B1/B3:13010606
1 UNBALANCEPORT-LCH CASE-GROUND/GND1
2
UNBALANCEPORT-HCH/INPUT_DIPLEX CASE-GROUND/GND2
3
CASE-GROUND/GND3
5
CASE-GROUND/GND4
7
w
6 UNBALANCEPORT-HCH/OUTPUT_BAND1 CASE-GROUND/GND5
8
CASE-GROUND/GND6
10
9 UNBALANCEPORT-LCH/OUTPUT_BAND3 GND
4
w
L5411
w
2.4n
3.3n
3
3
.M
L5404
RF_GPIO2_B1_LNA
100p_DNI
o
C5411
b
L5407 5.6n_DNI
4
5
6
C5407
li e
RF_IN
GND_RF
ENABLE
1
GND
33p
RF_OUT
VCC
GND
T
U5401
L5408
3
2
1
e
4
4
c
1N C5412
5.6n
R5401 220
.
V_FEM_RF_2V85
R5402
c RF_B3_DRX
22
o
R5403 220
m
5
L5403 2.2N
12p
C5404 2.4n
L5402
6
6
RF_B1_DRX
B
A
D
C
1 2 3 4 5 6
55_DRX B5/BC0
A
A
DRX_B5/BC0/B6/B19 1
2
Z5502
UNB_PORT1
GND1
UNB_PORT2 4 39p C5502
o m
L5504
27n RF_B5/BC0_DRX
c
3 5
12n
GND2 GND3
R5502
L5505
h .
0_DNI
B
e c B
1 T
li e
Z5501 C5501 L5502
DRX_B8 1 UNB_PORT1 UNB_PORT2 4 39p 22n RF_B8_DRX
2 GND1
b
9.1n
3 GND2 GND3 5
R5501
L5503
0_DNI
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
56_DRX_B28
A
A
o m
.c
B B28:13010655
B20:13010526
Z5601
C5602
c L5604 h B
e
DRX_B28 1 4 RF_B20/B28_DRX
INPUT OUTPUT
7.5n_DNI
2 1.3n_DNI
T
GROUND1 33p_DNI
3 GROUND2 GROUND3 5
1.3n_DNI
VALUE=DNI
L5603
li e
L5601
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
57_DRX_B39/B41
L5707 1N DRX_B39+41
A
1N_DNI
A
3.3N
L5704
L5705
m
Z5701
2 GND1 UNBALANCE_PORT-HCH1 1
3
o
GND2 UNBALANCE_PORT-LCH1 L5702
4 C5703
GND3
5 6 33p C5704 33p 1.3n RF_B39_DRX
GND4 UNBALANCE_PORT-LCH2
7 GND5
c
8 GND6 UNBALANCE_PORT-HCH2 9
10
.
GND7
1.3n
h
L5703
B
c
RF_GPIO4_B41_LNA
B
100p_DNI
Te
1
C5711
6 ENABLE
U5701
GND 1
li e C5702
b
L5711 3.3n 5 2 V_FEM_RF_2V85 L5701
RF_IN VCC
4 GND_RF RF_OUT 3 R5702 22 RF_B41_DRX
C5712
o
33p 1.3n
220
220
1N
C5701
.M
GND
C 1.2p
R5701
R5703
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
58. Reserved
A
A
o m
.c
B
c h B
Te
1
li e
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
59. Reserved
A
A
o m
.c
B
c h B
Te
1
li e
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
60_Reserved
A
VBAT_SYS A
C6005
1
DZ_A
D6001
4.7U
2
o m
. c
B
c h B
Te
1
li e
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
61 HI1102 RF
A
A
Z6104
Z6101
1 GND COMMON 3 C6115 10P C6116 10P WIFI_GPS_ANT1
12n_DNI
WB_RF_RFIO_2G R6101 0 1 4 L6102 1.8n 2 4 GPS_RF_IN
INPUT OUTPUT HIGH_BAND LOW_BAND
m
2
5.6n
GROUND1
12n
C6101
3 GROUND2 GROUND3 5
2
39p_DNI
c o L6104
L6101
L6113
B
GND GND
h .
e c B
1T
il e TCXO 38.4MHz
R6105 C6109 C6106 place XIN pad together
TCXO6101
7Z38400005
G
b VDD_CMU_LDO_TCXO
L6111 1N 4 VCC OUT 3 C6106 1n XIN
C6105
C6108 100n_DNI
o 1 GND1/NC
38.4
GND2 2
100n
VDD_CMU_LDO_TCXO GNSS_LNA_EN
.M
50mA
C
C6110 1n_DNI
1 from 2 C
U6101
w
BGA825L6SE6327 Z6102
1 GND ENABLE 6
2 5 L6106 5.6N 4 1 L6112 1N GPS_RF_IN
33n_DNI
VCC RF_IN UNB_PORT2 UNB_PORT1
3 RF_OUT GND_RF 4
w
GND1 2
5 GND3 GND2 3
120mA
w
L6103
Z6103
2
4.3n
GND1
D 3 GND2 GND3 5
D
GND
L6108
1 2 3 4 5 6
1 2 3 4 5 6
A
A
m
NFC_RF_SWIO2
R6201
MISC Interface 1 of 2
BFGN_UART_TX P1 BFGN_UART_RX PMU_BUCK_LX R16 PMU_BUCK_LX
BFGN_UART_RX R2 BFGN_UART_TX
E12 GPIO_035_HI1102_PWRON
c
PMU_PWRON
J4 CLK_REQ_OUT PMU_REFBP D13 PMU_REFBP
.
C18 FEM_5G_EX_LNA_EN RTC_CLK R4 CLK32_BFGN
C6201 3.9P
B15 FEM_5G_RX_EN WB_RF_RFI_5G H1
h
B17 FEM_5G_TX_EN WB_RF_RFO_2G D1 WB_RF_RFIO_2G
WB_RF_RFO_5G F1
FM_RF_IN
B B9 FM_RF_IN
c
WB_RF_TEST_0 E6
GNSS_LNA_EN
J8
D17
GNSS_BLK_EN/RF_TX_TEST_2
GNSS_LNA_EN
WB_RF_TEST_1
WB_RF_TEST_2
D7
G8 B
e
WB_RF_TEST_3 F9
GNSS_RF_RFI A8 GNSS_RF_RFI
WL_HOST_WAKE_UP G10 GPIO_213_WL_HOST_WAKEUP
GPIO_098_CDMA_GPS_SYNCK7
T
GPIO0/RF_TX_TEST_1
J10 GPIO1/RF_TX_TEST_3 WL_SDIO_CLK P7 WL_SDIO_CLK
WL_SDIO_CMD M7 WL_SDIO_CMD_R
G18 IR_TRX
1
WL_SDIO_D0 P9 WL_SDIO_D0_R
J6 ISM_PRIORITY/RF_TX_TEST_0 WL_SDIO_D1 R8 WL_SDIO_D1_R
LTE_INACT L8 LTE_INACT/COE_UART_TX/SSI_CLK WL_SDIO_D2 M9 WL_SDIO_D2_R
li e
E10 LTE_RX_ACT/RBIAS WL_SDIO_D3 N8 WL_SDIO_D3_R
GPIO_016_GNSS_PWM_SYNC
F17 GNSS_REF_CLK/GNSS_PWM_SYNC XIN L2 XIN
NFC_RF_ATB0
F15 GNSS_PPS_INOUT/GNSS_CAL_REQ XOUT M3
NFC_RF_ATB1
NC_1 K1
b
LTE_TX_ACT K11 LTE_TX_ACT/COE_UART_RX NC_2 D9
SSI_DATA/XLDO_MODE
o
35020892
.M
50mA
C
C
w
w 120mA
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
63 HI1102 POWER FM_RF FM_RF_IN L6302 220nH C6326 56P C6334 68P FM_ANT
82N_DNI
SDIO WL_SDIO_D3 R6304 22 WL_SDIO_D3_R
L6303
C6310 VOUT2_1V8
100n WL_SDIO_D0 R6306 22 WL_SDIO_D0_R A
near to R10:VDDIO
WL_SDIO_CMD R6308 22 WL_SDIO_CMD_R
SG6301
VDD_PMU_1P4 P13 K3
G
VDD_BUCK_1P4 VSS_CMU
ABB C6321 1u VDD_PMU_RFLDO1 VDD_PMU_CLDO1 E18 C10 GND
S
VDD_CLDO1_1 VSS_FM_RF_RX
G12 VDD_CLDO1_2
C6313 100P K9 VDD_CLDO1_3
m
near to K5:VDD_PMU_RFLDO1 N6 VDD_CLDO1_4 VSS_GF_ADC F13
VDD_PMU_RFLDO1 M1 VDD_CMU_1P2
U6201 VSS_GF_RF_FMLO_VCO C12
VDD_CMU_LDO_TCXO
o
L4 VDD_CMU_LDO_TCXO HI1102
VSS_GF_RF_GR F11
VDD_PMU_RFLDO1 A10 VDD_FM_RF_RX_1P2
D11
CMU
c
VSS_GF_RF_PLL
C6328 1u VDD_CMU_LDO_TCXO VDD_PMU_RFLDO3 B11 VDD_GF_RF_PLL_VCO_1P2
GND
.
VSS_GLOBAL_RF1 H7
near to L4:VDD_CMU_LDO_TCXO
VDD_PMU_RFLDO1 A7 VDD_GNSS_RF_RX_1P2 VSS_GLOBAL_RF2 H9
VSS_GLOBAL_RF3 J2
N18 VDD_NFC_PMU_SE1
h
C6350 2.2U M17 VDD_NFC_PMU_SE2 VSS_GLOBAL1 E16
near to M1:VDD_CMU_1P2 J12
PWR Interface 2 of 2
VSS_GLOBAL2
B RF M13 VDD_NFC_PMU_SWIO0 VSS_GLOBAL3 L10
c
N16 VDD_NFC_PMU_SWIO1 VSS_GLOBAL4 N4
GND C6332 VDD_PMU_PALDO
100n
M15 VDD_NFC_PMU_SWIO2 VSS_GLOBAL5 N10
SG6302
B
near to A2:VDD_WB_RF_PA2G_3P3_1P4 J16 C8
G
VDD_NFC_RF_PA VSS_GNSS_RF_RX
C6325 1u VDD_PMU_RFLDO1
PMU C6327
100n
PMU_REFBP
VBAT_SYS
K15
H15
VDD_NFC_RF_REC
G16
S
VDD_NFC_VBAT VSS_IR
T
GND C6307 1u VDD_PMU_SYSLDO VDD_PMU_1P4 A16 VDD_PMU_1P4 VSS_NFC_RF_ANA1 K13
near to A4:VDD_WB_RF_UPC2G5G_1P2
VSS_NFC_RF_ANA2 L12
C6323 220N VDD_PMU_RFLDO2 VDD_PMU_CLDO1 R14 VDD_PMU_CLDO1
1
VDD_PMU_CLDO2 N12 VDD_PMU_CLDO2 VSS_NFC_RF_GR H13
GND C6306 1u VDD_PMU_CLDO1 VSS_NFC_RF_PA L16
near to A5:VDD_WB_RF_VCO_LOGEN_1P2
VDD_PMU_PALDO C14 VDD_PMU_PALDO
li e
VSS_PMU_AGND1 A14
near to R14:VDD_PMU_CLDO1
VDD_PMU_RFLDO1 B13 VDD_PMU_RFLDO1 VSS_PMU_AGND2 M11
VDD_PMU_RFLDO2 A12 VDD_PMU_RFLDO2 VSS_PMU_AGND3 E14
GND C6322 47p VDD_PMU_RFLDO1 C6305 1u VDD_PMU_CLDO2
GND SG6303
VDD_PMU_SYSLDO R12 P17
G
VDD_PMU_SYSLDO VSS_PMU_PGND S
near to A7:VDD_GNSS_RF_RX_1P2 near to N12:VDD_PMU_CLDO2 VSS_PMU_PGND_TEST R18
VBAT_SYS P15 VDD_PMU_VBAT2
b
C6304 10u VDD_PMU_RFLDO1 VOUT2_1V8 R6302 22 VDDIO_D15 D15 VDD_PMU_VDDIO VSS_SR1 A18
C6324 220N VDD_PMU_RFLDO1 N2
near to D15:VDD_PMU_VDDIO
VSS_SR2
C6333
near to B13:VDD_PMU_RFCLDO1 VOUT2_1V8 P11 VDD_PMU_VDDIO2
near to F7:VDD_WB_RF_PLL_1P2
H5
o
VSS_WB_ABB_ADC_DAC
C6309 10u VDD_PMU_RFLDO2 VBAT_SYS C16 VDD_PMU_VPH VSS_WB_RF_GR G6
GND
VSS_WB_RF_LNA E4
near to A12:VDD_PMU_RFCLDO2 VDD_PMU_RFLDO1 K5 VDD_WB_ADDA_1P2
1u
VSS_WB_RF_MIX_UPC2G B5
GND C6316 100P VDD_PMU_RFLDO1 GND C6303 1u VDD_PMU_RFLDO3 VDD_PMU_RFLDO1 E2
.M
VDD_WB_RF_LNA_1P2
VDD_PMU_RFLDO1 F5 VDD_WB_RF_LPF_1P2 VSS_WB_RF_PA2G_A D3
near to E2:VDD_WB_RF_LNA_1P2 near to B11:VDD_GF_RF_PLL_VCO_1P2
C VDD_PMU_PALDO A2 VDD_WB_RF_PA2G_3P3_1P4
VSS_WB_RF_PA2G_B B3
H3 VDD_WB_RF_PPA5G_3P3 VSS_WB_RF_PA2G_BL1
VSS_WB_RF_PA2G_BL2
B1
C2 C
VDD_PMU_RFLDO1 F7
w
near to C14:VDD_PMU_PALDO VDD_WB_RF_PLL_1P2
VSS_WB_RF_PLL E8
VDD_PMU_RFLDO1 A4 VDD_WB_RF_UPC2G5G_1P2 VSS_WB_RF_PPA5G F3
C6301 4.7u VDD_PMU_1P4 L6301 2.2u PMU_BUCK_LX
VDD_PMU_RFLDO2 A5 VDD_WB_RF_VCO_LOGEN_1P2 VSS_WB_RF_PPA5G_BL G2
w
near to P13:VDD_PMU_1P4 VSS_WB_RF_TRAP D5
VOUT2_1V8 R10 VDDIO
VSS_WB_RF_TX5G_MIXBUF G4
SG6304
C6318 1u VDD_PMU_RFLDO1 C6
G
w
VSS_WB_RF_VCO_LOGEN S
near to F5:VDD_WB_RF_LPF_1P2
35020892
near to A10:VDD_FM_RF_RX_1P2
D
D
GND C6329 1u VOUT2_1V8
near to P11:VDD_PMU_VDDIO2
1 2 3 4 5 6
1 2 3 4 5 6
64. Reserved
A
A
o m
.c
B
c h B
Te
1
li e
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
65. Reserved
A
A
o m
.c
B
c h B
Te
1
li e
o b
.M
C
C
w
w
w
D
D
1 2 3 4 5 6
1 2 3 4 5 6
66 ANT TUNER
A
DIV ANT Tuner_4SPST
A
L6621 3N
L6602 3N U6601
SKY19256-701LF_204520B
V_FEM_RF_2V85
9 RF1 VDD 3
DIV_ANT_TUNER L6605 3N
8
6
RF2
RF3
RF4
VIO
CLCK
DATA
4
1
VOUT28_VIO L6606
MIPI0_SCLK
MIPI0_SDA
o m
68n V_VIO_1V8
c
10 GND USID 5
C6606
C6605
47N_DNI L6604
C6604
100n C6607
L6608
15P_DNI
1 1 1
C6603 h
100P
15P_DNI
2 2 2
B
c B
1.3nH
e
47N_DNI
1 T
li e
Tunable capacitor
o b
C6610
C6611
C6612
.M
C6615 10n
1u
1u
100n
U6602
C
VOUT2_1V8 C6616 22n
D1 VIO
39070264
VHV A4
C
B3 C1
w
AVDD OUTA
OUTB B1
VBAT_SYS R6610 3.3 L6610 15u B4 IND_BOOST OUTC B2 DRX_ANT_OUT
w
100K R6612
C3 SELID0 TEST A2
D4 SELID1
GND_REF C4
MIPI0_SCLK D3
w
CLK
MIPI0_SDA D2 DATA GNDDIG C2
C6613
C6614
100P_DNI
100P_DNI
D
D
1 2 3 4 5 6
1 2 3 4 5 6
[Link] MATCH
C6714 2.2u
51627501
82n
A C6713 2.2u
DIV GND P1 1
L6740 82n A
J6711
L6714
C6702 33p
STPTIC-27L2C4
m
51627501 B2
DC_BIAS
B1
8
C6712 33p L6702 82n L6704 82n DRX_ANT
o
P1 1 RF1 RF2
RFC
A1
U6702 L6743 100n 7 RF2 RF1 1 L6744 9.1n_DNI
J6701
U6703
100n
.c
82n
82n
4.7u C6703
6 GND2 47140258 GND1 2
SPDTソェケリ-02963980
CTRL1
5 3
L6712
L6705
L6703
CTRL2 VDD
B V_FEM_RF_2V85
4
B
68P C6742
TeRF_GPIO15_DIV_ANT1
RF_GPIO16_DIV_ANT2
TP6701
TP6702
68P
68P
1 1
li e
C6743
C6744
GPS & WIFI ANT
o b 51627501
P1 1 WIFI_TEST
22N
L6730
0.5p
C6731 0.5p
2.7n WIFI_GPS_ANT1
C6733
C6730 L6732
J6706
.M
2.7n
L6731
C
1.8p
C
51627501
P1 1
C6715 33p
DIV_ANT_TUNER
w 14241220
J6719
w P1 1
818010386
J6712
PCB GND_TOP
14241220
P1 1
w
J6705
D 14241220
P1 1
D
J6707
14241220
P1 1
J6709
1 2 3 4 5 6