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http://dx.doi.org/10.6113/JPE.2016.16.5.1833
JPE 16-5-22 ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718
Abstract
In grid-connected converter control, grid voltage feedforward is usually introduced to suppress the influence of grid voltage
distortion on the converter’s grid-side AC current. However, owing to the time-delay in control systems, the suppression effect of the
grid voltage distortion is seriously affected. In this paper, the positive effects of the grid voltage feedforward control are analyzed in
detail, and the time-delay caused by the low-pass filter (LPF) in the voltage filtering circuits and digital control are summarized. In
order to reduce the time-delay effect on the performance of the feedforward control, a voltage feedforward control strategy with
time-delay compensation is proposed, in which, a leading correction of the feedforward voltage is used. The optimal leading step
used in this strategy is derived from analyzing the phase-frequency characteristics of a LPF and the implementation of digital control.
By using the optimal leading step, the delay in the feedforward path can be further counteracted so that the performance of the
feedforward control in terms of suppressing the influence of grid voltage distortion on the converter output current can be improved.
The validity of the proposed method is verified through simulation and experiment results.
Key words: Feedforward control, Grid-connected converter, Leading correction, Time delay, Voltage distortion
© 2016 KIPE
1834 Journal of Power Electronics, Vol. 16, No. 5, September 2016
U dc U dc
GF (s) Ug (s)
ug ig ig
(a) (b)
Fig. 2. Experiment results of the startup performance. (a) Without Fig. 3. Control diagram of the converter with grid-voltage
grid-voltage feedforward control. (b) With grid-voltage feedforward.
feedforward control.
1
grid voltage feedforward is not adopted. In the startup stage of GL ( s ) (3)
RL Ls
the converter, it takes some time for the current regulator to
If a PR controller is used in the inner current loop, its
generate this component. Therefore, a current shock and a DC
transfer function can be expressed as [26]:
voltage overshoot usually occur, as shown in Fig. 2(a), where ig,
ug and Udc are the grid current, the grid voltage in one cycle and 2 K rc s
Gc ( s ) K p (4)
the DC voltage, respectively. The grid voltage is positive in the s 2c s 02
2
time interval T1, and the DC voltage is lower than its reference where, Kp is the proportional gain mainly affecting the
value at the beginning of the startup stage. As a result, a response speed of the system, ω0 is the resonant frequency,
positive ig is generated from the DC regulator to charge the ωc is the resonance bandwidth, and Kr is the resonance gain at
capacitor, and an obvious voltage overshoot occurs near the the resonant frequency. In this study, Kp=2, Kr=80, ω0=100
end of T1. Owing to this overshoot and the negative grid
and ωc=4 are used.
voltage during T2, the DC voltage regulator still generates a
From Fig. 3, the relation between the grid voltage and the
positive ig to discharge the capacitor to regulate the voltage
grid-side current can be given by:
towards its reference value.
I L ( s) GF ( s )GPWM ( s ) 1
When the feedforward control is adopted, the synchronous GL ( s ) (5)
component is directly added into the output of the current U g ( s ) 1 Gc ( s )GPWM ( s )GL ( s )
regulator without the requirements of the regulating process. In the ideal condition of GPWM(s) =1 and GF(s) =1, the
Accordingly, the shock in the startup stage can be greatly right-hand side term of the above equation is zero. That is,
reduced and the DC voltage overshoot can be eliminated. With the influence of the grid background voltage harmonics on
the same control parameters used in Fig. 2(a), the startup the converter’s output current can be completely eliminated
performance of the converter with the grid voltage feedforward by the grid voltage feedforward control.
control is shown in Fig. 2(b). It shows a prominent
improvement.
III. TIME DELAY CAUSED BY THE LPF AND
C. The Suppression Ability of the Feedforward Control on DIGITAL CONTROL
the Influence of Grid-Voltage Distortion
The principle of the suppression of the grid-voltage
Using Kirchoff’s laws on the main circuit shown in Fig.1, a
distortion for the feedforward control is that the converter
differential equation of the physical quantities can be given by:
quickly outputs a voltage which is exactly equal to the
diL distorted grid voltage. Therefore, the distorted grid voltage is
uo u g RLiL L (1)
dt completely counteracted by this voltage, and the influence of
Using Laplace transformation, the converter output current the grid voltage distortion on the grid-side current can be
can be expressed in the s-domain as: avoided. However, if a delay exists between the feedforward
U o ( s) U g ( s) voltage and the real grid voltage, the compensation precision
I L ( s) (2) of the grid-voltage disturbances will be decreased, and the
RL Ls suppression ability of the feedforward control on harmonic
Based on (2), a control diagram of the grid-connected voltages will be weakened.
converter with the voltage feedforward control is shown in The delay between the feedforward voltage and the real
Fig. 3, where GF(s), GPWM(s), Gc(s) and GL(s) are the transfer grid voltage may be caused by a large number of factors in
functions of the LPF in the grid-voltage filtering circuit, the practice. Among them, the LPF in the voltage filtering
PWM control, the current regulator, and the L-filter. The path circuits and the digital control are two major factors.
f in the figure is the grid-voltage feedforward path.
A. Time Delay Caused by an Analog Filter
From (2), the transfer function of the L-filter can be written
as: In the control system for a grid-connected converter, the
1836 Journal of Power Electronics, Vol. 16, No. 5, September 2016
System: LPF
Magnitude (dB)
Frequency (Hz): 2e+003
-10
Magnitude (dB): -3
-20
-30
0 Cut-off frequency
Phase (deg)
Fig. 4. Prototype of the control board for grid-connected converter. -45
-90
LPF is usually designed to filter noise and to ensure the Pure time delay
accuracy of the sampling signals. Fig.4 shows the control -135 1
LPF
2 3
10 10 10
board used in the following experimental study. It contains
Frequency (Hz)
current detection, temperature detection, LPF, fault detection,
Fig. 5. Frequency responses of the LPF and corresponding pure
fault display and protection, CPU and PWM signals. The time delay function.
widely-used second-order LPF can be expressed as:
1 some drawbacks. Just take the PWM technology widely used
GF ( s ) (6)
in converter control as an example. One of these drawbacks is
1 1
s2 s 1 the maximal duty-cycle limitation due to sampling and
2
cf Qcf computation. As a result, the one-step-delay control method
where, ωcf and Q are the cut-off frequency and quality factor is usually used for the converter control. This produces some
of the LPF. The phase lag caused by the LPF at the frequency delays between the calculation of the output-voltage
ωf can be given by: reference of the converter and the updating of the PWM
f cf comparison value [16]. The updating frequency is related to
df arctan( ) (7) the loading mode of the PWM module in the digital signal
Q (cf2 2f )
processor (DSP). The PWM comparison value usually
Due to the approximately linear phase-shift characteristics updates only at the peak or the trough of the carrier wave.
below the cut-off frequency, the phase lag caused by a LPF That is to say, it updates once in a switching cycle. If it
can be treated as a pure time delay. Taking the power updates at the peak and the trough of the carrier wave, this is
frequency as an example, the delayed time can be expressed twice in a switching cycle. Whether it updates once or twice
as: in a switching cycle, the delay always exists. The mechanism
1cf for the delay caused by the PWM updating is illustrated in
TLPF arctan( ) / 1 (8) Fig. 6 when the comparison value updates once in a
Q(cf2 12 )
switching cycle (only updated at the trough of the carrier
where, ω1 is the power frequency. Therefore, below the wave).
cut-off frequency, the LPF can be expressed simply as: Provided that the DSP is interrupted at n moment, the
GF ( s ) eTLPF s (9) PWM comparison value corresponding to uf(n-1)+u(n-1)
and obtained in the previous period will be updated
Both the frequency responses of the LPF described by (6) immediately (the meaning of the symbols uf and u are
and the corresponding pure time delay function obtained from shown in Fig. 1). In the present period, the grid voltage uf (n)
(9) are shown in Fig. 5 for comparison. Obviously, the LPF is sampled, and from Fig. 1, the output-voltage reference of
can be equivalent to a pure time delay function below the the converter can be determined by the sum of uf (n) and
cut-off frequency. u(n). However, the corresponding PWM comparison value
makes no contribution in the current switching cycle. It will
B. Time Delay Caused by the Digital Control
not be loaded until the DSP is interrupted again in the next
With the rapid development of digital signal processing
switching cycle. From the above, it is obvious that the
technology, digital control has become mainstream
loading mode of the PWM comparison value produces a
technology for grid-connected converters. Compared with
switching cycle delay. Therefore, the delay caused by the
analog control, digital control has higher reliability, is smaller
PWM loading can be modeled as:
in volume, lower in energy consumption and higher in
flexibility. Largely owing to such advantages, it is convenient Gd ( s ) e Ts s (10)
to realize complex and intelligent algorithms to achieve where, Ts is the switching cycle. In addition, when the PWM
higher performance of converters. However, it also brings comparison value is updated, this value is maintained
Voltage Feedforward Control … 1837
(a)
GP (s)
constantly until the next switching cycle. Then the duty cycle IL* (s) U ( s ) U o (s) I L (s)
Gc (s) GPWM(s) GL ( s )
of the PWM wave is generated by a comparison between this
value and the triangular carrier wave. This behavior can be
modeled as a zero order holder (ZOH) [17], which can be (b)
Ts s
expressed as (1 e )/s . In view of the sampler IL* (s) U ( s ) U o ( s) I L (s)
represented by 1/Ts, the delay caused by the ZOH and the Gc (s) GPWM(s) GL ( s )
sampler can be modeled as:
1 1 e Ts s
Gh ( s ) e 0.5Ts s (11) (c)
Ts s Fig. 7. Control diagram of the grid-connected converter. (a)
The PWM comparison value is updated only at the trough Equivalent control diagram of Fig.3. (b) Delay compensation in
of the carrier wave in the following study. In other words, it the feedforward path. (c) Equivalent control diagram when the
updates once in a switching cycle. Therefore, the total time time delay is fully compensated.
delay caused by the digital control is about 1.5Ts, which can
be expressed as: GP ( s ) 1/ GD ( s ) e mTs s (15)
1.5Ts s
GPWM ( s ) e (12) the delay in the feedforward path is fully compensated and
From the above analysis, if a PWM comparison value the corresponding control diagram can be simplified as Fig.
updates twice in a switching cycle, the total time delay 7(c).
caused by the digital control will be about one switching When the leading correction algorithm described by (15)
cycle. can be realized with the leading correction factor obtained
from (14), the delay in the feedforward path is fully
compensated, and the grid-side current is not affected by grid
IV. TIME-DELAY COMPENSATION FOR voltage distortion. However, it should be noticed that the
GRID-VOLTAGE FEEDFORWARD CONTROL leading correction factor m should be an integer in practice
In order to analyze the time delay in the feedforward path, due to the discreteness of the digital control period, while it is
the control diagram shown in Fig. 3 is equivalently converted usually a decimal according to (14). The integer m is called
into Fig. 7(a). Obviously, the total delay between the the leading step in the following study. Since the AD
feedforward voltage and the real grid voltage is the sum of conversion and the PWM reversal cannot be completed
the delay caused by the LPF and the digital control, which immediately, the optimal leading step should be the smallest
can be expressed as (13). integer that is greater than or equal to the number calculated
from (14) in practice. Therefore, the optimal leading step
GD ( s ) GPWM ( s ) GF ( s ) e mTs s (13)
should be selected as:
where, m is defined as the leading correction factor in the
base of a switching cycle Ts. In view of the analyses in III.A T
m 1.5 LPF (16)
and III.B and the PWM loading mode used in the following Ts
study, the value of m can be given by: If m has been selected as an integer according to (16) in the
T z domain, the leading correction algorithm with the optimal
m 1.5 LPF (14)
Ts leading step described by (15) can be expressed as:
In order to compensate the delay in the feedforward path, a GP ( z ) z m (17)
leading correction function Gp(s) for the feedforward voltage For a positive integer, (17) cannot be realized in a general
is proposed to be embedded in the feedforward path as shown control system. However, distorted grid voltages are usually
in Fig. 7(b). If the transfer function is selected as: periodic. Owing to the periodic recurrence characteristic of
1838 Journal of Power Electronics, Vol. 16, No. 5, September 2016
10
System: Feedforward_control
TABLE I
Frequency (HZ): 550 SYSTEM PARAMETERS
0 Magnitude (dB): -4.51
Symbol Description Value
-10
Ug Grid voltage (rms) 380 V
-20 Io Rated current 100 A
fs Switching frequency 9.6 kHz
Magnitude (dB)
-30
L Filter inductance 0.25 mH
-40 RL L-filter resistor 10 m
C DC capacitor 2820F
-50
-60 80
60
-70
Magnitude (dB)
With leading correction 40
Without leading correction
-80 2 3 4 20
10 10 10
Frequency (HZ) 0
-20
Fig. 8. Frequency responses of grid-side current versus grid
voltage with feedforward control. -40
0
Phase (deg)
System: SVG_Control
Phase Margin (deg): 47.3
algorithm can be realized in series with a one-cycle delay -90 Delay Margin (sec): 0.000124
At frequency (HZ): 1.06e+003
module, which can be expressed as: Closed Loop Stable? Yes
-135
GP ( z ) z N z m z N m (18)
-180
where, N is the number of sampling points in a power cycle, 10
1
10
2
10
3
10
4
(a) (a)
(b)
(b)
(c)
2.5
Without leading correction
With leading correction
2.0 (c)
2.5
Output current/A
1.5
0.5
1.0
0.0
3 6 9 12 15 18 21 24 27 30 33 36 39
0.5
Harmonic order
(d)
0.0
Fig. 10. Simulation results. (a) Distorted grid voltage. (b) Grid-side 3 6 9 12 15 18 21 24 27 30 33 36 39
current for feedforward control without leading correction. (c) Harmonic order
(d)
Grid-side current for feedforward control with leading correction.
(d) Harmonic spectrum of the grid-side current. Fig.11. Experiment results. (a) Distorted grid voltage. (b) Grid-side
current for feedforward control without leading correction. (c)
Grid-side current for feedforward control with leading correction.
about 47. The gain at 50Hz is about 60dB, which guarantees (d) Harmonic spectrum of the grid-side current.
the strong ability to track the power frequency signal.
A. Simulation Results shown in Fig. 10(c) and (b) and their harmonic spectrums are
given in Fig. 10(d) for a detailed comparison. Obviously,
A simulation model is built in the Matlab/PLECS
because of the delay in the feedforward path, the grid-side
environment, and the control algorithm is realized in the
current is seriously affected by grid voltage harmonics when
S-Function. The PWM comparison value updates once a
the leading correction is not adopted. However, this affection
switching cycle for the simulations and experiments. The
can be well suppressed by using the proposed leading
optimal leading step used in the following study is 3.
correction scheme.
Fig. 10(a) shows the distorted grid voltage used for the
simulation. The output current of the converter with or B. Experiment Results
without the leading correction of the feedforward voltage is The proposed scheme is also verified in a static var
1840 Journal of Power Electronics, Vol. 16, No. 5, September 2016
0 VI. CONCLUSIONS
5 10 15 20 25 30 35
Harmonic order Grid voltage feedforward control is an effective method for
Fig. 12. Experiment admittance of the converter at different suppressing the influence of grid voltage distortion on
voltage harmonics with different leading steps.
converter output current and for attenuating starting currents.
generator prototype with a TMS320F28335 controller. Fig. However, a delay in the feedforward path such as that from a
11(a) shows the grid voltage with the distortion used in the LPF and digital control will weaken its suppression ability in
experiment, and the grid-side current for the feedforward terms of grid-voltage harmonics. By the above theoretical
control without the leading correction is shown in Fig. 11(b). analysis, simulation and experiment results, it can be
It can be seen that the grid-side current contains harmonics concluded that:
caused by the grid voltage distortion, and that the total 1) Both the LPF in the conditioning circuit for the grid
harmonic distortion (THD) of the grid-side current is about voltage detection and the digital control will introduce some
8.08%. delay in the grid voltage feedforward path.
With the same control parameters and experimental 2) The delay in the feedforward path will cause an
conditions, the grid-side current for the proposed scheme is asynchrony between the feedforward voltage and the real grid
shown in Fig. 11(c). In addition, Fig. 11(d) shows the voltage. This asynchrony reduces the performance of the
harmonic spectrums of the output current of the converter feedforward control in terms of suppressing the influence of
with and without the proposed scheme. Obviously, owing to grid voltage distortion on converter output current.
the leading correction of the feedforward voltage, the effect 3) A delay in the feedforward path can be compensated by
of the grid voltage harmonics is suppressed well, and the introducing a leading correction function of the feedforward
THD of the grid-side current is reduced from 8.08% to voltage. Owing to this strategy, the performance of the
2.23%. feedforward control can be markedly improved.
There are some differences between the experimental and 4) In digital control, an optimal leading step exists for a
simulation results as shown in Fig. 10 and Fig. 11. These given LPF and PWM operation mode. In addition, the greater
differences can be caused by the following factors. Normally the deviation from this step is, the worse the feedforward
variations do exist between the nominal and the real value of performance becomes in terms of suppressing the influence
L-filters and the LPF used in the experiment and the of grid voltage distortion on the converter output current
inductances vary with the current level, so that the values are becomes.
not constant during operation [29], [30]. All of them affect
the suppression ability of the converter on grid-voltage ACKNOWLEDGMENT
distortions. In addition, some other factors cause harmonics in This work was supported by the National Nature Science
the grid-side current besides the grid voltage distortion, such Foundation of China under grant 51507139, the Major
as the dead-time that is injected into the PWM signals to avoid Scientific and Technological Innovation Projects of Shaanxi
the shoot-through of the power switches in a converter leg. Province under grant 2015ZKC02-01 and the Key Discipline
In order to quantify the suppression ability of the converter Special Foundation of Shaanxi Province under Grant
on the hth grid voltage harmonic, an equivalent admittance for 5X1301.
the hth harmonic is defined as:
Ih
Ah (20) REFERENCES
Uh [1] IEEE Standard for Interconnecting Distributed Resources
where, Ah is the converter’s equivalent admittance at the hth With Electric Power Systems, IEEE Std. 1547-2003, Jul.
harmonic frequency, and Ih and Uh are the hth harmonic 28, 2003.
Voltage Feedforward Control … 1841
[2] I. Dolguntseva, R. Krishna, D. E. Soman, and M. Leijon, inverter,” IEEE Trans. Ind. Electron., Vol. 62, No. 7, pp.
“Contour-based dead-Time harmonic analysis in a 4563-4572, Jul. 2015.
three-level neutral-point-clamped inverter,” IEEE Trans. [18] T.-L. Lee, Y.-C. Wang, J.-C. Li, and J. M. Guerrero, “Hybrid
Ind. Electron., Vol. 62, No. 1, pp. 203-210, Jun. 2015. active filter with variable conductance for harmonic
[3] D.-H. Lee and J.-W. Ahn, “A simple and direct dead-time resonance suppression in industrial power systems,” IEEE
effect compensation scheme in PWM-VSI,” IEEE Trans. Trans. Ind. Electron., Vol. 62, No. 2, pp. 746-756, Feb.
Ind. Appl., Vol. 50, No. 5, pp. 3017-3025, Sep. 2014. 2015.
[4] H. Zhou, Y. W. Li, N. R. Zargari, Z. Cheng, R. Ni, and [19] L. Harnefors, A. G. Yepes, A. Vidal, and J.
Y. Zhang, “Selective harmonic compensation (SHC) PWM Doval-Gandoy, “Passivity-based controller design of
for grid-interfacing high-power converters,” IEEE Trans. grid-connected VSCs for prevention of electrical resonance
Power Electron., Vol. 29, No. 3, pp. 1118-1127, Mar. 2014. instability,” IEEE Trans. Ind. Electron., Vol. 62, No. 2, pp.
[5] IEEE Recommended Practices and Requirements for 702-710, Feb. 2015.
Harmonic Control in Electrical Power Systems, IEEE Std. [20] J. R. Fischer, S. A. Gonzalez, M. A. Herran, M. G.
519-1992, May 10, 1992. Judewicz, and D. O. Carrica, “Calculation-delay tolerant
[6] IEEE Recommended Practice for Utility Interface of predictive current controller for three-phase inverters,”
Photovoltaic (PV) Systems, IEEE Std. 929-2000, Jan. 2000. IEEE Trans. Ind. Informat., Vol. 10, No. 1, pp. 233-242,
[7] Z. Li, Y. Li, P. Wang, H. Zhu, C. Liu, and F. Gao, Feb. 2014.
“Single-loop digital control of high-power 400-Hz ground [21] T.-V. Tran, T.-W. Chun, H.-H. Lee, H.-G. Kim, and E.-C.
power unit for airplanes,” IEEE Trans. Ind. Electron., Vol. Nho, “Control method for reducing the THD of grid current
57, No. 2, pp. 532-543, Feb. 2010. of three-phase grid-connected inverters under distorted grid
[8] L. F. A. Pereira, J. V. Flores, G. Bonan, D. F. Coutinho, and voltages,” Journal of Power Electronics, Vol. 13, No. 4,
J. M. G. D. S. Jr, “Multiple resonant controllers for pp. 712-718, Jul. 2013.
uninterruptible power supplies – A systematic robust [22] X. Wu, X. Li, X. Yuan and Y. Geng, “Grid harmonics
control design approach,” IEEE Trans. Ind. Electron., Vol. suppression scheme for LCL-type grid-Connected inverters
61, No. 3, pp. 1528-1538, Mar. 2014. based on output admittance revision,” IEEE Trans. Sustain
[9] Y. Yang, K. Zhou, and M. Cheng, “Phase compensation Energy., Vol. 6, No. 2, pp. 411-421, Aprial. 2015.
resonant controller for PWM converters,” IEEE Trans. Ind. [23] M. Xue, Y. Zhang, Y. Kang, Y. Yi, S. Li, and F. Liu, “Full
Informat., Vol. 9, No. 2, pp. 957-964, May. 2013. feedforward of grid voltage for discrete state feedback
[10] P. Xiao, K. A. Corzine, and G. K. Venayagamoorthy, controlled grid-connected inverter with LCL filter,” IEEE
“Multiple reference frame-based control of three-phase Trans. Power Electron., Vol. 27, No. 10, pp. 4234-4247,
PWM boost rectifiers under unbalanced and distorted input Oct. 2012.
conditions,” IEEE Trans. Power Electron., Vol. 23, No. 4, [24] X. Wang, X. Ruan, S. Liu, and C. K. Tse, “Full feedforward
pp. 2006-1127, Jul. 2017. of grid voltage for grid-connected inverter with LCL filter
[11] A. Luo, Y. Chen, Z. Shuai, and C. Tu, “An improved to suppress current distortion due to grid voltage
reactive current detection and power control method for harmonics,” IEEE Trans. Power Electron., Vol. 25, No. 12,
single-phase photovoltaic grid-connected DG system,”IEEE pp. 3119-3127, Dec.2010.
Trans. Energy. Convers., Vol. 28, No. 4, pp. 823-831, [25] W. Li, X. Ruan, D. Pan, and X. Wang, “Full-feedforward
Dec.2013. schemes of grid voltages for a three-phase LCL-type
[12] J. Kan, S. Xie, Y. Wu, Y. Tang, Z. Yao, and R. Chen, grid-connected inverter,” IEEE Trans. Ind. Electron., Vol.
“Single-stage and boost-voltage grid-connected inverter for 60, No. 6, pp. 2237-2250, Jun. 2013.
fuel-cell generation system,” IEEE Trans. Ind. Electron., [26] D.-Y. Kim, W.-S. Im, S.-H. Hwang and J.-M. Kim,
Vol. 62, No. 9, pp. 5480-5490, Sep. 2015. “Compensation of current offset error in half-bridge PWM
[13] Y. Han, P. Shen, and J. M.Guerrero, “Stationary frame inverter for linear compressor,” Journal of Power
current control evaluations for three-phase grid-connected Electronics, Vol. 15, No. 6, pp. 1593-1600, Nov. 2015.
inverters with PVR-based active damped LCL filters,” [27] A. G. Yepes, F. D. Freijedo, J. Doval-Gandoy, O. Lo´pez,J.
Journal of Power Electronics, Vol. 16, No. 1, pp. 297-309, Malvar, and P. Fernandez-Comesa˜na, “Effects of
Jan. 2016. discretization methods on the performance of resonant
[14] D. Sun, B. Ge, W. Liang, H. Abu-Rub, and F. Z. Peng, “An controllers,” IEEE Trans. Power Electron., Vol. 25, No. 7,
energy stored quasi-Z-source cascade multilevel pp. 1692-1712, Jul.2010.
inverter-based photovoltaic power generation system,” [28] R. W. Erickson and D. Maksimovic, Fundamentals of
IEEE Trans. Ind. Electron., Vol. 62, No. 9, pp. 5458-5467, Power Electronics,2nd ed. Norwell, MA: Kluwer,
Sep. 2015. pp.330-410, 2001.
[15] Y. Chen, A. Luo, Z. Shuai, and S. Xie, “Robust predictive [29] T.-F. Wu, C.-H. Chang, L.-C. Lin, Y.-C. Chang, and Y.-R.
dual-loop control strategy with reactive power Chang, “Two-phase modulated digital control for
compensation for single-phase grid-connected distributed three-phase bidirectional inverter with wide inductance
generation system,” IET Power Electron., Vol. 6, No. 7, pp. variation,” IEEE Trans. Power Electron., Vol. 28, No. 4,
1320-1328, Jan. 2013. pp.1598-1607, April 2013.
[16] Z. Wan, J. Xiong, J. Lei, C. Chen, and K. Zhang, “A [30] T.-F. Wu, C.-H. Chang, L.-C. Lin, G.-R. Yu, and Y.-R.
modified capacitor current feedback active damping Chang, “A D−Σ digital control for three-phase bidirectional
approach for grid connected converters with an LCL filter,” inverter to achieve active and reactive power injection,”
Journal of Power Electronics, Vol. 15, No. 5, pp. IEEE Trans. Ind. Electron., vol. 61, no. 8, pp. 3879-3890,
1286-1294, Sep. 2015. Aug. 2014.
[17] D. Yang, X. Ruan, and H. Wu, “A real-time computation
method with dual sampling modes to improve the current
control performances of the LCL-type grid-connected
1842 Journal of Power Electronics, Vol. 16, No. 5, September 2016
Shude Yang was born in Henan, China, in Xiangqian Tong was born in Shaanxi, China,
1986. He received his B.S. and M.S. degrees in 1961. He received his B.S. degree in
in Electrical Engineering from Henan Electrical Engineering from the Shaanxi
Polytechnic University, Jiaozuo, China, in Institute of Technology, Hanzhong, China, in
2009 and 2012, respectively. Since 2012, he 1983; his M.S. degree from the Xi’an
has been working towards his Ph.D. degree in University of Technology, Xi’an, China, in
the School of Automation and Information 1989, and his Ph.D. degree in Electrical
Engineering, Xi’an University of Technology, Engineering from Xi’an Jiaotong University,
Xi’an, China. His current research interests include power quality, Xi’an, China, in 2006. He joined the Xi’an University of
renewable energy generation, and the control and stability analysis Technology, in 1989. Since 2002, he has been a Professor and the
of grid-connected converter systems. Academic Leader of Electrical Engineering with the Xi’an
University of Technology. His current research interests include
the application of power electronics in power systems, and the
control of power quality, especially power filters, static
synchronous compensators, and high voltage direct current.