MARIA COLLEGE OF ENGINEERING & TECHNOLOGY- ATTOOR. MARIA COLLEGE OF ENGINEERING & TECHNOLOGY- ATTOOR.

DEPARTMENT OF ECE DEPARTMENT OF ECE

SERIES TEST- I SERIES TEST- I

VLSI DESIGN-EC8095 VLSI DESIGN-EC8095

MAX MARKS: 50 MAX MARKS: 50
TIME : 2 Hrs YEAR: III ECE TIME : 2 Hrs YEAR: III ECE
PART A (2×5 =10) PART A (2×5 =10)
1. What is meant Channel length modulation in NMOS 1. What is meant Channel length modulation in NMOS
transistors? transistors?
2. Define propagation delay of a CMOS inverter 2. Define propagation delay of a CMOS inverter
3. Define Elmore constant? 3. Define Elmore constant?
4. Draw the DC transfer characteristics of CMOS inverter? 4. Draw the DC transfer characteristics of CMOS inverter?
5. Define lambda based design rules used for layout? 5. Define lambda based design rules used for layout?

PART B (8× 2 = 16) PART B (8× 2 = 16)

1. Draw the layout and stick diagram for NAND and NOR gate? 1. Draw the layout and stick diagram for NAND and NOR gate?
2. Explain the need for scaling, scaling principles and 2. Explain the need for scaling, scaling principles and
fundamental units of CMOS inverter fundamental units of CMOS inverter

PART C (12× 2 =24 ) PART C (12× 2 =24 )

1. Draw and explain the DC and Transfer characteristics of a
CMOS inverter with necessary conditions for the different
region of operation?
2. Write short notes on (i) Rationed circuits (ii)Dynamic CMOS
circuits
1. Draw and explain the DC and Transfer characteristics of a
CMOS inverter with necessary conditions for the different
region of operation?
2. Write short notes on (i) Rationed circuits (ii)Dynamic CMOS
circuits