Invitation to Computer Science 6th Edi-

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Chapter 5: Computer Systems Organization

TRUE/FALSE

1. The branch of computer science that studies computers in terms of their major functional units and
how they work is known as computer organization.

ANS: T PTS: 1 REF: 218

2. Both RAM and ROM are memory chips into which information has been prerecorded during
manufacture.

ANS: F PTS: 1 REF: 223-224

3. Memory locations are stored in row major order.

ANS: T PTS: 1 REF: 229

4. As computers become faster, memory access speeds are keeping pace.

ANS: F PTS: 1 REF: 232

 5. The principle of locality states that when the computer uses something, it will probably use it again
very soon.

ANS: T PTS: 1 REF: 233

6. In a two-level memory hierarchy, when the computer needs a piece of information, it looks in RAM
first, then cache memory.

ANS: F PTS: 1 REF: 233

7. Registers can be accessed much more quickly than random access memory.

ANS: T PTS: 1 REF: 241

8. The instructions that can be decoded and executed by the control unit of a computer are represented in
machine language.

ANS: T PTS: 1 REF: 245

9. The set of all operations that can be executed by a processor is called its I/O set.

ANS: F PTS: 1 REF: 247

10. The Von Neumann bottleneck is the inability of the sequential one-instruction-at-a-time computer Von
Neumann model to handle today’s large-scale problems.

ANS: T PTS: 1 REF: 263

MODIFIED TRUE/FALSE

1. The Memory Data Register contains the address of the cell being fetched or stored.
_________________________

ANS: F
data value
data values
data

PTS: 1 REF: 227

2. Examples of volatile storage are mass storage devices such as disks and tapes.
_________________________

ANS: F
nonvolatile
non volatile
non-volatile

PTS: 1 REF: 235

3. The sectors of a disk are placed in concentric circles called cells. _________________________
 ANS: F
tracks
track

PTS: 1 REF: 236

4. The normal mode of operation of a Von Neumann machine is sequential.

_________________________

ANS: T PTS: 1 REF: 249

5. MIMD parallelism is a scalable architecture. _________________________

ANS: T PTS: 1 REF: 267

COMPLETION

1. Computer manufacturers use a standard cell size of eight ____________________.

ANS:
bits
bit

PTS: 1 REF: 224

2. In a direct access storage device, every unit of information has a unique ____________________.

ANS: address

PTS: 1 REF: 235

3. The three parts of the ALU together are known as the ____________________.

ANS: data path

PTS: 1 REF: 241

4. Machines that use the simplified approach to designing instruction sets are known as
____________________ machines.

ANS:
reduced instruction set computers
RISC
reduced instruction set computers (RISC)
RISC (reduced instruction set computers)

PTS: 1 REF: 247

5. The first computer to achieve a speed of 1 million floating-point operations per second, 1
____________________, was the Control Data 6600 in the mid-1960s.

ANS: megaflop
 PTS: 1 REF: 266

MULTIPLE CHOICE

1. To understand how computers process information, we must study computers as collections of ____
that perform tasks such as information processing, information storage, computation, and data transfer
functional units.
a. data types c. hardware
b. functional units d. memory units
ANS: B PTS: 1 REF: 218

2. The acronym ____ is frequently used to refer to the memory unit of a computer.
a. ROM c. MDR
b. CD d. RAM
ANS: D PTS: 1 REF: 223

3. There are ____ bytes in a gigabyte.

a. 210 c. 230
b. 220 d. 2100
ANS: C PTS: 1 REF: 225

4. In a ____, the original contents of the memory cell are unchanged.

a. nondestructive fetch c. random access memory
b. destructive store d. volatile storage
ANS: A PTS: 1 REF: 225-226

5. To solve the difficulty of scaling memory organization, memories are physically organized into a
____-dimensional organization.
a. one c. three
b. two d. multi
ANS: B PTS: 1 REF: 229

6. A cache is typically ____ times faster than RAM but much smaller.
a. 5 to 10 c. 20 to 30
b. 15 to 20 d. 25 to 30
ANS: A PTS: 1 REF: 233

7. The ____ are the devices that allow a computer system to communicate and interact with the outside
world as well as store information.
a. registers c. control units
b. arithmetic/logic units d. input/output units
ANS: D PTS: 1 REF: 235

8. The ____ of a disk is the time needed to position the read/write head over the correct track.
a. latency c. transfer speed
b. frequency d. seek time
ANS: D PTS: 1 REF: 237
 9. The ____ of a disk is the time for the beginning of the desired sector to rotate under the read/write
head.
a. latency c. frequency
b. transfer time d. seek time
ANS: A PTS: 1 REF: 237

10. A(n) ____ handles the details of input/output and compensates for any speed differences between I/O
devices and other parts of the computer.
a. cache c. decoder circuit
b. I/O register d. I/O controller
ANS: D PTS: 1 REF: 239

11. To alert the computer that an input/output operation is done, a(n) ____ is transmitted to the processor.
a. condition code c. broadcast
b. interrupt signal d. execution instruction
ANS: B PTS: 1 REF: 239

12. A(n) ____ is a storage cell that holds the operands of an arithmetic operation and that, when the
operation is complete, holds its result.
a. decoder c. I/O controller
b. register d. cache
ANS: B PTS: 1 REF: 241

13. If a computer has a maximum of 2N memory cells, then each address field in a machine language
instruction must be ____ bits wide to enable us to address every cell.
a. N c. N2
b. 2N d. 2N
ANS: A PTS: 1 REF: 246

14. ____ machines are designed to directly provide a wide range of powerful features so that finished
programs for these processors are shorter.
a. MISC c. SISC
b. SICC d. CISC
ANS: D PTS: 1 REF: 247

15. The ____ operation in Von Neumann machines uses a special set of bits known as condition codes.
a. compare c. control
b. addition d. looping
ANS: A PTS: 1 REF: 249

16. The ____ machine language instructions alter the normal sequential flow of control.
a. data transfer c. branch
b. arithmetic d. compare
ANS: C PTS: 1 REF: 249

17. It is the task of the ____ to fetch and execute instructions.

a. arithmetic/logic unit (ALU) c. memory
b. I/O controllers d. control unit
 ANS: D PTS: 1 REF: 251

18. The ____ holds the address of the next instruction to be executed.
a. status register c. condition register
b. program counter d. instruction register
ANS: B PTS: 1 REF: 252

19. During the ____ phase, the control unit circuitry generates the necessary sequence of control signals
and data transfer signals to the other units of the computer to carry out the instruction.
a. fetch c. store
b. execution d. decode
ANS: B PTS: 1 REF: 257

20. In the SIMD parallel processing model, the control unit ____ instructions to every ALU.
a. broadcasts c. stores
b. decodes d. encodes
ANS: A PTS: 1 REF: 263

SHORT ANSWER

1. What are the four major subsystems of the Von Neumann architecture?

ANS:
The four major components are memory, input/output, the arithmetic logic unit, the control unit.

PTS: 1 REF: 222 TOP: Critical Thinking

2. Draw an analogy between cache memory and a home refrigerator.

ANS:
Without a home refrigerator, we would have to go to the grocery store every time we needed an item;
this corresponds to slow, regular memory access. Instead, what we go to the store we buy not only
what we need now but also what we think we will need in the near future, and we put those items into
our refrigerator. Now, when we need something, we first check the refrigerator. If it is there, we can
get it at a much higher rate of speed and we only need to go to the store when the food item we want is
not there.

PTS: 1 REF: 234 TOP: Critical Thinking

3. What is the most fundamental characteristic of the Von Neumann architecture?

ANS:
The most fundamental characteristic is the stored program — a sequence of machine language
instructions stored as binary values in memory.

PTS: 1 REF: 244 TOP: Critical Thinking

4. Other than clock speed, what is an accurate measure of machine speed?

ANS:
 Instruction rate, measured in MIPS, an acronym for millions of instructions per second, is an accurate
measure of machine speed. The instruction rate measures how many machine language instructions
can be fetched, decoded, and executed in one second.

PTS: 1 REF: 260 TOP: Critical Thinking

5. What is cluster computing?

ANS:
MIMD parallel processing (multiple instruction stream/multiple datastream), also called cluster
computing, is a widely used form of parallelism, in which we replicate entire processors rather than
just the ALU, and every processor is capable of executing its own separate program in its own private
memory at its own rate.

PTS: 1 REF: 265 TOP: Critical Thinking

ESSAY

1. What is random access memory, and what are its three characteristics?

ANS:
Computer memory uses an access technique called random access, and the memory unit is frequently
referred to as random access memory (RAM). RAM has the following three characteristics:

· Memory is divided into fixed-size units called cells, and each cell is associated with the unique
identifier called an address. These addresses are the unsigned integers 0, 1, 2, ..., MAX.
· All accesses to memory are to a specified address, and we must always fetch or store a
complete cell — that is, all the bits in that cell. The cell is the minimum unit of access.
· The time it takes to fetch or store the contents of a cell is the same for all the cells in memory.

PTS: 1 REF: 223 TOP: Critical Thinking

2. When a computer needs a piece of information, does it immediately perform the memory fetch
operation? If not, what does it do?

ANS:
First, the computer looks in cache memory to see whether the information is there. If it is, then the
computer can access it at a higher speed of the cache. If the desired information is not in the cache,
then it accesses it from RAM at the slower speed, using the fetch operation. Finally, the data just
fetched is copied into the cache along with the appropriate immediately following memory locations.
If the cache is full, then some of the older items that have not been recently accessed are discarded.
(The assumption is that they will not be needed again for a while.)

PTS: 1 REF: 233 TOP: Critical Thinking

3. Explain what a register is and how it differs from random access memory cells.

ANS:
A register is a storage cell that holds the operands of an arithmetic operation and that, when the
operation is complete, holds its results. Registers are quite similar to random access memory cells,
with the following minor differences:
 · They do not have a numeric memory address but are accessed by a special register designator
such as A, X, or R0.
· They can be accessed much more quickly than regular memory cells. Because there are few
registers (typically, a few dozen up to 100), it is reasonable to utilize the expensive circuitry
needed to make the fetch and store operations 5 to 10 times faster than regular memory cells,
of which there will be billions.
· They are not used for general-purpose storage but for specific purposes such as holding the
operands for an upcoming arithmetic computation.

PTS: 1 REF: 241 TOP: Critical Thinking

4. Explain at length what scalability means.

ANS:
Scalability means that, at least theoretically, it is possible to match the number of processors to the size
of the problem. If 100 processors are not enough to solve a problem, then 200 or 500 can be used
instead, assuming the interconnection network can provide the necessary communications.
(Communications can become a serious bottleneck in a parallel system.) In short, the resources applied
to a problem can be in direct proportion to the amount of work that needs to be done. Massively
parallel machines containing tens of thousands of independent processors have achieved solutions to
large problems thousands of times faster than is possible using a single processor.

PTS: 1 REF: 267 TOP: Critical Thinking

5. Describe at length what quantum computing is.

ANS:
In quantum computing, computers are designed according to the principles of quantum mechanics,
which describe the behavior of matter at the atomic and subatomic level. A quantum computer encodes
information using some aspect of quantum-mechanical state, such as electron spin or photon
polarization. However, unlike “traditional” data bits, which at any instant of time must be either a 0 or
a 1 but not both, quantum theory says that a quantum bit, or qubit, can be either a 0 or a 1 or both a 0
and a 1 at the same time. In theory, a quantum computer could do multiple computations on different
numbers at the same time. In fact, with just 500 qubits of quantum memory, each of which could be
viewed as being both a 0 and a 1, we could theoretically perform 2500 simultaneous computations—a
number larger than the total number of atoms in the universe. There are still a lot of obstacles to
overcome before quantum computers become a reality, but a great deal of progress has been made in
the last few years. There is much debate about whether a workable quantum computer will take 10
years, 25 years, or perhaps another century to design and construct. However, the underlying theory of
quantum computing is sound, and a quantum computer will likely be a reality, even if we are not sure
exactly when.

PTS: 1 REF: 268 TOP: Critical Thinking