European Wireless 2016
FPGA-based test-bed for visible light
communication physical layer study
Muhammad Saad Saud∗ , Marko Wirtanen∗ , Helal Chowdhury∗ , Tuomo Hänninen∗ , Juha Häkkinen† , Marcos Katz∗
∗ Centre
for Wireless Communications (CWC)
† Circuits
and Systems (CAS) Group
University of Oulu, Finland
Email: {muhammad.saud, mwirtane, helal.chowdhury, tuomo.hanninen, hakki, marcos.katz}@ee.oulu.fi
Abstract—In this paper, a field-programmable gate array
(FPGA)-based, visible light communication (VLC) test-bed im-
plementation is reported. The overall test system is capable of
generating digital signals such as tones and modulated data,
transmitting it through one node and receiving it back through
another node or looping it back from same node using VLC front-
end circuits. This system is primarily developed to evaluate the
quality of VLC front-ends, different receiver (Rx) and transmitter
(Tx) configurations, and different geometries amid increased
interest of researchers in this technology to cope up with different
real-world problems in the field of VLC.
Index Terms—field-programmable gate array (FPGA), embed-
ded systems, visible light communication (VLC), MicroBlaze,
ML605, FMC150.
I. I NTRODUCTION
Since the number of smart devices as well as wide-band
services are increasing enormously, radio frequency (RF)
spectrum has become a crucial resource. It has piqued re-
searchers’ interest on non-conventional wireless technologies
like optical wireless communication in general and VLC in
particular which can supplement radio spectrum to increase
network capacity or replace/switch it in some environments
or conditions. Visible light has a much more larger spectrum
than the entire RF spectrum (including terahertz waves), and is
unlicensed. Due to its massive spectrum and high bandwidth
promise, it is often considered potentially part of the 5G and
beyond. Moreover, visible light is considered safe technology
compared to radio waves which may cause health risks.
Another advantage of this technology is security. Light beams
are very directional, and signal cannot pass through walls.
These properties embed physical layer security in it, making
it almost impossible to eavesdrop. Directivity not only adds
security, it also saves the system from interference. Therefore,
in VLC systems interference from other light sources can be
avoided easily, in addition to the advantage that VLC has
no radio interference. These properties of VLC make it a
attractive choice in future wireless communication systems.
At present, researchers’ main interest is to use VLC for
indoor communication as a supplement to RF to increase
spectrum resources. There can be two types of indoor links
operating on VLC: communication through diffused light link,
and strictly aligned light links. In both cases light can be
easily blocked in different real life scenarios. This supports the
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ISBN 978-3-8007-4221-9 383
development of hybrid radio-optical systems. In hybrid radio-
optical systems the optical spectrum can be supplemented to
increase data rates, switched based on optical link availability,
or selected based on other criteria.
One more aspect of VLC can be, to use this technology
where conventional radio systems fail. For example, under-
water radio communication is difficult, and communication
with light may be possible with much higher data rates
than currently used ultrasonic communication systems over
short ranges. Underwater communication is an interesting
application of VLC and researchers are studying light or other
forms of optical wireless communication for it, e.g., in [1],
research on VLC is carried out to provide communications
for sea divers.
To research link quality, and other physical layer (PHY)
characteristics e.g., modulation schemes for VLC under dif-
ferent environments, flexible test setups are needed which can
characterize VLC system in an easy and flexible way. This
is important because VLC is a relatively new technology,
mostly in its experimental phase. Therefore, experiments with
different configurations of photo diodes/light emitting diodes
(LEDs), modulation schemes, environments/geometries, and
dependence with other parameters like distance/alignment,
etc., are needed to be conducted. Moreover, such flexible test
setups can implement current and upcoming standards.
Hence, there is a need to implement test-systems to inves-
tigate properties of VLC further. The test-bed is one such
effort which is useful to investigate physical aspects of this
technology, i.e., propagation model for different environments,
non-linearity due to transmission and reception imperfections,
and performance under different modulation schemes.
An FPGA-based platform is suitable to make the system
flexible and scalable. FPGA solutions are always portable
and adaptable to different form of embedded systems. In this
regard, a non-real time test setup is enough to characterize
optical wireless system. Hence, a non-real time system is
implemented. The system will be further developed to a real-
time solution based on experimental results.
The rest of the paper is organized as follows. Section II
describes review of PHY for VLC. Section III describes the
hardware platform. Section IV gives implementation details
for the developed system. Section V gives some example mea-
© VDE VERLAG GMBH, Berlin, Offenbach, Germany
 European Wireless 2016
surement results using this system and finally in Section VI
the paper is concluded.
II. R EVIEW OF VLC I MPLEMENTATIONS
Numerous papers are available on hardware implementation
of VLC systems especially for point-to-point link configu-
ration. These papers consider diverse modulation schemes,
filtering, pre/post-equalization techniques. For example, in [2],
an experimental demonstration has been reported. The demon-
stration consists of two parts: digital signal processing and
analogue part. Digital signal processing was implemented on a
Virtex-5 FPGA where serial input is mapped to a 16- Quadra-
ture Amplitude Modulation (QAM) symbol stream. In case
of analogue front-ends, transmitter consists of driving circuit,
trans-conductance amplifier, and commercial Osram (OSTAR
E3B) high-power LEDs. On the receiver side, imaging optics, a
colour filter, photodiode, two stage trans-impedance amplifier,
and band-pass filter are used.
In [3], 125 Mbps over five metre distance in indoor envi-
ronment by using on-off keying (OOK) is reported. In the
experimental setup a lamp with six chips which provides
luminous flux of about 400 lumen has been used. In this work
a blue filter is applied to suppress the slow phosphorescent
component of the white light. A large area silicon PIN diode
with effective area 100 mm2 and polymer lens with 70o field
of view (FOV) are used to receive the signal. The bit-error
rate (BER) performance is measured by keeping illuminance
level at about 800 lux at the receiver. It is observed that the
data rate is 80 Mbps at the corresponding BER 10−6 .
In [4], a Gbps VLC link based on red green blue (RGB)
LEDs is reported. In this work quadrature amplitude modu-
lation (QAM) on discrete-multitone (DMT) is used in wave-
length division multiplexing (WDM) link. DMT signals con-
sisted of 128 sub-carriers within the baseband bandwidth of
100 MHz. Large area silicon avalanche photodiode with three
millimetre diameter combined with a glass lens of 20 mm
diameter and 20 mm focal length is used for detection. The
detector is followed by a low-impedance amplifier to amplify
the signal level up to the operation range. The transmission
performance measurements were performed with and without
the presence of cross talk.
A cellular structure using an angle-diversity configuration
which offers reasonably wide coverage for indoor commu-
nications is reported in [5], [6]. Their work is designed for
home access networks (HAN). It consists of a VLC link to
broadcast data and infra-red communication to provide Gbps
bi-directional communication.
Our proposed test-bed will be able to provide testing of
different digital modulation schemes, as well as geometries
for indoor/outdoor communication. So, one can test different
hardware implementations and estimate the data rates or other
measures of interest for different kind of environments.
III. H ARDWARE P LATFORM
The test-bed has been implemented on Xilinx [7] Virtex-
6 FPGA ML605 Evaluation Kit [8]. The Virtex-6 FPGA has
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ISBN 978-3-8007-4221-9
high number of resources useful for implementing multi-core
processing systems. Virtex-6 has been adopted in various
telecommunication platforms such as third generation of Wire-
less Open Access Research Platform (WARP v3) [9]. One of
the advantages of using this platform is that its design can be
ported to WARP v3, combining new system and number of
already implemented telecommunication demonstrations.
It has many peripherals which are useful in embedded
systems. For example, it has FPGA mezzanine card (FMC)
high/low pin count (HPC/LPC) connectors to interface external
boards via industry standard VITA 57.1, System ACE compact
flash (CF) to attach CF card for programming and storage,
USB JTAG circuit for programming/debugging, universal se-
rial bus (USB) universal asynchronous receiver/transmitter
(UART) for console, double data rate type three (DDR3)
small outline dual in-line memory module (SODIMM) socket
for random access memory (RAM), linear byte peripheral
interface (BPI) flash, tri-mode Ethernet PHY. It is meant to
support general purpose embedded solutions, therefore it lacks
a radio peripheral, for wireless communication. But one can
use FMC connector to add any third party radio module.
IV. I MPLEMENTATION D ETAILS
Figure 1 describes the block diagram of the test system.
Data is generated at source block which can be any math-
ematical tool, i.e., MATLAB [10]. The source data is then
modulated. It can be left un-modulated in characterization
of amplitude response. This data is sent to the Tx front-
end, which sends the information over VLC channel. A burst
of data is captured by the Rx front-end, demodulated, and
analysed to get different type of results. The received burst
of data can tell a lot about channel and quality of different
front-ends. Different Tx and Rx modules can give estimate of
relative distortion each front-end is adding.
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Fig. 1. System block diagram.
The idea of this test setup is to generate a signal from MAT-
LAB or any other tool. That signal is passed to a digital system
which interfaces a digital to analog converter (DAC) and
forwards the sequence/data to it. The front-end board which
has filters, amplifiers, etc., is next to the DAC in transmission
chain. Another front-end can be utilized to sense the channel.
This front-end interfaces analog to digital converter (ADC) to
384 © VDE VERLAG GMBH, Berlin, Offenbach, Germany
 European Wireless 2016

capture the data back. The receiver front-end can be attached to

ADC of the same test system or another. Finally the captured
burst of data is sent back to MATLAB. MATLAB is then
utilized for analysis of the captured data numerically. Figure 2
describes the block level diagram of test setup in both of above
mentioned cases. Here, the microprocessor based embedded
system, DAC, and ADC are the part of test system. Front-ends
are to be changed for characterization and comparisons, or they
can be fixed to research different geometric and environment
scenario for VLC channel.

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Fig. 2. Test setup block diagram.
For VLC, baseband signals are needed, because cut-off
frequency of most of the commercially available LEDs is few
megahertz, as shown in Section V. Therefore, a third-party
FMC150 [11] board was used for baseband signal processing.
FMC150 is a dual 14 bit 250 mega-samples per second
(MSPS) ADC and dual 16 bit 800 MSPS DAC daughter-
card with FMC connector. It has on-board voltage controlled
crystal oscillator which is enabled by default but can be
disabled in case of using external clock (CLK). It also has
temperature and power supply voltages monitor (MON), and
programmable clock tree. It uses LPC standard for FMC,
which is compatible with HPC FMC platforms like WARP
v3. The FMC150 comes with a reference design for ML605
and many other commercially available FPGA boards. Figure 3
shows photograph of the hardware test-bed node, one receiver
front-end and one transmission front-end.
A. Reference Design Details
As mentioned earlier, FMC150 comes with a reference
firmware design. A software is also provided to be run on
computer with Ethernet connection with FPGA board. Figure 4
describes the functional blocks of reference design. Reference
design’s diagram, and text are taken from reference documents
made by 4DSP [11].
In this system, the medium access control (MAC) interface
block receives register read and write commands. It distributes
those commands to other blocks. It also delivers data streams
to DAC interfaces. It also takes back data streams from ADC
captured burst. The router block consists of more than one data
routers and its main purpose is to route data to or from sub-
blocks. The output of command (CMD) is multiplexed using
command multiplexer (MUX) block, and sent back to software
via MAC interface. The Inter-Integrated Circuit (I2C) master
is connected to temperature and voltage measurement circuits
on board.
The PHY block is main interface for ADC, DAC and other
control circuits on the board. ADC channel consists of an ADC
PHY first-in first-out (FIFO), followed by ADC FIFO. ADC
PHY instance converts dual data rate (DDR) 7 bit streams
to single data rate (SDR) 14 bit stream with additional zeros
for the sake of making it 16 bit-wide, and passes it to ADC
FIFO instance which stores the burst and converts it to 64
bit stream at output. On the other side, the DAC waveform
(WFM) instance takes 64 bit wide burst of stream, stores
the stream in RAM blocks, and replays it continuously after
receiving software trigger. DAC PHY instance is responsible
for converting SDR 64 bit data to DDR 8 bit wide streams.
There are control and monitor blocks which are used to control
DAC, ADC, temperature/voltage monitor, and clock tree, etc.
PHY control (CTRL), takes care of every decision related to
streams, e.g., enabling FIFO read/write. It also takes some of
external signals such as present signal to indicate FMC150
board is present.
B. Reference Design Modifications
The reference design alone is sufficient to implement a test-
bed. It can replay some burst of data repeatedly over time, and
recapture it in non-real-time fashion, send it back to MATLAB
for analysis. One can simply add a transmission front-end
after DAC and reception front-end after ADC. Our system was
modified to ensure the ease of further development, evading
the need of software running on PC.
Therefore, the PHY block was taken from the reference
design to export as an Advanced eXtensible Interface (AXI)
based IP core for an embedded system using Xilinx’s sys-
tem generator. AXI to command block was added for read-
ing/writing registers. Asynchronous FIFOs were added to
interface DAC, and ADC streams, converted 64 bit to 32 bit

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ISBN 978-3-8007-4221-9 385 © VDE VERLAG GMBH, Berlin, Offenbach, Germany
 European Wireless 2016

can control timing of arming the DAC and sending software

trigger to capture ADC data by sending commands to PHY
W,zdZ> CTRL via AXI4LITE register read/write.
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Fig. 6. Modified design.

stream for AXI stream link. This hardware was exported as
an IP core for Xilinx’s Microblaze (microprocessor) based
embedded system, which is readily used and supported in
Xilinx designs. Figure 5 describes the IP core exported for
Microblaze based embedded system. Also, adding a micro-
processor in the system adds much larger set of possibilities,
including a stand alone test-bed, which does not even need
mathematical tool. As microprocessor can be programmed to
generate, send, receive, analyze and store the data on a CF
card etc.
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Fig. 5. PHY IP core.
Figure 6 describes, basic peripherals attached to MicroBlaze
processor necessary for the system. This non-real-time design
does not need fast packet transfer, therefore, AXI stream
to/from PHY IP core are connected directly to MicroBlaze
stream links. Ethernet packets are received via FIFO, which
has stream link to AXI Ethernet IP core. Direct memory access
(DMA) peripheral can be added to both Ethernet peripheral
or PHY IP core, for fast packet copying. Ethernet packets can
be received both in TCP or UDP mode. MATLAB generates
the burst of DAC data, forwards it to MicroBlaze processor,
which route it to PHY IP core via stream link. The processor
C. Front-end Design
In this work, two separate transmission front-ends and
two receive front-ends are used. First transmission front-end
(transmitter 1) consist of a low-pass filter, amplifier, bias-T,
and LED, as shown in Figure 7. For low-pass filtering RLP-
40+ [12] has been used. Its passband with less than 2 dB
attenuation includes DC to 40 MHz of spectrum, which is
sufficient for ordinary VLC applications. For amplification,
ADA4870 [13] is used, which is a high output drive current,
high speed, high voltage amplifier. Having high bandwidth
and high current capabilities, it ensures that it can easily
provide high current required for LED AC signal. It can also
of LEDs available commercially. A commercially available
high luminous efficiency LED ENGIN LZC-83MC00 40W
RGB [14] LED is used. One can use a single red, green, or
blue LED; or combine them to have white light out of it.
Alternatively, one can send three streams on non-interfering
colors. In this setup only red LED has been considered.
Figure 8 shows transconductance configuration of the same
LED as second transmission chain (transmitter 2). It has
simple but effective transconductance configuration for VLC
transmitter using MJE200 [15], high current gain, RF NPN
transistor.
In receiver front-ends two photo diodes FDS100 [16] and
OSD1-5T [17] have been used. FDS100, has a reasonable
active area of 13 mm2 , responsivity of 0.6 A/W, low dark
current typically 1 nA, and low junction capacitance 24 pF
(at 20 V). OSD1-5T has active area of 1 mm2 , responsivity
of .21 A/W, low dark current typically 0.2 nA, and low
junction capacitance 7 pF (at 12 V). The photo diode in both
reception chains (receiver 1, and receiver 2) is connected to
ADA4899 [18] op-amp in trans-impedance configuration, fol-
lowed by another amplifier in inverting voltage amplification
configuration. Noise is filtered out using RLP-40 component

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 European Wireless 2016

122.88 MSPS generated using MATLAB, passed to channel

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harmonic, and third harmonic have been measured using fast-
/^d fourier transform (fft) and plotted relative to noise floor. The
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useful to characterize a communication system. In Figure 11,
ϭŬё
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of 50 captured bursts (for one frequency) is plotted over
frequency sweep one to 17 MHz. Transmitter 1, shows higher
SNR at lower frequency than transmitter 2, but degrades
Fig. 8. Design of transmitter 2.
quickly. Similarly, SNR for receiver 2 is lower than receiver 1
due to lower gain, but also degrades at higher rate than receiver
and signal is passed to ADC. Component values to set gain 1. This kind of measurement can also be useful for planning
for both receivers are shown in Figure 9. carrier frequencies.

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Fig. 9. Design of the reception chain.
V. M EASUREMENTS
In this section, example measurement results are shown
for the considered front-ends. In these measurements the
distance between LED and photo diode is approximately
seven centimeters. No optical gain has been used in these
example results. Optical gain can be used on both (Tx/Rx)
sides, to operate on reasonable distance ranges for indoor
communication.
Figure 10 shows an harmonic distortion comparison of all
combinations at 5 MHz. Samples of 5 MHz tone at rate of
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ISBN 978-3-8007-4221-9
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Fig. 11. SNR Comparison.
Figure 12 shows the frequency response taken for all VLC
front-ends using this system. Measurements are taken for
a sweep of 1 to 50 MHz frequencies, with spacing of 1
MHz. At one frequency instance normalized amplitude with
respect to maximum value of generated wave is averaged
over repetition of 50 bursts. This gives another insight into
optical circuit design. For transmitter 1, the amplitude response
starts from higher value, but shows more attenuation per
frequency scale. Whereas, for transmitter 2, the amplitude
response is quite smooth till 10 MHz. Moreover, transmitter 2,
crosses transmitter 1’s graph for both receiver cases to perform
387 © VDE VERLAG GMBH, Berlin, Offenbach, Germany
 European Wireless 2016

better at higher frequencies. Receiver 1 and receiver 2 have This is an embedded system implementation on FPGA,
same the circuit configuration, therefore there is not much which makes it very flexible and scalable. The architecture
of expected difference. The photo diode of receiver 2 has is kept very simple and the design can be modified to make
less area, resulting less junction capacitance, but less gain. it a stand-alone test system. The test-bed is a non-real-time
Therefore amplification gain has been increased. However, solution to characterize VLC physical aspects. The next step
receiver 2 shows lower attenuation from receiver 1 at lower of the test-bed is to develop a real-time system based on the
frequencies. The difference, starts increasing with increasing achieved experimental results.
the frequency, and goes upto average of 9.21 dB at 30 MHz.
ACKNOWLEDGMENT
It starts decreasing after this point and comes back to 1.29 dB
at 50 MHz. The authors would like to thank Centre for Wireless Com-
This kind of analysis is useful in both DMT and sin- munication (CWC) facility in Department of Communication
gle carrier scenarios. Harmonic distortions, SNR, amplitude Engineering, University of Oulu, Finland to fund this project.
response combined, can give a close estimate of optimal R EFERENCES
data rates achieved using the system. Measurements are not
[1] H. Uema, T. Matsumura, S. Saito, and Y. Murata, “Research and
restricted to above mentioned examples. Digitally modulated development on underwater visible light communication systems,”
data can be transmitted and constellation points can be plotted, Electronics and Communications in Japan, vol. 98, no. 3, pp. 9–13,
using sample detection based on correlation of received and 2015. [Online]. Available: http://dx.doi.org/10.1002/ecj.11617
[2] O. Bouchet, P. Porcon, M. Wolf, L. Grobe, J. Walewski, S. Nerreter,
transmitted burst. Those measurements will need much details K.-D. Langer, L. Fernández, J. Vucic, T. Kamalakis, G. Ntogari, and
and are out of scope for this paper. The measurements given E. Gueutier, “Visible-light communication system enabling 73 mb/s data
above can be used indirectly infer other aspect of optical streaming,” in GLOBECOM Workshops (GC Wkshps), 2010 IEEE, Dec
2010, pp. 1042–1046.
communication system. [3] J. Vucic, C. Kottke, S. Nerreter, K. Habel, A. Buttner, K.-D. Langer,
and J. Walewski, “125 mbit/s over 5 m wireless distance by use of ook-
modulated phosphorescent white leds,” in 35th European Conference on
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1RUPDOL]HG5HFHLYHG$PSOLWXGHZUW7UDQVPLWWHGG%

 Optical Communication, 2009. ECOC ’09., sept. 2009, pp. 1 –2.
[4] C. Kottke, J. Hilt, K. Habel, J. Vucic, and K.-D. Langer, “1.25 gbit/s
7UDQVPLWWHU5HFHLYHU
7UDQVPLWWHU5HFHLYHU visible light wdm link based on dmt modulation of a single rgb led

7UDQVPLWWHU5HFHLYHU luminary,” in 38th European Conference and Exhibition on Optical
7UDQVPLWWHU5HFHLYHU Communications (ECOC), 2012, Sept 2012, pp. 1–3.
 [5] H. L. Minh, D. O’Brien, and G. Faulkner, “A gigabit/s indoor op-
tical wireless system for home access networks,” in 7th International

Symposium on Communication Systems Networks and Digital Signal
Processing (CSNDSP), 2010, july 2010, pp. 532 –536.
[6] H. L. Minh, D. O’Brien, G. Faulkner, O. Bouchet, M. Wolf, L. Grobe,
 and J. Li, “A 1.25-gb/s indoor cellular optical wireless communications
demonstrator,” Photonics Technology Letters, IEEE, vol. 22, no. 21, pp.
 1598 –1600, nov.1, 2010.
[7] “Xilinx: All Programmable, (accessed 20.1.2016),” uRL: http://www.
xilinx.com.

      [8] “ML605 Hardware User Guide , (accessed 11.08.2015),” uRL: http://
)UHTXHQF\0+] www.xilinx.com/support/documentation/boards and kits/ug534.pdf.
[9] “WARP Project, (accessed 15.1.2016),” uRL: http://warpproject.org/.
Fig. 12. Amplitude response of red LED. [10] “Mathworks: MATLAB(accessed 15.01.2016),” uRL: http:
//se.mathworks.com/products/matlab/.
[11] “4DSP: FMC150(accessed 15.01.2016),” uRL: http://www.4dsp.com/
FMC150.php.
VI. C ONCLUSION [12] “Mini-Circuits: Metal Shield, Low Pass Filter, RLP-40+
datasheet(accessed 20.01.2016),” uRL: http:http://194.75.38.69/
pdfs/RLP-40+.pdf.
In this work, we have developed a test-bed that is useful to [13] “Analog Devices: High Speed, High Voltage, 1 A Output Drive Am-
transmit and capture samples through VLC channel. Hence, plifier datasheet, (accessed 20.01.2016),” uRL: http://www.analog.com/
this system is useful to characterize VLC front-end or to media/en/technical-documentation/data-sheets/ADA4870.pdf.
[14] “LED ENGIN: LZC-03MC00 datasheet (accessed 20.01.2016),” uRL:
understand optical wireless channels better. These test-beds are http://www.ledengin.com/files/products/LZC/LZC-03MC00.pdf.
useful because VLC is a relatively new technology, and most [15] “ON, Semiconductor, MJE200G(NPN), Datasheet (accessed
of implementations are done on commercially available LEDs 1.02.2016),” uRL: http://www.onsemi.com/pub link/Collateral/
MJE200-D.PDF.
which are primarily developed just for illumination. There also [16] “Thorlabs: FDS100-SpecSheet, (accessed 20.1.2016),” uRL: http://www.
are many environmental scenarios in which VLC differs from thorlabs.de/thorcat/0600/FDS100-SpecSheet.pdf.
RF, e.g., VLC link in outdoor environment in day/night time [17] “Centronic Series 5T-SpecSheet, (accessed 20.1.2016),” uRL: http://
www.farnell.com/datasheets/316996.pdf. √
has completely different constraints than RF. And also there [18] “Analog Devices: Unity-Gain Stable, Ultralow Distortion,1 nV/ Hz
are many Rx/Tx (hardware) configurations, and indoor/outdoor Voltage Noise, High Speed Op Amp, ADA4899 datasheet,” uRL:
space geometries for aligned or diffused light links which can http://www.analog.com/media/en/technical-documentation/data-sheets/
ADA4899-1.pdf.
be applied to achieve real-time systems. Therefore such test-
beds are important to fully explore the possibilities for VLC
technology.

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