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Datasheet
Freq Shuffling
Current Mode PWM Power Switch
TYPICAL APPLICATION
406442781
Output Power Table
230VAC±15% 85-265VAC
Product
Open Frame1 Open Frame1
OB2358 27W 16W
Notes:
1. Maximum practical continuous power in an open frame design with sufficient drain pattern as a heat sink, at 50℃ ambient.
Marking Information
TERMINAL ASSIGNMENTS
Pin Name I/O Description
GND P Ground
FB I Feedback input pin. The PWM duty cycle is determined by voltage level into this pin
and the current-sense signal at Pin 4.
VDD-G P Internal Gate Driver Power Supply
SENSE I Current sense input
VDD P IC DC power supply Input
Drain O HV MOSFET Drain Pin. The Drain pin is connected to the primary lead of the
transformer
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BLOCK DIAGRAM
ELECTRICAL CHARACTERISTICS
(TA = 25℃, VDD=16V, if not otherwise noted)
CHARACTERIZATION PLOTS
(The characteristic graphs are normalized at Ta=25℃)
UVLO(OFF)(V)
10.00 15.8
UVLO(ON)(V)
9.80 15.7
9.60 15.6
9.40 15.5
9.20 15.4
9.00 15.3
-40 -10 20 50 80 110 -40 -10 20 50 80 110
Temperature(C) Temperature(C)
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Ivdd vs Vdd
Istartup(uA) vs Temperature(C)
1.2
4.0
1.0
Istartup(uA)
3.5 0.8
A
Ivdd(m)
3.0 0.6
2.5 0.4
0.2
2.0
0.0
-40 -10 20 50 80 110 0 5 10 15 20 25 30
Temperature(C) Vdd(V)
0.90 50.0
0.80 49.0
0.70 48.0
0 15 30 45 60 75 -40 -10 20 50 80 110
Duty(%) Temperature(C)
10
8
Rdson(ohm)
6
4
2
0
25 50 75 100 125 150
Temperature(℃)
OPERATION DESCRIPTION
The OB2358 is a low power off-line SMPS The switching frequency is internally adjusted at no
Switcher optimized for off-line flyback converter load or light load condition. The switch frequency
applications in sub 27W power range. The reduces at light/no load condition to improve the
‘Extended burst mode’ control greatly reduces the conversion efficiency. At light load or no load
standby power consumption and helps the design condition, the FB input drops below burst mode
easily to meet the international power conservation threshold level and device enters Burst Mode
requirements. control. The Gate drive output switches only when
VDD voltage drops below a preset level and FB
• Startup Current and Start up Control input is active to output an on state. Otherwise the
Startup current of OB2358 is designed to be very gate drive remains at off state to minimize the
low so that VDD could be charged up above UVLO switching loss and reduces the standby power
threshold level and device starts up quickly. A large consumption to the greatest extend.
value startup resistor can therefore be used to
www.DataSheet4U.com The switching frequency control also eliminates the
minimize the power loss yet achieve a reliable audio noise at any loading conditions.
startup in application. For AC/DC adaptor with
universal input range design, a 2 MΩ, 1/8 W • Oscillator Operation
startup resistor could be used together with a VDD The switching frequency of OB2358 is internally
capacitor to provide a fast startup and yet low fixed at 50KHZ. No external frequency setting
power dissipation design solution. components are required for PCB design
simplification.
• Operating Current
The Operating current of OB2358 is low at 2mA. • Current Sensing and Leading Edge Blanking
Good efficiency is achieved with OB2358 low Cycle-by-Cycle current limiting is offered in
operating current together with the ‘Extended burst OB2358 current mode PWM control. The switch
mode’ control features. current is detected by a sense resistor into the sense
pin. An internal leading edge blanking circuit chops
• Soft Start off the sensed voltage spike at initial internal power
OB2358 features an internal 4ms soft start to soften MOSFET on state due to snubber diode reverse
the electrical stress occurring in the power supply recovery and surge gate current of internal power
during startup. It is activated during the power on MOSFET so that the external RC filtering on sense
sequence. As soon as VDD reaches UVLO(OFF), input is no longer needed. The current limiting
the peak current is gradually increased from nearly comparator is disabled and cannot turn off the
zero to the maximum level of 0.77V. Every restart internal power MOSFET during the blanking
up is followed by a soft start. period. The PWM duty cycle is determined by the
current sense input voltage and the FB input
• Frequency shuffling for EMI improvement voltage.
The frequency Shuffling (switching frequency
modulation) is implemented in OB2358. The • Internal Synchronized Slope Compensation
oscillation frequency is modulated so that the tone Built-in slope compensation circuit adds voltage
energy is spread out. The spread spectrum ramp onto the current sense input voltage for PWM
minimizes the conduction band EMI and therefore generation. This greatly improves the close loop
eases the system design. stability at CCM and prevents the sub-harmonic
oscillation and thus reduces the output ripple
• Extended Burst Mode Operation voltage.
At light load or zero load condition, most of the
power dissipation in a switching mode power • Drive
supply is from switching loss on the MOSFET, the The internal power MOSFET in OB2358 is driven
core loss of the transformer and the loss on the by a dedicated gate driver for power switch control.
snubber circuit. The magnitude of power loss is in Too weak the gate drive strength results in higher
proportion to the switching frequency. Lower conduction and switch loss of MOSFET while too
switching frequency leads to the reduction on the strong gate drive results the compromise of EMI.
power loss and thus conserves the energy.
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