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MMIC Design and Technology

Oscillator Design
Instructor Dr. Ali Medi

Lecture 7 Oscillator Design


Transceiver Example

We now know amplifier design


And techniques for low noise amplifier design

Lecture 7 Oscillator Design


Oscillator
I One port negative resistance
oscillator circuit

ZL Zin Kirchoff (Z L + Z in )I = 0
For I >0 Z L = − Z in
ΓL Γin

Z L − Z 0 − Z in − Z 0 Z in + Z 0 1
ΓL = = = =
Z L + Z 0 − Z in + Z 0 Z in − Z 0 Γin
ΓL Γin = 1
Γin > 1
Lecture 7 Oscillator Design
Oscillation
Z L = − Z in
Z L = RL + jX L RL + Rin = 0
Z in = Rin + jX in X L + X in = 0
X L ( jω0 ) = − X in ( I , jω0 )
ω0 Is the oscillation frequency

Lecture 7 Oscillator Design


Oscillator Stability

For stability the circuit should resist small changes in I or ω


and return to its original state.

Detailed perturbation analysis results in :

∂ ( X L + X in )
>> 0
∂ω
Hi h Q circuit
High i it results
lt iin maximum
i oscillator
ill t stability
t bilit

Lecture 7 Oscillator Design


Oscillator Design
• For a given Γin
i transform a 50 ohm output
to present ΓL to the oscillator.
I

Load

Z0= 50 Matching Zin
Network

ΓL Γin

Lecture 7 Oscillator Design


Example
Load
L d
Z0= 50Ω Matching Zin
Network

Given: ΓL Γin
Γin = 1.25 / 40 degrees when measured at 50Ω

Γin > 1
1 Re[Γin ] − j Im[Γin ]
ΓL = = Plot on smith chart
Γin Γin
2
Then transform Z0 to ZL

Lecture 7 Oscillator Design


Calculation of example
Γin = 1.25 / 40 degrees when measured at 50Ω

ΓL = 1.25
1 25-11 / -40
40 degrees
= 0.8 / -40 degrees

Plot on smith chart


and
transform 50Ω to give ΓL

Lecture 7 Oscillator Design


Oscillation Stability
• Analysis
y is done at small signal
g
• Rin is an increasing function of I
– Rin becomes less negative as power increases
• If at small signal RL+Rin =0
0
– When power increases RL+Rin >0 and oscillation will
stop

• In practice choose RL= -Rin / 3

• XL is chosen to resonate so XL= -Xin

Lecture 7 Oscillator Design


Transistor Oscillators
ΓS Γin Γout ΓL

Input Output
Network Network Zo

Choose ΓL such that Γin >1

Or

Choose Γs such that Γout >1

Lecture 7 Oscillator Design


Stability
• Transistor is unstable when |Γin
i | >1

S 21S12 ΓL
Γin = S11 +
1 − S 22 ΓL

Lecture 7 Oscillator Design


Transistor Oscillator Design
ΓS Γin Γout ΓL

Input Output
Network Network Zo

Choose ΓS such that S 21S12 Γs


Γout>1 Γout = S 22 + >1
Develop network to 1 − S11Γs
provide Zs
1 Re[Γout ] − j Im[Γout ]
Γ = =
Γout
L
Γout
2

Develop network to transform Zo to ΓL

Lecture 7 Oscillator Design


FET Oscillator Circuits
Use 3 port S parameters for the FET
Z2
3 portt parameters
t can be
b developed
d l d
from 2 port
Z1
C oose o
Choose one
eo of the
e Zi to
oggive
e a 2 po
port
With instability.
Z3 Sii > 1
T

⎡ S31S13Γ3 S13 S32 Γ3 ⎤


⎢ S11 + 1 − S Γ S12 +
1 − S33Γ3 ⎥
[S ]
With Z1=Z2=Z0
T
=⎢ 33 3

⎢ S + S31S 23Γ3 S 23 S32 Γ3 ⎥
And

Γ3 =
Z3 − Z0 S 22 +
Z3 + Z0 ⎢⎣ 21 1 − S33Γ3 1 − S 33Γ3 ⎥⎦
Lecture 7 Oscillator Design
Example
For a particular FET the Common source
50Ω measured S parameters at 4GHz are

⎡.72 / − 116° .03 / 57° ⎤


[S ] = ⎢ ⎥
⎣ 2 . 60 / 76 ° . 73 / − 54 ° ⎦
The same FET in Common gate with 5nH
Has S’ p
parameters

⎡2.18 / − 35° 1.26 / 18° ⎤


[S '] = ⎢ ⎥
5nH
⎣ 2 . 75 / 96 ° . 52 / 155 ° ⎦
More unstable than Common source
S’11>1
1 and
d S’12 is
i llarge
Lecture 7 Oscillator Design
Example
• Design a 10GHz Oscillator
using the FET data.

Lecture 7 Oscillator Design


Example continued
S '12 S '21 ΓT
Γin = S '11 +
1 − S '22 ΓT
Choose ΓT = 0
0.59
59 / -104deg
104deg

Γin = 3.96 / -2.4 deg

Z in = −84 − j1.9Ω
− Rin
ZL = − jX in = 28 + j1.9Ω
3

Lecture 7 Oscillator Design


Tunable Oscillators
• Choice of Γs determines Γout and
therefore determines oscillation frequency
• An adjustable impedance would allow for
adjusting the oscillation frequency

Lecture 7 Oscillator Design


Voltage Controlled Oscillator

Lecture 7 Oscillator Design

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