Introduction OpenCL implementation RFNoC implementation The End

RFNoC: fosphor
How to apply RFNoC to RTSA display acceleration

Sylvain Munaut

GRCon 2015, August 27th, 2015

Sylvain Munaut RFNoC: fosphor

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About the speaker

Linux and free software enthusiast since 1999

M.Sc. in C.S. + some E.E.
General orientation towards low level
Embedded, Kernel, Drivers and such.
Hardware (Digital stuff, FPGA, RF, ...)
Interest in RF telecom for about 5 years
GSM, GMR-1, TETRA, POCSAG, ...
Within the Osmocom project
Mostly in my spare time

Sylvain Munaut RFNoC: fosphor

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Outline

1 Introduction

2 OpenCL implementation

3 RFNoC implementation

4 The End

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gr-fosphor: Description

First and foremost, it’s eye-candy !

GPU accelerated spectrum visualization
Uses a mix of OpenCL and OpenGL to achieve high speed ( 200+ Msps )
Can use software OpenCL implementation if no GP-GPU is available
Appears as a GR sink (WX & Qt & GLFW backends)
All input samples are used
Perfect to see bursts / transients
3 main displayed elements:
Live spectrum lines (average + max-hold)
Histogram (statistical view of frequency/power distribution)
Waterfall / Spectrogram
See the GRCon 2013 slides for all the dirty details

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gr-fosphor: Action shot

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RFNoC fosphor: Scope and Motivation

Use FPGA rather than OpenCL to accelerate fosphor

Focus on the histogram and spectrum lines
Histogram: Where most of performance can be gained
Waterfall: Not much can be done in FPGA
gr-fosphor can be really fast, but :
Requires a pretty fast GPU for very high rates
Some systems (E310) don’t have a GPU at all
Requires shipping all the RF samples to the host
Architecture :
Re-use existing RFNoC FFT block
Compute all the statistics on the FPGA
Ship only display data to the host at desired framerate
Allows visualization of large bandwith with minimal host load and network traffic

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RFNoC fosphor: GNURadio integration

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RFNoC fosphor: FPGA Architecture

Decay
Control only

AFULL
Histogram
Memory
Input Even/Odd Bin Readback
LogPwr Rise FIFO
AXI Control Sequencer Mapping tap AXI
Stream Stream

Average & Line

Max-Hold Memory

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RFNoC fosphor: FPGA Architecture

Everything synchronized to input data

(at different pipelines stages)
4 Concurrent processes:
Apply rise to bins ”hit” by current spectra
Apply decay to all FFT bins of one particular power bin
Update max-hold and average spectrum lines
Send to host
Histogram state needs 2 reads and 2 writes at each cycle
But Xilinx’s BRAM only has 2 ports !
Split memory bank into odd/even FFT bins
Ensure proper sequencing and odd pipeline length between read/write

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RFNoC fosphor: Histogram

Each texel is a capacitor
1 1

Charge / Rise: 0.8

Discharge / Decay: 0.8

0.6 0.6

Intensity
Intensity
0.4 0.4

0.2 0.2

0 0
0 0.5 1 1.5 2 2.5 3 3.5 4 0 0.5 1 1.5 2 2.5 3 3.5 4
t/t0 t/t0

− tt −tt
yr (t) = 1 − e 0r yd (t) = e 0d

d 1 − t d 1 − t
yr (t) = · e t0r yd (t) = − · e t0d
dt t0r dt t0d
1 1
= · (1 − yr (t)) =− · yd (t)
t0r t0d
d d
yr (t + ∆t) ' yr (t) + ∆t · yr (t) yd (t + ∆t) ' yd (t) + ∆t · yd (t)
 dt   dt 
∆t ∆t ∆t
' yr (t) · 1 − + ' yd (t) · 1 −
t0r t0r t0d
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RFNoC fosphor: Numerical effects

In gr-fosphor:
All floating point math
Decent amount of local memory
”Unlimited” global memory with high bandwidth
On a FPGA:
16 bits complex fixed point
FFT output also quantized on 16 bits
log operation makes it more apparent at very low amplitude
Some power bins are ’skipped’, yielding visible banding
Limited memory
Need to quantize internal state
Impacts accuracy of exponential rise/decay
Use randomness to hide quantization effect
Use uniform RNG to avoid bias
For complex FFT output, do math on 18 bits with 2 random LSBs
For internal state, store 9 bits but do math on 9+N bits with N random LSBs
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RFNoC fosphor: Numerical effects

Log(Power(x))

16 bits I/Q direct from FFT 18 bits I/Q with 2 random LSBs

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RFNoC fosphor: Numerical effects

Exponential Rise/Decay with quantized state

300
Quantized
Quantized + Random LSBs
Ideal
250

200

150

100

50

0
0 10 20 30 40 50 60 70 80 90 100

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RFNoC fosphor: Current state

Wifi / 200 Msps

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RFNoC fosphor: Current state

Merged upstream
In default rfnoc-devel FPGA images for X300 & X310
Not yet in E310 (resources limited)
Some hardcoded constants
Up to 1024 FFT bins
Fixed to 64 power bins
Resources
LUTs FFs DSP48 RAMB36
RFNoC block 2236 2804 6 25
fosphor core 557 679 6 18
X300 total 204k 408k 840 445
X310 total 254k 508k 1540 795
E310 total 52k 104k 220 140

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RFNoC fosphor: Future

Waterfall support
Time aggregation of spectras in the FPGA
Ship 8 bits logpwr to host
Higher precision of internal state for spectrum lines
Build-time options
Max FFT size
Number of power bins
Multi channel/context support
Higher internal clocking
Attempt use for eye-patterns:
Remove logpower
Feed pre-synched/triggered time data

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Thanks

Thanks to :
Ettus Research for RFNoC and sponsoring this project
GNURadio community for a great framework

Thank you for your attention !

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Questions ?

Any questions ?

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Resources

fosphor
https://sdr.osmocom.org/trac/wiki/fosphor
GRcon 13 fosphor
http://gnuradio.squarespace.com/storage/grcon13_presentations/
grcon13_munaut_fosphor.pdf
GRcon 14 RFNoC
http://gnuradio.squarespace.com/storage/grcon14/presentations/
Sep17_04_Ettus_rfnoc.pdf
RFNoC
https://github.com/EttusResearch/uhd/wiki/RFNoC:-Getting-Started

Sylvain Munaut RFNoC: fosphor