SIFANG CSC 211 Multifunction Protection Ied Technical Application Manual

CSC-211
Multifunction Protection IED

Technical Application Manual
Version：V1.00
Doc. Code: 0000001277
Issued Date：2015.3
Copyright owner: Beijing Sifang Automation Co., Ltd
Note: the company keeps the right to perfect the instruction. If equipment does not agree with
the instruction at anywhere, please contact our company in time. We will provide you with
corresponding service.
®
is registered trademark of Beijing Sifang Automation Co., Ltd.
We reserve all rights to this document, even in the event that a patent is issued and a different
commercial proprietary right is registered. Improper use, in particular reproduction and
dissemination to third parties, is not permitted.
This document has been carefully checked. If the user nevertheless detects any errors, he is
asked to notify us as soon as possible.
The data contained in this manual is intended solely for the IED description and is not to be
deemed to be a statement of guaranteed properties. In the interests of our customers, we
constantly seek to ensure that our products are developed to the latest technological standards
as a result it is possible that there may be some differences between the hardware/software
product and this information product.
Manufacturer:
Beijing Sifang Automation Co., Ltd.
Tel: +86 10 62962554, +86 10 62961515 ext. 8998

Fax: +86 10 82783625
Email: sf_sales@sf-auto.com
Website: http://www.sf-auto.com
Add: No.9, Shangdi 4th Street, Haidian District, Beijing, P.R.C.100085
Preface
Purpose of this manual
This manual describes the functions, operation, installation, and placing into
service of IED CSC-211. In particular, one will find:
 Information on how to configure the IED scope and a description of the

IED functions and setting options;
 Instructions for mounting and commissioning;
 Compilation of the technical specifications;
 A compilation of the most significant data for experienced users in the

Appendix.
Target audience
This manual mainly face to installation engineer, commissioning engineer and
operation engineer with perfessional electric and electrical knowledge, rich
experience in protection function, using protection IED, test IED, responsible
for the installation, commissioning, maintenance and taking the protection
IED in and out of normal service.
Applicability of this manual

This manual is valid for CSC-211 multifunction protection IED.
Technical support
In case of further questions concerning the CSC family, please contact
SiFang compay or your local SiFang representative.
Safety information
Strictly follow the company and international safety regulations.

Working in a high voltage environment requires serious approch to
aviod human injuries and damage to equipment
Do not touch any circuitry during operation. Potentially lethal

voltages and currents are present
Avoid to touching the circuitry when covers are removed. The IED
contains electirc circuits which can be damaged if exposed to static
electricity. Lethal high voltage circuits are also exposed when covers
are removed
Using the isolated test pins when measuring signals in open circuitry.
Potentially lethal voltages and currents are present
Never connect or disconnect wire and/or linker to or from IED during

normal operation. Dangerous voltages and currents are present.
Operation may be interrupted and IED and measuring circuitry may
be damaged
Always connect the IED to protective earth regardless of the

operating conditions. Operating the IED without proper earthing may
damage both IED and measuring circuitry and may cause injuries in
case of an accident.
Do not disconnect the secondary connection of current transformer

without short-circuiting the transformer’s secondary winding.
Operating a current transformer with the secondary winding open will
cause a high voltage that may damage the transformer and may
cause injuries to humans.
Do not remove the screw from a powered IED or from an IED

connected to power circuitry. Potentially lethal voltages and currents
are present
Using the certified conductive bags to transport PCBs (modules).

Handling modules with a conductive wrist strap connected to
protective earth and on an antistatic surface. Electrostatic discharge
may cause damage to the module due to electronic circuits are
sensitive to this phenomenon
Do not connect live wires to the IED, internal circuitry may be
damaged
When replacing modules using a conductive wrist strap connected to

protective earth. Electrostatic discharge may damage the modules
and IED circuitry
When installing and commissioning, take care to avoid electrical

shock if accessing wiring and connection IEDs
Changing the setting value group will inevitably change the IEDs
operation. Be careful and check regulations before making the
change
Contents
Chapter 1 Introduction .......................................................................................................................1
1 Overview ...........................................................................................................................................2
2 Features ............................................................................................................................................3
3 Functions ..........................................................................................................................................5
3.1 Protection functions .........................................................................................................5
3.2 Control functions ..............................................................................................................6
3.3 Monitoring functions ........................................................................................................6
3.4 Station communication....................................................................................................7
3.5 IED software tools............................................................................................................7
Chapter 2 General IED application ..................................................................................................8
1 Display on LCD screen ...................................................................................................................9
1.1 LCD screen display function ..........................................................................................9
1.2 Analog display function ...................................................................................................9
1.3 Report display function ...................................................................................................9
1.4 Menu dispaly function .....................................................................................................9
2 Report record .................................................................................................................................10
3 Disturbance recorder.....................................................................................................................10
3.1 Introduction .....................................................................................................................10
3.2 Fault recording ...............................................................................................................10
3.3 Wave recording ..............................................................................................................11
3.4 Sequence of event record ............................................................................................11
3.5 Operation record ............................................................................................................11
4 Self-supervision function ..............................................................................................................12
4.1 Introduction .....................................................................................................................12
4.2 Self-supervision principle..............................................................................................12
4.3 Self-supervision report ..................................................................................................13
5 Time synchroniation function .......................................................................................................15
5.1 Introduction .....................................................................................................................15
5.2 Synchronization principle..............................................................................................15
5.2.1 Synchronization from IRIG ...........................................................................................16
5.2.2 Synchronization via PPS or PPM ................................................................................16
5.2.3 Synchronization via SNTP ............................................................................................16
6 Setting .............................................................................................................................................17
6.1 Introduction .....................................................................................................................17
6.2 Operation principle ........................................................................................................17
7 Authorization...................................................................................................................................18
Chapter 3 Over current protection .................................................................................................19
1 Overcurrent protection ..................................................................................................................20
1.1 Introduction .....................................................................................................................20
1.2 Protection principle ........................................................................................................21
1.2.1 Time characteristics ...................................................................................... 21
1.2.2 Inrush restraint function ................................................................................ 23
1.2.3 Low voltage component................................................................................ 23
1.2.4 Direction determination feature ................................................................... 24
1.2.5 Logic diagram................................................................................................. 27
1.3 Input and output signals ............................................................................................... 29
1.4 Setting parameters ........................................................................................................ 30
1.5 Reports............................................................................................................................ 33
1.6 Technical data................................................................................................................ 34
Chapter 4 Earth fault protection ..................................................................................................... 35
1 Earth fault protection ..................................................................................................................... 36
1.1 Introduction ..................................................................................................................... 36
1.2 Protection principle........................................................................................................ 37
1.2.1 Time characteristic ........................................................................................ 37
1.2.2 Inrush restraint ............................................................................................... 38
1.2.4 Logic diagram................................................................................................. 44
1.5 IED reports ..................................................................................................................... 50
1.6 Technical data................................................................................................................ 50
Chapter 5 Sensitive earth fault protection .................................................................................... 52
1 Sensitive overcurrent protection ................................................................................................. 53
1.1 Introduction ..................................................................................................................... 53
1.2.1 Time characteristic ........................................................................................ 53
1.2.3 Logic diagram................................................................................................. 59
1.5 IED reports ..................................................................................................................... 64
1.6 Technical data................................................................................................................ 64
Chapter 6 Negative-sequence overcurrent protection ............................................................... 66
1 Negative-sequence overcurrent protection ............................................................................... 67
1.1 Introduction ..................................................................................................................... 67
1.2.1 Protection function description .................................................................... 67
1.2.2 Logic diagram................................................................................................. 69
1.5 IED reports ..................................................................................................................... 72
1.6 Technical data................................................................................................................ 73
Chapter 7 Thermal overload protection ........................................................................................ 74
1 Thermal overload protection ........................................................................................................ 75
9
1.1 Introduction .....................................................................................................................75
1.3 Input and output signals................................................................................................77
1.4 Setting parameters ........................................................................................................77
1.5 IED reports......................................................................................................................78
1.6 Technical data ................................................................................................................78
Chapter 8 Swtich on to faulty..........................................................................................................79
1 Swtich on to faulty protection .......................................................................................................80
1.1 Introduction .....................................................................................................................80
1.2.1 Protection function description .....................................................................80
1.2.2 Logic diagram .................................................................................................81
1.5 IED reports......................................................................................................................82
Chapter 9 Overvoltage protection ..................................................................................................84
1 Overvoltage protection ..................................................................................................................85
1.1 Introduction .....................................................................................................................85
1.2.1 Time characteristics .......................................................................................85
1.2.2 Overvoltage protection principle ..................................................................87
1.2.3 Voltage connection ........................................................................................87
1.2.4 Logic diagram .................................................................................................88
1.5 IED reports......................................................................................................................91
1.6 Technical data ................................................................................................................91
Chapter 10 Undervoltage protection................................................................................................92
1 Undervoltage protection................................................................................................................93
1.1 Introduction .....................................................................................................................93
1.2.1 Protection function description .....................................................................93
1.2.2 Voltage connection ........................................................................................94
1.2.3 Depending on the VT location......................................................................95
1.2.4 Logic diagram .................................................................................................96
1.4 Setting parameter ..........................................................................................................98
1.5 IED reports......................................................................................................................99
1.6 Technical data ..............................................................................................................100
Chapter 11 Displacement voltage protection ...............................................................................101
1 Displacement voltage protection ...............................................................................................102
1.1 Introduction ...................................................................................................................102
1.2 Protection principle ......................................................................................................102
1.2.1 Displacement voltage input ........................................................................102
10
1.2.2 Protection description ................................................................................. 103
1.2.3 Logic diagram............................................................................................... 104
1.3 Input and output signals ............................................................................................. 105
1.4 Setting parameter ........................................................................................................ 106
1.5 IED reports ................................................................................................................... 107
1.6 Technical data.............................................................................................................. 107
Chapter 12 Negative-sequence over voltage protection ............................................................ 108
1 Negative-sequence over voltage protection ............................................................................ 109
1.1 Introduction ................................................................................................................... 109
1.2 Protection function description .................................................................................. 109
1.2.1 Negative-sequence voltage input.............................................................. 109
1.2.3 Logic diagram............................................................................................... 110
1.5 IED reports ................................................................................................................... 111
1.6 Technical data.............................................................................................................. 111
Chapter 13 Circuit breaker failure protection ............................................................................... 112
1 Circuit breaker failure protection ............................................................................................... 113
1.1 Introduction ................................................................................................................... 113
1.2 Protection principle...................................................................................................... 113
1.2.2 Current criterion evaluation ........................................................................ 114
1.2.3 Circuit breaker auxiliary contact evaluation ............................................. 114
1.2.4 Logic diagram............................................................................................... 115
1.5 IED reports ................................................................................................................... 117
1.6 Technical data.............................................................................................................. 118
Chapter 14 Dead zone protection .................................................................................................. 119
1 Dead zone protection.................................................................................................................. 120
1.1 Introduction ................................................................................................................... 120
1.2.1 Function description .................................................................................... 120
1.2.2 Logic diagram............................................................................................... 121
1.5 IED reports ................................................................................................................... 123
1.6 Technical data.............................................................................................................. 123
Chapter 15 STUB protection .......................................................................................................... 124
2 STUB protection .......................................................................................................................... 125
2.1 Introduction ................................................................................................................... 125
11
2.2.2 Logic diagram ...............................................................................................126
2.3 Input and output signals..............................................................................................126
2.4 Setting parameters ......................................................................................................127
2.5 Reports ..........................................................................................................................127
2.6 Technical data ..............................................................................................................127
Chapter 16 Synchro-check and energizing check function ........................................................128
1 Synchro-check and energizing check function ........................................................................129
1.1 Introduction ...................................................................................................................129
1.2 Function principle.........................................................................................................129
1.2.1 Synchro-check mode...................................................................................130
1.2.2 Energizing check mode...............................................................................131
1.2.3 Override mode..............................................................................................132
1.2.4 Logic diagram ...............................................................................................132
1.4 Setting parameter ........................................................................................................133
1.5 IED reports....................................................................................................................134
1.6 Technical data ..............................................................................................................135
Chapter 17 Autoreclosing function .................................................................................................136
1 Autoreclosing function.................................................................................................................137
1.1 Introduction ...................................................................................................................137
1.2.1 Auto-reclosing initiation modules ...............................................................137
1.2.2 Autoreclosing logic.......................................................................................138
1.5 IED reports....................................................................................................................145
1.6 Technical data ..............................................................................................................146
Chapter 18 Under current monitoring ............................................................................................147
1 Under current monitoring ............................................................................................................148
1.1 Introduction ...................................................................................................................148
1.2.1 Function description ....................................................................................148
1.2.2 Logic diagram ...............................................................................................148
1.5 IED reports....................................................................................................................150
Chapter 19 Over-frequency protection ..........................................................................................151
1 Over-frequency protection ..........................................................................................................152
1.1 Introduction ...................................................................................................................152
1.2.2 Logic diagram ...............................................................................................152
1.3 Input and output signal................................................................................................153
12
1.5 IED reports ................................................................................................................... 154
Chapter 20 Rate of change of frequency protection ................................................................... 155
1 Rate of change of frequency protection ................................................................................... 156
1.1 Introduction ................................................................................................................... 156
1.2.2 Logic diagram............................................................................................... 157
1.3 Input and output signal ............................................................................................... 157
1.5 IED reports ................................................................................................................... 158
Chapter 21 Load shedding protection ........................................................................................... 159
1 Low frequency load shedding protection ................................................................................. 160
1.1 Introduction ................................................................................................................... 160
1.2.2 Logic diagram............................................................................................... 162
1.5 IED reports ................................................................................................................... 163
2 Low voltage load shedding protection ...................................................................................... 164
2.1 Introduction ................................................................................................................... 164
2.2.1 Funciton description .................................................................................... 164
2.2.2 Logic diagram............................................................................................... 166
2.5 IED reports ................................................................................................................... 168
3 Overload load shedding protection ........................................................................................... 169
3.1 Introduction ................................................................................................................... 169
3.2.1 Fucntion description .................................................................................... 169
3.2.2 Logic diagram............................................................................................... 170
3.5 IED reports ................................................................................................................... 172
3.6 Technical data.............................................................................................................. 172
Chapter 22 Super load shedding protection ................................................................................ 173
4 Super Low frequency load shedding protection ..................................................................... 174
4.1 Introduction ................................................................................................................... 174
4.2.2 Logic diagram............................................................................................... 176
13
4.5 IED reports....................................................................................................................179
5 Super Low voltage load shedding protection ..........................................................................180
5.1 Introduction ...................................................................................................................180
5.2.1 Funciton description ....................................................................................180
5.2.2 Logic diagram ...............................................................................................182
5.5 IED reports....................................................................................................................184
6 Super Overload load shedding protection ...............................................................................185
6.1 Introduction ...................................................................................................................185
6.2.1 Fucntion description ....................................................................................185
6.2.2 Logic diagram ...............................................................................................186
6.5 Technical data ..............................................................................................................188
Chapter 23 Fast busbar protection scheme .................................................................................189
1 Fast busbar protection scheme .................................................................................................190
1.2 IED reports....................................................................................................................192
Chapter 24 Secondary system supervision ..................................................................................193
1 Current circuit supervision ..........................................................................................................194
1.1.2 Logic diagram ...............................................................................................194
1.4 IED reports....................................................................................................................195
2 Fuse failure supervisionVT .........................................................................................................196
2.1 Introduction ...................................................................................................................196
2.2.1 Logic diagram ...............................................................................................198
2.2.2 Input and output signals ..............................................................................198
2.4 IED reports....................................................................................................................200
2.5 Technical data ..............................................................................................................200
Chapter 25 Monitoring function ......................................................................................................201
1 Switching devices status monitoring .........................................................................................202
2 Self-supervision ...........................................................................................................................202
Chapter 26 Station communication................................................................................................203
1 Overview .......................................................................................................................................204
1.1 Protocol .........................................................................................................................204
1.1.1 IEC61850-8 communication protocol........................................................204
14
1.1.2 IEC60870-5-103 communication protocol ............................................... 204
1.2 Communication port .................................................................................................... 205
1.2.1 Front communication port .......................................................................... 205
1.2.2 RS485 communication ports...................................................................... 205
1.2.3 Ethernet communication ports ................................................................... 205
1.3 Technical data.............................................................................................................. 205
1.4 Typical substation communication scheme ............................................................. 207
1.5 Typical time synchronizing scheme .......................................................................... 207
Chapter 27 Hardware ...................................................................................................................... 208
1 Introduction................................................................................................................................... 209
1.1 IED structure ................................................................................................................ 209
1.2 IED module arrangement ........................................................................................... 209
2 Local human-machine interface ................................................................................................ 210
2.1 Liquid crystal display (LCD) ....................................................................................... 210
2.2 Man-Machine Interface Module (MMI) ..................................................................... 210
2.3 IED menu ...................................................................................................................... 214
2.3.1 Menu construction ....................................................................................... 214
2.3.2 Operation status .......................................................................................... 215
2.3.3 Settings ......................................................................................................... 215
2.3.4 QueryRpt....................................................................................................... 215
2.3.5 DevSetup ...................................................................................................... 216
2.3.6 Print ............................................................................................................... 216
2.3.7 Testing ........................................................................................................... 216
2.3.8 DevInfo .......................................................................................................... 217
2.3.9 Connector ..................................................................................................... 217
3 Analog input module ................................................................................................................... 217
3.1 Introduction ................................................................................................................... 217
3.2 Technical data.............................................................................................................. 219
4 Binary Input & Output module ................................................................................................... 220
4.1 Terminals figure of IED ............................................................................................... 221
4.2 Technical data.............................................................................................................. 223
5 CPU module ................................................................................................................................. 225
5.1 Introduction ................................................................................................................... 225
5.2 Terminals of CPU module .......................................................................................... 226
5.3 Technical data.............................................................................................................. 227
6 Power supply module ................................................................................................................. 229
6.1 Introduction ................................................................................................................... 229
6.2 Terminals of power supply module ........................................................................... 229
6.3 Technical data.............................................................................................................. 230
6.4 Type tests ..................................................................................................................... 231
6.5 IED design .................................................................................................................... 235
6.6 CE certificate ................................................................................................................ 235
Chapter 28 Appendix ....................................................................................................................... 236
1 General setting list ...................................................................................................................... 237
15
1.1 Setting list for CSC-211(F11) .....................................................................................237
1.2 Setting list for CSC-211(L11) .....................................................................................249
2 General report list ........................................................................................................................254
2.1 Event report list ............................................................................................................254
2.2 Alarm report list ............................................................................................................256
3 Typical connection .......................................................................................................................258
4 Time inverse characteristic.........................................................................................................274
4.1 11 kinds of IEC and ANSI inverse time characteristic curves ...............................274
4.2 User defined characteristic .........................................................................................274
4.3 Typical inverse curves ................................................................................................276
5 CT Requirement...........................................................................................................................288
5.1 Overview .......................................................................................................................288
5.2 Current transformer classification .............................................................................288
5.3 Abbreviations (according to IEC 60044-1, -6, as defined).....................................289
5.4 General current transformer requirements ..............................................................290
5.4.1 Protective checking current ........................................................................290
5.4.2 CT class.........................................................................................................291
5.4.3 Accuracy class .............................................................................................292
5.4.4 Ratio of CT ....................................................................................................293
5.4.5 Rated secondary current ............................................................................293
5.4.6 Secondary burden .......................................................................................293
5.5 Rated equivalent secondary e.m.f requirements ....................................................294
5.5.1 Definite time overcurrent protection and earth fault protection .............294
5.5.2 Inverse time overcurrent protection and earth fault protection .............295
16
Chaper 1 introduction
Chapter 1 Introduction
About this chapter
This chapter gives an overview of SIFANG Multifunction

Protection IED CSC-211.
1
1 Overview
CSC-211 series are selective, reliable and high speed multifunction
protection IED (Intelligent Electronic Device), which are able to be applied
for protection, control and measurement for following applications:
 Applicable in subtransmission network and distribution network with

solidly earthed (grounded), low-resistance earthed, isolated or
compensated neutral point
 Protection of feeders, capacitors, distribution transformers, bus coupler,

etc.
 Used as backup protection IED for lines, transformers, reactors and

busbar
 Providing control and monitoring functions of the circuit breakers,

disconnector, etc.
 Supporting all functionalities required for automation system
The standard version of CSC-211 offers a wide range of protection

functions by pre-configured function arrangement to fulfill most of common
applications.
The advanced version of CSC-211, with enhanced hardware, same

function library, and full programmable scheme logic with graphic software
tool, is good at tailor- -made applications.
The wide application flexibility and integration of the protection, monitoring

and control functions in one device make the IED an excellent solution for
both new installations and retrofitting of the existing stations.
2
2 Features
 Extensivemultifunction IED including protection, control and monitoring
functions
 Three pole tripping required in sub-transmission and distribution

network
 A complete protection functions library, include:
 Overcurrent protection (50, 51, 67)
 Earth fault protection (50N, 51N, 67N)
 Sensitive earth fault protection (50Ns, 51Ns, 67Ns)
 Negative-sequence overcurrent protection (46)
 Thermal overload protection (49)
 Undervoltage protection (27)
 Overvoltage protection (59)
 Negative-sequence overvoltage protection
 Undercurrent protection(37)
 High frequencyprotection(81H)
 Rate of change of frequency protection(ROCOF)
 Displacement voltage protection (64)
 Circuit breaker failure protection (50BF)
 Dead zone protection (50SH-Z)
 STUB protection (50STUB)
 Switch Onto faulty protection(SOTF)
 Synchro-check and energizing check (25)
3
 Auto-recloser function for three-phase reclosing (79)
 Low frequency load shedding function
 Low voltage load shedding function
 Overload load shedding function
 Voltage transformer secondary circuit supervision (97FF)
 Current transformer secondary circuit supervision
 Fast overcurrent/busbar protection scheme using IEC61850

GOOSE-message
 CB status supervision
 Self-supervision to all modules in the IED
 Complete and massive reports recording, trip reports, alarm reports,

startup reports and operation reports. Any kinds of reports can be
stored no less than 40 items, and be memorized in case of power
disconnection
 Up to two electric /optical Ethernet ports can be selected to

communicate with substation automation system by IEC61850 or
IEC60870-5-103 protocols
 One electric RS-485 port is able to communicate with substation

automation system by IEC60870-5-103 protocol
 Time synchronization via network(SNTP), pulse and IRIG-B mode
 Versatile human-machine interface
 Multifunctional software tool CSmart for setting, monitoring, fault

recording analysis, configuration, etc.
4
3 Functions
3.1 Protection functions
IEC 61850 IEC 60617

Description ANSI Code Logical Node graphical
Name symbol
Current protection
3IINV>
Overcurrent protection 50,51,67 PTOC 3I >>
3I >>>
I0INV>
Earth fault protection 50N, 51N, 67N PEFM I0>>
I0>>>
50Ns, 51Ns, 3INE>
Sensitive earth fault protection
67Ns 3INE>>
Negative-sequence overcurrent
46 PPBR I2>
protection
Thermal overload protection 49 PTTR Ith
Voltage protection
3U>
Overvoltage protection 59 PTOV
3U>>
3U<
Undervoltage protection 27 PTUV
3U<<
Displacement voltage protection 64 VE>
Negative-sequence overvoltage
47 PPBV U2>
protection
Breaker protection and control function
3I> BF
Breaker failure protection 50BF RBRF I0>BF
I2>BF
Dead zone protection 50SH-Z
STUB protection 50STUB PTOC 3I>STUB
Synchro-check and energizing check 25 RSYN
Auto-reclosing 79 RREC O→I
Three-pole tripping 94-3 PTRC
Capacitor bank protection
5
Unbalanced current protection 46NI
Unbalanced voltage protection 46NU
Undercurrent protection 37 PUCP I<
Load shedding function
Low frequency load shedding function 81U
Low voltage load shedding function 27
Overload load shedding function
Secondary system supervision
CT secondary circuit supervision
VT secondary circuit supervision 97FF
Other functions
Fast busbar protection using reverse
interlocking
3.2 Control functions
IEC 61850 IEC 60617

Description ANSI Code Logical Node graphical
Name symbol
Circuit breaker, disconnector and
other switching devices control
3.3 Monitoring functions
Description
Position of circuit breaker, disconnector and other switching device monitoring
Circuit breaker status supervision
Auxiliary contacts of circuit breaker supervision
Self-supervision
Fault recorder
6
3.4 Station communication
Description
Front communication port
Isolated RS232 port
Rear communication port
0-1 isolated electrical RS485 communication ports
0-2 Ethernet electrical/optical communication ports
Time synchronization port
Communication protocols
IEC 61850 protocol
IEC 60870-5-103 protocol
3.5 IED software tools
Functions
Reading measuring value
Reading IED report
Setting
IED testing
Disturbance recording analysis
IED configuration
Printing
7
Chaper 2 General IED application
Chapter 2 General IED application
About this chapter
This chapter describes the use of the included software

functions in the IED. The chapter discusses general
application possibilities.
8
1 Display on LCD screen
1.1 LCD screen display function
The LCD screen displays measured analog quantities, report ouputs,

menu and logic linker status.
1.2 Analog display function
The analog display includes measured Ia, Ib, Ic, 3I0, Is0, Ua, Ub, Uc, U4,
Mea Ia, Mea Ib, Mea Ic, Mea Ua, Mea Ub, Mea Uc, Mea Uab, Mea Ubc
and Mea Uca.
The Mea means that the measurement analogue quantity, for example,
Mea Ia, means the measurement current for phase A.
1.3 Report display function
The report display includes tripping, alarm and operation recording.
1.4 Menu dispaly function
The menu dispaly includes main menu and debugging menu, see chapter
Chapter 27 for detail.
9
2 Report record
The report record includes tripping, alarm and operation reports. See
Chapter 28 general report list for detail.
3 Disturbance recorder
3.1 Introduction
To get fast, complete and reliable information about fault current, voltage,
binary signal and other disturbances in the power system is very important.
This is accomplished by the disturbance recorder function and facilitates a
better understanding of the behavior of the power system and related
primary and secondary equipment during and after a disturbance. An
analysis of the recorded data provides valuable information that can be
used to explain a disturbance, basis for change of IED setting plan,
improvement of existing equipment etc.
The disturbance recorder, always included in the IED, acquires sampled

data from measured analogue quantities, calculated analogue quantity,
binary input and output signals.
3.2 Fault recording
The IED can save the latest 40 fault records in case of power
disconnection, which can be read via the IED operation interface or
communication port. The fault record consists of the following information:
 Fault time: date and time
 Event list: operative element and time
 Running data: current, voltage, frequency and phase angle
 Operation setting
 IED operation mode
10
3.3 Wave recording
Recording function is used to capture the analog data and status data on
the amount of predefined length before or after an event, reappearing the
protection device running track events before or after the change of status
apparatus, internal logic element and the switches can be used to trigger
recording function. Recorder contain analog channel, digital channel
(binary input/output, protection element status and etc.) and time
sequence information.Device can be record 40 points per cycle, each
recordingtotal length up to 10s, and it can save 8 recent protection
operation informationand 5 protection pickup information, total of 13 times
recorders. Recording can be read through CSC-200 software tools from
the device Ethernet port (COMTRADE universal format), also through the
station communication network upload to engineer station, for the analysis
of protection operation.
3.4 Sequence of event record
IED real time monitor to record the operation event, alarm event, binary
input, binary output and function on or off, these state changes information
total 256, record of events time, causes and current status, and it will
transfer to the station control centerby the communication port. Device can
save the recent startup and operation event, and it canprint drawings
through the HMI or export electronic files by software tool of CSC-200.
3.5 Operation record
The disturbance recorder information is saved for each of the recorded

disturbances in the IED and the user may use the local human machine
interface or dedicated tool to get some general information about the
recordings. The disturbance recording information is included in the
disturbance recorder files. The information is also available on a station
bus according to IEC 61850 and IEC 60870-5-103.
Fault wave recorder with great capacity, can record full process of any fault,
and can save the corresponding records. Optional data format or wave
format is provided, and can be exported through serial port or Ethernet port
by COMTRADE format.
Device record the last 40 operation of modification and remote trip/close

CB for the important of device, record device operation object, time of
occurrence, the modification of the data or operational reasons, and it
provide the basis for accident feedback.
11
4 Self-supervision function
4.1 Introduction
The IED can be self diagnosis and self monitoring operation is achieved by
means of soft hardware self-test and monitoring, to ensure the high
reliability of operation through the Power on. Self check includes the key
components of hardware (such as analog input , Binary output, RAM,
ROM), hardware assisted components (such as communication interface)
and the important operating parameters (such as the set value, the soft
switching plate), in addition, device built in two level software monitor
which is used to monitor the operation conditions of the software. When
the device detectsany is abnormal, it will record the corresponding
abnormal events and drive the related signal node and the LED indicating
lamp, for the key abnormal, device will lock protection function and
important binary output , to prevente misoperation.
Users can also check the hardware by use the device that it is provide
inspection device, such as AC circuit, binary input and binary outp , and so
on.
For the implementation ofcoordination Automation System Engineering,

IED test function for fast inspection of local monitoring and remote control
station information library by remote control system, it eliminates the
manual monitoring and remote control personnel to point operation.It
includes the remote signal, remote measurement, alarm operation events
on point to point. As the communication status inspection device, defect
communication performance error may exist in the network, device
provides operation related running statistics of the communication port and
it provide diagnosis datapart of the network
4.2 Self-supervision principle

 Measuring resistance between analog circuits and ground
 Measuring the output voltage in every class
 Checking zero drift and scale
 Verifying alarm circuit
 Verifying binary input
 Checking actual live tripping including circuit breaker
 Check setting values and parameters
12
4.3 Self-supervision report
Item Information Disposal method

1. SysParam Error Solidfy the system setting value again
2. PriParam Error Solidfy the device parament again
3. ROM Error Power off and overhaul
4. Flash Error Power off and overhaul
5. AD Error Power off and overhaul
6. Zero Over Power off and overhaul
7. Scale Error Scale reset
8. SetGroup Invalid Solidfy to effective setgroup
9. Setting Chk Err Solidfy the setting value again
10. Cal Para Cfg Err Modify the measurement parameter being configuration right
11. BIO Para Error Modify the measurement and Control parameter being right
12. CPU Module Err Power off and overhaul
13. BO No Response Power off and overhaul
14. BO Error Binary output test again
15. BIO Power Error Change the power palel
16. BIO ROM Error Power off and overhaul
17. BIO EEPROM Error Power off and overhaul
18. BI Error Power off and overhaul
19. BI Input Error Power off and overhaul
20. Double Input Error Check the wiring
21. CPU Work abnormal Power off and overhaul
22. Config Error Change the configuration correctly
23. BI Self-check Err Power off and overhaul
24. Setting File Path Err Set the correct files path
25. HMI COMM Error Check the MMI model
26. Ini file Error Solidfy the file(xxx_G1.ini) COM board and CPU board again
27. cfg file Error Solidfy the file(xxxM1.cfg) COM board and CPU board again
28. RX OptPow Low-lim Check the optical fiber
29. RX OptPow Low-lim OK
30. RX OptPow Up-lim Check the optical fiber
31. RX OptPow Up-lim OK
32. TX OptPow Low-lim Check the optical fiber
33. TX OptPow Low-lim OK
34. TX OptPow Up-lim Check the optical fiber
35. TX OptPow Up-lim OK
36. BI Card Comm Err Power off and overhaul
37. BO Card Comm Err Power off and overhaul
38. GO Card Comm Err Power off and overhaul
39. GPS Syn Error Set the GPS parameter correctly
13
Item Information Disposal method

40. GPS Syn OK
41. Net A GO Com Error Check the network A wiring or model file
42. Net A GO Com OK
43. Net A GO RX cfg Error Check the model file
44. Net B GO Com Error Check the network B wiring or model file
45. Net B GO Com OK
46. Net B GO RX cfg Error Check the model file
47. GO Communication Error Check the network wiring
48. GO Communication OK
49. GO Com RX Cfg Error Check the network wiring
50. GO Com Cfg file Error Change the Cfg file correctly and solidfy to the IED
51. Data Linker Error Set the GO connector on or off, Check the IEC61850 file
52. Data Module net CFG Error Solidfy the process level MAC address
53. Inner Net Com Error Solidfy the parameter file correctly
54. Inner Net Com OK
55. Relay Test Status differ
56. Sample Channel Invalid Power off and overhaul
14
5 Time synchroniation function
5.1 Introduction
Use the time synchronization source selector to select a common source

of absolute time for the IED when it is a part of a protection system. This
makes comparison of events and disturbance data between all IEDs in a
SA system possible.
5.2 Synchronization principle
Time definitions
The error of a clock is the difference between the actual time of the clock,
and the time the clock is intended to have. The rate accuracy of a clock is
normally called the clock accuracy and means how much the error
increases, i.e. how much the clock gains or loses time. A disciplined clock
is a clock that “knows” its own faults and tries to compensate for them, i.e.
a trained clock.
Synchronization principle
From a general point of view synchronization can be seen as a hierarchical

structure. A module is synchronized from a higher level and provides
synchronization to lower levels.
A module is said to be synchronized when it periodically receives

synchronization messages from a higher level. As the level decreases, the
15
accuracy of the synchronization decreases as well. A module can have

several potential sources of synchronization, with different maximum
errors, which gives the module the possibility to choose the source with the
best quality, and to adjust its internal clock from this source. The maximum
error of a clock can be defined as a function of:
 The maximum error of the last used synchronization message
 The time since the last used synchronization message
 The rate accuracy of the internal clock in the module.
The time synchronization system support three methods, IRIG-B ,

IEEE1588 protocol and network protocol .
5.2.1 Synchronization from IRIG
The built in GPS clock module receives and decodes time information from
the global positioning system. The module is located on the CPU Module.
The GPS interfaces to the IED supply two possible synchronization
methods, IRIGB and PPS (or PPM).
5.2.2 Synchronization via PPS or PPM
The IED accepts PPS or PPM to the GPS interfaces on the CPU Module.
These pulses can be generated from e.g. station master clock. If the
station master clock is not synchronized from a world wide source, time will
be a relative time valid for the substation. Both positive and negative edges
on the signal can be accepted. This signal is also considered as a fine
signal.
5.2.3 Synchronization via SNTP
SNTP provides a “Ping-Pong” method of synchronization. A message is

sent from an IED to an SNTP-server, and the SNTP-server returns the
message after filling in a reception time and a transmission time. SNTP
operates via the normal Ethernet network that connects IEDs together in
an IEC61850 network. For SNTP to operate properly, there must be a
SNTP-server present, preferably in the same station. The SNTP
synchronization provides an accuracy that will give 1ms accuracy for
binary inputs. The IED itself can be set as a SNTP-time server.
16
6 Setting
6.1 Introduction
Settings are divided into separate lists according to different functions. The
setting consists of two parts -setting list and communication parameters.
6.2 Operation principle
The setting procedure can be ended at any the time by the key “SET” or
“QUIT”. If the key “SET” is pressed, the display shows the content of
“Select”. The range of setting zone is from 1 to 16. After confirming with the
setting zone-key “SET”, those new settings will be valid. If key “QUIT” is
pressed instead, all modifications which have been changed will be
ignored.
17
7 Authorization
To safeguard the interests of customers, both the IED and the tools that
are accessing the IED are protected, subject of authorization handling. The
concept of authorization, as it is implemented in the IED and the
associated tools is based on the following facts:
 There are two types of points of access to the IED:
 local, through the local HMI
 remote, through the communication ports
 There are different levels (or types) of guest, super user and
protectionengineerthat can access or operate different areasof the
IED and tools functionality.
18
Chaper 3 Over current protection
Chapter 3 Over current protection
About this chapter
This chapter describes the protection principle, input and

output signals, parameter, logic diagram, IED report and
technical data used for overcurrent protection.
19
1 Overcurrent protection
1.1 Introduction
The non-directional overcurrent elements can be applied as backup

protection functions in various applications including line and transformer
protection in systems with radial nature and those which are supplied from
a single source. The directional overcurrent protection allows the
application of the IED also in systems where protection coordination
depends on both the magnitude of the fault current and the direction of
power flow to the fault location, for instance in case of parallel lines or
transformers, or in a loop configuration. Main features of the overcurrent
protection are as follows:
 Overcurrent have four stages, 1st stage is definite time stage, 2nd , 3rd
and 4th stages can be set definite or inverse time stage by control
word “OC2 Inv On” “OC3 Inv On” and “OC4 Inv On” .
 11 kinds of IEC and ANSI inverse time characteristic curvesas the

standard curves for 2ndand 3rd stages. And the standard curves as
well as optional user defined characteristic for 4th stage.
 Settable directional element characteristic angle to satisfy the different

network conditions and applications
 Each stage can be set individually as directional/non-directional . It can

be set “Forward” or “ Reverse” by control word.
 Each stage can be set individually for inrush restraint
 Cross blocking function for inrush detection
 Settable maximum inrush current
 The second，third，fourth stage can be set individually to alarm or trip
 VT secondary circuit supervision for directional protection. Once VT

failure happens, the directional stage can be set to be blocked or to be
non-directional
 Undervoltage or negative voltage criteria checking (selectable),

blocking of the definite time stages is possible when the measured
voltage exceeds the threshold
20
1.2 Protection principle
1.2.1 Time characteristics
Overcurrent have four stages, 1st stage is definite time stage, 2nd 3rd and 4th
stages can be set definite or inverse time stage by control word “OC2 Inv
On” “OC3 Inv On” and “OC4 Inv On”
Each stage can operate in conjunction with the integrated inrush restraint
and directional functions and operate based on measured phase current.In
addition, an undervoltage control feature is provided which can be used for
definite overcurrent stages.
Furthermore, each stage is independent from each other and can be

combined as desired.
Pickup value for the definite stage can be set in setting value. Each phase
current is compared with the corresponding setting value with delay time. If
currents exceed the associated pickup value, after expiry of the time delay,
the trip command or alarm signal is issued.The dropout value of the
definite stages is approximately equal to the system setting “High Relay
Ret”of the pickup value for I/In ≥ 0.5. The condition for delay time starting is
expressed in the following formula:
IΦ > Iset (Φ = a, b, c)
Equation 3-1
The delay time can be set for each definite stage individually in setting.
After the delay time elapsed, a trip command or alarm signal is issued.
For the delay time of inverse time characteristic, which is calculated here
based on the type of the set characteristic, the magnitude of the current
and a time multiplier, both ANSI and IEC based standard curves are
available, and any user-defined characteristic can be defined using
following formula:
= ( )K_OC
( )
Equation 3-2
21
where:
A_OC: Time factor for inverse time stage
B_OC: Delay time for inverse time stage
P_OC: Index for inverse time stage
K_OC: Time multiplier
A, P and B are the characteristic parameters for IDMTL curves. These

characteristic parameters have been defined for each curve in IEC and
ANSI standards. Table 3-1 provides a summary of the parameter values
for 11 typical curves.
Table 3-1 Characteristic parameters for IDMTL curves

Parameter Parameter Parameter
No. IDMTL Curves
A P B
0 Defined by user
1 IEC INV. 0.14 0.02 0
2 IEC VERY INV. 13.5 1.0 0
3 IEC EXTREMELY INV. 80.0 2.0 0
4 IECLONG INV. 120.0 1.0 0
5 ANSI INV. 8.9341 2.0938 0.17966
6 ANSI SHORT INV. 0.2663 1.2969 0.03393
7 ANSI LONG INV. 5.6143 1 2.18592
8 ANSI MODERATELY INV. 0.0103 0.02 0.0228
9 ANSI VERY INV. 3.922 2.0 0.0982
10 ANSI EXTREMELY INV. 5.64 2.0 0.02434
11 ANSI DEFINITE INV. 0.4797 1.5625 0.21359
By applying setting of these coefficients, the IED calculates the tripping or

alarming time from the measured current in each phase separately. Once
the calculated time has been elapsed, the trip signal or alarm signal is
issued.
22
1.2.2 Inrush restraint function
The protection IED may detect large magnetizing inrush currents during
transformer energizing. In addition to considerable unbalance fundamental
current, inrush current comprises large second harmonic current which
does not appear in short circuit current. Therefore, the inrush current may
affect the protection functions which operate based on the fundamental
component of the measured current. Accordingly, inrush restraint logic is
provided to prevent overcurrent protection from maloperation.
The inrush restraint feature operates based on evaluation of the 2nd

harmonic content which is present in measured current. The inrush
condition is recognized when the ratio of second harmonic current to
fundamental component exceeds the corresponding setting value for each
phase. The setting value is applicable for both definite time stage and
inverse time stage. The inrush restraint feature will be performed as soon
as the ration exceeds the set threshold.
Furthermore, by recognition of the inrush current in one phase, it is

possible to set the protection in a way that not only the phase with the
considerable inrush current, but also the other phases of the overcurrent
protection are blocked for a certain time. This is achieved by
cross-blocking feature integrated in the IED.
The inrush restraint function has a maximum inrush current setting. Once
the measuring current exceeds the setting, the overcurrent protection will
not be blocked any longer.
1.2.3 Low voltage component
It is possible to set the protection in a way that the definite stages of

overcurrent element would operate only when at least one phase-to-phase
voltage falls below than the low voltage setting “U_OC_UnBlk”. This
component can be used to prevent any malfunction of the overcurrent
element during reverse charging of electro motors. The low voltage
component can be set for each definite stage by using dedicated binary
settings “OC1 V_Blk On”, “OC2 V_Blk On”, “OC3 V_Blk On”, “OC4 V_Blk
On”.
The logic of inverse time don’t judge undervoltage component when 2nd 3rd
and 4thstages set inverse time
23
The connected voltages to device may correspond to three phase to earth

voltages VA-N, VB-N, VC-N or only one phase to earth voltage or phase to
phase voltage by using dedicated binary setting “1Ph V Connect”. In case
of “1Ph V Connect” is set “0”, three phase to phase voltages are detected,
if “1Ph V Connect” is set “1”, any one phase to phase voltage should be
checked.
1.2.4 Direction determination feature
The direction detection is performed by determining the position of current

vector in directional characteristic. In other word, it is done by comparing
phase angle between the fault current and the reference voltage.
The integrated directional function can be applied to each stage of

overcurrent element via dedicated binary settings. These binary settings
include “OC1 Dir On”, “OC2 Dir On”, “OC3 Dir On”, ”OC4 Dir On”.
Furthermore, the directional orientation can be set individually for each
stage of the overcurrent elements. This can be performed by using binary
settings “OC1 Dir FWD”, “OC2 Dir FWD”, “OC3 Dir FWD”, “OC4 Dir FWD”.
The possible settings for these binary settings comprise “1-toward forward”
and “0-toward reverse”.
Basically, the direction determination is performed by determining the

phase angle between the fault current and a reference voltage. Direction of
a phase-directional element is detected by means of a cross-polarized
voltage. It means that the fault current of the corresponding phase is used
together with the healthy phase-to-phase voltage to determine direction of
fault current. This takes effect to all three phases. Table 3-2 shows the
assignment of the measured values for determination of fault direction in
case of various types of pickups for overcurrent protection function.
Table 3-2 Voltage and current measurement used for direction determination
Phase Current Voltage
A Ia U bc
B Ib U ca
C Ic U ab
As can be seen from Table 3-2, the healthy voltages are used in direction
determination. This allows for a correct direction determination even if the
fault voltage has collapsed entirely because of a single-phase short-line
fault. With three-phase short-line faults, memory voltage values from three
last cycles are used to clearly determine the direction, if the magnitudes of
24
the measured voltages are not sufficient.
In a single-phase fault, the cross-polarized voltage (reference voltage) is

90°out of phase with the fault voltage. With phase-to-phase faults, the
position of the reference voltage changes up to 30°, depending on the
degree of collapse in the fault voltages. In order to satisfy different network
conditions and applications, the reference voltage can be rotated by
adjustable angle “Angle_OC” between 0° and 90°. It should be noted that
the setting affect all the directional stages of overcurrent element. In this
way, the vector of rotated reference voltage can be closely adjusted to the
vector of fault current in order to provide the best possible result for the
direction determination. The rotated reference voltage defines the forward
and reverse area. The forward area is in range of ±85°around the rotated
reference voltage. If the vector of the fault current is in this area, the device
detects forward direction. Figure 6-15 shows an example of direction
determination for a fault in phase A. As can be seen from the figure 6-15,
fault current Ia lags from fault voltage Ua by angel 90-Φd, Φd is the setting
value of “Angle_OC”. The reference voltage Ubc is rotated by angle of Φd
to be closely matched to Ia. Furthermore, the forward area is depicted in
the following figure.
Forward 90° IA
Bisector
Φ
0°
U BC_Ref
5°
-IA
25
90° IA
Bisector
Reverse
Φ
0°
U BC_Ref
-IA 5°
Figure 3-1 Direction detection characteristic of overcurrent protection directional element
where:
Ф: The settable characteristic angle“Angle_OC”
During direction decision by directional function and voltage decision, a VT

Fail condition (a short circuit or broken wire in the voltage transformer's
secondary circuit or operation of the voltage transformer fuse) may result
in false or undesired trip or alarm by directional overcurrent stages or
overcurrent stages with voltage decision. In such situation, it is possible to
select operation status of those overcurrent stages which operate in
conjunction with directional or low voltage feature by using binary setting to
be blocked or keep them in operational state with no direction and low
voltage decision. When binary setting “Blk Fun_VTFail” is set to “0”,
corresponding overcurrent stages would not judge direction and low
voltage at VT failure. When the binary setting “Blk Fun_VTFail” is set t0 “1”,
no operation is possible by the overcurrent protection elements. It is noted
that binary setting “VT Fail On” affects all the stages of overcurrent
element. For instance, by applying setting “Blk Fun_VTFail”, all the three
stages of the overcurrent element will remain operative without direction
determination and low voltage feature in case of any fault in secondary
circuit of voltage transformer. On the other hand, setting “Blk Fun_VTFail”
makes them blocked.
26
1.2.5 Logic diagram
Three Phase inrush blocking:

Ia2/Ia1 >
Ib2/Ib1 > OR
Ic2/Ic1 > AND Cross BLK
t<
Phase A inrush blocking:
Cross BLK
OR Phase A Cross BLK

t>
AND
Ia2/Ia1 >
Phase B inrush blocking:
Cross BLK
OR Phase B Cross BLK

t>
AND
Ib2/Ib1 >
Phase C inrush blocking:
Cross BLK
OR Phase C Cross BLK

t>
AND
Ic2/Ic1 >
Figure 3-2 Logic diagram of cross-blocking for inrush restraint
27
{Uab,Ubc,Uca}Min<
1Ph V Connect & OC1_V Blk On
MV For OC 1
U_OC UnBlk>0
OC2_V Blk On
MV For OC 2
{Uab,Ubc,Uca}Max< & ≥
OC2_V Blk On
1Ph V Connect MV For OC 3
OC32_V Blk On
U2> MV For OC 4
1Ph V Connect &
U2_OC UnBlk>0
Figure 3-3 Logic diagram of low voltage component feature
Ia >
VT Fail
&
Blk Fun_VTFail
&
&
VT Fail
≥
Phase A Forward
&
OC1 Dir On ≥ & DEF A OK
≥
OC1 Dir On &
MV For OC 1
& OC1 Dir On
OC1_V Blk On ≥ &
OC1_V Blk On
OC1_V Blk On
OC1 2H_Blk On
≥
< I_2H_UnBlk
&
Ia2/Ia1>
DEF A OK T Func_OC1
BI_Blk OC1 & Trip/Alarm
Cross BLK
&
OC1 2H_Blk On
≥
Figure 3-4 Logic diagram of definite overcurrent stage
28
Ia Inverse
VT Fail
&
Blk Fun_VTFail
&
&
VT Fail
≥
Phase A Forward
&
OC2 Dir On ≥ & INV A OK
≥
OC2 Dir On
OC2 Dir On
OC2 2H_Blk On
≥
< I_2H_UnBlk
&
Ia2/Ia1>
INV A OK Func_OC2
& Trip/Alarm
Cross BLK
&
OC2 2H_Blk On
≥
Figure 3-5 Logic diagram of inverse overcurrent stage
1.3 Input and output signals
IP1 OC1_Trip
IP2 OC2_Trip/Alarm
IP3
OC3_Trip/Alarm
UP1
OC4_Trip/Alarm
UP2
UP3
Table 3-3 Analog input list
Signal Description
IP1 Signal for current input 1
UP1 Signal for voltage input 1
29
Table 3-4 Binary output list
Signal Description
OC1_Trip Overcurrent protection stage 1 trip
OC2_Trip Overcurrent protection stage 2 trip
OC3_Trip Overcurrent protection stage3 trip
OC4_Trip Overcurrent protection stage4 trip
OC2 Alarm Overcurrent protection stage 2alarm
1.4 Setting parameters
Table 3-5 Function setting list for overcurrent protection
No. Description Scope Unit Comment

Overcurrent setting for
1 I_OC1 0.05~100 A
stage 1
Overcurrent Time setting
2 T_OC1 0.00~100.00 s
for stage1
3 I_OC2 0.05~100 A
stage 2
4 T_OC2 0.00~100.00 s
for stage2
1:IEC NI
2: IEC VI
3: IEC EI
4: IEC LTI
5: ANSI MI
5 OC2 Inv CRV SEL 1~11 6: ANSI VI
7: ANSI EI
8:ANSI INV
9:ANSI SI
10:ANSI LI
11:ANSI DI
6 K_OC2 Inv 0.025~1.5
7 I_OC3 0.05~100 A
stage 3
8 T_OC3 0.00~100.00 s
for stage3
9 OC3 Inv CRV SEL 1~11 1:IEC NI
30
2: IEC VI
3: IEC EI
4: IEC LTI
5: ANSI MI
6: ANSI VI
7: ANSI EI
8:ANSI INV
9:ANSI SI
10:ANSI LI
11:ANSI DI
10 K_OC3 Inv 0.025~1.5
11 I_OC4 0.05~100 A
stage 4
12 T_OC4 0.00~100.00 s
for stage4
0: Defined by user
1:IEC NI
2: IEC VI
3: IEC EI
4: IEC LTI
5: ANSI MI
13 OC4 Inv CRV SEL 0~11
6: ANSI VI
7: ANSI EI
8:ANSI INV
9:ANSI SI
10:ANSI LI
11:ANSI DI
14 A_OC4 Inv 0.001~1000 s
15 P_OC4 Inv 0.01~10.00
Inverse characteristic
16 B_OC4 Inv 0.000~60.00 s
17 K_OC4Inv 0.025~1.5
Low voltage blocking for
18 U_OC_UnBlk 1.00~120.0 V
Overcurrent.
19 U2_OC_UnBlk 1.00~120.0 V
20 Angle_OC 0.00~90.00 degree
directional element
21 I_2H_UnBlk 0.05~100 A
22 Ratio_I2/I1 0.07~0.50
31
Table 3-6 Logical linker list for overcurrent protection
NO. Abbr. Explanation

1. Func_OC1 Enable or disable the stage 1 of overcurrent protection
Table 3-7 Binary setting list for overcurrent protection
No. Binary setting list Optical Default Comment

Direction for overcurrent stage 1
1 OC1 Dir On 1/0 0
1-On;0-Off.
Direction toward for overcurrent stage
2 OC1 Dir FWD 1/0 0
1. 1-Forward; 0-Reverse.
Low voltage blocking for overcurrent
3 OC1V_ Blk On 1/0 0
stage 1. 1-On; 0-Off.
Second harmonic Blocking for overcurrent
4 OC1 2H_Blk On 1/0 0
1-Inverse curve modle;0-difinte time
5 OC2Inv On 1/0 0
modle
Direction for overcurrent stage 2.
6 OC2 Dir On 1/0 0
1-On;0-Off.
7 OC2 Dir FWD 1/0 0
8 OC2 V_Blk On 1/0 0
Second harmonic Blocking for overcurrent
9 OC2 2H_Blk On 1/0 0
10 OC3Inv On 1/0 0
modle
Direction for overcurrent stage 3.1-On;
11 OC3 Dir On 1/0 0
0-Off.
12 OC3 Dir FWD 1/0 0
13 OC3 V_Blk On 1/0 0
14 OC3 2H_Blk On 1/0 0
stage3 Inverse. 1-On; 0-Off.
15 OC4Inv On 1/0 0
modle
16 OC4 Dir On 1/0 0 Direction for overcurrent stage 4.
32
1-On;0-Off.
17 OC4 Dir FWD 1/0 0
18 OC4 VBlk On 1/0 0
19 OC4 2H_Blk On 1/0 0
stage4 Inverse. 1-On; 0-Off.
Select the overcurrent stage 2 trip or
20 OC2 Trip On 1/0 0
alarm. 1-Trip; 0-Alarm.
1.5 Reports
Table 3-8 Event information list
Information Description
OC1 Trip Overcurrent protection stage 1 issues trip command
Table 3-9 Alarm information list
OC2 Alarm Overcurrent protection stage 2issues alarm signal
OC3 Alarm Overcurrent protection stage 3 issues alarm signal
OC4 Alarm Overcurrent protection stage 4 issues alarm signal
OC Inrush Blk Inrush is detected to block function.
33
1.6 Technical data
Table 3-10 Technical data for overcurrent protection
Item Rang or Value Tolerance

Definite time characteristics
Current 0.08 Ir to 20.00 Ir ≤ ±3% setting or ±0.02Ir
≤ ±1% setting or +40ms, at
Time delay 0.00 to 60.00s, step 0.01s
200% operating setting
Reset time approx. 40ms
Reset ratio Approx. 0.95 at I/In ≥ 0.5
Inverse time characteristics
IEC standard Normal inverse; ≤ ±5% setting + 40ms, at 2

Very inverse; <I/ISETTING< 20, in accordance
Extremely inverse; with IEC60255-151
Long inverse
ANSI Inverse; ≤ ±5% setting + 40ms, at 2
Short inverse; <I/ISETTING < 20, in
Long inverse; accordance with ANSI/IEEE

C37.112,
Moderately inverse;
Very inverse;
Extremely inverse;
Definite inverse
user-defined characteristic ≤ ±5% setting + 40ms, at 2
T=( )k
( )P <I/ISETTING< 20, in accordance
SET
with IEC60255-151
Time factor of inverse time, A 0.005 to 200.0s, step 0.001s
Delay of inverse time, B 0.000 to 60.00s, step 0.01s
Index of inverse time, P 0.005 to 10.00, step 0.005
set time Multiplier for step n: k 0.05 to 999.0, step 0.01
Minimum operating time 20ms
Maximum operating time 100s
Reset mode instantaneous
Reset time approx. 40ms,
Directional element
Operating area range ≤ ±3°, at phase to phase
Characteristic angle 0°to 90°, step 1° voltage >1V
34
Chapter 4 Earth fault protection
About this chapter
This chapter presents the protection principle, input and output

signals, parameter, logic diagram, IED report and technical data
included in earth fault protection.
35
1 Earth fault protection
1.1 Introduction
The non-directional earth fault elements can be applied as backup protection

functions in various applications including line and transformer protection in
systems with radial nature and those which are supplied from a single source.
The directional earth fault protection allows the application of the IED also in
systems where protection coordination depends on both the magnitude of the
earth fault current and the direction of power flow to the fault location, for
instance, in case of parallel lines or transformers, or in a loop configuration.
Main features of the earth fault are as follows:
 Earth fault protection have four stages, 1st stage is definite time stage, 2nd ,
3rd , and 4th stages can be set definite or inverse time stage by control
word “EF2 Inv On” “EF3 Inv On” and “EF4 Inv On” .
 11 kinds of IEC and ANSI inverse time characteristic curves as the

standard curves for 2ndand 3rd stages. And the standard curves as well as
optional user defined characteristic are provided by 4th stage.
 Zero sequence directional element.
 Negative sequence directional element is applied as a complement to

zero sequence directional element. It can be enabled/disabled by setting
 Each stage can be set individually as directional/non-directional

 Each stage can be set individually for inrush restraint
 Settable maximum inrush current
 Inrush restraint function adopting 2 nd harmonic measured phase or earth

current (settable)
 The second,third and fourth stage can be set individually to alarm or trip
 VT secondary circuit supervision for directional protection function. Once

VT failure happens, the directional stage can be set to be blocked or to
be non-directional
36
 Zero-sequence current is calculated by summation of 3 phase currents or

measured from earth phase CT selectable
1.2.1 Time characteristic
Earth fault protection have four stages, 1st stage is definite time stage, 2 nd 3rd
and 4th stages can be set definite or inverse time stage by control word “EF2
Inv On” “EF3 Inv On” and “EF4 Inv On”
Each stage can operate in conjunction with the integrated inrush restraint and
directional functions and operate based on measured phase current
The earth fault protection can operate with the measured or calculated zero
sequence current (zero-sequence current IN measured from earth phase CT
or zero-sequence current 3I0 calculated by the summation of three phase
currents, 3I0=IA+IB+IC). These two types of measured quantity can be enabled
or disabled via binary setting”EF 3I0 Calculated”. If setting “EF 3I0 Calculated”
is set as “0”, the function will operate based on the measured zero-sequence
current, whereas, the “EF 3I0 Calculated”is set as “1”, the zero-sequence
current is calculated from the summation of three phase currents.

Pickup value for the definite stage can be set in setting value. The measured
or calculated zero-sequence current is compared with the corresponding
setting value with delay time. If zero-sequence current exceed the associated
pickup value, after expiry of the time delay, trip command is issued. The
condition for delay time start is expressed in the following formula
3I0 > 3I0set
Equation 4-1
The time delay can be set for each definite stage individually in setting. After
the delay time elapsed, trip command or alarm signal is issued. The drop out
value of the definite stages is approximately equal to the system setting “High
Relay Ret” of the pickup value for 3I0/In≥0.5.
The time delay of inverse time characteristic is calculated based on the type
37
of the set characteristic, the magnitude of the current and a time multiplier.
For the inverse time characteristic, both ANSI and IEC based standard curves
are available, and any user-defined characteristic can be defined using the
following equation:
= ( E )K_EF
( )
E
Equation 4-2
where:
A_EF: Time factor for inverse time stage
B_EF: Delay time for inverse time stage
P_EF: index for inverse time stage
K_EF: Time multiplier
The IDMT curve of EF is same as over current protection of curve.
The time is set to count up for a user-defined time delay. The time delay can
be set for each definite stage individually through corresponding settings.
After the user-defined time delays elapsed, a trip command is issued.
1.2.2 Inrush restraint
The protection IED may detect large magnetizing inrush currents during
transformer energizing. In addition to considerable unbalance fundamental
current, inrush current comprises large second harmonic current which does
not appear in short circuit current. Therefore, the inrush current may affect the
protection functions which operate based on the fundamental component of
the measured current. Accordingly, inrush restraint logic is provided to
prevent earth fault protection from maloperation.
The integrated earth fault protection may detect large magnetizing inrush
currents when a power transformer installed at downstream path is energized.
The inrush current may be several times of the nominal current, and may last
from several tens of milliseconds to several seconds. Inrush current
comprises second harmonic as well as a considerable fundamental
component. It is possible to apply the inrush restraint feature separately to
each definite stage and inverse time-current stage of earth fault element by
38
using binary setting “EF1 2H_Blk On”, “EF2 2H_Blk On” , “EF3 2H_Blk On”
and “EF4 2H_Blk On”. By applying setting “1” to each of the mentioned binary
setting, no trip command or alarm signal would be possible by corresponding
stage, if an inrush condition is detected. Since the inrush current contains a
relatively large second harmonic component which is nearly absent in fault
current, the inrush restraint operates based on the evaluation of the second
harmonic content which is present in the phase currents.
Generally, inrush restraint for earth fault protection is performed based on the
second harmonic contents of three phase currents. However, it is possible to
use the IED only for earth fault protection and therefore, the phase currents
may be not connected to the IED. In such cases, if the binary setting of “EF
Chk I02/I01” is set as “1”, second harmonic content of zero sequence current
is considered if the zero sequence current is measured from neutral CT. As
mentioned previously, the binary setting of “3I0 Measured” is enabled for this
situation. So, the inrush condition is recognized if the ratio of second
harmonic content of measured zero sequence current to its fundamental
component exceeds corresponding setting value.
Furthermore, if the fundamental component of zero sequence current

exceeds the upper limit value for unblocking, the earth fault protection will not
be blocked any longer.
On the contrary, if binary setting of “EF Chk I02/I01” is set as “0”, the inrush
condition is recognized if the ratio of second harmonic content in each phase
current to their fundamental component exceeds setting value.
Furthermore, if the fundamental component of each phase current exceeds

the upper limit value for unblocking, the earth fault protection will not be
blocked any longer.
The integrated zero sequence directional function can be applied to each

stage of earth fault element via dedicated binary setting. These binary
settings include “EF1 Dir On”, “EF2 Dir On”, “EF3 Dir On” and “EF4 Dir On”.
Furthermore, the directional orientation can be set individually for each stage
of the earth fault elements. This can be performed by using binary settings
“EF1 Dir FWD”, “EF2 Dir FWD”, “EF3 Dir FWD” and “EF4 Dir FWD”. The
possible settings for these binary settings comprise “1-toward forward” and
“0-toward reverse”.
39
1.2.3.1 Zero-sequence directional element
In this method, the direction determination is performed by comparing the

zero sequence system quantities. In current path, the measured IN current is
valid, when the neutral current is connected to the IED and the binary setting
“EF 3I0 Calculated” is set as “0”. Otherwise, the IED calculates quantity 3I0
from the summation of the three phase currents when the binary setting “EF
3I0 Calculated” isSet as “1”, In the voltage path, the displacement voltage V N
is used as reference voltage, if it is connected, and the binary setting “EF 3U0
Calculated” is set as “0”. Otherwise, the IED calculates the zero sequence
voltage 3V0 from the summation of three phase voltages if binary setting “EF
3U0 Calculated” is set as “1”. Direction determination can be performed by
the IED for 3V0 quantity having a magnitude fall to 2V. Contrary to the
directional phase elements, which work based on the un-faulted voltage as
reference voltage, for the earth fault protection direction element, the zero
sequence voltage is used as the reference voltage. Depending on the
connection of the voltage transformer (setting “EF 3U0 Calculated”), VN or 3V0
(3V0=VA+VB+VC) is applied.
In order to satisfy different network conditions and applications, the reference

voltage can be rotated by adjustable angle between 0°and 90°in clockwise
direction (negative sign). It should be noted that the settings are applied for all
the directional stages of earth fault element. In this way, the vector of rotated
reference voltage can be closely adjusted to the vector of fault current -3I0
which lags the fault voltage 3V 0 by the fault angle Φ0. This will provide the
best detection result for the direction determination. The rotated reference
voltage defines the forward and reverse area. The forward area is in range of
±80°around the rotated reference voltage. If the vector of the fault current -3I0
is in this area, the fault condition is detected as forward direction. The
zero-sequence direction detection characteristic is shown in
Figure 4-1.
40
3I 0 90°
10°
0°
3U 0_Ref
Φ0
Forward Bisector
-3 I 0
3I 0 90°
Reverse
10°
0°
3U 0_Ref
Φ0
Bisector
-3 I 0
Figure 4-1 Direction detection characteristic of zero sequence directional element
where:
Ф0: The settable characteristic angle
1.2.3.2 Negative-sequence directional element
In this method, direction determination is performed by comparing the

negative sequence system quantities. To do so, the calculated negative
sequence current 3I2 is compared with the calculated negative sequence
voltage 3V2. This method is particularly suitable for the condition that the zero
sequence voltage is too low, for example, when a considerable zero
sequence mutual coupling exists between parallel lines or when there is an
unfavorable zero sequence impedance. In such cases it may be desirable to
determine direction of fault current by using negative sequence components.
41
If the binary setting for negative-sequence direction detectionis enabled, the

default direction determination is performed by using the zero sequence
components, however, when the magnitude of zero sequence voltage falls
below permissible threshold of 2V, the negative-sequence directional element
is used to detect direction. On the contrary, if the negative-sequence direction
detection is disabled, the direction of earth fault current is only determined by
the zero sequence components. In this regard, if the magnitude of zero
sequence voltage magnitude is larger than 2V, proper direction determination
can be detected. However, for the condition that the zero sequence voltages
below 2V, no direction determination would be applied, thus, the fault is
considered as reverse direction.
The fault current -3I2 is in phase opposition to the fault current 3I2 and lags
from the voltage 3V2 by the fault angle Φ2. To satisfy different applications, the
reference voltage can be rotated by adjustable angle between 0°and 90°in
clockwise direction (negative sign) to be closely adjusted to the vector of fault
current -3I2. This would provide the best detection result for direction
determination. The rotated reference voltage defines the forward and reverse
area. The forward area is in range of ±80°around the rotated reference
voltage. If the vector of fault current -3I2 is in this area, the fault condition is
detected as forward direction. The negative sequence direction detection
characteristic is shown in
Figure .
42
3I 2 90°
10°
0°
3U 2-Ref
Φ0
Forward Bisector
-3 I 2
3I 2 90°
Reverse
10°
0°
3U 2-Ref
Φ2
Bisector
-3 I 2
Figure 4-2 Direction detection characteristic of negative sequence directional element
where:
Ф2_Char: The settable characteristic angle
Angle_Range Neg: 80º
43
1.2.4 Logic diagram
I01 > 3I0_2H_UnBlk
EF Chk I02/I01 & Ir BLK EF
I02/I01 >
Figure 4-3 Logic diagram for inrush restraint based on measured zero sequence current
Max(Ia1,Ib1,Ic1) >I_2H_UnBlk
EF Chk I02/I01 & Ir BLK EF
Ia2/Ia1 >
Ib2/Ib1 > ≥
Ic2/Ic1 >
Figure 4-4 Logic diagram for inrush restraint based on based on phase currents
44
Blk Fun_VTFail
&
VT Fail ≥
&
Blk Fun_VTFail
&
U0/I0-φ
3U0>2V
≥
& Forward/Reverse
U2/I2-φ
& &
EF U2/I2 Dir
EF 3I0 Calculated
Blk Fun_VTFail
&
≥
VT Fail &
&
Blk Fun_VTFail
Blk Fun_VTFail
&
V1p VT Fail ≥
&
Blk Fun_VTFail
&
U0/I0-φ
3U0>2V
≥
& Forward/Reverse
U2/I2-φ
& &
EF U2/I2 Dir
EF 3I0 Calculated
Blk Fun_VTFail
&
≥
V1p VT Fail &
&
Blk Fun_VTFail
Figure 4-5 Logic diagram for direction determination
3I0 >
EF1 2H_Blk On Func_EF1

≥
Ir BLK EF & & T Trip/Alarm
BI_Blk EF1
EF1 Dir On
≥
&
Forward/Reverse
Figure 4-6 Logic diagram for first definite stage of earth fault protection
45
3I0 Inverse
EF2 2H_Blk On Func_EF2

≥
Ir BLK EF & & Trip/Alarm
BI_Blk EF2
EF2 Dir On
≥
Forward/Reverse &
Figure 4-7 Logic diagram for inverse time stage of earth fault protection
IP1 EF1 Trip

IP2 EF2 Trip/Alarm
IP3 EF3 Trip/Alarm
IP0 EF4 Trip/Alarm
UP1
UP2
UP3
UP0
Signal Description
Signal Description
EF1 Trip Earth fault protection stage 1 trip
EF2 Alarm Earth fault protection stage 2alarm
EF3 Alarm Earth fault protection stage 3 alarm
EF4 Alarm Earth fault protection stage 4alarm
46
Table 4-3 Function setting list for earth fault protection

Earth fault current setting
1 3I0_EF1 0.05~100 A
for stage 1
Earth fault Time setting for
2 T_EF1 0.00~100.00 s
stage1
3 3I0_EF2 0.05~100 A
for stage 2
4 T_EF2 0.00~100.00 s
stage2
1:IEC NI
2: IEC VI
3: IEC EI
4: IEC LTI
5: ANSI MI
5 EF2 Inv CRV SEL 1~11 6: ANSI VI
7: ANSI EI
8:ANSI INV
9:ANSI SI
10:ANSI LI
11:ANSI DI
6 K_EF2 Inv 0.025~1.5
7 3I0_EF3 0.05~100 A
for stage 3
8 T_EF3 0.00~100.00 s
stage3
0: Defined by user
1:IEC NI
2: IEC VI
3: IEC EI
4: IEC LTI
5: ANSI MI
9 EF3 Inv CRV SEL 1~11
6: ANSI VI
7: ANSI EI
8:ANSI INV
9:ANSI SI
10:ANSI LI
11:ANSI DI
47
10 K_EF3 Inv 0.025~1.5

11 3I0_EF4 0.05~100 A
for stage 3
12 T_EF4 0.00~100.00 s
stage3
0: Defined by user
1:IEC NI
2: IEC VI
3: IEC EI
4: IEC LTI
5: ANSI MI
13 EF4 Inv CRV SEL 0~11
6: ANSI VI
7: ANSI EI
8:ANSI INV
9:ANSI SI
10:ANSI LI
11:ANSI DI
14 A_EF4 Inv 0.001~1000 s
15 P_EF4 Inv 0.01~10.00 Inverse characteristic
16 B_EF4 Inv 0.000~100.00 s
17 K_EF4 Inv 0.025~1.5
18 Angle_EF 0.00~90.00 degree
19 I_2H_UnBlk_EF 0.05~100 A
20 3I0_2H_UnBlk_EF 0.05~100 A
21 Ratio_I2/I1_EF 0.07~0.50
22 Ratio I02/I01_EF 0.07~0.50
Table 4-4 Logical linker list for earth fault protection

1. Func_EF1 Enable or disable the stage 1 of earth fault protection
48
Table 4-5 Binary setting list for earth fault protection

The function of Earth fault stage 1.
1. EF1 Dir On 1/0 0
1-On; 0-Off.
Direction for Earth fault stage 1.
2. EF1 Dir FWD 1/0 0
1-On; 0-Off.
Direction toward for Earth fault stage
3. EF1 2H_Blk On 1/0 0
4. EF2 Inv On 1/0 0
modle
5. EF2 Dir On 1/0 0
1-On; 0-Off.
6. EF2 Dir FWD 1/0 0
1-On; 0-Off.
7. EF2 2H_Blk On 1/0 0
8. EF3_Inv On 1/0 0
modle
The function of Earth fault stage 3
9. EF3 Dir On 1/0 0
1-On; 0-Off.
10. EF3 Dir FWD 1/0 0
1-On; 0-Off.
Direction toward for Earth fault stage3.
11. EF3 2H_Blk On 1/0 0
1-Forward; 0-Reverse.
12. EF4Inv On 1/0 0
modle
13. EF4 Dir On 1/0 0
1-On; 0-Off.
14. EF4 Dir FWD 1/0 0
1-On; 0-Off.
15. EF4 2H_Blk On 1/0 0
16. Dir Check U2/I2 1/0 0
Second harmonic Blocking for Earth
17. EF Chk I02/I01 1/0 0
fault. 1- Check I2/I1; 0- Check I02/I01
Check second harmonic from neutral
18. EF 3I0 Calculated 1/0 0
CT. 1-On; 0-Off.
3I0 value from Measured or
19. EF 3U0 Calculated 1/0 0
Calculated. 1-Calculated; 0-Measured.
3U0 value from Measured or
20 UnBlk EF_CT Fail 1/0 0
Calculated.
49
1-Calculated; 0-Measured.
Select the Earth fault stage 2 trip or
21. EF2 Trip On 1/0 0
22. EF3 Trip On 1/0 0
23. EF4 Trip On 1/0 0
1.5 IED reports
EF1 Trip Earth fault protection stage 1 issues trip command
EF2Alarm Earth fault protection stage 2issues an alarm signal
EF3 Alarm Earth fault protection stage 3 issues an alarm signal
EF4 Alarm Earth fault protection stage 4 issues an alarm signal
EF Inrush Blk Inrush is detected to block function.
1.6 Technical data
Table 4-8 Technical data for earth fault protection
Item Rang or value Tolerance

Definite time characteristic
≤ ±1% setting or +40ms, at 200%
operating setting
Reset ratio Approx. 0.95 at I/Ir ≥ 0.5
IEC standard Normal inverse; IEC60255-151
50
Very inverse; ≤ ±5% setting + 40ms, at 2

Extremely inverse; <I/ISETTING< 20
Long inverse
ANSI Inverse; ANSI/IEEE C37.112,
Short inverse; ≤ ±5% setting + 40ms, at 2
Long inverse; <I/ISETTING< 20
Moderately inverse;
Very inverse;
Extremely inverse;
Definite inverse
user-defined characteristic IEC60255-151
T=( )k
( )P ≤ ±5% setting + 40ms, at 2
SET
<I/ISETTING< 20
Time factor of inverse time, A 0.005 to 200.0s, step
0.001s
Directional element
Operating area range of zero ≤ ±3°, at 3U0≥1V
sequence directional element
Characteristic angle 0°to 90°, step 1°
Operating area range of negative ≤ ±3°, at 3U2≥2V
sequence directional element
Characteristic angle 50°to 90°, step 1°
51
Chapter 5 Sensitive earth fault protection
Chapter 5 Sensitive earth fault

protection
About this chapter
This chapter introduces the protection principle, input and output

signals, parameter, logic diagram, IED report and technical data
used for sensitive earth fault protection.
52
1 Sensitive overcurrent protection
1.1 Introduction
In networks with high impedance earthing, the phase to earth fault current is
significantly smaller than load current and phase to phase short circuit currents.
Another difficulty for earth fault protection is that the magnitude of the phase to
earth fault current is almost independent of the fault location in the network.
Sensitive earth fault protection can be used to detect and give selective trip of
phase to earth faults in isolated or compensated networks. The protection
function also can be applied to detect high impedance earth faults in solidly or
low-resistance earthed networks.
Sensitive earth fault protection integrated in the IED provides following features:
 Sensitive overcurrent have four stages, 1st stage is definite time stage, 2nd
3rd and 4th stages can be set definite or inverse time stage by control word
“SEF2 Inv On” “SEF3Inv On” and “SEF4 Inv On”.
 11 kinds of IEC and ANSI inverse time characteristic curves as the standard
curves for 2ndand 3rdstages. And the standard curves as well as optional
user defined characteristic for 4thstage.
 Sensitive earth fault directional element with U 0/I0-Φ principle
 Sensitive earth fault directional element with Cos Φ principle

 Each stage can be set to be directional, or non-directional independently
 The second, third and fourth can be set individually to alarm or trip
 Displacement voltage can be checked to increase function reliability
 Dedicated sensitive CT
 VT secondary circuit supervision for directional protection function
1.2.1 Time characteristic
Sensitive overcurrent have four stages, 1st stage is definite time stage, 2nd 3rd
53
and 4th stages can be set definite or inverse time stage by control word “SEF2
Inv On” “SEF3Inv On” and “SEF4 Inv On”
Each stage can operate in conjunction with the integrated directional functions
and operate based on measured phase current which is injected from the
dedicated sensitive current transformer.
Furthermore, each stage is independent from each other and can be combined
as desired.
Pickup value for the definite stage can be set in setting value. The measured
current from sensitive CT input is compared with the corresponding setting value
with delay time. If the measured current exceeds the associated pickup value,
after expiry of the time delay, the trip command or alarm signal is issued. The
dropout value of the definite stages is approximately equal to the system setting
“High Relay Ret”.
The time delay of inverse time characteristic is calculated based on the type of
the set characteristic, the magnitude of the current and a time multiplier. For the
inverse time characteristic, both ANSI and IEC based standard curves are
available, and any user-defined characteristic can be defined using the following
equation:
= ( SE )K_SEF
( )
SE
Equation 5-1
where:
A_SEF: Time factor for inverse time stage
B_SEF: Delay time for inverse time stage
P_SEF: index for inverse time stage
K_SEF: Time multiplier
By applying proper setting of the aforementioned parameters, the IED calculates

the tripping or alarming time from the measured current in each phase
separately. Once the calculated time has been elapsed, the trip signal or alarm
signal is issued.
54
The integrated directional function can be applied to each stage of sensitive

earth fault element via specified binary setting. In order to discriminate forward
or reverse short circuits, the IED provides two methods for sensitive earth fault
direction detection which should be utilized to cover all network configurations
according to the type of grounding. Based on U0/I0-Φ measurement and based
on Cos Φ measurement respectively.
The integrated directional function can be applied to each stage of sensitive

earth fault element via dedicated binary setting. These binary setting include
“SEF1 Dir On”, “SEF2 Dir On”, “SEF3 Dir On”and “SEF4 Dir On”. There are two
methods for direction determination of sensitive earth faults. The first is based on
U0/I0-Φ measurement and the second is based on Cos Φ measurement. The
following subsections go on to demonstrate basic principle of these two methods.
Selection between the methods can be made via binary setting “SEF Chk U0/I0”.
If setting “SEF Chk U0/I0” is “1”, the device employs the first method; whereas
setting “SEF Chk U0/I0” is set “0” it employs the second method.
During direction decision by directional function (U0/I0-Φ or cos Φ), a VT Fail

condition may result in false or undesired tripping or alarm by directional
sensitive earth fault element. In such situation, it is possible to select operation
status of those sensitive earth fault stages which operate in conjunction with
directional feature by using binary setting to be blocked or keep them in
operational state with no direction. When binary setting “Blk Fun_VTFail” is set
“0”, corresponding sensitive earth fault stages would not judge direction at VT
failure. When “Blk Fun_VTFail” is set “1”, no operation is possible by the
sensitive earth fault protection element. It is noted that the binary setting affect
all the stages of sensitive earth fault element. For instance, by applying setting
“Blk Fun_VTFail” at “0”, all the three stages of the sensitive earth fault element
will remain operative without direction determination in case of any fault in
secondary circuit of voltage transformer. On the other hand, setting “Blk
Fun_VTFail” at “1” makes them blocked.
It is noted that direction determination based on measured displacement voltage

would not be blocked in case of failure detection in the three-phase connected
voltage transformer. Similarly, if the direction determination is based on the
calculated displacement voltage, it would not be blocked as a result of failure
detection in U4 voltage transformer. However, in case of a failure in U4 voltage
transformer, the direction determination based on measured value of
displacement voltage would be blocked according to the setting applied at binary
setting “Blk Fun_VTFail” set to “1”.
55
1.2.2.1 U0/I0-Φ measurement
In this method, the direction determination is performed by comparing the

displacement angle between zero sequence system quantities. In current path,
the measured current Is at the sensitive input is used. In the voltage path, the
displacement voltage U4 is used as reference voltage, if it is connected, and the
device is informed about via setting “SEF 3U0 Calculated” at “0”. Otherwise the
device calculates the zero sequence voltage 3U0 from the sum of the three
phase voltages if setting “SEF 3U0 Calculated” is “1”. Direction determination
can be performed by the device for 3U0 quantity having a magnitude higher than
the setting “U_3V0_SEF”.
Contrary to the directional phase elements, which work with the un-faulted
voltage as reference voltage, the fault voltage itself is the reference voltage for
the directional sensitive earth fault protection. Depending on the connection of
voltage transformer (setting “SEF 3U0 Calculated”), the setting “0” or “1” is
corresponding to voltage U4 or 3U0 (3U0=VA+VB+VC).
56
90°
Forward
10°
- I NS
Bisector
Φd 0°
3U0_Ref
I NS
90°
- I NS
10°
Bisector
Φd 0°
3U0_Ref
Reverse
I NS
Figure 5-1 Direction detection characteristic of the sensitive earth fault directional
element by U0/I0-Φ
where:
ФNS: The settable characteristic angle
In order to satisfy different network conditions and applications, the reference

voltage can be rotated by adjustable angle “Angle_SEF” between 0° and 90° in
anticlockwise direction (positive sign). It should be noted that the settings affect
all the directional stages of sensitive earth fault element. In this way, the vector
of rotated reference voltage can be closely adjusted to the vector of fault current
-Is which leads the fault voltage 3U0 by the fault angle Φd. This would provide
the best possible result for the direction determination. The rotated reference
57
voltage defines the forward and reverse area. The forward area is in range of
±80°around the rotated reference voltage. If the vector of the fault current -Is is
in this area, the device detects forward direction. Figure 5-1 shows an example
of direction determination. As can be seen from the figure, fault current -Is leads
residual sequence voltage 3U0 by Φd, which is the setting value of “Angle_SEF”.
The reference voltage 3V0 is rotated by this angle to be closely matched to -IS
current. Furthermore, the forward area is depicted in the figure.
1.2.2.2 CosΦ measurement
Similar to U0/I0-Φ method, the direction determination is performed in cos Φ

method by using the measured current at sensitive current input Is together with
the measured or calculated displacement voltage. In this context, the measured
displacement voltage is used if it is connected, and the device is informed about
it through binary setting “SEF 3U0 Calculated” at “0”. Otherwise the IED
calculates the zero sequence voltage 3U0 from the sum of the three phase
voltages if setting “SEF 3U0 Calculated” is “1”. Direction determination can be
performed by the device for 3U0 quantity having a magnitude higher than the
setting “U_3V0_SEF”.
Unlike to U0/I0-Φ method, direction determination is performed in Cos Φ method

by using those component of the residual current which is perpendicular to the
directional characteristic (axis of symmetry). Figure 5-2 shows how the
IEDadopts complex vector diagram for direction determination. As can be seen,
displacement voltage 3V0 is the reference magnitude quantity. The axis of
symmetry is defined as a line perpendicular to this quantity. The sensitive earth
fault protection would issue a trip command or an alarm signal if the active
component of Is is in the opposite direction of the reference voltage and has a
magnitude exceeds setting “IsCOS_SEF”.
58
IS 90°
Forward 0°
3U0_Ref
- IS
IS 90°
Reverse 0°
3U0_Ref
- IS
Figure 5-2 Direction detection characteristic of the sensitive earth fault directional
element by Cos Φ
1.2.3 Logic diagram
U0/I0-φ
3U0> & Forward/Reverse
SEF Chk U0/I0
Figure 5-3 Logic diagram for direction determination based on U0/I0-Φ measurement
59
IsCOSφ
3U0> & Forward/Reverse
SEF Chk U0/I0
Figure 5-4 Logic diagram for direction determination based on Cos Φ measurement
VT Fail
&
Blk Fun_VTFail
≥
&
VT Fail &
Forward/Reverse
≥ Forward/Reverse Release
3U0 Calculated
Forward/Reverse
VT Fail &
Blk Fun_VTFail
≥
&
&
VT Fail
Figure 5-5 Influence of VT failure on direction determination of sensitive earth fault protection
Is >
Func_SEF1
BI_Blk SEF1 & T Trip/Alarm
SEF1 Dir On
≥
&
Forward/ Reverse Release
Figure 5-6 Logic diagram for the first definite stage of sensitive earth fault protection
Is Inverse
Func_SEF2
BI_Blk SEF1 & Trip/Alarm
SEF2 Dir On
≥
Forward/ Reverse Release &
Figure 5-7 Logic diagram for the inverse time stage of sensitive earth fault protection
IS SEF1 Trip
UP1 SEF2 Trip/ Alarm
60
Signal Description
Is Signal for sensitive current input
Signal Description
SEF1 Trip Sensitive earth fault protection stage 1 trip
SEF2 Alarm Sensitive earth fault protection stage 2 alarm
SEF3 Alarm Sensitive earth fault protection stage 3alarm
SEF4 Alarm Sensitive earth fault protection stage 4alarm
Table 5-3 Function setting list for sensitive earth fault protection

1 I_SEF1 0.05~100 A
for stage 1
2 T_SEF1 0.00~100.00 s
stage1
3 I_SEF 2 0.05~100 A
for stage 2
4 T_SEF2 0.00~100.00 s
stage2
1:IEC NI
2: IEC VI
3: IEC EI
4: IEC LTI
5: ANSI MI
5 SEF2 Inv CRV SEL 1~11
6: ANSI VI
7: ANSI EI
8:ANSI INV
9:ANSI SI
10:ANSI LI
61
11:ANSI DI
6 K_SEF2 Inv 0.025~1.5

7 I_SEF 3 0.05~100 A
for stage 3
8 T_SEF3 0.00~100.00 s
stage3
0: Defined by user
1:IEC NI
2: IEC VI
3: IEC EI
4: IEC LTI
5: ANSI MI
6: ANSI VI
7: ANSI EI
8:ANSI INV
9:ANSI SI
10:ANSI LI
11:ANSI DI
10 K_SEF3 Inv 0.025~1.5
11 I_SEF 4 0.05~100 A
for stage 3
12 T_SEF4 0.00~100.00 s
stage3
0: Defined by user
1:IEC NI
2: IEC VI
3: IEC EI
4: IEC LTI
5: ANSI MI
6: ANSI VI
7: ANSI EI
8:ANSI INV
9:ANSI SI
10:ANSI LI
11:ANSI DI
14 A_SEF4 Inv 0.001~1000 s
15 P_SEF4 Inv 0.01~10.00 Inverse characteristic
16 B_SEF4 Inv 0.000~100.00 s
17 K_SEF4 Inv 0.025~1.5
18 Angle_EF 0.00~90.00 degree
19 IsCOS_SEF 0.05~100.00 A
62
20 U_3V0_SEF 2.00~100.0 V
Table 5-4 Logical linker list for sensitive earth fault protection

1. Func_SEF1 Enable or disable the stage 1 of sensitive earth fault protection
Table 5-5 Binary setting list for sensitive earth fault protection

1. SEF1 Dir On 1/0 0
1-On; 0-Off.
2. SEF1 Dir FWD 1/0 0
1-On; 0-Off.
3. SEF2 Inv On 1/0 0
modle
1-On; 0-Off.
1-On; 0-Off.
6. SEF3_Inv On 1/0 0
modle
The function of Earth fault stage 3
1-On; 0-Off.
1-On; 0-Off.
9. SEF4 Inv On 1/0 0
modle
10. SEF4 Dir On 1/0 0
1-On; 0-Off.
1-On; 0-Off.
12. SEF Chk U0/I0 1/0 0
13. SEF 3U0 Calculated 1/0 0
14. SEF2 Trip On 1/0 0
63
1.5 IED reports
SEF1 Trip Sensitive earth fault protection stage 1 issues trip command
SEF2Alarm Sensitive earth fault protection stage 2issues an alarm signal
SEF3 Alarm Sensitive earth fault protection stage 3issues an alarm signal
SEF4 Alarm Sensitive earth fault protection stage 4 issues an alarm signal
1.6 Technical data
Table 5-8 Technical data for sensitive earth fault protection
Item Range or value Tolerance

Current from sensitive CT input 0.005 to 1.000 A , step 0.001 A ≤ ±3 % setting value or 1 mA
Current from neutral CT input 0.08 Ir to 20.00 Ir ≤ ±3 % setting value or 0.02 Ir
Time delay 0.00 to 60.00, step 0.01 s ≤ ±1.5 % setting value or +40
ms, at 200% operating setting
Reset ratio Approx. 0.95 when I/In ≥ 0.5
Reset time Approx. 40 ms
Current from sensitive input 0.005 to 1.000 A , step 0.001 A ≤ ±3 % setting value or 1 mA
Current from normal input 0.08 Ir to 20.00 Ir ≤ ±3 % setting value or 0.02 Ir
Long inverse

C37.112,
Moderately inverse;
64
Very inverse;
Extremely inverse;
Definite inverse
T=( )k <I/ISETTING< 20, in accordance
( )P
SET
with IEC60255-151
Directional element for sensitive earth-fault protection
principles I cos Φ
Φ (V0 / I0)”
Direction measurement IE and VE measured
or 3V0 calculated
3U0 Minimum voltage threshold 2.00 to 100.00 V, step 0.01 V ≤ ±3 % setting for measured
voltage;
≤ ±5 % setting for calculated
voltage
Characteristic angle Φ_SEFChar 0.0°to 90.0°, step 1° ≤ ±3°
Operating area range ≤ ±3°
65
Chapter 6 Negative-sequence overcurrent protection
Chapter 6 Negative-sequence
overcurrent protection
About this chapter
This chapter introduces the protection principle, input and

technical data used for negative-sequence overcurrent
protection.
66
1 Negative-sequence overcurrent
protection
1.1 Introduction
Negative-sequence overcurrent protection detects unbalanced loads on the

system. It is especially useful to monitor the unbalanced load of motors.
This is due to the fact that unbalanced loads create counter-rotating fields in
three-phase induction motors, which cause overheating in rotor end zones.
In addition, the protection function may be used to detect interruptions,
short circuits and polarity problems with current transformers. Furthermore,
it is suitable for detecting single-phase and two-phase faults with fault
currents lower than load currents.
The protection provide following features:
 Negative-sequence overcurrent have four stages, 1st stage is definite

time stage, 2nd 3rd and 4th stages can be set definite or inverse time
stage by control word “NSOC2 Inv On” “NSOC3Inv On” and “NSOC4 Inv
On”.
 11 kinds of IEC and ANSI inverse time characteristic curves as the

standard curves for 2ndand 3rdstages. And the standard curves as well
as optional user defined characteristic for 4thstage
 The first,second,third and forth stage can be set individually as alarm or

trip stage
1.2.1 Protection function description
The IED provides three negative-sequence overcurrent protection stages

from which two stages operate as definite time stages and the other one
operates with inverse time-current characteristic. The negative-sequence
overcurrent protection operates based on negative sequence current
calculated from three phase currents, as follows:
İ2 = İ a2 İB aİ
Equation 6-1
67

Individual pickup value for each definite stage can be set in setting value.
The calculated negative sequence current from Equation -1 is compared
separately with the corresponding setting value with delay time. If the
calculated negative-sequence current exceeds the associated pickup value,
after expiry of the time delay, the trip command or alarm signal is issued.
The drop out value of the definite stages is approximately equal to the
system setting “High Relay Ret” of the pickup value for I/In≥0.5.
The time delay of inverse time characteristic is calculated based on the type
of the set characteristic, the magnitude of the current and a time multiplier.
For the inverse time characteristic, both ANSI and IEC based standard curves
are available and any user-defined characteristic can be defined using the
following equation:
= ( S )K_NSOC
( )
S
Equation 6-2
where:
A_NSOC: Time factor for inverse time stage
B_NSOC: Delay time for inverse time stage
P_NSOC: index for inverse time stage
K_NSOC: Time multiplier
By applying proper setting of the aforementioned parameters, the IED

calculates the tripping or alarming time from the measured current in each
phase separately. Once the calculated time has been elapsed, the trip
signal or alarm signal is issued.
68
1.2.2 Logic diagram
CT Fail
Func_NSOC1 On T1 NSOC1 Trip
&
I2 > I2_NSOC1
BI_Blk NSOC1
Func_NSOC2 On
T2 NSOC2
&
I2 > I2_NSOC2 Trip/Alarm
BI_Blk NSOC2
Func_NSOC3 On
T3 NSOC3
&
I2 > I2_NSOC3 Trip/Alarm
BI_Blk NSOC3
Func_NSOC4 On T4 NSOC4
& Trip/Alarm
I2 > I2_NSOC4
BI_Blk NSOC4
Figure 6-1 Logic diagram for negative-sequence overcurrent protection
IP1 NSOC1 Trip

IP2 NSOC2 Trip/Alarm
IP3 NSOC3 Trip/Alarm
NSOC4 Trip/Alarm
Signal Description
69
Signal Description
NSOC1 Trip Negative sequence overcurrent protection stage 1 trip
NSOC2Trip Negative sequence overcurrent protection stage 2 trip
NSOC3Trip Negative sequence overcurrent protection stage 3trip
NSOC4 Trip Negative sequence overcurrent protection stage 4 trip
NSOC2 Alarm Negative sequence overcurrent protection stage 2 alarm
Table 6-3 Function setting list for negative-sequence overcurrent protection
1 I2_NSOC1 0.05~100.00 A Earth fault current setting for stage 1

2 T_ NSOC1 0.00~100.00 s Earth fault Time setting for stage1
4 T_ NSOC2 0.00~100.00 s Earth fault Time setting for stage2
1:IEC NI
2: IEC VI
3: IEC EI
4: IEC LTI
5: ANSI MI
5 NSOC2 Inv CRV SEL 1~11 6: ANSI VI
7: ANSI EI
8:ANSI INV
9:ANSI SI
10:ANSI LI
11:ANSI DI
6 K_NSOC2 Inv 0.025~1.5

8 T_NSOC3 0.00~100.00 s Earth fault Time setting for stage3
0: Defined by user
1:IEC NI
2: IEC VI
9 NSOC3 Inv CRV SEL 1~11
3: IEC EI
4: IEC LTI
5: ANSI MI
70
6: ANSI VI
7: ANSI EI
8:ANSI INV
9:ANSI SI
10:ANSI LI
11:ANSI DI
10 K_NSOC3 Inv 0.025~1.5
12 T_NSOC4 0.00~100.00 s Earth fault Time setting for stage3
0: Defined by user
1:IEC NI
2: IEC VI
3: IEC EI
4: IEC LTI
NSOC4 Inv CRV 5: ANSI MI
13 0~11
SEL 6: ANSI VI
7: ANSI EI
8:ANSI INV
9:ANSI SI
10:ANSI LI
11:ANSI DI
14 A_NSOC4 Inv 0.001~1000 s
15 P_NSOC4 Inv 0.01~10.00 Inverse characteristic
16 B_NSOC4 Inv 0.000~100.00 s
17 K_NSOC4 Inv 0.025~1.5
71
Table 6-4 Logical linker list for negative-sequence overcurrent protection

1. Func_NSOC1 Enable or disable the stage 1 of negative sequence protection
Table 6-5 Binary setting list for negative-sequence overcurrent protection
1 NSOC2 Inv On 1/0 0

4 NSOC2 Trip On 1/0 0
1.5 IED reports
NSOC1 Trip Negative sequence current protection stage 1 issues trip command
NSOC2Alarm Negative sequence current protection stage 2issues an alarm signal
NSOC3 Alarm Negative sequence current protection stage 3 issues an alarm signal
NSOC4 Alarm Negative sequence current protection stage 4 issues an alarm signal
72
1.6 Technical data
Table 6-8 Technical data for negative sequence overcurrent protection

Current 0.08 Ir to 20.00 Ir ≤ ±3% setting value or ±0.02Ir
Time delay 0.00 to 60.00, step 0.01 s ≤ ±1% setting or +40ms, at
Reset time ≤ 40 ms
Reset ratio Approx. 0.95 for I2 /Ir > 0.5
Long inverse

C37.112,
Moderately inverse;
Very inverse;
Extremely inverse;
Definite inverse
T=( )k
( )P <I/ISETTING< 20, in accordance
SET
with IEC60255-151
73
Chapter 7 Thermal overload protection
Chapter 7 Thermal overload

protection
About this chapter

technical data used for thermal overload protection.
74
1 Thermal overload protection
1.1 Introduction
The thermal overload protection represents an essential requirement to

prevent protected equipment from thermal damaging due to overloads.
Thermal damage mostly affects the insulating material surrounding the
phase current conductors in transformers, cables or any other power
equipment. As a matter of fact, the insulation material ages too rapidly if the
equipment temperature exceeds the design limit value. Thus, a special
protection is needed to prevent over-temperature condition for the protected
object. Since severity of over-temperature condition is directly proportional
to current squared, the thermal protection operates based on the square of
measured current flowing through the protected object. Furthermore,
because the cumulative nature of over-temperature condition, it is
necessary to integrate previous thermal history of equipment in the
protection. This is achieved in the IED by providing a comprehensive
thermal replica of the protected object. In this regard, the IED provides an
overload protection with memory capability by taking into account both the
previous history of an overload and the heat loss to the environment.

The thermal overload protection in the IED is provided with one trip stage as
well as one alarm stage. It is possible to set the alarm stage at a certain
percentage of the setting value applied at the trip stage. They protection
function operates based on an approximate replica of the protected object in
the event of temperature rise caused by overload. The thermal replica is
implemented based on thermal models (Cold or Hot Curve) of IEC60255-8
standard. The temperature rise is calculated separately for each phase in a
thermal replica from the square of the respective phase current. The
maximum calculated temperature rise of the three phases is decisive for
evaluation of the thresholds.
The IED calculates the temperature rise of the protected equipment in each
phase, based on following differential equation:
𝑑𝛩 𝐼 2
τ Θ =( )
𝑑𝑡 𝐼𝜗
Equation 7-1
where:
τ:is thermal time constant of heating for the protected object, in seconds. It is usually
75
determined by manufacturer of the protected object. This parameter can be set in

setting value.
I: is the measured fundamental current flowing through each phase of the protected
object.
Iϑ : is the maximum permissible continuous thermal overload current. It is usually

specified by manufacturer of the protected object. This parameter can be set in
setting value.
Θ: is temperature rise of the protected object in per unit of the final temperature rise
at maximum allowed phase currentIϑ .
According to Equation 7-1, the trippingtime for thermal overload protection is

calculated by the following equation based on Hot Curve in IEC60255-8
standard:
𝐼 2 𝐼 2
( ) − ( 𝑃)
𝐼
𝜗 𝐼 𝜗
= τ ln [ 2 ]
𝐼
( ) − 1
𝐼 𝜗
Equation 7-2
where:
IP: is steady state current previous to the overload.
The IED is capable to calculate tripping time of thermal overload protection

not only based on the Hot Curve, but also based on Cold Curve as defined in
IEC60255-8 standard and equation as following:
𝐼 2
( )
𝐼𝜗
= τ ln [ ]
𝐼 2
( ) − 1
𝐼 𝜗
Equation 7-3
From the Equation 7.2 and Equation 7-3 can be seen, the cold curve
provides no memory regarding to previous thermal condition of the protected
object, hereas, by using the hot curve, the protection function is able to
represent a memorized thermal profile of the protected object. Thermal will be
resetby binary input, when binary input value is "1" , the thermal
accumulationis reset, the thermal accumulated calculation formula is
76
Equation 7.3, otherwise the calculation formulais Equation 7.2. Whether it is

cold or hot curve, it can be divided into alarm and tripstage.
IP1 Thermal OL Trip

IP2 Thermal OL Alarm
IP3
Signal Description
Signal Description
Thermal OL Trip Thermal overload protection trip
Thermal OL Alarm Thermal overload protection alarm
Table 7-3 Function setting list for thermal overload protection
1 I_Therm OL 0.10~10.00 A
2 T_Const Therm 6~9999 S
3 Ratio_Cool 0.1~10
4 Ratio_Alarm 0.5~1
77
Table 7-4 Logical linker list for thermal overload protection

1. Func_ThermOL Enable or disable the thermal overload protection
Table 7-5 Binary setting list for thermal overload protection
Enable or disable the alarm function of

1 Therm OL Alarm On 1/0 0
thermal overload protection
1.5 IED reports
Therm OL Trip Thermal overload protection issues trip command
Therm OL Alarm Thermal overload protection issues an alarm signal
1.6 Technical data
Table 7-8 Technical data for thermal overload protection

Thermal heating time constant 1 to 9999 s
Thermal cooling time constant 1 to 9999 s
 I eq2 
IEC cold curve t   ln  2 2 
IEC 60255–8,
 I eq  I   ≤ ±5% setting or +40ms
 I eq2  I P2 
IEC hot curve t   ln  2 2
IEC 60255–8,
 I eq  I   ≤ ±5% setting or +40ms
78
Chapter 8 Switch on to faulty
Chapter 8 Swtich on to faulty
About this chapter

technical data used for overvoltage protection.
79
1 Swtich on to faulty protection
1.1 Introduction
Switch on to fault function is a subfunction of the overcurrent protection and

earth fault protection. They work with the same logic, drives the same
contacts and issues the same reports. Only the time delay settings are
ignored during the CB closure, the time delay settings would be recovered
after period of validity, i.e. it is not a valid protection permanently.
Through measuring the current value in a time with MCB close, the protection
switch to faulty issures the line whether being fault or not. When the control
word SOTF Chk MC is On is be on, and in the time of T_MC Chk Fault the
rising edge of coming of input BI_MC begins to time, the 3-pahse current in
higher than I_SOTF or the measured earth current is higher than 3 I0_SOTF,
the relay operates. The input BI_MC can be defined by users in the LOGIC
file. When the input BI_MC is be set 1 for more than 10s, the relay will alarm
and show the report MC Error.
While the control word SOTF Chk CB On is be on, after conforming the CB
positing going by the relay time T_SOTF Chk CB, and 3-phase current is
higer than the setting I_SOTF or the measured earth current is more than 3
I0_SOTF, the relay operates.
Block condition: second harmonic blocking. The concrete blocking logic

refers to the protection OC and EF harmonic block.
80
1.2.2 Logic diagram

MC Error
10s
BI MC
& &
SOTF Chk MC On &
T_MC Chk Fault
SOTF Chk CB On
≥ CB Status
&
TWJ
T_SOTF Chk CB
&
HWJ
CB Status
BI_Blk SOTF
& 40ms SOTF OC Trip
Func_SOTF
Ia2/Ia1 >
Ib2/Ib1 > ≥
Ic2/Ic1 >
Ia(or Ib , Ic) > “I_SOTF” &
Ia2/Ia1 >
Ib2/Ib1 > ≥ &
Ic2/Ic1 >
Calculated 3I0>“3I0_SOTF”
BI_Blk SOTF
& 40ms SOTF EF Trip
Func_SOTF
CB Status
IP1 SOTF Trip

IP2
IP3
HWJ
TWJ
Signal Description
81
Signal Description
SOTF OC Trip SOTF protection OC stage Trip
SOTF EF Trip SOTF protection EF stage Trip

Table 8-3 Function setting list for switch on to faulty protection
1 I_SOTF 0.05~10 A
2 3I0_SOTF 0.05~10 A
3 T_SOTF Chk CB 0~100 s
Table 8-4 Logical linker list for thermal overload protection

1. Func_SOTF Enable or disable the switch on to faulty protection
Table 8-5 Binary setting list for thermal overload protection
1 SOTF Chk CB On 1/0 0

2 SOTF Chk MC On 1/0 0
3 SOTF Chk 2H_Blk On 1/0 0
1.5 IED reports
SOTF OC Trip SOTF OC protection issues trip command
SOTF EF Trip SOTF EF protection issues trip command
SOTF Inrush Blk Inrush is detected to block function.
82
Table 8-8 Technical data for overcurrent protection

Definite time characteristics
≤ ±1% setting or +40ms, at
Reset ratio at I/In ≥ 0.5
83
Chapter 9 Overvoltage protection
About this chapter

technical data used for overvoltage protection.
84
1 Overvoltage protection
1.1 Introduction
The overvoltage protection detects abnormal network and machine high

voltage conditions. Overvoltage conditions may occur possibly in the power
system during abnormal conditions such as no-load, light load, or open line
end on long line. The protection can be used as open line end detector or as
system voltage supervision normally.
The protection provides following features:
 Two definite time stages and a inversetime stage, Device provides 4

inverse time curve and one user-define curve.
 First stage and inverse time stage can be set to alarm or trip
 Measuring voltage between phase-earth voltage and phase-phase

(selectable)
 Three phase or single phase voltage connection
 Settable dropout ratio
1.2.1 Time characteristics
The relay provide 2 stages definite time and a inverse time Overvoltage
protection. The delay time can be set for each definite stage individually in
setting. After the delay time elapsed, a trip command or alarm signal is
issued.
Thus, alarming or tripping can be time-coordinated depending on how

severe the voltage increases are, i.e. in case of a high overvoltage, trip
command can be issued with a short time delay, whereas in case of less
severe overvoltage, trip or alarm command can be issued with a longer time
delay. In this context, settings “U_OV1” and “T_OV1” correspond to the
voltage threshold and time delay of the first stage. Similarly, settings
“U_OV2” and “T_OV2” are related to the second stage. The dropout ratio
for both the overvoltage stages can be set through setting “Dropout_OV”.
For the delay time of inverse time characteristic, which is calculated here
based on the type of the set characteristic, the magnitude of the current and
85
a time multiplier, both ANSI and IEC based standard curves are available,
and any user-defined characteristic can be defined using following formula:
= ( )K_OV
( )
Equation 9-1
where:
A_OV: Time factor for inverse time stage
B_OV: Delay time for inverse time stage
P_OV: Index for inverse time stage
K_OV: Time multiplier
A, P and B are the characteristic parameters for IDMTL curves. These

characteristic parameters have been defined for each curve in IEC and
ANSI standards. Table 9-1 provides a summary of the parameter values for
11 typical curves.
Table 9-1 Characteristic parameters for IDMTL curves

Parameter Parameter Parameter
No. IDMTL Curves
A P B
0 Defined by user
1 IEC INV. 0.14 0.02 0
2 IEC VERY INV. 13.5 1.0 0
3 IEC EXTREMELY INV. 80.0 2.0 0
4 IECLONG INV. 120.0 1.0 0
86
1.2.2 Overvoltage protection principle
Overvoltage protection element provides two definite time stages and one
inverser time stage which can be enabled or disabled separately according
to the user’s requirement using dedicated binary setting “Func_OV1”,
“Func_OV2” and “Func_OV INV”. The first stage and inverse timestage can
be used for tripping or alarming, whereas the second stage is dedicated for
tripping purposes. It is possible to select the operation mode of the first
stage of overvoltage protection using binary setting “OV1 Trip” and “OV Inv
Trip” as “1”. As expected, When the setting “OV1 Trip” and “OV Inv”as
“0”makes it work as an alarming stage, while by applying “OV1 Trip” and
“OV Inv Trip” as “1”, it is possible to use the first stage as a tripping stage.
Voltage thresholds and time delays can be set individually for each element.
Overvoltage protection can operate based on phase to earth voltages VA-N,
VB-N, VC-N or phase to phase voltage VA-B, VB-C, VC-A. The IED is
informed about user’s preference by binary setting “OV PP/OV PE”. By
setting “OV PP”, calculation would be based on phase to phase voltages.
However, by setting “OV PE”, phase to ground voltages would be employed
in calculation.
1.2.3 Voltage connection
A A
B B
C C
VA VA
VB VB
VC VC
VN VN
CSC-211 CSC-211
Case A Case B
A A
B B
C C
VA VA
VB VB
VC VC
VN VN
CSC-211 CSC-211
Case C Case D
Figure 9-1 Connection example for overvoltage protection
87
As can be seen from Figure , overvoltage protection is suitable for different

connections of voltage transformer. Overvoltage protection is capable to
operate not only with three phases to earth voltages connection (Case A and
Case B) but also with only one phase to phase voltage (Case C) or phase to
earth voltage (Case D). If only one phase to phase voltage is connected to the
IED, it can be connected to the VA-VB, VB-VC or VC-VA input of the relay. In
this case, overvoltage protection should be set to operate based on “OV PP”.
Similarly, by connection of one phase to earth voltage to the device, it can be
connected to the VA-VN, VB-VN or VC-VN input of the relay. Furthermore,
overvoltage protection should be set to operate based on “OV Chk PE”. It
should be noted that if the IED is only provided with one phase to phase
voltage, it is impossible to calculate phase to earth voltage accurately. This is
because the fact that there is no earth voltage connected to the IED.
It is noted that despite the capability of overvoltage protection to operate

properly with one phase to phase or one phase to earth voltage, maybe there
are some limitation may exist in operation of other protection functions, in
these conditions. For example, direction determination based on three phase
voltages would not operate with one voltage transformer connected.
Furthermore, depending on the application, voltage transformers may be

installed either on the source side or the load side of the associated circuit
breaker. However, these different arrangements have no influence in
behavior of the overvoltage protection.
As mentioned previously, according to different requirements, stage 1 of the

overvoltage protection can be set to trip or alarm, whereas stage 2 is
dedicated for trip. If the setting “OV1 Trip On” is set as “0”, the alarm output of
respective stage would be marshaled to “ALARM” contact. On the contrary, if
setting “OV1 Trip On” is set as “1”, the trip command of respective stage can
be configured at different output modules by action matrix. It should be noted
that the protection functions which are marshaled.
1.2.4 Logic diagram
Ua>
Ub> ≥
&
Uc> Func_OV1
≥
OV Chk PE
& T1 Trip/Alarm
Uab>
&
Ubc> ≥
BI_Blk OV1
Uca>
Figure 9-2 Overvoltage stage 1 operation logic
88
Ua>>
Ub>> ≥
&
Uc>> Func_OV2
≥
OV Chk PE
& T2 Trip/Alarm
Uab>>
&
Ubc>> ≥
BI_Blk OV2
Uca>>
Figure 9-3 Overvoltage stage 2 operation logic
Ua Inverse
Ub Inverse ≥
&
Uc Inverse Func_OV Inverse
≥
OV Chk PE
& Trip/Alarm
Uab Inverse
&
Ubc Inverse ≥
BI_Blk OV Inverse
Uca Inverse
Figure 9-4 Overvoltage inversestage operation logic
UP1 OV1_Trip/Alarm
UP2 OV2_Trip
UP3 OV Inv Trip/Alarm
Signal Description
Signal Description
OV1 Alarm Overvoltage protection stage 1 alarm
OV Inv Alarm Overvoltage protection stage 2 alarm
OV1Trip Overvoltage protection stage 1 trip
OV2Trip Overvoltage protection stage 2 trip
OV Inv Trip Overvoltage protection stage 2 trip
89

Table 9-4 Function setting list for overvoltage protection
1 U_OV1 40.00~200.0 V
2 T_OV1 0.00~120.00 S
3 U_OV2 40.00~200.0 V
4 T_OV2 0.00~120.00 S
5 T_OV Inv 40.00~200.0 s
stage3
0: Defined by user
1:IEC NI
6 OV Inv CRV SEL 0~4 2: IEC VI
3: IEC EI
4: IEC LTI
7 A_OV Inv 0.001~1000 s Inverse characteristic
8 P_OV Inv 0.01~10.00
9 B_OV Inv 0.000~60.00 s
10 K_OV Inv 0.025~1.5
11 Dropout_OV 0.90~0.99
Table 9-5 Logical linker list for overvoltage protection

1. Func_OV1 Enable or disable the overvoltage stage 1
3. Func_OV Inv Enable or disable the overvoltage inverse stage
Table 9-6 Binary setting list for overvoltage protection

Connections of voltage transformer.
1 OV ChkPE 1/0 0
1-Phase to Earth; 0-Phase to Phase
Select the under voltage stage 1 trip or
2 OV1 Trip On 1/0 0
Select the under voltage inverse stage
3 OV Inv Trip On 1/0 0
trip or alarm. 1-Trip; 0-Alarm.
90
1.5 IED reports
OV1 Trip Overvoltage protection stage 1 issues trip command
OV2 Trip Overvoltage protection stage 2 issues trip command
OV Inv Trip Overvoltage protection inverse stage issues trip command
OV1 Alarm Overvoltage protection stage 1 issues an alarm signal
OV Inv Alarm Overvoltage protection stage 1 issues an alarm signal
1.6 Technical data
Table 9-9 Technical data for overvoltage protection

Voltage connection Phase-to-phase voltages or ≤ ±3 % setting or ±1 V
phase-to-earth voltages
Phase to earth voltage 40 to 100 V, step 1 V ≤ ±3 % setting or ±1 V
Phase to phase voltage 80 to 200 V, step 1 V ≤ ±3 % setting or ±1 V
Reset ratio 0.90 to 0.99, step 0.01 ≤ ±3 % setting
Time delay 0.00 to 60.00 s, step 0.01s ≤ ±1 % setting or +50 ms, at
Reset time <40ms
91
Chapter 10 Undervoltage protection
About this chapter

technical data used for undervoltage protection.
92
1 Undervoltage protection
1.1 Introduction
The undervoltage protection provides protection against dangerous voltage

drops, especially for electric machines.
The protection function provides following features:
 Two definite time stages
 First stage can be set to alarm or trip
 Measuring voltage between phase-earth voltage and phase-phase

selectable
 Current criteria supervision
 Circuit breaker aux. contact supervision
 VT secondary circuit supervision, the undervoltage function will be

blocked when VT failure happens
 Settable dropout ratio
Undervoltage protection element provides two definite time stages which can
be enabled or disabled separately according to the user’s requirement using
dedicated binary settings “Fun_UV1” and “Fun_UV2”. The first stage can be
used for tripping or alarming, whereas the second stage is dedicated for
tripping purposes. It is possible to select the operation mode of the first stage
of undervoltage protection using binary setting “UV1 Trip On”. As expected,
setting “UV1 Trip On” set as “0” makes it work as an alarming stage, while by
applying “UV1 Trip On” set as “0”it is possible to set the first stage as a
tripping undervoltage stage. Voltage thresholds and time delays can be set
individually for each element. Thus, alarming or tripping can be
time-coordinated depending on how severe the voltage collapses are. In this
context, settings “U_UV1” and “T_UV1” correspond to the voltage threshold
and time delay of the first stage. Similarly, settings “U_UV2” and “T_UV2” are
related to the second stage. The dropout ratio for both the undervoltage
stages can be set through setting “Dropout_UV”.
93
Undervoltage protection can operate based on phase to earth voltages VA-N,

VB-N, VC-N or phase to phase voltage VA-B, VB-C, VC-A . The IED is
informed about user’s preference by binary setting “UV Chk PE”. By setting
“UV Chk PE” as “0”, calculation would be based on phase to phase voltages.
However, by setting “UV Chk PE” as “1”, phase to ground voltages would be
employed in calculation. Furthermore, it is possible to set the IED to operate
either when all the measured phase to earth voltages (or phase to phase
voltages according to the setting of “UV Chk PE”) falls below the setting
values “U_UV1” and “U_UV2” or when at least one of the phase to earth
voltages (or at least one of the phase to phase voltages according to the
setting of “UV Chk PE”) falls below the respective setting values “U_UV1” and
“U_UV2. This can be achieved by setting of binary setting “UV Chk 1Ph”. If
setting “UV Chk 1Ph” as “0”is applied, the undervoltage protection would
operate only if all of the phase to ground or phase to phase voltages falls
below the setting of “U_UV1” and “U_UV2”. In contrast, if setting “UV Chk
1Ph” as “1”is applied, the protection would operate when at least one of the
phase to earth or phase to phase voltages drops below the respective
thresholds.
1.2.2 Voltage connection
A A
B B
C C
VA VA
VB VB
VC VC
VN VN
CSC-211 CSC-211
Case A Case B
A A
B B
C C
VA VA
VB VB
VC VC
VN VN
CSC-211 CSC-211
Case C Case D
Figure 10-1 Connection example for undervoltage protection
94
As can be seen from Figure , undervoltage protection is suitable for different

connections of voltage transformer. Undervoltage protection is capable to
operate not only with three phases to earth voltages connection (Case A and
Case B) but also with only one phase to phase voltage (Case C) or phase to
earth voltage (Case D). If only one phase to phase voltage is connected to the
IED, it can be connected to VA-VB, VB-VC or VC-VA input of the IED and the
IED should be informed by binary setting “1Ph V Connect” as “1”. In this case,
undervoltage protection should be set to operate based on “UV Chk PE”be
setas “0”and “UV Chk 1Ph”be set as “1”. Similarly, by connection of one
phase to earth voltage to the device, it can be connected to VA-VN, VB-VN or
VC-VN input of the relay and the relay should be informed by control word
“1Ph V Connect”. Furthermore, undervoltage protection should be set to
operate based on “UV chk PE” be set as “1” and “UV Chk 1Ph” be set as “0”.
It should be noted that if the IED is only provided with one phase to phase
voltage, it is impossible to calculate phase to earth voltage accurately. This is
because the fact that there is no earth voltage connected to the IED.
It is noted that despite the capability of undervoltage protection to operate

properly by using only one phase to phase or one phase to earth voltage,
maybe there are some limitation in operation of other protection functions, in
these conditions. For example, direction determination based on three phase
voltages would not operate with one voltage transformer connected.
1.2.3 Depending on the VT location
Depending on the application, voltage transformers may be installed either on

the source side or the load side of the associated circuit breaker. These
different arrangements may lead to different behavior of the undervoltage
protection. When a tripping command is issued and the circuit breaker is
opened, full voltage remains on the source side while the load side voltage
becomes zero. In this case, undervoltage protection may remain picked up.
This problem is removed in the IED by integrating additional current criterion.
In this context, undervoltage pickup can be maintained only when the
undervoltage criterion satisfied and a minimum current (setting “I_Chk_UV”)
are exceeded. The largest of the three phase currents is decisive. In other
words, subsequent to each pickup, the undervoltage protection would drop
out as soon as the current decreases below the setting of “I_Chk_UV”. If the
voltage transformer is installed on the source side and it is not desired to
check current flow, this feature can be disabled by setting the minimum
threshold of “I_Chk_UV” to 0. Furthermore, it is possible for the IED to
integrate circuit breaker position in operation logic of undervoltage protection.
By employing this feature, the IED would issue a trip command when the
circuit breaker is closed. In this regard, undervoltage protection would drop
95
out when circuit breaker is opened. This feature can be enabled by applying
setting “UV Chk CB On” as “1”in binary setting. This is mainly useful when
voltage transformer is installed on load side. However, if the voltage
transformer is installed on the source side and it is not desired to check circuit
breaker position in undervoltage protection, setting “UV Chk CB On” as
“0”should be applied in binary setting.
1.2.4 Logic diagram
Ua <
≥
Ub < &
Uc <
UV Chk 1Ph ≥
Ua <
&
Ub < & &
Uc <
UV Chk PE
≥ UV stg1
Uab <
≥
Ubc < &
Uca < &
UV Chk 1Ph ≥
Uab <
&
Ubc < &
Uca <
Figure 10-2 Logic diagram for undervoltage stage 1
Ua <<
≥
Ub << &
Uc <<
UV Chk 1Ph ≥
Ua <<
&
Ub << & &
Uc <<
UV Chk PE
≥ UV stg2
Uab <<
≥
Ubc << &
Uca << &
UV Chk 1Ph ≥
Uab <<
&
Ubc << &
Uca <<
Figure 10-3 Logic diagram for undervoltage stage 2
96
UV stg1
BI_Blk UV1 Fun_UV1
& &
Max(Uab/Ubc/Uca)>U_UV1
T1 Trip/Alarm
1Ph V Connect T1+2s
&
Umax>U_UV1
UV Chk CB On
&
TWJ
Imax>I_Chk_UV ≥
VT fail
Figure 10-4 Logic diagram for undervoltage stage 1 operation
UV stg2
BI_Blk UV2
&
Max(Uab/Ubc/Uca)>U_UV2
& Fun_UV2
1Ph V Connect T2+2s
T2 Trip
&
Umax>U_UV2
UV Chk CB On
&
TWJ
Imax>I_Chk_UV ≥
VT fail
Figure 10-5 Logic diagram for undervoltage stage 2 operation
UP1 UV1 Trip

UP2 UV2 Trip
UP3 UV1 Alarm
IP1
IP2
IP3
TWJ
97
Signal Description
UP1 signal for voltage input 1
IP1 signal for current input 1
Table 10-2 Binary input list
Signal Description
TWJ Open status of CB
Signal Description
UV1 Alarm Undervoltage protection stage 1 alarm
UV1_Trip Undervoltage protection stage 1 trip
UV2_Trip Undervoltage protection stage 2 trip
1.4 Setting parameter
Table 10-4 Function setting list for undervoltage protection
1 U_UV1 5.00~150 V
2 T_UV1 0.00~120.0 S
3 U_UV2 5.00~150 V
4 T_UV2 0.00~120.0 S
5 I_Check UV 0.0~10 A
6 Dropout_UV 1.01~2.00
98
Table 10-5 Logical linker list for undervoltage protection

1. Func_UV1 Enable or disable the stage 1 of undervoltage protection
2. Func_UV2 Enable or disable the stage 2 of undervoltage protection
Table 10-6 Binary setting list for undervoltage protection
Check circuit breaker position in under

1 UV Chk CB On 1/0 0
voltage protection. 1-On; 0-Off.
Check voltage one or three phase.
2 UV Chk 1Ph 1/0 0
1-One phase; 0-Three phase.
Voltage calculation check type
3 UV ChkPE 1/0 0
1-Phase to Earth; 0-Phase to Phase
Select the under voltage stage 1 trip or
4 UV1 Trip On 1/0 0
1.5 IED reports
UV1 Trip Undervoltage protection stage 1 issues trip command
UV2 Trip Undervoltage protection stage 2 issues trip command
UV1 Alarm Undervoltage protection stage 1 issues an alarm signal
99
1.6 Technical data
Table 10-9 Technical data for undervoltage protection

Voltage connection Phase-to-phase voltages or ≤ ±3 % setting or ±1 V
phase-to-earth voltages
Phase to earth voltage 5 to 75 V , step 1 V ≤ ±3 % setting or ±1 V
Phase to phase voltage 10 to 150 V, step 1 V ≤ ±3 % setting or ±1 V
Reset ratio 1.01 to 2.00, step 0.01 ≤ ±3 % setting
Time delay 0.00 to 120.00 s, step 0.01 s ≤ ±1 % setting or +50 ms, at 80%
operating setting
Current criteria 0.08 to 2.00 Ir ≤ ±3% setting or ±0.02Ir
Reset time ≤ 50 ms
100
Chapter 11 Displacement voltage protection
Chapter 11 Displacement voltage

protection
About this chapter

technical data used for displacement voltage protection.
101
1 Displacement voltage protection
1.1 Introduction
In some applications, it is necessary to monitor the displacement voltage to

detect an earth fault in power system. This protection is usually applied in
networks where the earth fault current is limited.
 Two definite time stages and one inverse time stage，The inverse time
stage provide 4 fixed curves and a user-define curve.
 The first and Inverse time stage can be set to alarm or trip
 Faulty phase discrimination
 3U0 based on calculated summation of 3 phase voltage or measured

injected residual voltage
1.2.1 Displacement voltage input
The displacement voltage 3V0 can be directly applied to the IED or can be
calculated based on the connected three phase to ground voltages
(3V0=VA+VB+VC). In the latter case, the three voltage inputs must be
connected to voltage transformers in a ground-wye configuration. If the IED is
only provided with phase to phase voltages or provided only one phase to
earth or phase to phase voltage, it is not possible to calculate a displacement
voltage. In this case, the direction cannot be determined for earth fault or
sensitive earth fault protection.
If the displacement voltage is directly applied to the IED and the binary setting
“3U0 Calculated” is set as “0”, it is not affected by VT fail detection on
three-phase connected voltage. Similarly, if the displacement voltage is
calculated based on the three-phase voltages and the binary setting “3U0
Calculated” is set as “1”, it would not be blocked as a result of failure
detection in U4 voltage transformer. However, in case of a failure in U4
voltage transformer, the displacement voltage protection based on measured
value 3V0 would be blocked.
102
1.2.2 Protection description
The displacement voltage protection is used to detect ground faults and to

determine direction of earth faults. More information about direction
determination based on displacement voltage is presented in other
subsections. Two definite stages included in this protection for detection of
earth faults. The first and inverse stage can be set to issue an alarm signal or
a trip command. This can be achieved by binary settings “3V01 Trip On” and
“3V0 Inv Trip On”. For example, by applying settings “3V01 Trip On” and “3V0
Inv Trip On” as “0”, the first and inverse stage would operate as an alarming
stage, whereas the second one would operate as tripping stage. If each stage
is set to alarm, respective output would be marshaled to “ALARM” contact. In
contrast, by applying setting trip to a stage, the trip output can be configured
to various trip outputs setting by Csmart II software tools.
Individual pickup value for each definite stage can be defined by setting
“U_3V01”, “U_3V02” and “U_3V0 Inv”. With these settings, the measured or
calculated displacement voltage is compared separately with the setting
value for each stage. If the respective value is exceeded, a trip or alarm time
delay timer is started. Each timer is set to count up to a user-defined time
delay. The time delay can be set for each definite stage individually via
settings “T_3V01” and “T_3V02”. After the user-defined time delays elapsed,
a trip command or an alarm signal is issued by respective stage.
The pickup value for the inverse time-voltage stage can be defined by setting
“U_3V0 Inv”. The displacement voltage 3U0 is compared with corresponding
setting value. If it exceeds the setting value, the inverse displacement voltage
protection stage picks up and the tripping or alarming time is calculated from
the displacement voltage, using the selected tripping or alarming curve. The
tripping or alarming curve can be selected from IEC standard curves, or a
user-defined characteristic can be used alternatively. Application of each
curve is possible by setting respective coefficients of following formula:
 
 
t   B  K
A
 U P 


 1 

  Us  

Equation 11-1
here U is the displacement voltage;
103
Us is the pickup setting, the corresponding setting is”U_3V0 Inv”;
P is the exponent index of the curve, the corresponding setting is”

P_3V0 Inv”;
A is the Time factor of the curve, the corresponding setting is”

A_3V0 Inv”;
B is IEC constant, the corresponding setting is” B_3V0 Inv”;
K is time multiplier setting, the corresponding setting is” K_3V0

Inv”.
The IDMT curve of 3U0 is same as over voltage protection of curve.
Furthermore, it is possible to determine the faulty phase after expiration of

time delay for the first stage. A precondition is that three phase to ground
voltages should be connected to the IED in a grounded wye configuration. By
doing so, the individual phase to ground voltages is measured and is
compared with settings “U_Phase low” and “U_Phase up”. In this context, if
the measured phase to ground voltage in a single phase falls below the
threshold “U_Phase low” and at the same time the magnitude of the phase
voltages in the remained phases are above the setting value “U_Phase up”,
an earth fault is recognized at the phase having voltage magnitude below
“U_Phase low” threshold.
1.2.3 Logic diagram
3V0 1 OP
BLK 3V0
Func_3V01
3U0> & T1 Trip/Alarm
BI_Blk 3V01
Func_3V02
3U0>
& T2 Trip
BI_Blk 3V02
Func_3V Inv
3U0>
& Trip/Alarm
BI_Blk 3V0 Inv
Figure 11-1 Logic diagram for displacement voltage protection
104
3V0 1 OP
VA>U_Phase up
& Gnd A
VA<U_Phase low
VB>U_Phase up
& Gnd B
VB<U_Phase up
VC>U_Phase up
& Gnd C
VC<U_Phase up
Figure 11-2 Logic diagram for fault phase determination
UP1 3V01 Trip/Alarm

UP2 3V02 Trip
UP3 3V0 Inv Trip/ Alarm
UP4
Signal Description
Signal Description
Displacement voltage protection stage 1
3V01 Alarm
alarm
Displacement voltage protection stage 2
3V0 InvAlarm
alarm
3V01Trip Displacement voltage protection stage 1 trip
3V02Trip Displacement voltage protection stage 2 trip
Displacement voltage protection inverse time
3V0 Inv Trip
stage trip
105
Table 11-3 Function setting list for displacement voltage protection
1 U_3V01 2.00~100.0 V
2 T_3V01 0.00~120.00 s
3 U_3V02 2.00~100.0 V
4 T_3V02 0.00~120.00 s
5 U_3V0 Inv 2.00~100.0 V
0: Defined by user
1: IEC NI
6 3V0 Inv CRV SEL 0~4 2: IEC VI
3: IEC EI
4: IEC LTI
7 A_3V0 Inv 0.001~1000 s Inverse characteristic
8 P_3V0 Inv 0.01~10.00
9 B_3V0 Inv 0.000~100.00 s
10 K_3V0 Inv 0.025~1.5
11 U_Phase low 10.00~100.0 V
12 U_Phase up 40.00~100.0 V
Table 11-4 Logical linker list for displacement voltage protection
1. Func_3V01 Enable or disable the displacement voltage stage 1
2. Func_3V02 Enable or enable the displacement voltage stage 2

3. Func_3V0 Inv Enable or enable the displacement voltage inverse time stage
106
Table 11-5 Binary setting list for displacement voltage protection
3U0 value from Measured or Calculated.

1 3U0 Calculated_3V0 1/0 0
1-Calculated; 0-Measured.
Select the Displacement voltage stage
2 3V01 Trip On 1/0 0
2 trip or alarm. 1-Trip; 0-Alarm.
Select the Displacement voltage
3 3V0 InvTrip On 1/0 0 inverse stage trip or alarm. 1-Trip;
0-Alarm.
1.5 IED reports
3V01 Trip Voltage displacement protection stage 1 issues trip signal
3V02 Trip Voltage displacement protection stage 2 issues trip signal
3V0 Inv Trip Voltage displacement protection inverse time stage issues trip signal
3V01 Alarm Voltage displacement protection stage 1 issues an alarm signal
3V0 InvAlarm Voltage displacement protection inverse timestage issues an alarm signal
PhA Grounded Phase A is grounded
PhB Grounded Phase B is grounded
PhC Grounded Phase C is grounded
1.6 Technical data
Table 11-8 Technical data for displacement voltage protection

Pickup threshold 3V0 2 to 100 V, step 1 V ≤ ± 5 % setting value or ±1 V
(calculated)
Reset ratio Approx. 0.95
107
Chapter 12 Negative-sequence over voltage protection
Chapter 12 Negative-sequence over

voltage protection
About this chapter

technical data used for Negative-sequence over voltage
protection.
108
1 Negative-sequence over voltage

protection
1.1 Introduction
On a healthy 3-phase power system, he negative-sequence voltage is

norminally zero, when a unbalance condition occurs on the system, the
negative voltage will be produced. The relayNegative-sequence over
voltage protection will operate by detecting the negative sequence voltage.
 A definite time trip stage
 U2 based on calculated summation of 3 phase voltage
1.2 Protection function description
1.2.1 Negative-sequence voltage input
The Negative-sequence voltage U2 is calculated based on the connected

three phases to ground voltages. In the latter case, the three voltage inputs
must be connected to voltage transformers in a ground-wye configuration. If
the IED is only provided with phase to phase voltages or provided only one
phase to earth or phase to phase voltage, it is not possible to calculate a
negative-sequence voltage.
U̇2 = U̇ a2 U̇B aU̇
The relay provide one stage negative-sequence over voltage protection with
definite time delay characteristic, and it can be controlled on or off by the
connector “Fun_NSOV”.
Voltage thresholds and time delays can be set individually for the protection.
Thus, tripping can be time-coordinated depending on how severe the
voltage collapses are, in this context, setting “U2_NSOV” and “T_NSOV”.
109
1.2.3 Logic diagram
U2>
Func_U2
BI_Blk U2 & T Trip
1Ph V Connect
Figure 12-1 Logic diagram for Negative-sequence over voltage protection
UP1 U2 Trip
UP2
UP3
BI_Blk NSOV
Signal Description
Table 12-2 Binary intput list
Signal Description
BI_Blk NSOV The signal input for blocking the ptotection.
Signal Description
Negtive-sequence obervoltage protection
U2 Trip
stage trip
110
Table 12-4 Function setting list for negative-sequence over voltage protection
1 U2_NSOV 2~100 V
2 T_NSOV 0~120 s
Table 12-5 Logical linker list for negative-sequence over voltage protection

Enable or disable the negative sequence over voltage
1. Fun_NSOV
protection
1.5 IED reports
NSOV Trip Negtive-sequence voltage protection issues trip signal
1.6 Technical data
Table 12-7 Technical data for negative-sequence over voltage protection

Pickup threshold U2 (calculated) 2 to 100 V, step 1 V ≤ ± 5 % setting value or ±1 V
Reset ratio Define by user
111
Chapter 13 Circuit breaker failure protection
Chapter 13 Circuit breaker failure

protection
About this chapter

technical data included in circuit breaker failure protection.
112
1 Circuit breaker failure protection
1.1 Introduction
The circuit breaker failure protection is able to detect a failure of the circuit
breaker during a fault clearance. It ensures fast back-up tripping of
surrounding breakers by tripping relevant bus sections.
Once a circuit breaker operating failure occurs on a feeder/transformer, the

bus section which the feeder/transformer is connected with can be
selectively isolated by the protection. In addition a transfer trip signal is
issued to trip the remote end circuit breaker of the feeder.
In the event of a circuit breaker failure with a busbar fault, a transfer trip
signal is issued to trip the remote end circuit breaker of the feeder.
The current criteria are in combination with three phase currents, zero and
negative sequence current t achieve a higher security.
The function can be set to give three phase re-trip of the own breaker to avoid
unnecessary tripping of surrounding breakers at an incorrect starting due to
mistakes during testing.
 Two trip time stages (local CB and surrounding breaker tripping)
 Transfer trip command to the remote line end in second stage
 Internal/ external initiation
 Three phase CBF initiation for sub-transmission system and distribution

system
 Settable CB Aux contacts checking
 Current criteria checking (including phase current, zero and negative

sequence current)
Circuit breaker failure protection can be enabled or disabled in the IED via
binary setting “Func_CBF”. If setting “ON” is applied, CBF protection would
be enabled. In this case, by operation of a protection function, and
subsequent CBF initiation by respective protection function, a programmed
timer runs toward a preset time delay limit. This time delay is set by user
113
under the settings “T_CBF1”. If the circuit breaker has not been opened after
expiration of the preset time limit, the circuit breaker failure protection issues
a command to trip circuit breaker (e.g. via a second trip coil). If the circuit
breaker doesn’t respond to the repeated trip command, until another preset
delay time which is set at “T_CBF2”, the protection issues a trip command to
isolate the fault by tripping other surrounding backup circuit breakers (e.g. the
other CBs connected to the same bus section as the faulty CB).
Initiation of CBF protection can be performed by both the internal and external
protection functions. If it is desired to initiate the CBF protection by means of
external protection functions, specified binary inputs (BI) should be
marshaled. Internal protection functions can initiate the CBF protection
integrated in the IED.
By checking whether the actual current flow effectively disappeared after a

tripping command had been issued and evaluating the circuit breaker
auxiliary contact status, There are four modes for breaker failure detection,
that are show in the figure below.
1.2.2 Current criterion evaluation
Since circuit breaker is supposed to be open when current disappears from

the circuit, the first criterion (current monitoring) is the most reliable way for
IED to be informed about proper operation of circuit breaker. Therefore,
current monitoring is applied to detect circuit breaker failure condition. In this
context, the monitored current of each phase is compared with the
pre-defined setting. Furthermore, it is possible to implement current checking
in case of zero-sequence (3İ0 = İ İB İ ) and negative-sequence currents
2
(3I2=IA+a IB+aIC) via control word setting. If the zero-sequence and
negative-sequence currents checking are enabled, zero sequence and
negative-sequence current is compared separately with the corresponding
threshold.
1.2.3 Circuit breaker auxiliary contact evaluation
For protection functions where the tripping criterion is not depend on current,
current flow is not a suitable criterion for proper operation of the breaker. In
this case, the position of the circuit breaker auxiliary contact should be used
to determine if the circuit breaker properly operated. It is possible to evaluate
the circuit breaker operation from its auxiliary contact status. A precondition
for evaluating circuit breaker auxiliary contact is that open status of CB should
be marshaled to binary inputs.
114
1.2.4 Logic diagram
HWJ
& 20ms CB Status
TWJ
BI_Init CBF 20ms

& Ext CBF Initiate
Func_CBF
& ≥ CBF Start
BI_Blk CBF
& Faulty CBF Initiate

Faulty Init
CBF Chk 3I0/3I2
Ia>
&
Ib> ≥
Ic>
&
I2>
≥
3I0>
≥ Curr.Crit
Ia>
&
Ib>
Ib>
& ≥
Ic>
Ia>
&
Ic> &
CBF Chk 3I0/3I2
CBF Logic Model=1

&
Curr.Crit
CBF Logic Model=2 T1 CBF1 Trip

&
CB Status
≥
CBF Logic Model=3 T2 CBF1 Trip

&
Curr.Crit
≥
CB Status
CBF Logic Model=4

&
Curr.Crit
&
CB Status
Figure 13-1 Logic diagram for circuit breaker failure protection
115
IP1 CBF1 Trip

IP2 CBF2 Trip
IP3
3I0
CBF Init
TWJ
HWJ
Signal Description
3I0 signal for zero sequence current input
Signal Description
BI_ Init CBF CBF initiation

TWJ Three Phase CB open
HWJ Three phase CB close
Signal Description
CBF1Trip Circuit breaker failure protection stage 1 trip
CBF2 Trip Circuit breaker failure protection stage 2 trip
116
Table 13-4 Function setting list for circuit breaker failure protection
1 CBF Logic Model 1~4
2 I_CBF 0.05~100 A
3 3I0_CBF 0.05~100 A
4 I2_CBF 0.05~100 A
5 T1_CBF 0~100 s
6 T2_CBF 0~100 s
Table 13-5 Logical linker list for circuit brea ker failure protection

1. Func_CBF Enable or disable the circuit breaker failure protection
Table 13-6 Binary setting list for circuit breaker failure protection
1 CBF 3I0 Calculate 1/0 0

2 CBF Chk 3I0/3I2 1/0 0
3 CBF T1 On 1/0 0
4 CBF T2 On 1/0 0
1.5 IED reports
CBF T1 Trip The first stage CBF issues trip command
CBF T2 Trip The second stage CBF issues trip command
Faulty CBF Initiate CBF function is initiate by faulty
Ext CBF Initiate CBF function is initiated by BI
117
1.6 Technical data
Table 13-8 Technical data for circuit breaker failure protection

phase current 0.08 Ir to 20.00 Ir ≤ ±3% setting or ±0.02Ir
Negative sequence current
zero sequence current
Time delay of stage 1 0.00s to 32.00 s, step 0.01s ≤ ±1% setting or +25 ms, at
Time delay of stage 2 0.00s to 32.00 s, step 0.01s 200% operating setting
Reset ratio >0.95

Reset time of stage 1 < 20ms
118
Chapter 14 Dead zone protection
About this chapter

technical data included in circuit breaker failure protection.
119
1 Dead zone protection
1.1 Introduction
The IED provides this protection function to protect the area between circuit
breaker and CT in the case that CB is open, namely dead zone. Therefore,
by occurrence of a fault in dead zone, the short circuit current is measured
by protection IED while CB auxiliary contacts indicate the CB is open.
1.2.1 Function description
The protection can be enabled or disabled using dedicated binary setting.If

the protection function is enabled, by operation of a protection function, and
subsequent CBF initiation by respective protection function, a programmed
timer runs toward a preset time delay limit. This time delay is set by user in
the setting “T_Dead Zone”. If the fault current has not been disappeared after
expiration of the preset time limit even now the circuit breaker has been
opened, the dead zone protection would issue a trip command to isolate the
fault by tripping other surrounding backup circuit breakers (e.g. the other CBs
connected to the same bus section as the faulty CB).
When one bus side CT of feeder is applied, once a fault occurs in the dead
zone, the IED trips the relevant busbar zone. Tripping logic is illustrated in
Figure 14-1.
trip
Bus
IFAULT
Line1 Line2 LineN
Legend:
Opened CB
Closed CB
Figure 14-1 Tripping logic when applying bus side CT

120
When one line side CT is applied, when a fault occurs in the dead zone,
protection relay sends a transfer trip to remote end relay to isolate the fault.
Tripping logic is illustrated in Figure 14-2.
Inter trip
Busbar
IFAULT
Line1 Line2 LineN
Trip
Relay
Legend:
Opened CB
Closed CB
Figure 14-2 Tripping logic when applying line side CT
1.2.2 Logic diagram
HWJ
& 20ms CB Open
TWJ
BI_Init DZ 20ms
& Ext DZ Initiate
Func_DZ
& ≥ DZ Start
BI_Blk DZ
& Faulty DZ Initiate

Faulty Init
Ia>
Ib> ≥
Ic>
CB Open & T DZ Trip
DZ Start
Figure 14-3 Logic diagram for dead zone protection
121
IP1 DZ Trip
IP2
IP3
DZ Init
TWJ
HWJ
Signal Description
Signal Description
DZ Init DZ initiation
TWJ Three phase CB open
HWJ Three phase CB Close
Signal Description
DZ Trip Dead Zone protection trip
Table 14-4 Function setting list for dead zone protection
1 I_DZ 0.05~10 A
2 T_DZ 0~100 s
122
Table 14-5 Logical linker list for dead zone protection
NO. Default Abbr. Explanation

1. On Func_DZ Enable or disable the dead zone protection
1.5 IED reports
DZ Trip The dead zone function issues trip command
1.6 Technical data
Table 14-7 Technical data for dead zone protection

Time delay 0.00s to 32.00s, step 0.01s ≤ ±1% setting or +40 ms, at
Reset ratio >0.95
123
Chapter 15 STUB protection
About this chapter
This chapter describes the protection principle, input and output

signals, parameter, IED report and technical data used for STUB
protection function.
124
2 STUB protection
2.1 Introduction
Capacitor Voltage Transforemers (CVTs) are commonly installed at the line side
of transmission lines. Therefore, for the cases that transmission line is taken out
of service and the line disconnector is open, the distance protection will not be
able to operate and must be blocked.
The STUB protection protects the zone between the CTs and the open
disconnector. The STUB protection is enabled when the open position of the
disconnector is informed to the IED through connected binary input. The
function supports one definite stage with the logic shown inbelow figure.
Busbar A
CB1
CT1
Stub fault Feeder1
Disconnector1
CB3
CT3
Feeder2
Disconnector2
CT2
CB2
Busbar B
Figure 15-1 STUB fault at circuit breaker arrangement
If IED detects short circuit current flowing while the line disconnector is open,
STUB fault is detected for the short circuit in the area between the current
125
transformers and the line disconnector. Here, the summation of CT1 and CT3
presents the short circuit current.
The STUB protection is an overcurrent protection which is only in service if the

status of the line disconnector indicates the open condition. The binary input must
therefore be informed via an auxiliary contact of the disconnector. In the case of a
closed line disconnector, the STUB protection is out of service. The STUB
protection stage provides one definite time overcurrent stage with settable delay
time. This protection function can be enabled or disabled via the binary setting
“Func_STUB”. Corresponding current setting value can be inserted in “I_STUB”
setting. The IED generate trip command whenever the time setting “T_STUB” is
elapsed.
2.2.2 Logic diagram
Ia>I_STUB
Ib>I_STUB ≥
Ic>I_STUB
Func_STUB & T_STUB STUB Trip
BI_STUB Enable
Figure 15-2 Logic diagram for STUB protection

IP1 STUB Trip
IP2
IP3
BI_STUB Enable
Signal Description
Signal Description
BI_STUB Enable STUB protection enabled
Signal Description
STUB Trip STUB Trip
126
Table 15-4 Setting value list for STUB protection

current threshold of STUB
1 I_STUB 0.05~10 A
protection
delay time of STUB
2 T_STUB 0~100 s
protection
Table 15-5 Binary setting list for STUB protection
Name Description
STUB Enable Enable or disable STUB protection
Func_STUB Stub protection operating mode
2.5 Reports
Table 15-6 Event report list
STUB Trip STUB protection trip
2.6 Technical data

NOTE:
Ir: CT rated secondary current, 1A or 5A;
Table 15-7 Technical data for STUB protection

Time delay 0.00s to 60.00s, step 0.01s ≤ ±1% setting or +40 ms, at
127
Chapter 16 Synchro-check and energizing check function
Chapter 16 Synchro-check and

energizing check function
About this chapter

technical data used synchro-check and energizing check
function.
128
1 Synchro-check and energizing check

function
1.1 Introduction
The synchronism and voltage check function ensures that the stability of the
network is not endangered when switching a line onto a busbar. The voltage
of the feeder to be energized is compared to that of the busbar to check
conformances in terms of magnitude, phase angle and frequency within
certain tolerances.
The synchro-check function checks whether the voltages on both sides of the
circuit breaker are synchronizing, or at least one side is dead to ensure
closing can be done safely.
When comparing the two voltages, the synchro check uses the voltages from
busbar and outgoing feeder. If the voltage transformers for the protective
functions are connected to the outgoing feeder side, the reference voltage
has to be connected to a busbar voltage.
1.2 Function principle
The synchronization function can either work together with automatic

reclosing function or manual closure or in both cases. Thus, synchronization
check can be requested in two following ways:
 Internal or external automatic reclosing request
 Manual closing request
The external automatic reclosing and manual closing are initiated through
corresponding binary input respectively. When a synchronization request is
received, it can work based on different close permission criteria. The criteria
can be selected for auto reclosure or manual closure separately. The binary
settings are“AR_Override”, “AR_Syncheck”, “AR_EnergChkDLLB”,
“AR_EnergChkLLDB”, “AR_EnergChkDLDB” for auto reclosure, and
“MC_Override”, “MC_Syn check”, “MC_EnergChkDLLB”,
“MC_EnergChkLLDB”, “MC_EnergChkDLDB” are settable for manual closure.
The meaning of each operation mode is as follows:
 Syn check: by applying this setting, with any synchronization request, the
129
synchronization condition is checked continuously.
 Override: by applying this setting, with any synchronization request, the

synchronizing OK condition is released.
 EnergChkDLLB: by applying this setting, with any synchronization

request, the dead line and live bus conditions are checked.
 EnergChkLLDB: by applying this setting, with any synchronization

request, the live line and dead bus conditions are checked.
 EnergChkDLDB: by applying this setting, with any synchronization

request, the dead line and dead bus conditions are checked.
Synchronization check can operate based on different voltage input

configurations. Reference voltage U4 can be phase to phase or phase to
earth voltage. Accordingly, the setting “Phase_UL” should be set as phase to
phase or phase to earth voltage, respectively. Both the setting and voltage
connection must be consistent. Pay attention to the single phase voltage
connection of Va, Vb, Vc, phase A or phase B should be connected in order to
get accurate frequency. Table shows the assignment of the settable values
for phase determination.
Table 16-1 Setting for phase determination
Phase Setting Value“Phase_UL”

A 1
B 2
C 3
AB 4
BC 5
CA 6
1.2.1 Synchro-check mode
The voltage difference, frequency difference and phase angle difference

values are measured in the IED and are available for the synchro-check
function for evaluation.
By any synchronization request, the synchronization conditions will be

checked continuously. If the line voltages and busbar voltages are larger than
the value of “Umin_Syn” and meet the synchronization conditions,
synchronized reclosure can be performed.
130
At the end of the dead time, synchronization request will be initiated and the
synchronization conditions are continuously checked to be met for a certain
time during maximal extended time “T_Syn Chk”. By satisfying synch-check
condition in this period, the monitor timer will stop and close command will be
issued for AR.
If the synchronization checking close permission criterion is used for manual

closure, the corresponding binary input should be active. When the binary
input is activated, a monitoring time “T_MaxSynReq” is started. This time is
considered for synchronizing process. During time period of “T_MaxSynReq”,
whenever synchronization condition is continuously met for “T_Syn Chk”, the
monitoring time would be stopped, and the output for manual close “Syn OK”
is energized. “Syn OK” output would be held if following conditions are met:
 Synchronization conditions are met
 Binary input for manual closure is energized
 Monitoring time “T_MaxSynReq” does not elapse
Before releasing a close command at synchronization conditions, all of the

following conditions should be satisfied:
 The reference voltage U4 should be above the setting value

“Umax_Energ”.
 The voltage difference should be within the permissible deviation “U_Syn

Diff”
 The angle difference should be within the permissible deviation

“Angle_Syn Diff”
 The frequency difference should be within the permissible deviation

“Freq_Syn Diff”
1.2.2 Energizing check mode
Before releasing a close command in low voltage conditions, one of the

following conditions need to be checked according to requirement:
 Energizing check for dead line and live bus for AR enabled or disabled,
when the control word “AR_EnergChkDLLB” is on
131
 Energizing check for live line and live bus for AR enabled or disabled,
when the control word “AR_EnergChkLLDB” is on
 Energizing check for dead line and live bus for AR enabled or disabled,
when the control word “AR_EnergChkDLDB” is on
1.2.3 Override mode
In this mode, a synchronizing OK signal would be released whenever a

synchronization check request is received from autoreclosure or a manual
closure.
1.2.4 Logic diagram
U4>Umax_Energ
Anglediff<Angle_Syn Diff
AND
Freqdiff<Freq_Syn Diff AR_Override On
T_MaxSynExt
AND AND Synchr-check fail
Udiff<U_Syn Diff
U4 >Umax_Energ
AND
U4 for Ux
T_Syn Check Synchr-check meet
AR_EnergChkLLDB on
Umax<Umin_Syn
AND
AND
1Ph V Connect on
AND
corresponding Phase<Umin_Syn
OR
AR_EnergChkDLDB on
T_Syn Check Synchr-check meet

Umax<Umin_Syn
AND
AND
1Ph V Connect on
AND MC BO
AND HWJ
corresponding Phase<Umin_Syn
U4 <Umin_Syn
AND
U4 for Ux Synchr-check fail
AND
T_MaxSynReq
MC_Override On
AR_EnergChkDLLB on
AND
Func_MC
Umin>Umax_Energ
AND AND BI_Req Syn
1Ph V Connect on
Syn Request
AND
Corresponding Phase>Umax_Energ
Figure 16-1 Logic diagram for synchro-check function
132
UP1
UP2
UP3
UP4
BI_Req Syn
Signal Description
Signal Description
BI_Req Syn Binary input Initiation autoreclosing
Table 16-4 Function setting list forsynchro-check and energizing checkfunction
NO. Abbr. Explanation Unit Min. Max.

Time for synchro-check
1. T_Syn Chk S 0.05 60.00
function
Maximum time for extending
2. T_MaxSynExt S 0.05 60.00
synchronization check
Maximum time for
3. T_MaxSynReq S 0.05 60.00
4. Phase_UL Phase determination setting 1.00 6.00
Angle difference for
5. Angle_Syn Diff Degree 1.00 80.00
synchro-check function
Voltage difference for
6. U_Syn Diff V 1.00 40.00
Frequency difference for
7. Freq_Syn Diff HZ 0.02 2.00
Minimum voltage for
8. Umin_Syn V 60.00 130.0
Maximum voltage for
9. Umax_Energ V 20.00 100.0
Energizing check
133
Table 16-5 Logical linker list for synchro-check and energizing check protection

1. On Func_AR Enable or disable the synchronization check function
2. On Func_MC Enable or disable the synchronization check function
Table 16-6 Binary setting list for synchro-check and energizing check protection
1 AR_Override On 1/0 0 AR with no synchrozination
2 AR_Syn check On 1/0 0 AR check synchrozination

Synchrozination check mode
Energizing for DLLB check mode
Selection of AR check
3 1/0 0 Energizing for LLDB check mode
mode
Energizing for DLDB check mode
Override mode
4 MC_Override On 1/0 0 MC with no synchrozination
5 MC_Syn check On 1/0 0 MC check synchrozination
Selection of MC check
mode
Override mode
1.5 IED reports
Syn Ok Synchronization check OK
Syn Request Check synchronization
Syn Vdiff fail Voltage difference for synchronization check fail
Syn Ang fail Angle difference for synchronization check fail
Syn Fdiff fail Frequency difference for synchronization check fail
Syn Failure Synchronization check timeout
134
1.6 Technical data
Table 16-8 Technical data for synchro-check and energizing checkfunction

Operating mode Synchronization check:
 Synch-check
 Energizing check, and
synch-check if energizing
check failure
 Override
Energizing check:
 Dead V4 and dead V3Ph
 Dead V4 and live V3Ph
 Live V4 and dead V3Ph
Voltage threshold of dead line or 10 to 50 V (phase to earth), step ≤ ± 3 % setting or 1 V

bus 1V
Voltage threshold of live line or 30 to 65 V (phase to earth), step ≤ ± 3 % setting or 1 V
bus 1V
∆V-measurement Voltage 1 to 40 V (phase-to-earth), steps ≤ ± 1V
difference 1V
Δf-measurement (f2>f1; f2<f1) 0.02 to 2.00 Hz, step, 0.01 Hz, ≤ ± 20 mHz
Δα-measurement (α2>α1; 1 °to 80 °, step, 1 ° ≤ ± 3°
α2<α1)
Minimum measuring time 0.05 to 60.00 s, step,0.01 s, ≤ ± 1.5 % setting value or +60
ms
Maximum synch-check 0.05 to 60.00 s, step,0.01 s, ≤ ± 1 % setting value or +50 ms
extension time
135
Chapter 17 Autoclosing function
Chapter 17 Autoreclosing function
About this chapter

technical data used for automatic reclosure function.
136
1 Autoreclosing function
1.1 Introduction
For restoration of the normal service after a transient fault an autoreclosing

attempt is mostly made for overhead lines. Experiences show that about 85%
of faults have transient nature and will disappear after an auto reclosing
attempt is performed. This means that the line can be re-energized in a
short period. The reconnection is accomplished after a dead time via the
automatic reclosing function. If the fault is permanent or short circuit arc has
not disappeared, the protection will re-trip the breaker. Main features of the
autoreclosing are as follows:
 4 shots automatic recloser (selectable)
 Individually settable dead time for each shot
 Internal/external AR initiation
 Three phase AR operation
 CB ready supervision
 CB Aux. contact supervision
 Cooperation with internal synch-check function for reclosing command

Three-pole multi-shot auto-recloser (AR) function is provided with
selectable number of shots from 1 to 4. This function can be enabled or
disabled by binary setting. In addition, it is possible to enable or disable AR
function by binary input “BI1/AR Off”. In this context, if binary input “BI1/AR
Off” is active, AR function would be disabled, even though the internal
setting which is applied at “Func_AR”. The priority for enable or disable the
function with binary input “BI1/AR Off” is higher than binary setting
“Func_AR”. The integrated AR function can be enabled, only when binary
input “BI1/AR Off” is inactive and at the same time binary setting “Func_AR”
is set to “ON”.
1.2.1 Auto-reclosing initiation modules
Initiation of AR function can be performed by internal protection functions or

via external binary input “BI3/Init AR”. Regarding the internal protection
functions, it is possible to perform reclosing attempt in conjunction with
protection functions illustrated in Table 17-1.
137
Table 17-1 Protection functions for initiation AR
Protection Function Protection stage Binary setting
Definite timestage 1 OC1 Init AR
Overcurrent protection Definite time stage 2 OC2 Init AR
Inverse time stage OC Inv Init AR
Definite time stage 1 EF1 Init AR
Earth fault protection Definite time stage 2 EF2 Init AR
Inverse time stage EF Inv Init AR
Definite time stage 1 SEF1 Init AR
Sensitive earth fault protection Definite time stage 2 SEF2 Init AR
Inverse time stage SEF Inv Init AR
Definite time stage 1 NSOC1 Init AR
Negative sequence protection Definite time stage 2 NSOC2 Init AR
Inverse time stage NSOC Inv Init AR
In the Table 17-1, the first and second columns show the protection
functions, respectively, while the third column introduces the binary setting
which is possible to set protection functions to work in conjunction with AR.
Furthermore, it is possible to program AR to operate for three-phase faults.

This can be achieved by applying setting “3P Fault Init AR/3P Fault Blk AR”.
By this setting, autoreclosing would be possible in case of three-phase
faults, in addition to single-phase fault. However, if it is not desired to
reclose in case of three-phase faults, the IED should be set via setting “3P
Fault Blk AR”.
1.2.2 Autoreclosing logic
To prevent automatic reclosing during feeder dead status (circuit breaker

(CB) open), for example, by relay testing, AR is initiated at first shot only
when the CB has been closed for more than a time period defined by “T_AR
Reset”. Subsequent to initiation of AR, the dead time do not start until the
IED is informed about open status of CB through binary input. The delay of
dead time can be extended up to time setting “T_Max. CB Open”. During
this time, whenever CB open status is recognized by the IED, dead time is
started. If monitoring time “T_Max. CB Open” elapses and CB open status
138
is not still detected by the IED, AR function would be blocked for duration of
AR reset time which is defined by “T_AR Reset”. In this case, reclosing
attempt would be announced as unsuccessful (annunciation “AR Failure”).
If circuit breaker failure protection (internal or external) is used for the CB,
monitoring time “T_Max CB Open” should be set shorter than the delay time
for detection of circuit breaker failure. By doing so, make sure that no
reclosing takes place for a faulty circuit breaker. No reclosing would take
place for CBF stage 2 or dead zone function operation.
As mentioned previously, if CB open position is detected by the IED during

monitoring time “T_Max. CB Open”, dead time is started and would last for
pre-defined time “T_3P AR1” in case of the first reclosing shot (respective
dead times for other reclosing shots are set by “T_3P AR2”, “T_3P AR3”
and “T_3P AR4”, for second, third and forth shots, respectively). After dead
time expiration, a monitoring time “T_MaxSynExt” is started. In fact, dead
time can be extended by “T_MaxSynExt”. This time is considered for
synchronizing process. In this context, at the end of dead time, IED starts to
check synchronization condition. During monitoring time period
“T_MaxSynExt”, whenever synchronization condition is continuously met for
“T_Syn Chk”, the monitoring time would be stopped, AR close command
will be issued to close circuit breaker. However, at the end of monitoring
time “T_MaxSynExt”, if synchronization condition is not still met
continuously for “T_Syn Chk”, AR function would be blocked for a time
period defined by “T_AR Reset”. Furthermore, reclosing attempt would be
announced as unsuccessful (annunciation “AR Failure”).
Regarding the close command, it has a pulse nature which lasts for 500ms
at most. As expected, no synchronization check takes place during this
pulse time. If during this pulse time, the auxiliary contact of CB indicates
that the CB has been closed or a current flow is detected by the IED, the
close command pulse will be reset.
Once the close command pulse is issued (rising edge) to close the circuit
breaker, reclaim time “T_Reclaim” is started, within this time it is checked
whether the reclosing attempt is successful. If no fault occurs before the
reclaim time elapses, it is thought that fault is cleared. In this case, at the
end of reclaim time, reset time “T_AR Reset” is started. During reset time
AR function is blocked. If a new fault occurs before the reclaim time elapses,
it results in reset of the reclaim time and starting of next reclosing shot. This
procedure can be repeated until the maximum number of reclosure shots is
reached.
If none of the reclosing shots is successful, and therefore the fault is still
139
remained after the last shot, final trip takes place. Furthermore, AR function
would be blocked for a time period defined by “T_AR Reset ”, and
annunciation “AR Failure” is issued.
It is possible to block AR function for a specified time after any manual

closing command. This can be achieved by marshaling CB close command
to binary input “BI4/MC CLS”. When the binary input is activated, the IED is
informed about execution of a manual closing. As a result, AR function
would be blocked for “T_AR Reset”.
Furthermore, AR function would be blocked if the IED detects an abnormal

condition in CB control circuit. This means that if both binary inputs “3Ph CB
Open” and “3Ph CB Close” are active or inactivate at the same time, AR
function is blocked until the abnormal condition disappears.
There may be cases when it is already obvious that CB cannot perform any
reclosing attempt. For such cases, binary input “BI2/CB Faulty” is
considered which indicates that CB is not ready for reclosing. CB Faulty
should be checked with a time delay “T_CB Faulty”, which is set according
to the characteristic of circuit breaker. AR function would be blocked if the
IED detects activation of “BI2/CB Faulty”, even the AR function would not be
initiated. AR is blocked until the BI disappears. Furthermore, this condition
is checked whenever a close command is received from AR function.
Single-shot reclosure
When an internal or external trip command initiates AR function, the

reclosing program is being executed. First of all, CB auxiliary contact is
checked to be open until expiration of monitoring time “T_Max. CB Open”. If
during this time, CB open status is recognized, dead time is started. When
dead time interval “T_3P AR1” has elapsed, monitoring time “T_MaxSynExt”
is started. During this period, whenever synchronization condition is
continuously met for “T_Syn Chk”, a closing pulse signal is issued. At the
same time, reclaim time “T_Reclaim” is started. If a new fault occurs before
the reclaim time elapses, AR function is blocked causing final tripping of CB.
However, if no fault occurs before reclaim time expires, AR is reset and
therefore is ready for future reclosing attempt for the next fault.
Multi-shot reclosure
In this condition, the first reclosing shot, in principle, is same as the

single-shot auto reclosing. If the first reclosing is unsuccessful, it doesn’t
result in a final trip. Therefore if a fault occurs during reclaim time of the first
reclosing shot; it would result in the starting of next reclosing shot with
140
different dead time. This procedure can be repeated until the whole
reclosing shots which are set inside the IED is performed. Different dead
times can be set for various shots of AR function. This can be performed
through settings “T_3P AR1”, “T_3P AR2”, “T_3P AR3” and “T_3P AR4”. If
one of the preset reclosure shots is successful, AR function would be reset
after expiration of the reclaim time. However, if none of reclosing shots is
successful, i.e. the fault doesn’t disappear after the last programmed shot, a
final trip is issued, and reclosing attempts are announced to be
unsuccessful.Figure 17-1 illustrates the operation method of two shots
reclosure.
Trip Command
CB Open
AR Initiate
Dead time 1 Dead time 2

Close Command
Reclaim time < Reclaim time Reclaim time
Figure 17-1 Timing diagram showing two reclosure shots, first unsuccessful, second successful
IP1 AR Close
IP2 AR Not Ready
IP3 AR Final Trip
UP1 AR Successful
UP2 AR Fail
UP3
UP4
BI1/AR Off
BI2/CB Faulty
BI3/Init AR
BI4/MC CLS
BI8 CB Open
BI9 CB Close
141
Signal Description
Signal Description
BI1/AR Off Binary input 1/AR function off
BI2/CB Faulty Binary input 2/CB Faulty
BI3/Init AR Binary input 3/Initiation AR function
BI4/MC CLS Binary input 4/manual closing
MC/AR Block AR block
BI8 CB Open Binary input 8 CB Open
BI9 CB Close Binary input 9 CB Close
Signal Description
AR Close AR Close
AR Not Ready AR Not Ready
AR Final Trip AR Final Trip
AR Successful AR Successful
AR Fail AR Fail
142

Table 17-5 Function setting list for auto-reclosing function

Time delay setting for shot 1
1. T_3P AR1 dead time of three phase S 0.05 60.00
autoreclosing
autoreclosing
autoreclosing
autoreclosing
The number of autoreclosing
5. Times_AR 1.00 4.00
shots
Time setting for
6. T_Reclaim S 0.05 60.00
auto-reclosing reclaim time
7. T_AR Reset Time setting for AR resting S 0.05 60.00
Maximum time setting for CB
8. T_Max. CB Open S 0.05 60.00
open
Time for synchro-check
9. T_Syn Chk S 0.05 60.00
function
Maximum time for extension
10. T_MaxSynExt S 0.05 60.00
of synchronization check
Phase determination setting
11. Phase_UL 1.00 6.00
for syncho-check reference
Angle difference for
12. Angle_Syn Diff Degree 1.00 80.00
Voltage difference for
13. U_Syn Diff V 1.00 40.00
Frequency difference for
14. Freq_Syn Diff HZ 0.02 2.00
Minimum voltage
15. Umin_Syn V 60.00 130.0
forsynchronization check
Maximum voltage for
16. Umax_Energ V 20.00 100.0
Energizing check
17. T_CB Faulty Time setting for CB faulty S 0.10 60.00
143
Table 17-6 Logical linker list for auto-reclosing function

1. On Func_AR Enable or disable the auto-recloser function
Table 2 Binary setting list for auto-reclosing function

Selection of AR check
mode
Override mode
Enable or disable the AR function is
2 OC1 Init AR Off 1/0 0 initiated by stage 1 of overcurrent
protection
protection
protection
protection
6 EF1 Init AR Off 1/0 0 initiated by stage 1 of earth fault
protection
protection
protection
protection
10 SEF1 Init AR Off 1/0 0 initiated by stage 1 of sensitive earth
fault protection
fault protection
12 SEF3 Init AR Off 1/0 0 Enable or disable the AR function is
144
initiated by stage 3 of sensitive earth

fault protection
fault protection
14 NSOC1 Init AR Off 1/0 0 initiated by stage 1 of negative
sequence overcurrent protection
18 3P Fault Blk AR 1/0 0 initiated by single phase fault or three
phase fault
1.5 IED reports

AR in progess AR is initiated by internal or external function
Syn Request Check synchronization
Syn OK Synchronization check OK
1st Reclose The first shot reclosing
2nd Reclose The second shot reclosing
3rd Reclose The third shot reclosing
4th Reclose The fourth shot reclosing
AR Success AR successful
AR Failure AR unsuccessful
Syn Vdiff fail Voltage difference for synchronization check fail
Syn Ang fail Angle difference for synchronization check fail
Syn Fdiff fail Frequency difference for synchronization check fail
Syn Failure Synchronization check timeout
CB Not Ready BI2 is active to show CB is not ready
145
1.6 Technical data
Table 17-10 Technical data for autoreclosing function

Number of reclosing shots Up to 4
Shot 1 to 4 is individually
selectable
AR initiating functions Internal protection functions
External binary input
Dead time, separated setting for 0.05 s to 60.00 s, step 0.01 s ≤ ± 1 % setting value or +50 ms
shots 1 to 4
Reclaim time 0.50 s to 60.00s, step 0.01 s
Blocking duration time (AR reset 0.05 s to 60.00s, step 0.01 s
time)
Circuit breaker ready supervision 0.50 s to 60.00 s, step 0.01 s
time
Dead time extension for 0.05 s to 60.00 s, step 0.01 s
synch-check (Max. SYNT EXT)
146
Chapter 18 Under current protection
Chapter 18 Under current monitoring
About this chapter

technical data used for under current monitoring function.
147
1 Under current monitoring
1.1 Introduction
Under current protection is used to prevent reconnection of the charged

capacitor bank to energized network when a short loss of supply voltage
occurs.
This relay provides a one-stage undercurrent protection, which can be on or

off controlled by the connector Fun_UC, as the connector be on, and the CB
position be closed, the 3-phase current is less than the predefined setting
I_UC, the relay will startup, than it will operate after T_UC.
The following figure shows the logic diagram of the undercurrent ptotection.
1.2.2 Logic diagram
Ia<
Ib< &
Ic< Fun_UC
T Trip
HWJ &
BI_Blk OF
Figure 18-1 Logic diagram for under current monitoring function
148
IP1 UC Trip
IP2
IP3
HWJ
BI_Blk UC
Signal Description
Signal Description
HWJ The binary input of CB Close
BI_Blk UC The binary signal for blocking the protection
Signal Description
UC Trip Under current monitoring function trip
Table 18-4 Function setting list for under current monitoring function

Under current setting for
1 I_UC 0.1~25 A
stage 1
Under current Time setting
2 T_UC 0~100 s
for stage1
149
Table 18-5 Logical linker list for under current monitoring function

1. Fun_UC Enable or disable the under current protection
1.5 IED reports
UC Trip Under current protection issues trip command
150
Chapter 19 Over-frequency protection
About this chapter

technical data used for over-frequencyprotection function.
151
1 Over-frequency protection
1.1 Introduction
The function monitors the network abnormality by detecting frequency

incresing. When the system frequency is up to a threshold frequency with
following conditions satisfied, the protection will operate.
Over frequency protection provide a trip stage. When the detected frequency
is more than the threshold, and the CB position is be colsed, the function will
be pickup, and it will be operate after the delay time . This protection will be
blocked by VT fail or the minimum Vph-ph is less than function setting value.
When a phase voltage input, the Control word “1 Ph V Connection” being “1”,
the protection will be blocked if the maximum Vph-ph is less than the function
setting value.
The calculation of the frequency is based on the voltage sampled values.
1.2.2 Logic diagram
F>
VT fail Fun_OF
TWJ ≥ & T Trip

BI_Blk OF
Umin>
&
1Ph V Connect ≥
&
Umax>
Figure 19-1 Logic diagram for over-frequency protection function
152
1.3 Input and output signal
UP1 OF Trip
UP2
UP3
TWJ
BI_Blk OF
Signal Description
Signal Description
TWJ The binary input of CB Open
BI_Blk OF The signal input for blocking the ptotection.
Signal Description
OF Trip Over-frequency protection function trip

Over-frequency setting for
1 F_HF 50~65 Hz
stage 1
Over-frequency Time
2 T_HF 0.1~100 s
setting for stage1
Voltage setting for
3 U_Block_HF 10~120 V
blocking over-frequency
153
Table 19-5 Logical linker list for over-frequencyprotection function

1. Fun_HF Enable or disable the Over-frequency protection
1.5 IED reports
HF Trip Over-frequency protection issues trip command
154
Chapter 20 Rate of change of frequency protection
Chapter 20 Rate of change of

frequency protection
About this chapter

technical data used for the rate of chang of frequency
protection function.
155
1 Rate of change of frequency protection
1.1 Introduction
The function monitors the network abnormality by detection of frequency

change. When the rate of change of frequency exceeds the threshold with
following conditions satisfied, the protection will operate.
The relay supplys one stage rate-of-change frequency protection, the

protection operates by judging the rate-of-change of frequency reaching the
threshold setted.
Depending upon whether the rate of change of frequency calculated is below

or above zero, there are 3 direction models to choose. As the setting value
Dir_ROCOF equals to 1, as df/dt>0, it will satisfy the positive direction. As the
setting value Dir_ROCOF equals to 2, as df/dt<0,, it will satisfy the negative
direction. As the setting value Dir_ROCOF equals to 3, regardless of as df/dt
whether being above or below zero, as |df/dt|>0, it will satisfy the direction.
To avoid malfunction, there is a frequency dead zone

(Lf_ROCOF<F<Hf_ROCOF) near the nominal frequency. As the frequency
within the frequency dead zone, the relay will recognize nomal and be not
pick up. Frequency dead zone blocking can be on or off by the control word
“ROCOF chk F On” .
If the maximun phase-to-phase voltage is lower than the threshold defined

“U_ROCOF”, the protection will be blocked, and it can be on/off by control
word “ROCOF chk U On”.
156
1.2.2 Logic diagram
|df/dt|>Setting
Dir model
df/df Startup
F>f high Check F On

≥ & Time Delay df/df trip
F<f low
Check U On
Upp>Setting
F normal>2s
Figure 20-1 Logic diagram for over-frequency protection function
1.3 Input and output signal
UP1 ROCOF Trip

UP2
UP3
BI_Blk ROCOF
Signal Description
Table 20-2 Binary iutput list
Signal Description
BI_Blk ROCOF The signal input for blocking the ptotection.
Signal Description
ROCOF Trip The rate of change of frequency protection function trip
157
1 Df/dt_ROCOF 0.3~20 Hz/s

2 T_ROCOF 0.1~100 s
3 Hf_ROCOF 45~65 Hz
4 Lf_ROCOF 45~65 Hz
5 U_ROCOF 30~120 V
6 ROCOF Dir Model 1~3
Table 20-5 Logical linker list for over-frequencyprotection function

2. Fun_ROCOF Enable or disable the rate of change of frequency protection
1.5 IED reports
ROCOF Trip The rate of change of frequency protection issues trip command
158
Chapter 21 Load shedding protection
About this chapter

technical data used for load shedding function.
159
1 Low frequency load shedding

protection
1.1 Introduction

reduction. When the system frequency falls down to a threshold frequency
with following conditions satisfied, specified load will be removed.
 Undervoltage checking
 Rate of frequency (df/dt) checking
 CB position checking
 Load current checking
 VT secondary circuit supervision
Low frequency load shedding is provided based on “bay load shedding”

principle. This means that the protection function is implemented in each bay
separately, instead of being applied in an incoming bay and sending trip
command to various outgoing bays. In this regard, coordination between the
low frequency load shedding protection functions applied at various bays can
be achieved by selecting appropriate settings for pickup threshold and time
delay of the protection in various bays. The protection function can be
enabled or disabled via binary setting “Func_LF LS”. Based on the “bay load
shedding” principle, only one trip stage is applied for the protection. This
protection can operate based on both three-phase and single-phase voltage
input configurations. The voltage connection is set in the IED by binary setting
“3Ph V Connect/1Ph V Connect”. It is noted that in case of single-phase to
earth voltage input configuration, the voltage should be connected to phase A
or B, which are necessary for frequency measurement. Similarly, for single
phase to phase voltage, the voltage connection input should be VA-B. In each
configuration, it derives the power frequency from the connected voltage. If
the frequency falls below a pre-defined threshold (setting “F_LF LS”), a timer
160
begins to run toward a pre-defined time limit which is the time delay of the
protection (setting “T_LF LS”). When the time delay elapsed, the trip
command is issued.
Since the protection based on power frequency from the connected voltages,
the protection should be blocked if some conditions are satisfied as following:
 The minimum magnitude among of the connected voltages is lower

than the defined threshold in setting “U_Block_LS”. In case of single
voltage connection, only the magnitude of the connected voltage is
checked with setting “U_Block_LS”
 VT fail is detected by the IED or a MCB failure signal is received to the

IED through respective binary input
 Load current is lower than setting “I_Block_LS”. This condition is mainly

useful when the voltage transformer is connected at source side. The
setting applied at “I_Block_LS” corresponds to minimum load current
which may flow when circuit breaker is closed. It is possible to disable
this feature by applying setting 0 to “I_Block_LS”
 Circuit breaker is in open status. Similar to the previous condition, it is

useful when the voltage transformer is connected at source side. In this
case, it is not desired to issue any trip command by low frequency load
shedding even if the frequency falls below the pre-defined threshold
 Rate of frequency change (Δf/Δt) exceeds the setting of frequency

change rate “dF/dt_LS”
161
1.2.2 Logic diagram
F<F_LF LS
AND
Func_LF LS
F<55HZ
AND
System for 60HZ

OR
System for 50HZ
AND
F<45HZ
VT fail
OR
TWJ
AND T_LF LS LF LS Shedding Trip
BI_Blk LF LS
OR
Imax<I_Block_LS
Uppmax<U_Block_LS
AND
1Ph V Connect
AND
Uppmin<U_Block_LS
OR
dF/dt On
AND
|Df/dt|>dF/dt_LS
Figure 21-1 Logic diagram for low frequency load shedding protection
IP1 LF LS Trip
IP2
IP3
UP1
UP2
UP3
TWJ
Signal Description
162
Signal Description
TWJ Binary input of CB open
Signal Description
LF LS Trip Low frequency load shedding trip

Table 21-4 Function setting list for low frequency load shedding protection
1 F_LF LS 45.00~60.0 Hz
2 T_LF LS 0.10~100.00 S
3 dF/dt_LS 0.30~20.00 Hz/s
4 U_Block_LS 10.00~120.00 V
5 I_Block_LS 0.00~10.0 A
Table 21-5 Logical linker list for low frequency load shedding protection

1. Func_LF LS Enable or disable the low frequency load shedding protection
Table 21-6 Binary setting list for low frequency load shedding protection
1 dF/dt On 1/0 0
1.5 IED reports
LF LS Trip Low frequency load shedding function issues trip command
163
2 Low voltage load shedding protection
2.1 Introduction
This kind of load shedding is to prevent the voltage collapse and

uncontrolled loss of load.
Low voltage load shedding is necessary when the network is connected

with a huge system with vast power capacity. Under this condition, “Low
Frequency Load Shedding Scheme” cannot work properly. “Low Voltage
Load Shedding Scheme" would be a useful criterion whenever Automatic
Voltages Regulator (AVR) is out of service or not equipped with following
conditions satisfied.
 Negative sequence voltage checking
 Rate of voltage (du/dt) checking
 CB position checking
 Load current checking
 VT secondary circuit supervision
2.2.1 Funciton description
Low voltage load shedding is provided based on “bay load shedding” principle.
This means that the protection function is implemented in each bay separately,
instead of being applied in an incoming bay and sending trip command to
various outgoing bays. In this regard, coordination between the low voltage
load shedding protection functions applied at various bays can be achieved
by selecting appropriate settings for pickup threshold and time delay of the
protection in various bays. The protection function can be enabled or disabled
via binary setting “Func_LV LS”. Based on the “bay load shedding” principle,
only one trip stage is provided for the protection. This protection can operate
based on both three-phase and single-phase voltage input configurations.
The voltage connection is set in the IEDby binary setting “3Ph V Connect/1Ph
164
V Connect”. If all the measured voltages fall below a pre-defined threshold

(setting “U_LV LS”), a timer begins to run toward a pre-defined limit which is
the time delay of the protection (setting “T_LV LS”). When the time delay
elapsed, the trip command is issued. It is noted that the setting applied at
“U_LV LS” corresponds to phase to phase voltage.
Since the protection operates based on measured voltages, forsome

conditions satisfied the protection should be blocked. These conditions are as
follows:

than the defined threshold “U_Block_LS”. In case of
single-phasevoltage connection, only the magnitude of the connected
voltage is checked with setting “U_Block_LS”

 Load current islower than setting “I_Chk”. This condition is mainly

setting applied at “I_Chk” corresponds to minimum load current which
may flow when circuit breaker is closed. It is possible to disable this
feature by applying setting 0 to “I_Chk”
 Circuit breaker is in open status. Similar to the previous condition, it is

useful when the voltage transformer is connected at source side. In this
case, it is not desired to issue any trip command by low voltage load
shedding even if the voltage falls below the pre-defined threshold
 Rate of voltage change (ΔU/Δt) exceeds the setting of voltage change

rate “dU/dt_LS”. The setting corresponds to phase to phase voltage
 Negative sequence voltage is greater than 5V. In case of single-phase

voltage connection (by setting “1Ph V Connect”), this condition is
useless.
165
2.2.2 Logic diagram
Uppmax<U_LV LS
AND
1Ph V Connect
OR
AND AND
Uppmin<U_LV LS
Func_LV LS
VT fail
OR
TWJ
BI_Blk LV LS
Uppmax<U_Block_LS AND T_LV LS LV LS Shedding Trip

AND
1Ph V Connect
OR OR
AND
Uppmin<U_Block_LS
AND
U2>5V
Imax<I_Block_LS OR
dU/dt On
AND
|dUpp/dt|max>dU/dt_LS
Figure 21-2 Logic diagram for low voltage load shedding protection
IP1 LV LS Trip
IP2
IP3
UP1
UP2
UP3
TWJ
Signal Description
166
Signal Description
Signal Description
LF LS Trip Low voltage load shedding trip

Voltage setting for low voltage load
1. U_LV LS V 50.00 110.00
shedding protection
Time setting for low voltage load
2. T_LV LS S 0.05 60.00
shedding protection
dF/dt setting for low voltage load
3. dU/dt_LS HZ/S 1.00 10.00
shedding protection
Voltage checking setting for low
4. U_Block_LS V 10.00 120.0
voltage load shedding protection
Current checking setting for low
5. I_Block_LS A 0 2.00In
Table 21-12 Logical linker list for low frequency load shedding protection

Enable or disable the low voltage load shedding
1. On Func_LV LS
protection
Table 21-13 Binary setting list for low frequency load shedding protection

Single phase or three phase voltage
1 3Ph V Connect 1/0 0
connection
Enable or disable the binary setting of
2 dU/dt On 1/0 0
dF(dU)/dt
167
2.5 IED reports
LV LS Shedding Trip Low voltage load shedding function issues trip command
168
3 Overload load shedding protection
3.1 Introduction
The IED provides a load shedding function based on the load current
passing through feeder. This function will be essential in conditions that
feeder is connected to a huge network with constant frequency and
additional AVR is continuously used for voltage regulation. In this case, load
shedding protection should be done based on load currentand monitoring of
following items
 Rate of voltage (du/dt) checking (in the case of voltage connection)
 Rate of frequency (df/dt) checking (in the case of voltage connection)
 VT secondary circuit supervision (in the case of voltage connection)
3.2.1 Fucntion description
Overload load shedding is provided based on “bay load shedding” principle.

This means that the protection function is implemented in each bay
separately, instead of being applied in an incoming bay and sending trip
command to various outgoing bays. In this regard, coordination between
the overload load shedding protection functions applied at various bays can
be achieved by selecting appropriate settings for pickup threshold and time
delay of the protection in various bays. The protection function can be
enabled or disabled via binary setting “Func_OL LS”. Based on the “bay
load shedding” principle, only one trip stage is provided for the protection. It
operates based on the measured phase currents. If all of the measured
phase currents exceed a pre-defined threshold (setting “I_OL LS”), a timer
begins to run toward a pre-defined limit which is the time delay of the
protection (setting “T_OL LS”). When the time delay elapsed, the trip
command is issued.
If the voltage connected to the IED and the binary setting “OL LS Chk V On”
is set in binary setting “OL LS Chk V Off/OL LS Chk V On”, the protection
would be blocked as following conditions:
169

than the threshold defined by “U_Block_LS”. In case of single-phase
voltage connection, only the magnitude of the connected voltage is
checked with setting “U_Block_LS”
 Rate of voltage change (ΔU/Δt) exceeds the setting of voltage change

rate“dU/dt_LS”. The setting corresponds to phase to phase voltage
 Rate of frequency change (Δf/Δt) exceeds the setting of frequency

change rate“dF/dt_LS”.

3.2.2 Logic diagram
Imax>I_OL LS
Func_OL LS AND
BI_Blk LV LS
or
TWJ
VT fail
Uppmax<U_Block_LS
AND
AND T_OL LS OL LS Shedding Trip

1Ph V Connect
OR
AND
Uppmin<U_Block_LS AND
|df/dt|>dF/dt_LS
AND
dF/dt On
dU/dt On
AND
|dUpp/dt|max>dU/dt_LS
OLLS Chk V On
Figure 21-3 Logic diagram for overload load shedding protection
IP1 OL LS Trip
IP2
IP3
UP1
UP2
UP3
TWJ
170
Signal Description
Signal Description
Signal Description
OL LS Trip Overload load shedding trip
Table 21-18 Function setting list for overload load shedding protection

Current setting for over load load
1. I_OL LS V 50.00 110.00
shedding protection
Time setting for over load load
2. T_OL LS S 0.05 60.00
shedding protection
dU/dt setting for over load load
3. dU/dt_LS V/S 1.00 10.00
shedding protection
dF/dt setting for over load load
4. dF/dt_LS HZ/S 1.00 10.00
shedding protection
Voltage checking setting for low
5. U_Block_LS V 10.00 120.0
Table 21-19 Logical linker list for overload load shedding protection

Enable or disable the low voltage load shedding
1. Func_LV LS
protection
171
Table 21-20 Binary setting list for overload load shedding protection

Single phase or three phase voltage
connection
Enable or disable the binary setting of
22 D（F）U/dt On 1/0 0
dF(dU)/dt
Enable or disable the function of
3 OLLS Chk V On 1/0 0
checking voltage
3.5 IED reports
OL LS Trip Overload load shedding function issues trip command
3.6 Technical data

Table 21-22 Technical data for load shedding protection

Under Frequency Load shedding
Frequency for fr =50Hz 45.50 to 50.00 Hz, step 0.01 Hz ≤ ±20 mHz
Time delay 0.05 to 60.00s, step 0.01 ≤ ±1.5 % setting or +60 ms
Under Voltage Load shedding
Voltage 50 to 110 V, step 1V ≤ ±3 % setting or ±1 V
Time delay ≤ ±1.5 % setting or +60 ms, at
0.10 to 60.00s, step 0.01 s
Overload Load shedding
Phase current 0.08 to 20 A for Ir =1A ≤ ±3% setting or ±0.02Ir
0.25 to 100 A for Ir =5A
Time delay 0.10 to 60.00s , step 0.01 s ≤ ±1.5 % setting or +60 ms, at
Blocking condition
Frequency change rate Δf/Δt 1 to 10 Hz/s ≤ ±0.5 Hz/s
Voltage change rate Δu/Δt 1 to 100 V/s, step 1 V/s ≤ ±3 % setting or ±1 V
Blocking voltage 10 to 120V, step 1 V ≤ ±3 % setting or ±1 V
Blocking current 0 to 2 Ir ≤ ±3% setting or ±0.02Ir
Operating time Approx. 60 ms
Undervoltage blocking reset ratio Approx. 1
172
Chapter 22 Super load shedding protection
Chapter 22 Super load shedding

protection
About this chapter

technical data used for load shedding function.
173
4 Super Low frequency load shedding

protection
4.1 Introduction

reduction. When the system frequency falls down to a threshold frequency
with following conditions satisfied, specified load will be removed.
Super under frequency load shedding protection provides four trip stages.
Each stage can be implemented when both joint linker and respective linker
are switched on. All the four stages will be disabled when the joint linker is
switched off. The first three stages can be tripped by turns, vie control word
‘LF joint Cut On/Off’, i.e. the second stage can’t be tripped only after the first
stage actuation, and the third stage can’t be tripped only after the second
stage actuation. When this control word is enabled, a certain stage can trip
even previous linker is switched off. The fourth stage is special. It can operate
regardless of previous three.
The acceleration stage is also provided. When the frequency is less than the
first stage setting ‘’f_LF LS1’’, and frequency change rate is more than
‘’df/dt_ACC1/2’’ and less than ‘’df/dt_LF LS’’, serious overloading is
considered. In this condition, the IED will shed load fast, and trip the first two
or three stages. The acceleration stage can be disable by control word “ACC
LF1&2 On/Off”or “ACC LF1&2 &3On/Off’’.
Blocking:
1. The frequency is considered abnormal when it is less than 45Hz for 50Hz
system, or less than 55Hz for 60Hz system. In this condition, the function will
be blocked instantly, and alarm will be reported after 5s time delay. The block
will be released after the frequency is considered normal.
2. The device is equipped with software frequency measurement monitoring

hardware frequency measuring circuit integrity function , it ensure correct of
the frequency measuring circuit by two frequency measuring circuit of mutual
174
checking. When the frequency difference more than 0.5Hz, blocking this
function immediately. If the value less than 0.5Hz, it will be automatic
unblocking.
3. A VT fail is detected by the device or a MCB failure signal is received to the

device through respective binary input.
4. Negative sequence voltage is greater than 5V. In case of single-phase voltage

connection (by setting “1Ph V Connect”),this condition is useless.
5. The minimum magnitude among of the connected voltages is lower than the
threshold defined by “U_Check”.
6. Load current is lower than setting “I_Check”. This condition is mainly useful
when the voltage transformer is connected at source side. The setting applied
at “I_Check” corresponds to minimum load current which may flow when
circuit breaker is closed. It is possible to disable this feature by applying
setting 0 to “I_Check”.
7. Rate of frequency change (Δf/Δt) exceeds the setting of frequency change

rate“df/dt_LF FS”.
8. The system action process load shedding in the Low-frequency, active power
maybe occur before the previous stage operation after the system is no longer
vacancy. Frequency begin to rebound, but this knee point maybe within the
next stage pickup value. For example, after the 1st stage load shedding
operation, the frequency will be slowly rise, but the 2nd stage will be operate
when the 2nd stage pickup value constant under longer than this stage
operate delay time, not necessary the part load shedding. The over shedding
phenomenon easily in the area occurred in the small grid. Therefore, the
blocking criterion df/dt≥0 add in the each stage , can be effectively prevent
the over shedding phenomenon, and this function alsoo can be put on/off
ctrlword “Trend BLKF On/Off”.
175
4.2.2 Logic diagram
F<55Hz &
System Frequency=60Hz Y
F<45Hz &
System Frequency=50Hz Y
VT fail >=1
>=1 0
0
Block
U2>5V & Y 0 Y
Y
1Ph V Connect
U_Check<
I_Check<
Trend BLKF On
df/dt≥0
Func_LF LS On
&
f≤f_Startup LF LS startup
Y
Block ≥1
df/dt On
H
df/dt_LF LS >
LF LS startup &
Tf_ACC1
ACC LF1&2 On ACC LF1&2 Trip
df/dt_ACC1≤df/dt Y
<df/dt_LF LS
LF LS startup &
Tf_ACC2
ACC LF1&2&3 On ACC LF1&2&3 Trip
df/dt_ACC1≤df/dt Y
<df/dt_LF LS
Func_LF LS1 On
&
T_LF LS1
LF LS startup LF LS1 Trip
Y
f≤f_LF LS1
Func_LF LS2 On
Func_LF LS1 Off

≥1 LF Joint Cut On &
T_LF LS2
LF LS2 Trip
LF LS1 Trip H Y
f≤f_LF LS2
Func_LF LS3 On
Func_LF LS2 Off

≥1 LF Joint Cut On &
T_LF LS3
LF LS3 Trip
LF LS2 Trip H Y
f≤f_LF LS3
Func_LF LS4 On
&
T_LF LS4
LF LS_Startup LF LS4 Trip
Y
f≤f_LF LS4
176
IP1 LF LS Trip
IP2
IP3
UP1
UP2
UP3
Signal Description
Signal Description
LF LS Trip Low frequency load shedding trip

F_Startup the frequency settings for LF LS Hz
1. 45 60
startup
2. F_LF LS1 the frequency settings for LF LS1 Hz 45 60
3. T_LF LS1 the time delay settings for LF LS1 S 0.10 100.0
177
df/dt_ACC1 the df/dt setting for Hz/s
10. 0.300 20.00
LFLSaccelerate1
Tf_ACC1 the time delay setting for S
11. 0.10 100.0
LFLSaccelerate1
df/dt_ACC2 the df/dt setting for Hz
12. 0.300 20.00
LFLSaccelerate2
Tf_ACC2 the time delay setting for S
13. 0.10 100.0
LFLSaccelerate2
14. df/dt_LF LS the df/dt setting for LFLS blocking Hz/s 0.300 20.00
Table 22-4 binary settings list for low frequency load shedding protection
NO. Binarysetting list Optical Default Explanation

The function for Low frequency load
1 Func_LF LS 1/0 0
shedding.1-On; 0-Off.
4 Func_LF LS1 1/0 0
shedding stage 1.1-On; 0-Off.
5 Func_LF LS2 1/0 0
6 Func_LF LS3 1/0 0
7 Func_LF LS4 1/0 0
The Control word of Low frequency
16 LF Joint Cut On 1/0 0
joint cut on or off. 1-On; 0-Off.
The Control word of accelerating Low
19 ACC LF1&2 On 1/0 0 frequency sgate1, stage2 and stage3
on or off. 1-On; 0-Off.
The Control word of accelerating Low
20 ACC LF1&2&3 On 1/0 0 frequency sgate1 and stage2 on or off.
1-On; 0-Off.
The control word of avoid Low
23 Trend BLKF On 1/0 0 frequency shedding load
overabundance. 1-On; 0-Off.
The control word of df/dt block or not.
25 dF/dt On 1/0 0
1-On; 0-Off.
178
4.5 IED reports
LF LS Trip Low frequency load shedding function issues trip command
179
5 Super Low voltage load shedding

protection
5.1 Introduction
This kind of load shedding is to prevent the voltage collapse and

uncontrolled loss of load.
Super low voltage load shedding is necessary when the network is

connected with a huge system with vast power capacity. Under this
condition, “Low Frequency Load Shedding Scheme” cannot work properly.
“Low Voltage Load Shedding Scheme" would be a useful criterion whenever
Automatic Voltages Regulator (AVR) is out of service or not equipped with
following conditions satisfied.
5.2.1 Funciton description
Super under voltage load shedding protection provides four trip stages. Each
stage can be implemented when both joint linker and respective linker are
switched on. All the four stages will be disabled when the joint linker is
switched off. The first three stages can be tripped by turns, via control word
‘LV Joint Cut On/Off’, i.e. the second stage can’t be tripped only after the first
stage actuation, and the third stage can’t be tripped only after the second
stage actuation. When this control word is enabled, a certain stage can trip
even previous linker is switched off. The fourth stage is special. It can operate
regardless of previous three.
The acceleration stage is also provided. When the voltage is less than the
first stage setting ‘’U_LV LS1’’, and frequency change rate is more than
‘’du/dt_ACC1’’ and less than ‘du/dt_LVLS’’, serious overloading is considered.
In this condition, the IED will shed load fast, and trip the first two or three
stages. The acceleration stage can be disabled by control word “ACC LV1&2
Off”or “ACC LV1&2&3 Off’’.
Blocking:
1. A VT fail is detected by the device or a MCB failure signal is received to

the device through respective binary input.
180
2. Negative sequence voltage is greater than 5V. In case of single-phase

voltage connection (by setting “1Ph V Connect”),this condition is useless.
3. The minimum magnitude among of the connected voltages is lower than

the threshold defined by “U_Check”.
4. Load current is lower than setting “I_Check”. This condition is mainly

setting applied at “I_Check” corresponds to minimum load current which
may flow when circuit breaker is closed. It is possible to disable this
feature by applying setting 0 to “I_Check”.
5. Rate of frequency change (ΔU/Δt) exceeds the setting of voltage change

rate“du/dt_LV LS”。
6. The system action process load shedding in the Low-voltage, reactive

power maybe occur before the previous stage operation after the system
is no longer vacancy. Voltage begin to rebound, but this knee point maybe
within the next stage pickup value. For example, after the 1st stage load
shedding operation, the Voltage will be slowly rise, But the 2nd stage will
be operate when the 2nd stage pickup value constant under longer than
this stage operate delay time, not necessary the part load shedding. The
over shedding phenomenon easily in the area occurred in the small grid.
Therefore, the blocking criterion dU/dt>0 add in the each stage , can be
effectively prevent the over shedding phenomenon, and this function also
can be put on/off ctrlword “Trend BLKV On/Off”
181
5.2.2 Logic diagram
U2>5V &
Y
1Ph V Connect
>=1
VT fail 0
0
Block
Y
U_Check<
I_Check<
Trend BLKV On
du/dt≥0
Func_LV LS On
&
U≤U_Startup LV LS startup
Y
Block ≥1
du/dt On
H
du/dt_LV LS >
LV LS startup &
Tv_ACC1
ACC LV1&2 On ACC LV1&2 Trip
du/dt_ACC1≤du/dt Y
<du/dt_LV LS
&
LV LS startup Tv_ACC2
ACC LV1&2&3 Trip
ACC LV1&2&3 On Y
du/dt_ACC1≤du/dt
<du/dt_LV LS
Func_LV LS1 On
&
T_LV LS1
LV LS startup LV LS1 Trip
Y
U≤U_LF LS1
Func_LV LS2 On
Func_LV LS1 Off

≥1 LV Joint Cut On &
T_LV LS2
LV LS2 Trip
LV LS1 Trip H Y
U≤U_LV LS2
Func_LV LS3 On
Func_LV LS2 Off

≥1 LV Joint Cut On &
T_LV LS3
LV LS3 Trip
LV LS2 Trip H Y
U≤U_LV LS3
Func_LV LS4 On
&
T_LV LS4
LV LS Startup LV LS4 Trip
Y
U≤U_LV LS4
182
IP1 LV LS Trip
IP2
IP3
UP1
UP2
UP3
Signal Description
Signal Description
LF LS Trip Low voltage load shedding trip

U_Startup the voltage settings for LV LS
1. V 30.00 110.00
startup
2. U_LV LS1 the voltage settings for LV LS 1 V 30.00 110.00
3. T_ LV LS1 the time delay settings for LV LS 1 S 0.100 100.00
4. U_LV LS2 the voltage settings for LV LS S2 V 30.00 110.0
5. T_ LV LS2 the time delay settings for LV LS2 S 0.100 100.00
6. U_LV LS3 the voltage settings for LV LS3 V 30.00 110.0
8. U_LV LS4 the voltage settings for LV LS4 V 30.00 110.0
183
du/dt_ACC1 the du/dt setting for LV v/s

10. 1.00 200.0
LSaccelerate1
Tv_ACC1 the time delay setting for LV S
11. 0.100 100.00
LSaccelerate1
du/dt_ACC2 the du/dt setting for LV v/s
12. 1.00 200.0
LSaccelerate2
Tv_ACC2 the time delay setting for LV S
13. 0.100 100.00
LSaccelerate2
14. du/dt_LVLS the du/dt setting for LV LS blocking v/s 1.00 200.0
Table 22-9 Binary setting list for low voltage load shedding protection
NO. Binary setting list Optical Default Comment

The function for Low voltage load
1 Func_LV LS On 1/0 0
shedding.1-On; 0-Off.
The function for Low voltage load shedding
2 Func_LV LS1 On 1/0 0
stage 1.1-On; 0-Off.
The control word of Low voltage joint cut on
6 LV Joint Cut On 1/0 0
or off. 1-On; 0-Off.
The control word of accelerating Low voltage
7 ACC LV1&2 On 1/0 0
stage1 and stage2 on or off. 1-On;0-Off
The control word of accelerating Low voltage
8 ACC LV1&2&3 On 1/0 0 stage1, stage2 and stage3 on or off. 1-On;
0-Off
The control word of avoid Low voltage
9 Trend BLKV On 1/0 0
shedding load overabundance. 1-On;0-Off
The control word of du/dt block or not.
10 dU/dt On 1/0 0
1-On;0-Off
5.5 IED reports
Func_LV LS Disable or enable the low voltage load shedding
184
6 Super Overload load shedding

protection
6.1 Introduction
The IED provides a super load shedding function based on the load current
passing through feeder. This function will be essential in conditions that
feeder is connected to a huge network with constant frequency and
additional AVR is continuously used for voltage regulation. In this case, load
shedding protection should be done based on load current and monitoring
of following items
6.2.1 Fucntion description
Super overloadload shedding protection provides four trip stages. Each

stage can be implemented when both joint linker and respective linker are
switched on. All the four stages will be disabled when the joint linker is
switched off. The first three stages can be tripped by turns via control word
‘OL Joint Cut On/Off’, i.e. the second stage can’t be tripped only after the
first stage actuation, and the third stage can’t be tripped only after the
second stage actuation. When this control word is enabled, a certain stage
can trip even previous linker is switched off. The fourth stage is special. It
can operate regardless of previous three.
If there is voltage connection to the device and the device is informed about
it by setting “OL LS Chk V On” to control word “OL LS Chk V Off/OL LS Chk
V On”, the protection would be blocked in following conditions:
1. The minimum magnitude among of the connected voltages is lower than

the threshold defined by “U_Check”.
2. Rate of voltage change (ΔU/Δt) exceeds the setting of voltage change

rate “du/dt_OL LS”. The setting corresponds to phase to phase voltage.
3. Rate of frequency change (Δf/Δt) exceeds the setting of frequency

change rate “df/dt_OL LS”.
4. A VT fail is detected by the device or a MCB failure signal is received to

the device through respective binary input.
185
6.2.2 Logic diagram
VT fail
U_Check<
df/dt_OL LS > >=1 KG1.9：OL LS Chk V On

>=1 0
F<F_Startup
& Block
Y Y
Y
du/dt_OL LS >
>=1
&
Upp<U_Startup
Y
Y
Func_OL LS On
&
I≥I_Startup OL LS startup
Y
Block
Func_OL LS1 On
&
T_OL LS1
OL LS startup OL LS1 Trip
Y
I≥I_OL LS1
Func_OL LS2 On
Func_OL LS1 Off

≥1 OL Joint Cut On &
T_OL LS2
OL LS2 Trip
OL LS1 Trip H Y
I≥I_OL LS2
Func_OL LS3 On
Func_OL LS2 Off

≥1 OL Joint Cut On &
T_OL LS3
OL LS3 Trip
OL LS2 Trip H Y
I≥I_OL LS3
Func_OL LS4 On
&
T_OL LS4
OL LS_Startup OL LS4 Trip
Y
I≥I_OL LS4
186
IP1 OL LS Trip
IP2
IP3
UP1
UP2
UP3
Signal Description
Signal Description
OL LS Trip Overload load shedding trip
Table 22-13 Function setting list for overload load shedding protection

1 I_Startup the current settings for OL LS startup A 0.050 100
2 I_OL LS1 the current settings for OL LS 1 A 0.050 100
3 T_OL LS1 the time delay settings for OL LS 1 S 0.10 100.00
4 I_OL LS2 the current settings for OL LS S2 A 0.050 100
5 T_OL LS2 the time delay settings for OL LS2 S 0.10 100.00
6 I_OL LS3 the current e settings for OL LS3 A 0.050 100
7 T_OL LS3 the time delay settings for OL LS3 S 0.10 100.00
8 I_OL LS4 the current settings for OL LS4 A 0.050 100
9 T_OL LS4 the current settings for OL LS 1 S 0.10 100.00
187
Table 22-14 Binary setting list for overload load shedding protection

The function for Over load load
1 Func_OL LS 1/0 0
shedding.1-On;0-Off
The function for Over Load load
2 Func_OL LS1 On 1/0 0
The control word of Over Load joint cut
6 OL Joint Cut On 1/0 0
on or off. 1-On; 0-Off
The control word of Over Load load
7 OLLS Chk V On 1/0 0 shedding is check voltage or not. 1-On;
0-Off
6.5 Technical data

Table 22-15 Technical data for load shedding protection

Under Frequency Load shedding
Frequency for fr =50Hz 45.50 to 50.00 Hz, step 0.01 Hz ≤ ±20 mHz
Time delay 0.05 to 60.00s, step 0.01 ≤ ±1.5 % setting or +60 ms
Under Voltage Load shedding
Voltage 50 to 110 V, step 1V ≤ ±3 % setting or ±1 V
Time delay ≤ ±1.5 % setting or +60 ms, at
0.10 to 60.00s, step 0.01 s
Overload Load shedding
Phase current 0.08 to 20 A for Ir =1A ≤ ±3% setting or ±0.02Ir
0.25 to 100 A for Ir =5A
Time delay 0.10 to 60.00s , step 0.01 s ≤ ±1.5 % setting or +60 ms, at
Blocking condition
Frequency change rate Δf/Δt 1 to 10 Hz/s ≤ ±0.5 Hz/s
Voltage change rate Δu/Δt 1 to 100 V/s, step 1 V/s ≤ ±3 % setting or ±1 V
Blocking voltage 10 to 120V, step 1 V ≤ ±3 % setting or ±1 V
Blocking current 0 to 2 Ir ≤ ±3% setting or ±0.02Ir
Operating time Approx. 60 ms
Under voltage blocking reset ratio Approx. 1
188
Chapter 23 Fast busbar protection scheme
Chapter 23 Fast busbar protection

scheme
About this chapter

technical data used for fast busbar protection scheme.
189
1 Fast busbar protection scheme

The IED provides fast busbar protection which is achieved based on
operation with GOOSE signals, it is able to block the incoming feeder
protection IED function by reception of a defined GOOSE signals from the
outgoing feeder linked with the same busbar.
The principle illustrated in the following figure:
A
Relay A
Relay B GOOSE massage-Block
B
Trip
Relay C
Figure 23-1 Action when fault on the feeder C
If the fault occurs on outgoing feeder C, the protection IED C will trip and
send block messenger to IED A to block IED A relevant protection function.
190
A
Relay A
Trip
Relay B
Relay C
Figure 23-2 Action when fault on the Busbar
Once the fault located on the busbar, protection IEDs of outgoing feeder do
not trip and therefore there is no any blocking signal. So the IED A will trip
and clear off the fault with short time delay.

IP1
IP2
IP3
UP1
UP2
UP3
Signal Description
191
1.2 IED reports
OC Startup Three stages over current protections startup
OC Startup Back Three stages over current protections return
192
Chapter 24 Secondary system supervision
Chapter 24 Secondary system

supervision
About this chapter

output signals, parameter, IED report and technical data used
in secondary system supervision function.
193
1 Current circuit supervision
Open or short circuited current transformer cores can cause unwanted

operation of many protection functions such as, earth fault current and
negative sequence current functions.
It must be remembered that a blocking of protection functions at an

occurring open CT circuit will mean that the situation will remain and
extremely high voltages will stress the secondary circuit.
To prevent the IED from wrong trip, interruptions in the secondary circuits of
current transformers is detected and reported by the UED. When the zero
sequence current is always larger than the setting value “3I0_CT Fail” for
12s, “CT Fail” will be reported and each stage of zero sequence current
protection will be blocked if setting “Blk EF_CT Fail” is selected.
1.1.2 Logic diagram
3I0> 12s CT Fail

CT Fail On
Figure 24-1 Logic diagram for current circuit supervision
IP1 CT Fail
IP2
IP3
IN
194
Signal Description
IN signal for zero sequence current input
Signal Description
CT Fail CT Fail
Table 24-3 Function setting list for current circuit supervision protection
NO. Default Abbr. Explanation Unit Min. Max.

Maximum zero-sequence current for
1. 0.5In 3I0_CT Fail A 0.05In 2.00In
detecting CT failure
Table 24-4 Binary setting list for current circuit supervision protection

Enable or disable the function
1 CT Fail On 1/0 0
of CT fail supervising
1.4 IED reports
CT Fail CT failure in circuit of current transformer
195
2 Fuse failure supervisionVT

2.1 Introduction
A measured voltage failure, due to a broken conductor or a short circuit fault
in the secondary circuit of voltage transformer, may result in unwanted
operation of the protection functions which work based on voltage criteria.
VT failure supervision function is provided to block these protection
functions and enable the backup protection functions.
In the event of a measured voltage failure due to a broken conductor or a

short circuit fault in the secondary circuit of voltage transformer, those
protection functions which work based on voltage criteria may see a voltage
of zero by mistake. VT failure supervision function is provided to inform
those functions about a voltage failure.
VT failure supervision function can be enabled or disabled through via

control word “VT Fail On/ VT Fail Off”. By applying setting “VT Fail On” to
the control word, VT failure supervision function would monitor the voltage
transformer circuit. The function is able to detect single-phase broken,
two-phase broken or three-phase broken faults in secondary circuit of
voltage transformer, if a three-phase connection is applied. There are three
main criteria for VT failure detection; the first one is dedicated to detect
three-phase broken faults. The second and third ones are dedicated to
detect single or two-phase broken faults in solid earthed and
isolated/resistance earthed systems, respectively. A precondition to meet
these three criteria is that the device should not be picked up (the pickup
condition is only related with those protection functions which operate
based on current conditions). The calculated zero sequence and negative
sequence currents should be less than setting of “3I02_ VT Fail”. These
criteria are as follows:
The calculated zero sequence voltage 3U0 as well as maximum of three

phase-to-earth voltages is less than the setting of “Upe_VT Fail” and at the
same time, maximum of three phase currents is higher than setting of “I_ VT
Fail”. This condition may correspond to three phase broken fault in
secondary circuit of the voltage transformer.
The calculated zero sequence voltage 3U0 is more than the setting of
“Upe_VT Fail”. This condition may correspond to single or two-phase
broken fault in secondary circuit of the voltage transformer, if the system
196
starpoint is solidly earthed.
The calculated zero sequence voltage 3U0 is more than the setting of
“Upe_VT Fail”, and at the same time, the difference between the maximum
and minimum phase-to-phase voltages is more than the setting of “Upp_VT
Fail”. This condition may correspond to single or two-phase broken fault in
secondary circuit of the voltage transformer, if the system starpoint is
isolated or resistance earthed.
In addition to the mentioned conditions, the device has the capability to be

informed about the VT MCB failure through its binary input “V3P MCB Fail”.
In this context, VT fail is detected, if the respective digital input is active.
If VT failure supervision detects a failure in voltage transformer secondary

circuit, either by means of the above mentioned criteria or reception of a VT
MCB fail indication, all the protection functions which operate based on
direction component or low voltage criteria will be blocked. Furthermore,
alarm report “VT Fail” is issued after 10s time delay. If the VT Fail criteria
recovers within this 10s time delay, the blocking condition would be
removed if one of the following conditions is met. Furthermore, it should be
noted that no VT MCB fail indication should be present during this condition.
Without relay pickup, minimum phase voltage becomes more than setting of
“Upe_VT Normal” for 500ms.
While the protection which relates to current is detected pick up, it will block
the VT failure supervision.
Without relay pickup, minimum phase voltage becomes more than setting of
“Upe_VT Normal” and at the same time, the calculated zero sequence or
negative sequence current of corresponding side becomes more than the
setting of “3I02_ VT Fail”.
Subsequent to reporting VT fail alarm, the blocking condition of respective

protection functions would be removed if without relay pickup, the minimum
phase voltage becomes more than the setting of “Upe_VT Normal” for a
duration more than 10s. Furthermore, it should be noted that no VT MCB
fail indication should be present during this condition.
197
2.2.1 Logic diagram
Max(Ia,Ib,Ic)>I_ VT Fail
Max{Ua,Ub,Uc}<Upe_VT Fail AND
3U0 <（ Upe_VT Fail-1）
3U0 >（Upe_VT Fail-1)

AND
Solid Earth on OR
AND
Max{Uab,Ubc,Uca}-Min{Uab,Ubc,Uca}> Upp_VT Fail
1Ph V Connect
AND
Relay Pickup OR
VT Fail Detected
BI V3P MCB Fail

AND VT Inst Fail Time T_VT Fail Alarm report
VT Fail on
VT Inst Fail Time U0 VT Fail Detected
AND
BI_Ux VT MCB Fail
Figure 24-2 Logic diagram for VT fault
2.2.2 Input and output signals
IP1 V3P MCB Fail
IP2 V1P MCB Fail
IP3
IN
UP1
UP2
UP3
Signal Description
IN Signal for zero sequence current input
198
Table 24-7 Binaryinput list
Signal Description
V3P MCB Fail Three phase MCB VT fail
V1P MCB Fail Single phase MCB VT fail
Signal Description
VT Fail VT fail
V1P MCB Fail Single phase MCB VT fail
Table 24-9 Function setting list for fuse failure supervision protection

Maximum current for detecting VT
1. I_VT Fail A 0.05In 0.25In
failure
Maximum zero- and negative-
2. 3I02_VT Fail sequence current for detecting VT A 0.05In 0.25In
failure
Maximum phase to earth voltage
3. Upe_VT Fail V 7.00 20.0
for detecting VT failure
Maximum phase to phase voltage
4. Upp_VT Fail V 10.00 30.0
for detecting VT failure
Minimum normal phase to earth
5. Upe_VT Normal V 40.00 65.00
for VT restoring
Table 24-10 Binary setting list for fuse failure supervision protection

Single phase or three
phase voltage connection
Solid earthed system or
2 Solid earthed 1/0 0
isolated system
Enable or disable the
3 VT Fail On 1/0 0
function of VT failure
199
2.4 IED reports
VT Fail VT failure in circuit of voltage transformer
V1P VT Fail VT failure in circuit of the forth voltage transformer
2.5 Technical data
Table 24-12 Technical data for VT secondary circuit supervision
Item Range or value Tolerances

Minimum current 0.08Ir to 0.20Ir, step 0.01A ≤ ±3% setting or ±0.02Ir
Minimum zero or negative 0.08Ir to 0.20Ir, step 0.01A ≤ ±5% setting or ±0.02Ir
sequence current
Maximum phase to earth voltage 7.0V to 20.0V, step 0.01V ≤ ±3% setting or ±1 V
Maximum phase to phase 10.0V to 30.0V, step 0.01V ≤ ±3% setting or ±1 V
voltage
Normal phase to earth voltage 40.0V to 65.0V, step 0.01V ≤ ±3% setting or ±1 V
200
Chapter 25 Monitoring function
About this chapter

output signals, parameter, IED report and technical data used
in monitoring function.
201
1 Switching devices status monitoring

The function is used to monitor the service status of circuit breaker. The
conditions such as spring charging status, gas pressure, etc., are available
for the protection IED.
The AR function will be blocked and alarm will be issued in case of

something wrong with CB.
2 Self-supervision
 All modules can perform self-supervision to its key hardware components
and program as soon as energizing. Parts of the modules are
self-supervised in real time. All internal faults or abnormal conditions will
initiate an alarm. The fatal faults among them will result in the whole IED
blocked
 CRC checks for the setting, program and configuration, etc.
202
Chapter 26 Station communication
About this chapter
This chapter describes the communication possibilities in a

SA-system.
203
1 Overview
Each IED is provided with a communication interface, enabling it to connect
to one ormany substation level systems or equipment.
Following communication protocols are available:
 IEC 61850-8-1 communication protocol
 60870-5-103 communication protocol
The IED is able to connect to one or more substation level systems or

equipments simultaneously, through the communication ports with
communication protocols supported.
1.1 Protocol
1.1.1 IEC61850-8 communication protocol
IEC 61850-8-1 allows two or more intelligent electronic devices (IEDs) from
one orseveral vendors to exchange information and to use it in the
performance of their functionsand for correct co-operation.
GOOSE (Generic Object Oriented Substation Event), which is a part of IEC

61850-8-1standard, allows the IEDs to communicate state and control
information amongstthemselves, using a publish-subscribe mechanism.
That is, upon detecting an event, theIED(s) use a multi-cast transmission to
notify those devices that have registered to receivethe data. An IED can, by
publishing a GOOSE message, report its status. It can alsorequest a control
action to be directed at any device in the network.
1.1.2 IEC60870-5-103 communication protocol
The IEC 60870-5-103 communication protocol is mainly used when a

protection IEDcommunicates with a third party control or monitoring system.
This system must havesoftware that can interpret the IEC 60870-5-103
communication messages.
The IEC 60870-5-103 is an unbalanced (master-slave) protocol for

coded-bit serialcommunication exchanging information with a control
system. In IEC terminology aprimary station is a master and a secondary
204
station is a slave. The communication is basedon a point-to-point principle.

The master must have software that can interpret the IEC60870-5-103
communication messages. For detailed information about IEC60870-5-103,
refer to the “IEC60870 standard” part 5: “Transmission protocols”, andto the
section 103: “Companion standard for the informative interface of
protectionequipment”.
1.2 Communication port
1.2.1 Front communication port
There is a RJ45 port on the front plate of all the IEDs. Through this port, the
IED can be connected to the personal computer for setting, testing, and
configuration using the dedicated Sifang software tool.
1.2.2 RS485 communication ports
One isolated electrical RS485 communication ports are provided to connect

with substation automation system, the ports can work in parallel for
IEC60870-5-103, and the other port can be used for time synchronization.
1.2.3 Ethernet communication ports
Up to 3 electrical Ethernet or 2 optical Ethernet communication ports are

provided to connect with substation automation system. These two ports
can work in parallel for one protocol, IEC61850 or IEC60870-5-103.
1.3 Technical data
Table 26-1 Front communication port
Item Data
Number 1
Connection A RJ45 for software tools
Communication speed 100Mbit/s
205
Table 26-2 RS485 communication port
Item Data
Number 1, only
Connection 2-wire connector
Rear port in communication module
Max. length of communication cable 1.0 km
Test voltage 500 V AC against earth
For IEC 60870-5-103 protocol
Communication speed Factory setting 9600 baud,
Min. 1200 baud, Max. 19200 baud
Table 26-3 Ethernet communication port
Item Data
Ethernet communication port
Number 3 RJ45 or 2 optical
Connection RJ45 connector or optical interface
Max. length of communication cable 100m
For IEC 61850 protocol
Communication speed 100 Mbit/s
Table 26-4 Time synchronization
Item Data
Mode Pulse mode or optical signal
IRIG-B signal format IRIG-B000
Connection 2-wire connector or optical fiber
Voltage levels differential input
206
1.4 Typical substation communication scheme

The IED is able to connect to one or more substation level systems or
equipments simultaneously, through the communication ports with
communication protocols supported.
Server or Work Server or Work

Station 1 Station 2
Switch
Work Station 3
Net 1: IEC61850/IEC103,Ethernet Port A
Switch Net 2: IEC61850/IEC103,Ethernet Port B Switch

Switch
Gateway Switch
or
converter
Net 3: IEC103, RS485 Port A
Figure 26-1 Connection example for multi-networks of station automation system
1.5 Typical time synchronizing scheme

All IEDs feature a permanently integrated electrical time synchronization port
(shown in Figure 26-2). It can be used to feed timing telegrams in IRIG-B or
pulse format into the IEDs via time synchronization receivers. The IED can
adapt the second or minute pulse in the pulse mode automatically.
Meanwhile, SNTP network time synchronization can be applied.
SNTP IRIG-B Pulse
Ethernet port IRIG-B port Binary input
Figure 26-2 Time synchronizing modes

207
Chapter 27 Hardware
Chapter 27 Hardware
About this chapter
This chapter describes the IED hardware.
208
Chapter 27 Hardware
1 Introduction
1.1 IED structure
The enclosure for IED is 1/2 19 inches in width and 4U in height.
 The IED is flush mounting with panel cutout and cabinet.
 Connection terminals to other system on the rear.
 The front panel of IED is aluminum alloy by founding in integer and

overturn downwards. LCD, LED and setting keys are mounted on the
panel. There is a RJ45 interface on the panel suitable for connecting a
PC.
 Draw-out modules for serviceability are fixed by lock component.
 The modules can be combined through the bus on the rear board. Both
the IED and the other system can be combined through the rear
interfaces.
1.2 IED module arrangement
X1 X2 X3 X4 X5 X6 X7
POWER OUT DIO CPU DIO AC AC/DIO
Figure 27-1 Rear view of the protection IED

209
Chapter 27 Hardware
2 Local human-machine interface
2.1 Liquid crystal display (LCD)
The LCD back light of HMI is blue, 12 lines can be displayed.
When operating keys are pressed or in the case of IED alarming or operating
report appearance, theback light will turn on automatically until the preset
time delay elapse after the latest operation or alarm.
2.2 Man-Machine Interface Module (MMI)
MMI is the man-machine interface part of the equipment, displaying the

current and voltage measurement values, switch-on connectors and
single-line diagram of the Bay, via the large LCD on the panel. The Bay
diagram is drawn by user.
There are 16 LEDs on the panel; they will show the normal/abnormal state of
the equipment. There are 6 Local function buttons on the bottom of the panel,
which are designed for the user for more convenient circuit breaker control in
local mode.
After loading the CPU programme, you should switch the language you want
the relay to display, then press set button, after the relay rebooting, the
language of the relay will be set successfull.
210
Chapter 27 Hardware
1 2
7 Run
3
Alarm
4
5
1. Panel 2. LED 3. Reset Button

4. Quit 5. Set Button 6. Sifang Keyboard
7. LCD 8. Debug Ethernet port
Figure 27-2 MMI Panel of the relay
Panel--In which the man-machine interface module (MMI) is equipped.
State Indication LED (From left to right, 1st line, and followed by 2nd line)
There are 16 LEDs, and the function of the LED1 and LED9 are fixed. They
are introduced as following. LED2 ~ LED8, LED10~LED16 are configurable
and can be defined by users and these LEDs can be marshaled in the
following property.
Latched property: Whether Latched or not, “Latched” and “Unlatched” are

provided to marshal.
Light property: “Light” and “Flash” are provided to marshal.
LightColor: “Red”,”Green” and “Yellow” are provided to marshal.
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Chapter 27 Hardware
Run (LED1) -- The first LED indicator is “Run” indicator, generally the “Run”
indicator keeps constant green and shows that the equipment can work
normally; the green indicator flickers after the protection startup, and the
indicator recovers to constant green after protection equipment is reset; And
when the relay is switched to Unlock state, the “Run” indicator will flicker in
green.
Alarm (LED9) -- When protection operates, this indicator will be light in red.
The LED is latched. The LED does not extinguish until reset is coming even
though the relay was powered off.
NOTE: LED_Run cannot be marshaled in “Latched property”,” Light

property” and “LightColor”.
RESET--Reset the alarm messages and the alarm LED.
QUIT--Quit the sub-menu and return to the upper level menu, or to cancel the
present operation.
SET-- Enter the next menu or confirm the present operation.
Sifang Keyboard--Operation keys. They make the cursor move up, down, left
and right in the menu. The up/down buttons have the ‘+’/ ‘-’ function on
numbers.
LCD--It displays the present measurement, the switch-on connectors and the
single-line diagram of the Bay when there is no operation on the buttons.
These kinds of information are renewed every some seconds. Users can lock
one of them by pressing QUIT button and press it again to return to the cycle
display state. When there is no button pressed on menu operation for 5
minutes the LCD will return to the state of cycle display.
Debug Ethernet port-- PC uses the tool software CSmart Assistant to set the
parameters, test the function, download software and analyze the data. IP
address 196.178.180.66, this IP address cannot be modify
The Sifang keyboard is located to the right of the screen. It is used to

complete the intercourse between the user and the equipment. Operation of
the keys can be divided into two parts. The keys below the screen are local
function keys, which are set especially for the local control in case of
emergency. After entering the local mode, the operator can complete the
trip/close operation through the panel, which originally needs to be done from
remote.
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Chapter 27 Hardware
The keyboard has the same look and feel in CSC family. As shown in Table
27. The keyboard is divided into Arrow keys, Reset key, Quit key and Set
key. The specific instructions on the keys as the following table described:
Table 27-1 HMI keys on the front of the IED
Key Function
Up arrow key  Move up in menu
 Page up between screens
 Increase value in setting
Down arrow key  Move down in menu
 Page down between screens
 Decrease value in setting
Left arrow key Move left in menu
Right arrow key Move Right in menu
Reset key  Reset the LEDs
 Return to normal scrolling display state directly
Set key  Enter main menu or submenu
 Confirm the setting change
Quit key  Back to previous menu
 Cancel the current operation and back to previous menu
 Return to scrolling display state
 Lock or unlock current display in the scrolling display state
(the lock state is indicated by a "solid diamond" type icon
on the botton right corner of the LCD)
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Chapter 27 Hardware
2.3 IED menu
2.3.1 Menu construction
SecValue DevSta
PryValue Calculate
OpStatus AnalyHarm M&C Link
DI State Sub DI
DO
ViewSet SwSetGr
Settings
WriteSet DelSetGr
EventRpt StartRpt
QueryRpt AlarmRpt LogRpt
SOERpt RemCtrRpt
CalRpt
Set Time SetPrint
DevSetup Set Comm Set PW
Set Cal Panel Rem Ctr
MainMenu
EquipPara OpStatus
ProtSet RePort
Print Setting List DevSetup
103ComMsg M&C Parameter
CalSetting
Eth 1# Serial
ComConf Eth 2# Label
Monitor
Test BO SimuTest
Testing
Test LED GOOSE Test
DevInfo Version GOOSEINF
Connect SetConn ConnSta
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Chapter 27 Hardware
2.3.2 Operation status
Sub menu Sub-sub Sub-sub-sub Explanation

menu menu
Analog Read the analog input snd-value of the IED
SecValue Measure Read the measure input snd-value of the IED
Metering Read the Metering input snd-value of the IED
DevSta Read the run status of the IED
Analog Read the analog inputs fst-value of the IED
PryValue
Measure Read the Metering input fst-value of the IED
OpStatus
Calculate Read the energy of the IED
AnalyHarm Read the harmonic of the IED
M&C Link
DI State Read the binary input of the IED
Sub DI Read the binary input of the GOOSE
DO Read the binary output of the GOOSE
2.3.3 Settings
Sub menu Sub-sub menu Explanation

ViewSet Read the settings
SwSetGr Set the settings
Settings
WriteSet Switch setting group
DelSetGr Delete settings
2.3.4 QueryRpt

EventRpt Display latest 36 event records
StartRpt Display latest 40 startup records
AlarmRpt Display latest 40 alarm records recording wave
QueryRpt LogRpt Display latest 40 IED operation records
SOERpt Display latest 256 IED SOE records
RemCtrRpt Display latest 40 IED remote control records
CalRpt Display latest calculate records
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Chapter 27 Hardware
2.3.5 DevSetup
Sub menu Sub-sub menu Sub-sub-sub menu Explanation

Set Time Set time
Set Time SynType Choose the synchronization way
SNTP Setup Set SNTP
SetPrint Set the printing parameter
Label Set the label
Protocol Set the protocol
DevSetup
Set Comm Ethernet Set the internet
Signal Set the signal
Serial Set the serial port
Set PW Set the password
Set Cal Set the calculate parameter
Panel Rem Ctr Set the panel remote control
2.3.6 Print

EquipPara Print the device parameters
OpStatus Print the run status
ProSet Print the setting
Report Print the report
Print Setting List Print the setting list
DevSetup Print the device setting
103ComMsg Print the information list
M&C Parameter Print the M&C parameter
CalSetting Print the calculate setting
2.3.7 Testing

Test BO Test the binary output
SimuTest Test the remote function
Testing
Test LED Test LED
GOOSE Test Test GOOSE binary
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Chapter 27 Hardware
2.3.8 DevInfo

Version Display the version information
DevInfo
GOOSEINF Display the GOOSE stastics
2.3.9 Connector

SetConn Set the connector
Connetor
ConnSta Display the connector status
3 Analog input module
3.1 Introduction
The analogue input module is used to galvanically separate and transform the
secondary currents and voltages generated by the measuring transformers.
3 dedicated high accurate current transformers (optional) are used for

metering. 4 dedicated current transformers are used for protectioin. 3
dedicated voltage transformers are used for voltage measuring. 1 dedicated
sensitive current transformer is used for sensitive protection. All analogs are
shown in the figure below.
217
Chapter 27 Hardware
Figure 27-3 Terminals arrangement of analog input
218
Chapter 27 Hardware
3.2 Technical data
Table 27-2 Internal current transformer
Item Standard Data

Rated current Ir IEC 60255-1 1 or 5 A
Nominal current range 0.05 Ir to 30 Ir
Nominal current range of sensitive 0.005 to 1 A
CT
Power consumption (per phase) ≤ 0.1 VA at Ir = 1 A;
≤ 0.5 VA at Ir = 5 A
≤ 0.5 VA for sensitive CT
Thermal overload capability IEC 60255-1 100 Ir for 1 s
IEC 60255-27 4 Ir continuous
Thermal overload capability for IEC 60255-27 100 A for 1 s
sensitive CT DL/T 478-2001 3 A continuous
Table 27-3 Internal voltage transformer
Item Standard Data

Rated voltage Vr (ph-ph) IEC 60255-1 100 V /110 V
Nominal range (ph-e) 0.4 V to 120 V
Power consumption at Vr = 110 V IEC 60255-27 ≤ 0.1 VA per phase
DL/T 478-2001
Thermal overload capability IEC 60255-27 2 Vr, for 10s
(phase-neutral voltage) DL/T 478-2001 1.5 Vr, continuous
219
Chapter 27 Hardware
4 Binary Input & Output module

In this module, the binary inputs are used to connect with the signals and
alarms. The binary outputs are used for the tripping outputs and initiating
outputs for protection functions, or signaling output.
36 binary inputs and 24 binary output relays are provided in this module. They
are shown in the terminal figure 27-4 and figure 27-5 below.
The binary inputs relay of input and the pulse width of binary output can be
set in the setting by user themselfs. The range of the setting is from 0s to 10s.
The two binary outputs X5-B06-1/2 and X5-B071/2 are each closure. Take
the binary output X5-B06-1/2 for example, while X5-B06-1 is open, the
X5-B06-2 is close; while X5-B06-1 is close, the X5-B06-2 is open.
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Chapter 27 Hardware
4.1 Terminals figure of IED
Figure 27-4 Terminals arrangement of the CSC-211(F11) IED
221
Chapter 27 Hardware
Figure 27-5 Terminals arrangement of the CSC-211(L11) IED

222
Chapter 27 Hardware
4.2 Technical data
Table 27-4 Binary inputs
Item Standard Data

Input voltage range IEC60255-1 110/125 V
220/250 V
Threshold1: guarantee operation IEC60255-1 154V, for 220/250V
77V, for 110V/125V
Threshold2: uncertain operation IEC60255-1 132V, for 220/250V ;
66V, for 110V/125V
Response time/reset time IEC60255-1 Software provides de-bounce time
Power consumption, energized IEC60255-1 Max. 0.5 W/input, 110V
Max. 1 W/input, 220V
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Chapter 27 Hardware
Table 27-5 Binary outputs
Item Standard Data

Max. system voltage IEC60255-1 250V /~
Current carrying capacity IEC60255-1 5 A continuous,
30A，200ms ON, 15s OFF
Making capacity IEC60255-1 1100 W( ) at inductive load with L/R>40 ms
1000 VA(AC)
Breaking capacity IEC60255-1 220V , 0.15A, at L/R≤40 ms
110V , 0.30A, at L/R≤40 ms
Mechanical endurance, Unloaded IEC60255-1 50,000,000 cycles (3 Hz switching frequency)
Mechanical endurance, making IEC60255-1 ≥1000 cycles
Mechanical endurance, breaking IEC60255-1 ≥1000 cycles
Specification state verification IEC60255-1 UL/CSA、TŰV

IEC60255-23
IEC61810-1
Contact circuit resistance IEC60255-1 30mΩ
measurement IEC60255-23
IEC61810-1
Open Contact insulation test (AC IEC60255-1 AC1000V 1min
Dielectric strength) IEC60255-27
Maximum temperature of parts and IEC60255-1 55℃

materials
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Chapter 27 Hardware
5 CPU module
5.1 Introduction
The CPU module handles all protection functions and logic, hardware
self-supervision and performs communication and information exchange
between the protection system and external equipments such as HMI, PC,
monitor, control system, substation automation system, engineer station,
RTU and printer, etc. Additionally, the CPU module transmits remote
metering, remote signaling, SOE, event reports and record data. The module
also provides binary inputs, synchronization and communication ports.
The pulse, IRIG-B or SNTP mode can be applied for time synchronization.
According to requirement, up to 2 isolated electrical or optical Ethernet ports

(optical Ethernet ports optional) and 1 RS485 serial and 1 IRIG-B RS485
synchronization communication port can be provided to meet the demands of
different substation automation system and RTU at the same time. In the
CPU with optical port, there is a optical port provide to meet the demands of
optical IRIG-B.
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Chapter 27 Hardware
5.2 Terminals of CPU module
Figure 27-6 Terminals arrangement of CPU
Table 27-6 Definition of terminals of CPU
Terminal Definition
01 485-1A/B+
02 485-1A/B-
03 COM
04 485-2A
05 485-2B
Ethernet Port A Optional optical fiber or RJ45 port for station automation system
Ethernet Port B Optional optical fiber or RJ45 port for station automation system
IRIG-B Optical IRIG-B for station automation system
226
Chapter 27 Hardware
5.3 Technical data
Table 27-7 Front communication port
Item Data
Number 1
Connection A RJ45 for software tools
Fixed IP address 196.178.180.66
Table 27-8 RS485 communication port
Item Data
Number 2
Connection 2-wire connector
Max. length of communication cable 1.0 km
Test voltage 500 V AC against earth
Communication speed Factory setting 9600 baud,
Min. 1200 baud, Max. 19200 baud
Table 27-9 Ethernet communication port
Item Data
Electrical communication port
Number 0 to 3
Connection RJ45 connector or optical interface
Max. length of communication cable 100m
For IEC 61850 protocol
227
Chapter 27 Hardware
Table 27-10 Time synchronization
Item Data
Mode Pulse mode or optical IRIG-B
IRIG-B signal format IRIG-B000
Connection 2-wire connector or fiber connector
Voltage levels differential input
228
Chapter 27 Hardware
6 Power supply module
6.1 Introduction
The power supply module is used to provide the correct internal voltages
and full isolation between the terminal and the battery system.The module
provides 9 binary input channels as well.
6.2 Terminals of power supply module
Figure 27-7 Terminals arrangement of PSM
229
Chapter 27 Hardware
Table 27-11 Definition of terminals of PSM
Terminal Definition
a2-c12 Binary input 1

c2-c12 Binary input 7
a14-a16
Device Alarm
c14-c16
a14-a18
Operate Alarm
c14-c18
a14-a20
Pro Signal
c14-c20
a14-a22
Close Signal
c14-c22
16 AUX. power input 1, DC +
17 Isolated terminal, not wired
18 AUX. power input 2, DC -
19 Isolated terminal, not wired
20 Terminal for earthing
6.3 Technical data

Item Standard Data
Rated auxiliary voltage Uaux IEC60255-1 100 to 125V
195 to 250V
Permissible tolerance IEC60255-1 ±%20 Uaux
Power consumption at quiescent state IEC60255-1 ≤ 50 W per power supply module
Power consumption at maximum load IEC60255-1 ≤ 60 W per power supply module
Inrush Current IEC60255-1 T ≤ 5 ms/I≤ 35 A
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Chapter 27 Hardware
6.4 Type tests
Table 27-12 Insulation test
Item Standard Data

Over voltage category IEC60255-27 Category III
Pollution degree IEC60255-27 Degree 2
Insulation IEC60255-27 Basic insulation
Degree of protection (IP) IEC60255-27 Front plate: IP40
IEC 60529 Rear, side, top and bottom: IP 30
Power frequency high voltage IEC 60255-5 2KV, 50Hz
withstand test EN 60255-5 2.8kV
ANSI C37.90 between the following circuits:
GB/T 15145-2001  auxiliary power supply
DL/T 478-2001  CT / VT inputs
 binary inputs
 binary outputs
 case earth
500V, 50Hz
between the following circuits:
 Communication ports to case
earth
 time synchronization terminals
to case earth
Impulse voltage test IEC60255-5 5kV (1.2/50μs, 0.5J)
IEC 60255-27 If Ui≥63V
EN 60255-5 1kV if Ui<63V
ANSI C37.90 Tested between the following
GB/T 15145-2001 circuits:
DL/T 478-2001  auxiliary power supply
 CT / VT inputs
 binary inputs
 binary outputs
 case earth
Note: Ui: Rated voltage
Insulation resistance IEC60255-5 ≥ 100 MΩ at 500 V
IEC 60255-27
EN 60255-5
ANSI C37.90
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Chapter 27 Hardware
GB/T 15145-2001
DL/T 478-2001
Protective bonding resistance IEC60255-27 ≤ 0.1Ω
Fire withstand/flammability IEC60255-27 Class V2
Table 27-13 Electromagnetic compatibility tests
Item Standard Data

1 MHz burst immunity test IEC60255-22-1 Class III
IEC60255-26 2.5 kV CM ; 1 kV DM
IEC61000-4-18 Tested on the following circuits:
EN 60255-22-1  auxiliary power supply
ANSI/IEEE C37.90.1  CT / VT inputs
 binary inputs
 binary outputs
1 kV CM ; 0 kV DM
Tested on the following circuits:
 communication ports
Electrostatic discharge IEC 60255-22-2 Level 4
IEC 61000-4-2 8 kV contact discharge;
EN 60255-22-2 15 kV air gap discharge;
both polarities; 150 pF; Ri = 330 Ω
Radiated electromagnetic field IEC 60255-22-3 Frequency sweep:
disturbance test EN 60255-22-3 80 MHz – 1 GHz; 1.4 GHz – 2.7 GHz
spot frequencies:
80 MHz; 160 MHz; 380 MHz; 450
MHz; 900 MHz; 1850 MHz; 2150
MHz
10 V/m
AM, 80%, 1 kHz
Radiated electromagnetic field IEC 60255-22-3 Pulse-modulated
disturbance test EN 60255-22-3 10 V/m, 900 MHz; repetition rate
200 Hz, on duration 50 %
Electric fast transient/burst immunity IEC 60255-22-4, Class A, 4KV
test IEC 61000-4-4 Tested on the following circuits:
EN 60255-22-4  auxiliary power supply
ANSI/IEEE C37.90.1  CT / VT inputs
 binary inputs
 binary outputs
Class A, 1KV
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Chapter 27 Hardware

Surge immunity test IEC 60255-22-5 4.0kV L-E
IEC 61000-4-5 2.0kV L-L
 auxiliary power supply
 CT / VT inputs
 binary inputs
 binary outputs
500V L-E
Conduct immunity test IEC 60255-22-6 Frequency sweep: 150 kHz – 80
IEC 61000-4-6 MHz
spot frequencies: 27 MHz and 68
MHz
10 V
AM, 80%, 1 kHz
Power frequency immunity test IEC60255-22-7 Class A
300 V CM
150 V DM
Power frequency magnetic field test IEC 61000-4-8 Level 4
30 A/m cont. / 300 A/m 1 s to 3 s
100 kHz burst immunity test IEC61000-4-18 2.5 kV CM ; 1 kV DM
 auxiliary power supply
 CT / VT inputs
 binary inputs
 binary outputs
1 kV CM ; 0 kV DM
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Chapter 27 Hardware
Table 27-14 Mechanical tests
Item Standard Data

Sinusoidal Vibration response IEC60255-21-1 Class 1
test EN 60255-21-1 10 Hz to 60 Hz: 0.075 mm
60 Hz to 150 Hz: 1 g
1 sweep cycle in each axis
Relay energized
Sinusoidal Vibration endurance IEC60255-21-1 Class 1
test EN 60255-21-1 10 Hz to 150 Hz: 1 g
20 sweep cycle in each axis
Relay non-energized
Shock response test IEC60255-21-2 Class 1
EN 60255-21-2 5 g, 11 ms duration
3 shocks in both directions of 3 axes
Relay energized
Shock withstand test IEC60255-21-2 Class 1
EN 60255-21-2 15 g, 11 ms duration
3 shocks in both directions of 3 axes
Relay non-energized
Bump test IEC60255-21-2 Class 1
10 g, 16 ms duration
1000 shocks in both directions of 3
axes
Relay non-energized
Seismic test IEC60255-21-3 Class 1
X-axis 1 Hz to 8/9 Hz: 7.5 mm
X-axis 8/9 Hz to 35 Hz :2 g
Y-axis 1 Hz to 8/9 Hz: 3.75 mm
Y-axis 8/9 Hz to 35 Hz :1 g
1 sweep cycle in each axis,
Relay energized
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Chapter 27 Hardware
Table 27-15 Environmental tests
Item Data
-10 °C to +55°C (Legibility of display may be
Recommended permanent operating temperature
impaired above +55 °C /+131 °F)
Storage and transport temperature limit -25°C to +70°C
Permissible humidity 95 % of relative humidity
6.5 IED design
Item Data
Case size 4U×1/2 19inch
Weight ≤ 5kg
6.6 CE certificate
Item Data
EN 61000-6-2 and EN61000-6-4 (EMC Council
EMC Directive
Directive 2004/108/EC)
Low voltage directive EN 60255-27 (Low-voltage directive 2006/95 EC).
235
Chapter 27 Appendix
Chapter 28 Appendix
About this chapter
This chapter describes the appendix.
236
Chapter 27 Appendix
1 General setting list
1.1 Setting list for CSC-211(F11)
Table 28-1 Logical linker

1. Rem WriteSet
2. Rem SwitchSetGr
3. Rem SwLogiLink
4. Func_OC1 Enable or disable the overcurrent stage 1
8. Func_EF1 Enable or disable the earth faulty stage 1
12. Func_SEF1 Enable or disable the sensitive earth faulty stage 1
13. Func_SEF2 Enable or disable the sensitive earth faulty stage 2
14. Func_SEF3 Enable or disable sensitive the earth faulty stage 3
15. Func_SEF4 Enable or disable sensitive the earth faulty stage 4
16. Func_NSOC1 Enable or disable the negative sequence overcurrent stage 1
20. Func_Theml OL Enable or disable the thermal over load protection
21. Func_UV1 Enable or disable the undervoltage stage 1
22. Func_UV2 Enable or disable the undervoltage stage 2
25. Func_OV Inv Enable or disable the overvoltage inverse stage
26. Func_3V01 Enable or disable the zero sequence overvoltage stage1
27. Func_3V02 Enable or disable the zero sequence overvoltage stage2
28. Func_3V0 Inv Enable or disable the zero sequence overvoltage inverse stage
29. Fun_NSOV Enable or disable the negative sequence overvoltage stage
30. Fun_UC Enable or disable the undercurrent stage
31. Fun_HF Enable or disable the high frequency stage
32. Fun_ROCOF Enable or disable the ratio of change of frequency stage
33. Func_LF LS Enable or disable the low frequency load shedding stage
34. Func_LV LS Enable or disable the low voltage load shedding stage
237
Chapter 27 Appendix

35. Func_OL LS Enable or disable the over load load shedding stage
36. Func_CBF Enable or disable the CB failure stage
37. Func_DZ Enable or disable the dead zone stage
38. Func_SOTF Enable or disable the switch on to faulty stage
39. Func_MC Enable or disable the manual close CB stage
40. Func_AR Enable or disable the auto reclose stage
41. Func_Sub GO-Trip1
44. Func_Sub B-BI1
45. Func_Sub B-BI2
46. Func_Sub B-BI3
47. Func_Sub B-BI4
48. Func_Sub B-BI5
Table 28-2 Commom Binary setting

1-On;0-Off.
2 Blk Fun_VT Fail 1/0 0
3 CC Faulty On 1/0 0
stage 1. 1-On;0-Off.
Second harmonic Blocking for
4 VT Fail On 1/0 0
overcurrent stage 1. 1-On;0-Off.
5 CT Fail On
6 Solid earthed
7 U4 for Ux
8 CB Unpower On
Table 28-3 Binary setting list

1. OC1 Dir On 1/0 0
1-On;0-Off.
Direction toward for overcurrent
2. OC1 Dir FWD 1/0 0
stage 1. 1-Forward; 0-Reverse.
3. OC1 V_ Blk On 1/0 0 Low voltage blocking for overcurrent
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Chapter 27 Appendix
4. OC1 2H_Blk On 1/0 0
5. OC2 Inv On
6. OC2 Dir On 1/0 0
1-On;0-Off.
7. OC2 Dir FWD 1/0 0
8. OC2 V_ Blk On 1/0 0
9. OC2 2H_Blk On 1/0 0
10. OC3 Inv On
11. OC3 Dir On 1/0 0
1-On;0-Off.
12. OC3 Dir FWD 1/0 0
13. OC3 V_ Blk On 1/0 0
14. OC3 2H_Blk On 1/0 0
15. OC4 Inv On
16. OC4 Dir On 1/0 0
1-On;0-Off.
17. OC4 Dir FWD 1/0 0
18. OC4 V_ Blk On 1/0 0
19. OC4 2H_Blk On 1/0 0
20. OC2 Trip On 1/0 0
21. OC3 Trip On 1/0 0
22. OC4 Trip On 1/0 0
23. EF1 Dir On 1/0 0
24. EF1 Dir FWD 1/0 0
25. EF1 2H_Blk On 1/0 0
26. EF2 Inv On 1/0 0
27. EF2 Dir On 1/0 0
28. EF2 Dir FWD 1/0 0
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Chapter 27 Appendix
29. EF2 2H_Blk On 1/0 0

30. EF3 Inv On 1/0 0
31. EF3 Dir On 1/0 0
32. EF3 Dir FWD 1/0 0
33. EF3 2H_Blk On 1/0 0
34. EF4 Inv On 1/0 0
35. EF4 Dir On 1/0 0
36. EF4 Dir FWD 1/0 0
37. EF4 2H_Blk On 1/0 0
38. EF U2/I2 Dir On 1/0 0
39. EF Chk I02/I01 1/0 0
40. EF 3I0 Calculated 1/0 0
41. EF 3U0 Calculated 1/0 0
42. UnBlk EF_CT Fail 1/0 0
43. EF2 Trip On 1/0 0
44. EF3 Trip On 1/0 0
45. EF4 Trip On 1/0 0
46. SEF1 Dir On 1/0 0
48. SEF2 Inv On 1/0 0
49. SEF2 Dir On 1/0 0
51. SEF3 Inv On 1/0 0
52. SEF3 Dir On 1/0 0
54. SEF4 Inv On 1/0 0
55. SEF4 Dir On 1/0 0
57. SEF Chk U0/I0 1/0 0
58. SEF 3U0 Calculated 1/0 0
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Chapter 27 Appendix
62. NSOC2 Inv On 1/0 0

65. NSOC2 Trip On 1/0 0
68. Therm OL Alarm On 1/0 0
69. UV Chk CB On 1/0 0
70. UV Chk 1Ph 1/0 0
71. UV Chk PE 1/0 0
72. UV1 Trip On 1/0 0
73. OV Chk PE 1/0 0
74. OV1 Trip On 1/0 0
75. OV Inv Trip On 1/0 0
76. 3U0 Calculated_3V0 1/0 0
77. 3V01 Trip On
78. 3V0 Inv Trip On 1/0 0
79. dF/dt On 1/0 0
80. dU/dt On 1/0 0
81. OLLS Chk V On 1/0 0
82. SOTF Chk CB On 1/0 0
83. SOTF Chk MC On 1/0 0
84. SOTF Chk 2H_Blk On 1/0 0
85. CBF 3I0 Calculate 1/0 0
86. CBF Chk 3I0/3I2 1/0 0
87. CBF T1 On 1/0 0
88. CBF T2 On 1/0 0
89. AR_Override On 1/0 0
90. AR_Syn check On 1/0 0
AR_EnergChkDLLB
91. 1/0 0
On
AR_EnergChkLLDB
92. 1/0 0
On
93. AR_EnergChkDLDB 1/0 0
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Chapter 27 Appendix
On
94. MC_Override On 1/0 0

95. MC_Syn check On 1/0 0
MC_EnergChkDLLB
96. 1/0 0
On
MC_EnergChkLLDB
97. 1/0 0
On
MC_EnergChkDLDB
98. 1/0 0
On
99. 3P Fault Blk AR 1/0 0
100. OC1 Init AR Off 1/0 0
104. EF1 Init AR Off 1/0 0
108. SEF1 Init AR Off 1/0 0
112. NSOC1 Init AR Off 1/0 0
116. ROCOF chk F On 1/0 0
117. ROCOF chk U On 1/0 0
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Chapter 27 Appendix
Table 28-4 Setting list

1. I_OC1 0.05~100 A
stage 1
2. T_OC1 0.00~100.00 s
for stage1
3. I_OC2 0.05~100 A
stage 2
4. T_OC2 0.00~100.00 s
for stage2
1:IEC NI
2: IEC VI
3: IEC EI
4: IEC LTI
5: ANSI MI
5. OC2 Inv CRV SEL 1~11 6: ANSI VI
7: ANSI EI
8:ANSI INV
9:ANSI SI
10:ANSI LI
11:ANSI DI
6. K_OC2 Inv 0.025~1.5
7. I_OC3 0.05~100 A
stage 3
8. T_OC3 0.00~100.00 s
for stage3
1:IEC NI
2: IEC VI
3: IEC EI
4: IEC LTI
5: ANSI MI
9. OC3 Inv CRV SEL 1~11 6: ANSI VI
7: ANSI EI
8:ANSI INV
9:ANSI SI
10:ANSI LI
11:ANSI DI
10. K_OC3 Inv 0.025~1.5
11. I_OC4 0.05~100 A
stage 4
12. T_OC4 0.00~100.00 s Overcurrent Time setting
243
Chapter 27 Appendix
for stage4
0: Defined by user
1:IEC NI
2: IEC VI
3: IEC EI
4: IEC LTI
5: ANSI MI
13. OC4 Inv CRV SEL 0~11
6: ANSI VI
7: ANSI EI
8:ANSI INV
9:ANSI SI
10:ANSI LI
11:ANSI DI
14. A_OC4 Inv 0.001~1000 s
15. P_OC4 Inv 0.01~10.00
Inverse characteristic
16. B_OC4 Inv 0.000~100.00 s
17. K_OC4 Inv 0.025~1.5
18. U_OC_UnBlk 1.00~120.0 V
Overcurrent.
19. U2_OC_UnBlk 1.00~120.0 V
20. Angle_OC 0.00~90.00 degree
directional element
21. I_2H_UnBlk 0.05~100 A
22. Ratio_I2/I1 0.07~0.50
23. T2H_Cross_Blk 0.00~100.0 s
24. 3I0_EF1 0.05~100 A
25. T_EF1 0.00~100.0 s
26. 3I0_EF2 0.05~100 A
27. T_EF2 0.00~100.0 s
28. EF2 Inv CRV SEL 1~11
29. K_EF2 Inv 0.025~1.5
30. 3I0_EF3 0.05~100 A
31. T_EF3 0.00~100.0 s
33. K_EF3 Inv 0.025~1.5

34. 3I0_EF4 0.05~100 A
35. T_EF4 0.00~100.0 s
244
Chapter 27 Appendix

37. A_EF4 Inv 0.001~1000
38. P_EF4 Inv 0.1~10
39. B_EF4 Inv 0.000~100
40. K_EF4 Inv 0.025~1.5
41. Angle_EF 0.00~90.0 °
42. I_2H_UnBlk_EF 0.05~100 A
43. 3I0_2H_UnBlk_EF 0.05~100 A
44. Ratio_I2/I1_EF 0.07~0.50
45. Ratio_I02/I01_EF 0.07~0.50
46. I_SEF1 0.05~100 A
47. T_SEF1 0.0~100 s
48. I_SEF2 0.05~100 A
49. T_SEF2 0.0~100 s
SEF2 Inv CRV
50.
SEL
51. K_SEF2 Inv
52. I_SEF3 0.05~100 A
53. T_SEF3 0.0~100 s
SEF3 Inv CRV
54. 1~11
SEL
55. K_SEF3 Inv 0.025~1.5
56. I_SEF4 0.05~100 A
57. T_SEF4 0.0~100 s
SEF4 Inv CRV
58. 0~11
SEL
59. A_SEF4 Inv 0.001~1000
60. P_SEF4 Inv 0.01~10
61. B_SEF4 Inv 0.000~100 s
62. K_SEF3 Inv 0.025~1.5
63. Angle_SEF 0.00~90.0 °
64. IsCOS_SEF 0.05~100 A
65. U_3V0_SEF 2~100 V
66. I2_NSOC1 0.05~100 A
245
Chapter 27 Appendix
67. T_NSOC1 0.00~100.0 s

68. I2_NSOC2 0.05~100 A
69. T_NSOC2 0.00~100.0 s
NSOC2 Inv CRV
70. 1~11
SEL
71. K_NSOC2 Inv 0.025~1.5
72. I2_NSOC3 0.05~100 A
73. T_NSOC3 0.00~100.0 s
NSOC3 Inv CRV
74. 1~11
SEL
75. K_NSOC3 Inv 0.025~1.5
76. I2_NSOC4 0.05~100 A
77. T_NSOC4 0.00~100.0 s
NSOC4 Inv CRV
78. 1~11
SEL
79. A_NSOC4 Inv 0.001~1000
80. P_NSOC4 Inv 0.01~10
81. B_NSOC4 Inv 0.000~100 s
82. K_NSOC4 Inv 0.025~1.5
83. I_Therm OL 0.10~10.00 A
84. T_Const Therm 6~9999 S
85. Ratio_Cool 0.1~10
86. Ratio_Alarm 0.5~1
87. U_UV1 5~150 V
88. T_UV1 0~120 s
89. U_UV2 5~150 V
90. T_UV2 0~120 s
91. I_Chk_UV 0.0~10 A
92. Dropout_UV 1.01~2
93. U_OV1 40~200 V
94. T_OV1 0~120 S
95. U_OV2 40~200 V
96. T_OV2 0~120 S
97. U_OV Inv 40~200 V
246
Chapter 27 Appendix
98. OV Inv CRV SEL 0~4

99. A_OV Inv 0.001~1000
100. P_OV Inv 0.01~10
101. B_OV Inv 0.000~100 s
102. K_OV Inv 0.025~1.5
103. Dropout_OV 0.90~0.99
104. U_3V01 2~100 V
105. T_3V01 0~120 s
106. U_3V02 2~100 V
107. T_3V02 0~120 s
108. U_3V0 Inv 2~100 V
109. 3V0 Inv CRV SEL 0~4
110. A_3V0 Inv 0.001~1000
111. P_3V0 Inv 0.01~10
112. B_3V0 Inv 0.000~100 s
113. K_3V0 Inv 0.025~1.5
114. U_Phase low 10~100 V
115. U_Phase up 40~100 V
116. U2_NSOV 2~100 V
117. T_NSOV 0~120 s
118. I_UC 0.1~25 A
119. T_UC 0~100 s
120. F_HF 50~65 Hz
121. T_HF 0.1~100.0 s
122. U_Block_HF 10~120 V
123. Df/dt_ROCOF 0.3~20 Hz/s
124. T_ROCOF 0.1~100 s
125. Hf_ROCOF 45~65 Hz
126. Lf_ROCOF 45~65 Hz
127. U_ROCOF 30~120 V
128. ROCOF Dir Model 1~3
129. F_LF LS 45~60 Hz
130. T_LF LS 0.1~100 s
247
Chapter 27 Appendix
131. U_LV LS 50~110 V

132. T_LV LS 0.1~100 s
133. I_OL LS 0.05~100 A
134. T_OL LS 0.1~100 s
135. dF/dt_LS 0.3~20 Hz/s
136. dU/dt_LS 2~200 V/s
137. U_Block_LS 10~120 V
138. I_Block_LS 0~10 A
139. CBF Logic Model 1~4
140. I_CBF 0.05~100 A
141. 3I0_CBF 0.05~100 A
142. I2_CBF 0.05~100 A
143. T1_CBF 0~100 s
144. T2_CBF 0~100 s
145. I_DZ 0.05~10 A
146. T_DZ 0~100 s
147. I_STUB 0.05~10 A
148. T_STUB 0~100 s
149. I_SOTF 0.05~10 A
150. 3I0_SOTF 0.05~10 A
151. T_SOTF Chk CB 0~100 s
152. T_MC Chk Fault 0~100 s
153. T_Syn Chk 0~60 s
154. T_MaxSynExt 0~60 s
155. T_MaxSynReq 0~60 s
156. Phase_UL 1~6
157. Angle_Syn Diff 1~80 °
158. U_Syn Diff 1~40 v
159. Freq_Syn Diff 0.02~2 Hz
160. Umin_Syn 10~100 V
161. Umax_Energ 20~130 V
162. T_3P AR1 0.05~100 s
163. T_3P AR2 0.05~100 s
248
Chapter 27 Appendix
164. T_3P AR3 0.05~100 s

165. T_3P AR4 0.05~100 s
166. NO.of AR shots 1~4
167. T_Reclaim 0.10~100 s
168. T_AR Reset 0.05~100 s
169. T_Max.CB Open 0.05~100 s
170. T_CB Unpower 0.1~100 s
171. T_CC Faulty 0.1~100.0 s
172. 3I0_I2_VT Fail 0.05~100 A
173. Upe_VT Fail 7~20 V
174. Upp_VT Fail 10~30 V
175. Upp_VT Normal 40~65 V
176. I_VT Fail 0.05~1.25 A
177. T_VT Fail 0.05~60 S
178. 3I0_CT Fail 0.05~10 A
179. T_CT Fail 0.1~15 s
1.2 Setting list for CSC-211(L11)
Table 28-5 Logical linker

1. Rem WriteSet
2. Rem SwitchSetGr
3. Rem SwLogiLink
4. Func_LF LS Enable or disable the low frequency load shedding
5. Func_LV LS Enable or disable the low voltage load shedding
6. Func_OL LS Enable or disable the over load load shedding
7. Func_LF LS1 Enable or disable the low frequency load shedding 1
11. Func_LV LS1 Enable or disable the low voltage load shedding stage1
15. Func_OL LS1 Enable or disable the over load load shedding stage 1
249
Chapter 27 Appendix

19. Func_ACC LF1&2 Enable or disable the low frequency load shedding stage 1&2
20. Func_ACC LF1&2&3 Enable or disable the low frequency load shedding stage 1&2&3
21. Func_ACC LV1&2 Enable or disable the low voltage load shedding stage 1&2
22. Func_ACC LV1&2&3 Enable or disable the low voltage cy load shedding stage 1&2&3
25. Func_Sub GO-Close
26. Func_Sub B-BI1
27. Func_Sub B-BI2
28. Func_Sub B-BI3
29. Func_Sub B-BI4
Table 28-6 Commom Binary setting

1. 1Ph V Connect 1/0 0
1-On;0-Off.
2. CC Faulty On 1/0 0
3. VT Fail On 1/0 0
4. Solid earthed 1/0 0
5. CT Fail On

118. LF Joint Cut On 1/0 0
1-On;0-Off.
119. OC1 Dir FWD 1/0 0
250
Chapter 27 Appendix
Table 28-8 Setting list
No. Name Scope Unit Note
1 F_Startup 45.00~60 Hz
2 F_LF LS1 45.00~60 Hz
3 T_LF LS1 0.100~100.0 s
4 F_LF LS2 45.00~60 Hz
5 T_LF LS2 0.100~100.0 s
6 F_LF LS3 45.00~60 Hz
7 T_LF LS3 0.100~100.0 s
8 F_LF LS4 45.00~60 Hz
9 T_LF LS4 0.100~100.0 s
10 df/dt_ACC1 0.300~20 Hz/s
11 Tf_ACC1 0.100~100.0 s
12 df/dt_ACC2 0.300~20 Hz/s
13 Tf_ACC2 0.100~100.0 s
14 df/dt_LF LS 0.300~20 Hz/s
15 U_Startup 30.00~110 V
16 U_LV LS1 30.00~110 V
17 T_LV LS1 0.100~100.0 s
18 U_LV LS2 30.00~110 V
19 T_LV LS2 0.100~100.0 s
20 U_LV LS3 30.00~110 V
21 T_LV LS3 0.100~100.0 s
22 U_LV LS4 30.00~110 V
23 T_LV LS4 0.100~100.0 s
24 du/dt_ACC1 1.00~200.0 V/s
25 Tv_ACC1 0.100~100.0 s
26 du/dt_ACC2 1.00~200.0 V/s
27 Tv_ACC2 0.100~100.0 s
28 du/dt_LV LS 1.00~200.0 V/s
251
Chapter 27 Appendix
29 I_Startup 30.00~110 A
30 I_OL LS1 30.00~110 A
31 T_OL LS1 0.100~100.0 s
32 I_OL LS2 30.00~110 A
33 T_OL LS2 0.100~100.0 s
34 I_OL LS3 30.00~110 A
35 T_OL LS3 0.100~100.0 s
36 I_OL LS4 30.00~110 A
37 T_OL LS4 0.100~100.0 s
38 df/dt_OL LS 0.3～20.0 Hz/s
39 du/dt_OL LS 1.00~200.0 V/s
40 U_Chk 10.00~120.00 V
41 I_Chk 0.00~20.00 A
42 T_CB Faulty 0.100～100.0 S
43 3I0_VT Fail 0.050~0.25 A

44 Upe_VT Fail 7.0～20.0 V
45 Upp_VT Fai 10～30.0 V
46 Upp_VT Normal 40～120.0 V
47 I_VT Fail 0.050～0.250 A
48 T_VT Fai 0.10～100.0 S
49 3I0_CT Fail 0.050~2.000 A
50 CT Fail Time 0.100~15.00 S
51 T_CC Faulty 0.100~100.0 S
No. Name Mode Note

1. 1Ph V Connect 0，1
2. CC Faulty On 0，1
3. VT Fail On 0，1
4. Solid earthed 0，1
5. CT Fail On 0，1
6. Func_LF LS On 0，1
252
Chapter 27 Appendix
No. Name Mode Note

7. Func_LV LS On 0，1
8. Func_OL LS On 0，1
9. LF Joint Cut On 0，1
10. Trend BLKF On
11. LV Joint Cut On 0，1
12. OL Joint Cut On 0，1
13. ACC LF1&2 On 0，1
14. ACC LF1&2&3 On 0，1
15. ACC LV1&2 On 0，1
16. ACC LV1&2&3 On 0，1
17. Trend BLKF On 0，1
18. Trend BLKV On 0，1
19. df/dt_LFLS On 0，1
20. du/dt_LVLS On 0，1
21. df/dt_OLLS On 0，1 0-Before，
22. du/dt_OLLS On 0，1 1-After
23. OLLS Chk V On 0，1
24. LF Joint Cut On 0，1
25. LV Joint Cut On 0，1
26. OL Joint Cut On 0，1
27. ACC LF1&2 On 0，1
28. ACC LF1&2&3 On 0，1
29. ACC LV1&2 On 0，1
30. ACC LV1&2&3 On 0，1
Table 28-10 Equipment Parament
No. Name Scope Unit Note
1 Phase CT Pri 0.0～8000 A

2 Phase CT Sec 1.0～5.0 A 1A or 5A
3 I0 CT Pri 0.0～8000 A
4 I0 CT Sec 1.0～5.0 A
5 Mea CT Pri 0.0～8000 A
6 Mea CT Sec 1.0～5.0 A
7 Phase VT Pri 0～110.0 kV
8 Phase VT Sec 100 V
9 Ux VT Pri 0～110.0 kV
10 Ux VT Sec 1～100 V
253
Chapter 27 Appendix
2 General report list
2.1 Event report list
Table 28-11 Event report list for CSC-211
No. Abbr.(LCD Display) Description

1 Startup Protection startup
2 OC1 Trip Overcurrent protection stage 1 issues trip command
3 OC1 PhA Element Trip Overcurrent protection of phase A stage 1 issues trip command
4 OC1 PhB Element Trip Overcurrent protection of phase B stage 1 issues trip command
5 OC1 PhC Element Trip Overcurrent protection of phase C stage 1 issues trip command
6 OC2 Trip Overcurrent protection stage 2 issues trip command
10 OC3 Trip Overcurrent protection stage3 issues trip command
14 OC4 Trip Overcurrent protection inverse stage 4 issues trip command
18 EF1 Trip Earth fault protection stage 1 issues trip command
19 EF2 Trip Earth fault protection stage 2 issues trip command
20 EF3Trip Earth fault protection inverse stage issues trip command
21 EF3Trip Earth fault protection inverse stage issues trip command
22 SEF1 Trip Sensitive earth fault protection stage 1 issues trip command
26 Negative sequence current protection stage 1 issues trip
NSOC1 Trip
command
NSOC2 Trip
command
NSOC3 Trip
command
NSOC4 Trip
command
30 UV1 Trip Undervoltage protection stage 1 issues trip command
254
Chapter 27 Appendix

31 UV2 Trip Undervoltage protection stage 2 issues trip command
32 OV1 Trip Overvoltage protection stage 1 issues trip command
33 OV2 Trip Overvoltage protection stage 2 issues trip command
34 OV Inv Trip Overvoltage protection inverse stage issues trip command
35 3V01 Trip Displacement voltage protection stage 1 issues trip command
36 3V02 Trip Displacement voltage protection stage 2 issues trip command
37 Displacement voltage protection inverse stage issues trip
3V0 Inv Trip
command
38 NSOV Trip Negative sequence over voltage protection trip command
39 UC Trip Under current protection trip command
40 HF Trip High frequency protection trip command
41 ROCOF Trip Rate of change of frequency trip command
42 LF LS Shedding Trip Low frequency load shedding function issues trip command
43 LV LS Shedding Trip Low voltage load shedding function issues trip command
44 OL LS Shedding Trip Overload load shedding function issues trip command
45 Therm OL Trip Thermal overload protection issues trip command
46 Syn Ok Answer to AR to check synchronization successfully
47 Syn Failure Fail to check synchronization in limited duration
48 AR Progressing AR is initiated by internal or external function
49 1st Reclose The first shot reclosing
50 2nd Reclose The second shot reclosing
51 3rd Reclose The third shot reclosing
52 4th Reclose The fourth shot reclosing
53 AR Success AR successful
54 AR Failure AR unsuccessful
55 Faulty CBF Initiate CBF function is initiated by faulty
56 CBF1 Trip The first stage CBF issues trip command
57 CBF2 Trip The second stage CBF issues trip command
58 Faulty DZ Initiate DZ function is initiated by faulty
59 DZ Trip The dead zone function issues trip command
60 Sub-GO CB Trip Sub-GO CB Trip command
61 Sub-GO CB Close Sub-GO CB Close command
62 STUB Trip STUB protection trip command
63 SOTF OC Trip Overcurrent of switch on to faulty protection trip command
64 SOTF EF Trip Earth faulty of switch on to faulty protection trip command
65 Event Report1 The event report defined by user
255
Chapter 27 Appendix
2.2 Alarm report list
Two kinds of alarm report are included in the IED, which are shown in the
following table:
 Alarm I is severe alarm. When alarm I happens, the alarm LED on the
front panel of the IED will flash, all of protection function will be out of
service and the trip power of protection will be blocked by the IED.
 Alarm II is other alarm. When alarm II happens, the alarm LED on the
front panel of the IED will flash (except “BI Set SetGr2” and “BI Set
SetGr1”), and will not block the trip power of protection.
Table 28-12 Alarm I list

1 AD Error AD is abnormal
2 BO Abnormal Binary output is abnormal
3 EPROM Error EPROM is abnormal
4 Flash Error Flash is abnormal
5 Invalid SetGr Pointer of setting group is error
6 Logic Scheme ERR Logic file and CPU file not cooperate
7 RAM Error RAM is abnormal
8 Setting Chk ERR Setting value is error
9 Zero Offset Zero deviation is out of limitation
Table 28-13 Alarm II list for CSC-211(F11)

1 OC2 Alarm Overcurrent protection stage 2 issues alarm command
4 EF2 Alarm Earth faulty protection stage 2 issues alarm command
5 EF3 Alarm Earth faulty protection stage 3 issues alarm command
6 EF4Alarm Earth faulty protection stage 4 issues alarm command
Senstive earth faulty protection stage 2 issues alarm
7 SEF2 Alarm
command
8 SEF3 Alarm
command
9 SEF4 Alarm
command
10 NSOC2 Alarm Negative sequence overcurrent protection stage 2 issues
256
Chapter 27 Appendix

alarm command
Negative sequence overcurrent protection stage 3 issues
11 NSOC3 Alarm
alarm command
Negative sequence overcurrent protection stage 4 issues
12 NSOC4 Alarm
alarm command
13 Theml OL Alarm Thermal overload protection issues alarm command
14 UV1 Alarm Undervoltage protection stage 1 issues an alarm signal
15 OV1 Alarm Overvoltage protection stage 1 issues an alarm signal
16 OC Inv Alarm Overcurrent protection inverse stage issues an alarm signal
Displacement voltage protection stage 1 issues an alarm
17 3V01 Alarm
signal
Displacement voltage protection inverse stage issues an
18 3V0 Inv Alarm
alarm signal
19 Ph-A Vol Grounded Phase A is grounded
20 Ph-B Vol Grounded Phase B is grounded
21 Ph-C Vol Grounded Phase C is grounded
22 VT Fail VT failure in circuit of voltage transformer
23 Ux VT Fail VT failure in circuit of the forth voltage transformer
24 CC Faulty Both the “TWJ” and “HWJ” are active or inactive
25 CB Not Ready BI of CB Not ready is active to indicate CB is not ready
26 Trip Fail Trip command is issued lasting for more than 9s
27 Syn Request Syn is initiated
28 Syn Ang fail Angle difference checking fail
29 Syn Vdiff fail Voltage difference checking fail
30 Syn Fdiff fail Frequency difference checking fail
31 OC Inrush Blk Overcurrent protection is block by Inrush
32 EF Inrush Blk Earth faulty protection is block by Inrush
33 CT Fail Failure in circuit of current transformer
34 MC BI Error The BI of MC is active lasting for over than10s
35 Ext CBF Initiate CBF function is initiated by BI
36 Ext DZ Initiate CBF function is initiated by BI
37 SOTF Inrush Blk SOTF is block by Inrush
38 AR Blk AR is block
39 Alarm Report1 The alarm report defined by user
257
Chapter 27 Appendix
3 Typical connection
A. For incoming or outgoing feeder protection or line backup
protection
A
B
C
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08 IN
Figure 28-1 Application of feeder protection to measure three phase and earth currents
A
B
C
AIM2
U01
UA
U02
UB
U03
UC
U04
UN
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08 IN
Figure 28-2 Application of feeder protection to measure three phase and earth currents and
three phase voltages (bus side)
258
Chapter 27 Appendix
A
B
C
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08 IN
AIM2
U01
UA
U02
UB
U03
UC
U04
UN
three phase voltages (line side)
A
B
C
AIM2
U01
UA
U02
UB
U03
UC
U04
UN
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08 IN
259
Chapter 27 Appendix
single phase voltage (Ph-Ph) (bus side)
A
B
C
AIM2
U01
UA
U02
UB
U03
UC
U04
UN
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08 IN
single phase voltage (Ph-E) (bus side)
A
B
C
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08 IN
AIM1
I01
*
I1
I02
260
Chapter 27 Appendix
Figure 28-6 Application of feeder protection to measure three phase currents, earth current,
and sensitive earth current
A
B
C
AIM2
U01
UA
U02
UB
U03
UC
U04
UN
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08
IN
AIM1
I01
*
I1
I02
Figure 28-7 Application of feeder protection to measure three phase currents, earth current
and sensitive earth current, and three phase voltages (bus side)
261
Chapter 27 Appendix
A
B
C
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08 IN
AIM2
U01
UA
U02
UB
U03
UC
U04
UN
AIM1
* I01
I1
I02
and sensitive earth current, and three phase voltages (line side)
262
Chapter 27 Appendix
A
B
C
AIM2
U01
UA
U02
UB
U03
UC
U04
UN
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08 IN
AIM1
* I01
I1
I02
and sensitive earth current, and single phase voltage (Ph-Ph) (bus side)
263
Chapter 27 Appendix
A
B
C
AIM2
U01
UA
U02
UB
U03
UC
U04
UN
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08 IN
AIM1
* I01
I1
I02
Figure 28-10 Application of feeder protection to measure three phase currents, earth
current, and sensitive earth current, and single phase voltage (Ph-E) (bus side)
264
Chapter 27 Appendix
B. For transformer backup protection

A
B
C
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08 IN
AIM1
* I01
I02
I1
Figure 28-11 Application of transformer backup protection to measure three phase

currents, earth current, and neutral current
A
B
C
AIM2
U01
UA
U02
UB
U03
UC
U04
UN
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08 IN
AIM1
* I01
I02 I1

currents, earth current and neutral current, and three phase voltages (bus side)
265
Chapter 27 Appendix
A
B
C
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08 IN
AIM2
U01
UA
U02
UB
U03
UC
U04
UN
AIM1
* I01
I02 I1

currents, earth current and neutral current, and three phase voltages (line side)
A
B
C
AIM2
U01
UA
U02
UB
U03
UC
U04
UN
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08 IN
AIM1
* I01
I02 I1

currents, earth current and neutral current, and single phase voltage (Ph-Ph) (bus side)
266
Chapter 27 Appendix
A
B
C
AIM2
U01
UA
U02
UB
U03
UC
U04
UN
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08 IN
AIM1
* I01
I02 I1

currents, earth current and neutral current, and single phase voltage (Ph-E) (bus side)
C For synch-check function
A
B
C
A
B
C
AIM2
U05
U4
U06
U01
UA
U02
UB
U03
UC
U04
UN
Figure 28-16 Typical connection for synch-check on bus coupler applications
267
Chapter 27 Appendix
A
B
C
AIM2
U05
U4
U06
U01
UA
U02
UB
U03
UC
U04
UN
AIM2
I01
I02 IA
I03
I04 IB
* * * I05
I06 IC
I07
I08 IN
Figure 28-17 Typical connection for synch-check and feeder current protection
268
Chapter 27 Appendix
C. For capacitor bank protection
A
B
C
Capacitor bank AIM1

* I03
I04 IC1
* I05
I06
IC2
* I07
I08 IC3
Figure 28-18 Typical connection for capacitor bank unbalanced current protection with
three current inputs
A
B
C
Capacitor bank AIM1

U03
U04 UC1
U05
U06 UC2
U07
U08 UC3
Figure 28-19 Typical connection for capacitor bank unbalanced voltage protection with
three voltage inputs
269
Chapter 27 Appendix
A
B
C
Capacitor bank AIM1

I03
I04 IC1
*
I05
I06
IC2
I07
I08 IC3
Figure 28-20 Typical connection for capacitor bank unbalanced current protection with one
current input
A
B
C
AIM1
Capacitor bank U03
U04 UC1
U05
U06 UC2
U07
U08 UC3
Figure 28-21 Typical connection for capacitor bank unbalanced voltage protection with one
voltage input
270
Chapter 27 Appendix
A A
B
B C
C
I1
I1 I2
I3
Figure 28-22 Unbalanced current Figure 28-25 Three unbalanced currents

detection for grounded capacitor bank detection for capacitor bank
A A
B B
C C
U1
I1
Figure 28-23 Neutral current differential Figure-26 Neutral voltage unbalanced

protection for grounded Split-Wye protection for unrounded Wye capacitor
capacitor bank bank
A A
B
B C
C
U1
I1
Figure 28-24 Neutral current protection Figure 28-27 Neutral voltage unbalanced
for ungrounded split-Wye capacitor bank detection for ungrounded split-Wye
capacitor bank
271
Chapter 27 Appendix
A A
B
C B
C
U1
U1
Figure 28-28 Summation of Intermediate Figure 28-30 Neutral voltage protection

tap-point voltage for grounded Wye for ungrounded split-Wye capacitor bank
capacitor bank
A
A B
B C
C
U1 U1
U2
U3
Figure 28-29 Neutral voltage unbalance
Figure 28-31 Three unbalanced voltages
detection by 3VTs for unrounded Wye
detection for Capacitor Bank
capacitor bank
272
Chapter 27 Appendix
D. For Load shedding function
CSC-211 CSC-211 CSC-211 CSC-211 CSC-211
Figure 28-32 Typical connection for load shedding function
273
Chapter 27 Appendix
4 Time inverse characteristic

4.1 11 kinds of IEC and ANSI inverse time
characteristic curves
In the setting, if the curve number is set for inverse time characteristic,
which is corresponding to the characteristic curve in the following tabel.
Both IEC and ANSI based standard curves are available.
Table 28-14 11 kinds of IEC and ANSI inverse time characteristic
Curves No. IDMTL Curves Parameter A Parameter P Parameter B
1 IEC INV. 0.14 0.02 0
2 IEC VERY INV. 13.5 1.0 0
3 IEC EXTERMELY INV. 80.0 2.0 0
4 IEC LONG INV. 120.0 1.0 0
5 ANSI INV. 8.9341 2.0938 0.17966
6 ANSI SHORT INV. 0.2663 1.2969 0.03393
7 ANSI LONG INV. 5.6143 1 2.18592
8 ANSI MODERATELY
0.0103 0.02 0.0228
INV.
9 ANSI VERY INV. 3.922 2.0 0.0982
10 ANSI EXTERMELY INV. 5.64 2.0 0.02434
11 ANSI DEFINITE INV. 0.4797 1.5625 0.21359
4.2 User defined characteristic

For the inverse time characteristic, also can be set as user defined
characteristic if the setting is set to 12.
= ( )T
()
274
Chapter 27 Appendix
where:
A: Time factor for inverse time stage
B: Delay time for inverse time stage
P: index for inverse time stage
T: Set time multiplier for step n
275
Chapter 27 Appendix
4.3 Typical inverse curves

The typical 11 curves where K=0.025 is shown in the following figure:
IEC & ANSI Curve

(K=0.025)
10
0.1 IEC INV.

Time in Seconds
IEC VERY INV.

IEC EXTE INV.
IEC LONG INV.
ANSI INV.
ANSI SHORT INV.
ANSI LONG INV.
ANSI MODE INV.
0.01
ANSI VERY INV.
ANSI EXTE INV.
ANSI DEFI INV.
0.001
0.0001
1 10 100
Id/I_Inv
Figure 28-33 Typical curves for IEC and ANSI standard
276
Chapter 27 Appendix
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the IEC INV. Curve in the
following figure:
IEC INV. Curve

10
1
Time in Seconds
K=0.025
K=0.2
K=0.5
K=1.0
K=1.25
0.1
0.01
1 10 100
I/Is
Figure 28-34 Typical IEC INV. Curves
277
Chapter 27 Appendix
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the IEC VERY INV. Curve in
the following figure:
IEC VERY INV. Curve

10
1
Time in Seconds
K=0.025
0.1 K=0.2
K=0.5
K=1
K=1.5
0.01
0.001
1 10 100
I/Is
Figure 28-35 Typical IEC VERY INV. Curves
278
Chapter 27 Appendix
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the IEC EXTREMELY INV.
Curve in the following figure:
IEC EXTREMELY INV. Curve

10
1
Time in Seconds
K=0.025
0.1 K=0.2
K=0.5
K=1
K=1.5
0.01
0.001
1 10 100
I/Is
Figure 28-36 Typical IEC EXTREMELY INV. Curve
279
Chapter 27 Appendix
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the IEC LONG INV. Curve in
the following figure:
IEC LONG INV. Curve

10
1
Time in Seconds
K=0.025
K=0.2
K=0.5
K=1
K=1.5
0.1
0.01
1 10 100
I/Is
Figure 28-37 Typical IEC LONG INV. Curve
280
Chapter 27 Appendix
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ASNI INV. Curve in the
following figure:
ANSI INV. Curve
10
1
Time in Seconds
K=0.025
0.1 K=0.2
K=0.5
K=1
K=1.5
0.01
0.001
1 10 100
I/Is
Figure 28-38 Typical ANSI INV. Curves
281
Chapter 27 Appendix
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSI SHOTR INV.
ANSI SHORT INV.Curve

10
0.1
Time in Seconds
K=0.025
K=0.2
K=0.5
K=1
K=1.5
0.01
0.001
1 10 100
0.0001
I/Is
Figure 28-39 Typical ANSI SHORT INV. Curves
282
Chapter 27 Appendix
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSI LONG INV. Curve
in the following figure:
ANSI LONG INV. Curve

10
1
Time in Seconds
K=0.025
K=0.2
K=0.5
K=1
K=1.5
0.1
0.01
1 10 100
I/Is
Figure 28-40 Typical ANSI LONG INV. Curves
283
Chapter 27 Appendix
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSI MODETATELY INV.
ANSI MODERATELY INV. Curve

10
1
Time in Seconds
K=0.025
0.1 K=0.2
K=0.5
K=1
K=1.5
0.01
0.001
1 10 100
I/Is
Figure 28-41 Typical ANSI MODETATELY INV. Curve
284
Chapter 27 Appendix
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSIVERY INV. Curve
in the following figure:
ANSI VERY INV. Curve

10
1
Time in Seconds
K=0.025
0.1 K=0.2
K=0.5
K=1
K=1.5
0.01
0.001
1 10 100
I/Is
Figure 28-42 Typical ANSI VERY INV. Curves
285
Chapter 27 Appendix
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSI EXTREMELY INV.
ANSI EXTREMELY INV. Curve

10
0.1
Time in Seconds
K=0.025
K=0.2
K=0.5
K=1
0.01
K=1.5
0.001
1 10 100
0.0001
I/Is
Figure 28-43 Typical ANSI EXTREMELY INV. Curves
286
Chapter 27 Appendix
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSI DEFINITE INV.
ANSI DEFINITE INV. Curve

10
1
Time in Seconds
K=0.025
0.1 K=0.2
K=0.5
K=1
K=1.5
0.01
0.001
1 10 100
I/Is
Figure 28-44 Typical ANSI DEFINITE INV. Curves
287
Chapter 27 Appendix
5 CT Requirement
5.1 Overview
In practice, the conventional magnetic- core current transformer (hereinafter
as referred CT) is not able to transform the current signal accurately in whole
fault period of all possible faults because of manufactured cost and
installation space limited. CT Saturation will cause distortion of the current
signal and can result in a failure to operate or cause unwanted operations of
some functions. Although more and more protection IEDs have been
designed to permit CT saturation with maintained correct operation, the
performance of protection IED is still depended on the correct selection of CT.
5.2 Current transformer classification

The conventional CTs are usually manufactured in accordance with the
standard, IEC 60044, ANSI / IEEE C57.13, ANSI / IEEE C37.110 or other
comparable standards, which CTs are specified in different protection class.
Currently, the CT for protection are classified according to functional

performance as follows:
 Class P CT
Accuracy limit defined by composite error with steady symmetric primary

current. No limit for remanent flux.
 Class PR CT
CT with limited remanence factor for which, in some cased, a value of the
secondary loop time constant and/or a limiting value of the winding
resistance may also be specified.
 Class PX CT
Low leakage reactance for which knowledge of the transformer

secondary excitation characteristic, secondary winding resistance,
secondary burden resistance and turns ratio is sufficient to assess its
performance in relation to the protective relay system with which it is to
be used.
 Class TPS CT
Low leakage flux current transient transformer for which performance is

defined by the secondary excitation characteristics and turns ratio error
limits. No limit for remanent flux
 Class TPX CT
288
Chapter 27 Appendix
Accuracy limit defined by peak instantaneous error during specified

transient duty cycle. No limit for remanent flux.
 Class TPY CT
Accuracy limit defined by peak instantaneous error during specified

transient duty cycle. Remanent flux not to exceed 10% of the saturation
flux..
 Class TPZ CT
Accuracy limit defined by peak instantaneous alternating current

component error during single energization with maximum d.c. offset at
specified secondary loop time constant. No requirements for d.c.
component error limit. Remanent flux to be practically negligible.
 TPE class CT (TPE represents transient protection and electronic type

CT)
5.3 Abbreviations (according to IEC 60044-1, -6, as

defined)
Abbrev. Description
Esl Rated secondary limiting e.m.f
Eal Rated equivalent limiting secondary e.m.f
Ek Rated knee point e.m.f
Uk Knee point voltage (r.m.s.)
Kalf Accuracy limit factor
Kssc Rated symmetrical short-circuit current factor
K’ssc Effective symmetrical short-circuit current factor
K”ssc based on different Ipcf
Kpcf Protective checking factor
Ks Specified transient factor
Kx Dimensioning factor
Ktd Transient dimensioning factor
Ipn Rated primary current
Isn Rated secondary current
Ipsc Rated primary short-circuit current
Ipcf protective checking current
Isscmax Maximum symmetrical short-circuit current
Rct Secondary winding d.c. resistance at 75 °C /
167 °F (or other specified temperature)
Rb Rated resistive burden
R’b = Rlead + Rrelay = actual connected resistive
burden
Rs Total resistance of the secondary circuit,
289
Chapter 27 Appendix
inclusive of the secondary winding resistance

corrected to 75℃, unless otherwise specified,
and inclusive of all external burden connected.
Rlead Wire loop resistance
Zbn Rated relay burden
Zb Actual relay burden
Tp Specified primary time constant
Ts Secondary loop time constant
5.4 General current transformer requirements

5.4.1 Protective checking current
The current error of CT should be within the accuracy limit required at

specified fault current.
To verify the CT accuracy performance, Ipcf, primary protective checking

current, should be chose properly and carefully.
For different protections, Ipcf is the selected fault current in proper fault
position of the corresponding fault, which will flow through the verified CT.
To guarantee the reliability of protection relay, Ipcf should be the maximum

fault current at internal fault. E.g. maximum primary three phase short-circuit
fault current or single phase earth fault current depended on system
sequence impedance, in different positions.
Moreover, to guarantee the security of protection relay, Ipcf should be the

maximum fault current at external fault.
Lastbut not least, Ipcf calculation should be based on the future possible
system power capacity
Kpcf, protective checking factor, is always used to verified the CT

performance
𝐼
=
𝐼
To reduce the influence of transient state, Kalf,Accuracy limit factor of CT,

should be larger than the following requirement
[ 𝑡 𝑑 ]
>
[ 𝑡 𝑑 ]
Ks, Specified transient factor, should be decided based on actual operation

state and operation experiences by user.
290
Chapter 27 Appendix
5.4.2 CT class
The selected CT should guarantee that the error is within the required
accuracy limit at steady symmetric short circuit current. The influence of short
circuit current DC component and remanence should be considered, based
on extent of system transient influence, protection function characteristic,
consequence of transient saturation and actual operating experience. To fulfill
the requirement on a specified time to saturation, the rated equivalent
secondary e.m.f of CTs must higher than the required maximum equivalent
secondary e.m.f that is calculated based on actual application.
For the CTs applied to transmission line protection, transformer differential

protection with 330kV voltage level and above, and 300MW and above
generator-transformer set differential protection, the power system time
constant is so large that the CT is easy to saturate severely due to system
transient state. To prevent the CT from saturation at actual duty cycle, TP
class CT is preferred.
For TPS class CT, Eal (rated equivalent secondary limiting e.m.f) is generally
determined as follows:
= 𝐼 ( 𝑡 )
Where
Ks: Specified transient factor
Kssc: Rated symmetrical short-circuit current factor
For TPX, TPY and TPZ class CT, Eal (rated equivalent secondary limiting
e.m.f) is generally determined as follows:
= 𝑡𝑑 𝐼 ( 𝑡 )
Where
Ktd: Rated transient dimensioning factor
Considering at short circuit current with 100% offset
For C-t-O duty cycle,

ωTp Ts t t
K td = (e TP −e Ts ) 1
Tp − Ts
t: duration of one duty cycle;
For C-t’-O-tfr-C-t”-O duty cycle,
291
Chapter 27 Appendix
ωTp Ts t′ t′ tfr +t′ ωTp Ts t" t"

K td = [ (e TP −e Ts )] e Ts [ (e TP −e Ts )] 1
Tp − Ts Tp − Ts
t’: duration of first duty cycle;
t”: duration of second duty cycle;
tfr: duration between two duty cycle;
For the CTs applied to 110 - 220kV voltage level transmission line protection,
110 - 220kV voltage level transformer differential protection, 100-200MW
generator-transformer set differential protection, and large capacity motor
differential protection, the influence of system transient state to CT is so less
that the CT selection is based on system steady fault state mainly, and leave
proper margin to tolerate the negative effect of possible transient state.
Therefore, P, PR, PX class CT can be always applied.
For P class and PR class CT, Esl (the rated secondary limited e.m.f) is
generally determined as follows:
= 𝐼 ( 𝑡 )
Kalf: Accuracy limit factor
For PX class CT, Ek (rated knee point e.m.f) is generally determined as

follows:
= 𝐼 ( 𝑡 )
Kx: Demensioning factor
For the CTs applied to protection for110kV voltage level and below system,
the CT should be selected based on system steady fault state condition. P
class CT is always applied.
5.4.3 Accuracy class
The CT accuracy class should guarantee that the protection relay applied is
able to operate correctly even at a very sensitive setting, e.g. for a sensitive
residual overcurrent protection. Generally, the current transformer should
have an accuracy class, which have an current error at rated primary current,
that is less than ±1% (e.g. class 5P).
If current transformers with less accuracy are used it is advisable to check the
actual unwanted residual current during the commissioning.
292
Chapter 27 Appendix
5.4.4 Ratio of CT
The current transformer ratio is mainly selected based on power system data
like e.g. maximum load. However, it should be verified that the current to the
protection is higher than the minimum operating value for all faults that are to
be detected with the selected CT ratio. The minimum operating current is
different for different functions and settable normally. So each function should
be checked separately.
5.4.5 Rated secondary current
There are 2 standard rated secondary currents, 1A or 5A. Generally, 1 A

should be preferred, particularly in HV and EHV stations, to reduce the
burden of the CT secondary circuit. Because 5A rated CTs, i.e. I 2R is 25x
compared to only 1x for a 1A CT. However, in some cases to reduce the CT
secondary circuit open voltage, 5A can be applied.
5.4.6 Secondary burden
Too high flux will result in CT saturation. The secondary e.m.f is directly
proportional to linked flux. To feed rated secondary current, CT need to
generate enough secondary e.m.f to feed the secondary burden.
Consequently, Higher secondary burden, need Higher secondary e.m.f, and
then closer to saturation. So the actual secondary burden R’b must be less
than the rated secondary burden Rb of applied CT, presented
Rb > R’b
The CT actual secondary burden R’b consists of wiring loop resistance Rlead
and the actual relay burdens Zb in whole secondary circuit, which is
calculated by following equation
R’b = Rlead + Zb
The rated relay burden, Zbn, is calculated as below:
= 2
𝐼
Where
Sr: the burden of IED current input channel per phase, in VA;
For earth faults, the loop includes both phase and neutral wire, normally twice
the resistance of the single secondary wire. For three-phase faults the neutral
current is zero and it is just necessary to consider the resistance up to the
293
Chapter 27 Appendix
point where the phase wires are connected to the common neutral wire. The
most common practice is to use four wires secondary cables so it normally is
sufficient to consider just a single secondary wire for the three-phase case.
In isolated or high impedance earthed systems the phase-to-earth fault is not

the considered dimensioning case and therefore the resistance of the single
secondary wire always can be used in the calculation, for this case.
5.5 Rated equivalent secondary e.m.f requirements

To guarantee correct operation, the current transformers (CTs) must be able
to correctly reproduce the current for a minimum time before the CT will begin
to saturate.
5.5.1 Definite time overcurrent protection and earth fault
protection
For TPY CT,
Kssc should be satisfied following requirement:
> { , " , }
Where
𝐼
=
𝐼
𝐼"
" =
𝐼
I’pcf: Maximum primary fundamental frequency current at close-in

forward and reverse faults (A)
I”pcf: Maximum applied operating setting value (A)
Considering auto-reclosing operation, Eal should meet the following

requirement, at C-O-C-O duty cycle
> 𝑡𝑑 𝐼 ( 𝑡 )
Where
K’td: Recommended transient dimensioning factor for verification, 1.2

recommended
For P Class and PR class CT,
Kalf should be satisfied following requirement:
294
Chapter 27 Appendix
[ 𝑡 ]
>
[ 𝑡 ]
Where
= { , " , }
𝐼
=
𝐼
𝐼"
" =
𝐼
I’pcf: Maximum primary fundamental frequency current at close-in

forward and reverse faults (A)
I”pcf: Maximum applied operating setting value (A)
Esl can be verified as below:
> = 𝐼 [ 𝑡 ]
Where
Ks: Specified transient factor, 2 recommended
For PX class CT,
Ek should be verified based on below equation.
> = 𝐼 [ 𝑡 ]
Where
5.5.2 Inverse time overcurrent protection and earth fault
protection
For TPY CT,
Kssc should be satisfied following requirement:
>
Where
𝐼
=
𝐼
I’pcf: Maximum applied primary startup current setting value (A)
Considering auto-reclosing operation, Eal should meet the following

requirement, at C-O duty cycle
> 𝑡𝑑 𝐼 ( 𝑡 )
295
Chapter 27 Appendix
Where
K’td: Recommended transient dimensioning factor for verification, 1.2

recommended
For P Class and PR class CT,
Kalf should be satisfied following requirement:
[ 𝑡 ]
>
[ 𝑡 ]
Where
𝐼
=
𝐼
I’pcf: Maximum applied primary startup current setting value (A)
Esl can be verified as below:
> = 𝐼 [ 𝑡 ]
Where
For PX class CT,
Ek should be verified based on below equation.
> = 𝐼 [ 𝑡 ]
Where
296

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CSC-211

Multifunction Protection IED

Tel: +86 10 62962554, +86 10 62961515 ext. 8998

 Information on how to configure the IED scope and a description of the

 Instructions for mounting and commissioning;

 Compilation of the technical specifications;

 A compilation of the most significant data for experienced users in the

Applicability of this manual

Strictly follow the company and international safety regulations.

Do not touch any circuitry during operation. Potentially lethal

Never connect or disconnect wire and/or linker to or from IED during

Always connect the IED to protective earth regardless of the

Do not disconnect the secondary connection of current transformer

Do not remove the screw from a powered IED or from an IED

Using the certified conductive bags to transport PCBs (modules).

When replacing modules using a conductive wrist strap connected to

When installing and commissioning, take care to avoid electrical

About this chapter

This chapter gives an overview of SIFANG Multifunction

 Applicable in subtransmission network and distribution network with

 Protection of feeders, capacitors, distribution transformers, bus coupler,

 Used as backup protection IED for lines, transformers, reactors and

 Providing control and monitoring functions of the circuit breakers,

 Supporting all functionalities required for automation system

The standard version of CSC-211 offers a wide range of protection

The advanced version of CSC-211, with enhanced hardware, same

The wide application flexibility and integration of the protection, monitoring

 Three pole tripping required in sub-transmission and distribution

 A complete protection functions library, include:

 Overcurrent protection (50, 51, 67)

 Earth fault protection (50N, 51N, 67N)

 Sensitive earth fault protection (50Ns, 51Ns, 67Ns)

 Negative-sequence overcurrent protection (46)

 Thermal overload protection (49)

 Undervoltage protection (27)

 Overvoltage protection (59)

 Negative-sequence overvoltage protection

 Rate of change of frequency protection(ROCOF)

 Displacement voltage protection (64)

 Circuit breaker failure protection (50BF)

 Dead zone protection (50SH-Z)

 STUB protection (50STUB)

 Switch Onto faulty protection(SOTF)

 Synchro-check and energizing check (25)

 Auto-recloser function for three-phase reclosing (79)

 Low frequency load shedding function

 Low voltage load shedding function

 Overload load shedding function

 Voltage transformer secondary circuit supervision (97FF)

 Current transformer secondary circuit supervision

 Fast overcurrent/busbar protection scheme using IEC61850

 Self-supervision to all modules in the IED

 Complete and massive reports recording, trip reports, alarm reports,

 Up to two electric /optical Ethernet ports can be selected to

 One electric RS-485 port is able to communicate with substation

 Time synchronization via network(SNTP), pulse and IRIG-B mode

 Versatile human-machine interface

 Multifunctional software tool CSmart for setting, monitoring, fault

3.1 Protection functions

IEC 61850 IEC 60617

STUB protection 50STUB PTOC 3I>STUB

Synchro-check and energizing check 25 RSYN

Auto-reclosing 79 RREC O→I