Professional Documents
Culture Documents
Chapter 9
9
(c) 2019 Farrokh Sharifi
Improving Steady-State Error via
Cascade Compensation - PI
K ( s a) 1
Gc K Ka (gain + integrator)
s s
Question 1: what is the steady state error of a type zero system
for a step input? What is the steady state error of the system if we
add a pole at zero and therefore increase the type to one?
º
11
Improving Steady-State Error via
Cascade Compensation - PI
• Step 2: However, the
steady state error must be
reduced, so we add a pole
at zero. The new root
locus will be:
12
Improving Steady-State Error via
Cascade Compensation - PI
• Step 3: To make the root locus go
through point A, we have to
change the transfer function once
again. We add a zero close to the
pole so that the angular
contribution of the pole is
cancelled out and hence the root
locus again passes the desired
point A. This is the Ideal integral
compensator.
• Conclusion: while the system
type has increased (better steady-
state error), the transient response
has not changed (same point on s-
plane). º
14
Improving Steady-State Error via
Cascade Compensation - PI
Example: (cont.)
• The uncompensated system
has the root locus shown on
the right. Type 0 system.
• Intersection with 0.174 ( 100.02 )
gives dominant closed loop
poles at 0.694 j3.926 & K 164.6
• Using K = 164.6, the third
pole is found at
-11.61. For type 0 system
with unit step input we
have
164.6
K P lim KG(s) 8.23
s 0 20
(c) 2019 Farrokh Sharifi 15
Improving Steady-State Error via
Cascade Compensation - PI
Example: (cont.)
• We add the compensator and the root locus becomes:
dominant poles: -0.678+/- j3.837, K = 158.2
third pole: -11.5
New root locus
fourth pole: -0.0902
17
Improving Steady-State Error via
Cascade Compensation - PI
• Implementing PI controller:
18
Improving Steady-State Error via Cascade
Compensation - Lag Compensation
( s zc ) zc pc 0
zc
1
Gc
( s pc ) pc
Close to zero
Let’s see improvement. Assume a type one system:
K ( s z1 )( s z2 ) ( z zn ) ( s zc )
G , Gc
s( s p1 )( s p2 ) ( s pn ) ( s pc )
Kz1 z2 zn
Before compensation: KV 0 lim s 0 sG ( s )
p1 p2 pn
Kz1 z2 z n zc z
After compensation: KVN lim s 0 sGc ( s)G ( s) . KV 0 c
p1 p2 pn pc pc
Increasing velocity constant
(c) 2019 Farrokh Sharifi 19
Improving Steady-State Error via Cascade
Compensation - Lag Compensation
• Increasing error constants will improve steady state error.
21
Improving Steady-State Error via Cascade
Compensation - Lag Compensation
• What improvement can we expect in the steady state error?
How can we achieve 1 and 2? The pole and zero must be close to
the origin! Choose zc pc 0 close to 0.
22
Improving Steady-State Error via Cascade
Compensation - Lag Compensation
• Example 9.2: Design a lag compensator for the system (Example
9.1) shown below to improve the steady state error by a factor of 10
when the system is operating with a damping ratio of 0.174.
164.6
K p lim G ( s ) 8.23
s 0 1 2 10
Type 0 system
Arbitrarily selecting :
24
Improving Steady-State Error via Cascade
Compensation - Lag Compensation
Example: (cont.)
We may now look at the root locus of the compensated system
and compare it with the uncompensated:
27
Improving the Transient Response via
Cascade Compensation (section 9.3)
We already fixed the steady state error without effecting the
transient response. Now we want to improve the transient
response itself. Main objectives are:
• Improving settling time
• Improving over shoot
Technique 1: ideal derivative compensator (PD).
This requires active components.
Gc K (s zc ) Ks Kzc
Technique 2: Lead compensator. ( s zc )
Gc pc zc 0
This approximates differentiation ( s pc )
z
with a passive network. ( c 1)
pc
Note:
The transient response is selected by choosing appropriate
closed loop pole location. If the desired location is on the root
locus the gain has to be adjusted. If not, the root locus has to be
changed by the introducing a compensator so that the new root
locus contains the desired pole locations. Poles and zeros can
be added to the forward path to do that.
One simple way is to add a zero to the forward path:
Gc s zc
(differentiator + pure gain)
(c) 2019 Farrokh Sharifi 29
Improving the Transient Response via
Cascade Compensation -PD
Lets look at an example, assume we add a zero with the transfer
function:
Movie, showing the effect of changing gain:
Improving the Transient Response via
Cascade Compensation -PD
Movie showing the effect of compensator zero position:
Improving the Transient Response via
Cascade Compensation -PD
Conclusion:
• Transient responses unattainable by gain adjustment can be
obtained by augmenting the system’s poles and zeros with an
ideal derivative compensator
• Ideal derivative compensator (PD) can speed up the response
of the system while maintaining the overshoot ( same damping
ratio). Why?
• Settling time improves
• Peak time improves
• Steady state error may improve
%OS /100 16
Step 1(a)) 0.504
arccos(0.504) 59.74
Step 1(b) Find closed loop pole of uncompensated system. Search along the 180 59.74 120.26
line of damping ratio where Sum of angles from poles and zeros become
odd multiple of 180.
Step 1(c)
Step 1(d) Since 2nd-order approximation is used, search for the third pole to
the left of -6 where the same K = 43.35 is obtained. °
3rd pole = -7.59 > 5 x (-1.205), OK!
120.26
Improving the Transient Response via
Cascade Compensation -PD
Example (cont.):
Step 2. We have to find the some of the angles from the poles to the desired pole location:
6.19
arctan( ) 68.8
6 3.613 120.26
Improving the Transient Response via
Cascade Compensation -PD
Example (cont.):
Step 4. The geometry is shown for this angular contribution in the root
locus is shown below and we must now solve for sigma.
95.6
3.006 Gc s 3.006
120.26
Improving the Transient Response via
Cascade Compensation -PD
• Implementing PD controller
40
Improving the Transient Response via
Cascade Compensation - Lead Compensation
The advantages of passive lead networks are:
1. No addition power supply is required as we use passive
elements
2. Noise due to differentiation is reduced.
44
Improving Steady State Error and Transient
Response - PID Controller Design
The steps in general for designing a PID controller are as
follows:
• Step 1: Evaluate the performance of the uncompensated
system to determine how much improvement in transient
response is required.
• Step 2: Design the PD controller to meet the transient
response specifications. This includes the zero location
and the loop gain
• Step 3. Simulate the system to make sure all requirements
are met.
• Step 4. Redesign if the simulation shows requirements
have not been met.
(c) 2019 Farrokh Sharifi 45
Improving Steady State Error and Transient
Response - PID Controller Design
• Step 5: Design the PI controller to yield the required
steady-state error.
• Step 6: Determine the gains K1,K2, K3.
• Step 7. Simulate the system to make sure all requirements
are met.
• Step 8. Redesign if the simulation shows requirements
have not been met.
Step 1
search along the line of 117.13 deg for dominant poles 117.13
Step 2
Tp
n 1 2 d
imaginary part of compensated system dominant poles d 15.87
Tp (2 / 3)(0.297)
d
real part of compensated system dominant poles = 8.13
tan117.13
(c) 2019 Farrokh Sharifi 48
Improving Steady State Error and Transient
Response - PID Controller Design
Example (cont.)
Step 2 : sum of angles from uncompensated system poles and zeros to
the desired compensated system pole = -198.37 deg
zc 198.37 (2k 1)180 k 0 zc 378.37 or 18.37
15.87
tan(18.37 ) zc 55.92 GPD ( s 55.92)
zc 8.13
RL for PD-compensated system
117.13
51
Improving Steady State Error and Transient
Response - PID Controller Design
Example (cont.)
Step 6 s 0.5 4.6( s 55.92)( s 0.5)
GPID ( s ) K .( s 55.92)
s s
K1 K2
K ( s 2
s )
4.6( s 56.42s 27.96)
2 3
K3 K3
s s
K1 259.5, K 2 128.6, K 3 4.6
Steps 7 and 8
52
Improving Steady State Error and Transient
Response - PID Controller Design
Example (cont.)
54
Improving Steady State Error and Transient
Response - PID Controller Design
Step 1:
2.88 102
K P lim s 0 GH 0.575
0.4 0.5 0.163 1.537
1
e() 0.6349
1 KP
0.393 -0.374+j0.393
p 1.537 arctan 18.67
1.537 0.374
0.393
p 0.5 arctan 72.22
0.5 0.374
0.393
p 0.4 arctan 86.2
0.4 0.374
0.393 -1.537 -0.5 -0.4 -0.163
p 0.163 180 arctan 118.23
0.374 0.163
p 1.537 p 0.5 p 0.4 p 1.537 295.3
Improving Steady State Error and Transient
Response - PID Controller Design
Step 2:
(lengths to poles)
GPD ( s 0.19) 0.35K
(lengths to zeros including new zero)
0.3932 (1.537 0.374) 2 0.3932 (0.5 0.374) 2
0.3932 (0.4 0.374) 2 0.3932 (0.374 0.163) 2
0.2
0.393 (0.374 0.19)
2 2
57
Improving Steady State Error and Transient
Response - PID Controller Design
Steps 3, 4: Simulations. OK.
Step 5:
Step 6:
• Helicopter control
http://www.youtube.com/watch?v=y1hjVZq1VNY
Solution:
Step1: First we evaluate the performance of the
uncompensated system.
OS 20% 0.456
(c) 2019 Farrokh Sharifi 63
Improving Steady State Error and Transient
Response -Lead-Lag Compensator Design
Example (cont.):
64
Improving Steady State Error and Transient
Response -Lead-Lag Compensator Design
Example (cont.):
Step 2: The imaginary part of the design point is therefore:
66
Improving Steady State Error and Transient
Response -Lead-Lag Compensator Design
Example (cont.):
Step 3 and 4: We check the design with simulation and
confirm.
With total 10 fold improvement, the portion left to lag compensation will
be 10/2.122=4.713.
( s 0.04713)
Step 6. We arbitrarily choose pole at 0.01. Then G lag ( s )
( s 0.01)
(c) 2019 Farrokh Sharifi 68
Improving Steady State Error and Transient
Response -Lead-Lag Compensator Design
Example (cont.): Open loop lead-lag compensated system will be
K ( s 0.04713)
G LLC ( s )
s ( s 10)( s 29)( s 0.01)
69
Improving Steady State Error and Transient
Response -Lead-Lag Compensator Design
K ( s 0.04713)
G LLC ( s )
Example (cont.): s ( s 10)( s 29)( s 0.01)
Step 7- Simulate
Step 7- Simulate