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COMPUTER ORGANIZATION & ARCHITECTURE

1 BASICS OF COMPUTER FUNDAMENTALS

1. MACHINE INSTRUCTIONS

● Machine instructions are commands or machine code programs . In other words, commands
written in the machine code language of a computer that it can recognize and subsequently
execute.
● A machine instruction consists of several bytes in memory that tells the processor to
perform one machine operation.
● The processor looks at machine instructions in main memory one after another and
performs one machine operation for each machine instruction.
● The collection of machine instructions in main memory is called a machine language
program.
There are 3 type of machine instructions:
a. Data Transfer Instructions:
The data transfer instructions are defined as instructions which are used to transfer the data
from one location to another. This data transmission can be either from register to memory,
register to register or memory to register.

Opcode Meaning Explanation

The MOV instruction copies the data from the source register
Copy from the source
MOV to the destination register without any alteration.
to the destination
Example − MOV K, L

This will store the 8-bit data to the destination register or

Move immediate 8-
MVI memory.
bit
Example − MVI K, 49L

The data of a memory location is copied to the accumulator,

LDA Load the accumulator which is specified by a 16-bit address in the operand.
Example − LDA 2034K

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The data from the designated register pair point to a memory

Load the accumulator location. LDAX instruction copies the contents of that memory
LDAX
indirect location into the accumulator.
Example − LDAX K

This instruction loads 16-bit data in the register pair

Load the register pair
LXI designated the memory or in the register.
immediate
Example − LXI K, 3225L

This instruction copies the contents from the memory

Load H and L registers location pointed by the address to the register L and copies
LHLD
direct the data of the next memory location to the register H.
Example − LHLD 3225K

The data of the accumulator is copied into the memory

STA 16-bit address location specified by the operand.
Example − STA 325K

The data of the accumulator is copied into the memory

Store the accumulator
STAX location specified by the contents of the operand.
indirect
Example − STAX K

The data of register L is stored in the memory location which

is specified by a 16-bit address in the operand and the data
Store H and L registers
SHLD of register H is stored into the next memory location by
direct
incrementing the operand.
Example − SHLD 3225K

Content of register H is exchanged with the content present

Exchange H and L with in the register D, and the content of register L is exchanged
XCHG
D and E with the content of register E.
Example − XCHG

The content of the register pair designated in the operand is

Push the register pair
PUSH copied onto the stack.
onto the stack
Example − PUSH K

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The data of the memory location pointed by the stack pointer

register is copied to the low-order registers (register L, E, C,
status flag) of the operand.
Stack pointer is increased by 1 and the content of that
Pop off stack to the
POP memory location is copied to the high-order registers
register pair
(register H, D, A, B) of the operand.
Again increment the stack pointer register.

Example − POPK

Output the data with The content of the accumulator is copied to the I/O port
OUT 8bit address from the specified by the operand.
accumulator to a port. Example − OUT K9L

Input data with 8-bit The content of the input port designated in the operand is
IN address to an read and loaded into the accumulator.
accumulator from a port Example − IN5KL

b. Data Manipulation Instructions:

Data manipulation involves transferring data and operating on data with math Functions,
data conversion, data comparison and logical operations. There are 3 types of data
manipulation instructions, which are as follows:
● Arithmetic instructions
● Logical and bit manipulation instructions
● Shift instructions
Arithmetic Instructions
Name Mnemonic

INCREMENT INC

DECREMENT DEC

ADD ADD

SUBTRACT SUB

MULTIPLY MUL

DIVIDE DIV

ADD WITH CARRY ADDC

SUBTRACT WITH BORROW SUBB

NEGATIVE NEG

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Logical and Bit Manipulation Instructions

Name Mnemonic

CLEAR CLR

COMPLEMENT COM

AND AND

OR OR

EXCLUSIVE OR XOR

CLEAR CARRY CLRC

SET CARRY SETC

COMPLEMENT CARRY COMC

ENABLE INTERRUPT EI

DISABLE INTERRUPT DI

Shift Instructions

Name Mnemonic

LOGICAL SHIFT RIGHT SHR

LOGICAL SHIFT LEFT SHL

ROTATE RIGHT ROR

ROTATE LEFT ROL

c. Program Control Instruction:

Program Control instructions are those instructions who specify the conditions for altering
or changing the content of the program counter. The change in the value of a program
counter can cause a break in the sequence of instruction execution.

Name Mnemonic

BRANCH BR

JUMP JMP

SKIP SKP

CALL CALL

RETTURN RET

COMPARE CMP

TEST TST

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1.1. Instruction Format:
Instructions in a computer are a set of machine language instructions that are
understanded and executed by the processor. A computer performs tasks based on the
instruction provided.
An instruction comprises groups called fields. These fields include:
Mode Opcode Operand/address of Operand

● The Opcode (Operation code) field specifies which operation is to be performed.

● Address field contains the location of the operand, i.e., memory location or register.
● The Mode field specifies the method to locate the operand.
● Different type of instruction formats are as follows: :

a. Three Address Instruction: This has three address fields to specify a register or a
memory location.

b. Two Address Instruction: In this format, two addresses and an operation field are
present, and in this format the result can be stored at different memory locations not in
just the accumulator but it requires a greater number of bits to represent address.

c. One Address Instruction: One operand is in register or memory location. The result
and the second operand are stored in a CPU register known as Accumulator Register. One
operand is in accumulator and other is in register or memory location

d. Zero Address Instruction: Zero address instruction contains no address fields;

operand sources and destination both are implicit. For example it may enable stack
processing: this address instruction implies that the absolute address of the operand is
stored in a special register that increments and decrements automatically to point to the
location of top of the stack.

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e. RISC: RISC processors only use simple instructions that can be executed within one
clock cycle. It is composed of a few basic steps for loading, evaluating and storing
operations just like a load command will load data, store command will store the data. In
RISC(Reduced Instruction Set Computer) processors, all operations are done within the
CPU registers

1.2. Addressing Modes:

1.2.1. Sequential Control Flow:

When the program is stored in the sequential memory locations, the program counter
itself points to the next instruction address. These modes concentrate on the location of
a data, so data transfer and data manipulation instructions are designed using these
addressing modes.
a. Implied Mode: In this mode the data is available in the opcode itself. Hence, there is
no effective address.
Example: Complement Accumulator (CMA) and all zero address instructions.
b. Immediate Mode:
The operand is explicitly specified inside the instruction.
Immediate addressing mode is used to access the constants or to initialize registers to a
constant value.
Instead of an address field, an operand field is present that contains the operand.
Example: MOV A,5

c. Direct Addressing Mode:

It is used to access the static variables.

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In this mode the data is present in the memory, the corresponding address of memory
will be maintained in an address field of the instruction as an effective address.

d. Indirect Addressing Mode:

It is used to implement pointers.
The address field of the instruction specifies the memory address location that has the
operand's effective address.
Two references to the memory are required to fetch the operand.

There are two types of Indirect Addressing Modes:

(a) Register Indirect Addressing Mode: Here, the EA is present in the address register,
that register name is available in the address field of the instruction.
EA = [Address Field Value] ⇒ [Register Name]

(b) Memory Indirect Addressing Mode: Here, the EA is present in the memory, that
memory address is available in the address field of the instruction.
EA = [Address field value] ⇒ [Memory address]
Data = [EA] = [[Memory address]]

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e. Indexed Addressing Mode:
Effective address of the operand is obtained by adding the content of the index register
with the address part of the instruction.
In indirect indexed addressing mode the base address is present in the memory, that
memory address is present in the address field of the instruction.

Effective Address = Content of Index Register + Address part of the instruction

f. Auto Indexed Addressing Mode:

This mode is used to access the linear array elements hence, base address is required to
access the data.
Effective address is calculated by:
Base Register ± Step Size.
Assume operand size = 2 bytes.

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1.2.2. Transfer of Control Flow:

These modes concentrate on the location of the next instruction in the memory.
The program control will be transferred from the current location to the target location.
TOC instructions are designed with the following addressing modes, to calculate the
effective address.
a. Relative/PG Relative Addressing Mode:
(Relocation data, branch address at runtime; Reduce instruction size)
• Relative Addressing Mode is used to access the instruction within the segment, therefore
only the offset address is required.
• The offset address is available in the address field of the instruction.
EA = Base Address+ Offset Address
 
• PC Address Field Value

• PC ← PC + IR [Address Field]
• Position dependent.
• Relocation at run time.
b. Base Register Addressing Mode (Position independent):
• Base Addressing Mode is used to access the instruction between segments. Therefore,
base address as well as offset are required.
• Base address is maintained in the base register and offset address is maintained in the
address field of the instruction.
• EA = [Base Register] + IR [Address Field]
• PC ← [Base Register] + IR [Address Field]

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