INEL 6995 – Low-Voltage Design 12/13/2021

Final Project
Design a transistor level higher-order band-pass filter to meet the following
specifications: f0 = 10kHz, A0 = 20dB, Apb= -20dB @ BW = 4kHz, Asb= -40dB
@ 40kHz.
→ 𝑾𝒆𝒅𝒏𝒆𝒔𝒅𝒂𝒚, 𝑱𝒂𝒏𝒖𝒂𝒓𝒚 𝟏𝟐 @ 𝟔: 𝟎𝟎𝒑𝒎
Deliverables
1) Transistor level design:
• Current biases for all circuits
• Snapshot of DC operating point of each SOS (voltages should be visible)
2) Transistor level AC simulation
• Magnitude bode diagram of each SOS and the high-order filter (all in the
same plot)
• Magnitude bode diagram of each SOS and the high-order filter (individual
plots, highlight each filter parameter)
1