UNIT V LOGIC FAMILIES AND PROGRAMMABLE LOGIC DEVICES

Assignment Questions

PART-A 10*2 = 20

1. Design XOR gate using ROM.

2. Write the type of semiconductor memories.
3. What is meant by ‘static’ and ‘dynamic’ memories?
4. How is individual location in a EEPROM programmed or erased?
5. What is an EAROM?
6. Define Cache memory.

7. What are the advantages of RAM?

8. Comparison between PROM, PAL, PLA

9. Draw the CMOS inverter circuit.

10. Define noise margin.

PART-B 05*13 = 65

1. Use PLA with 3 inputs, 4 AND terms and two outputs to implement the following Boolean functions
F1(A,B,C)= ∑m(3,5,6,7),F2(A,B,C)= ∑m(1,2,3,4)

2. Discuss in detail about the FPGA with suitable diagrams.

3. Design full adder using PAL.

4. Design 16K X 8 RAM using 4K X 8 RAM IC’s.

5. Design BCD to excess-3 code converter using the following PLD’s.

i) PROM.
ii) PLA
iii) PAL
PART-C 01*15 = 15

1. Select a 4096X8 bit ROM memory to store the driver program of the robotic design. The memory chip has two
chip select inputs and operates from a 5V power supply. How many pins are needed for the integrated circuit
package? Draw a block diagram and label all input and output terminal in ROM.