QUALIFICATION: Bachelor of (Computer Science, Informatics & Cyber Security)

QUALIFICATION CODE: 07BACS,07BAIF,07BCCS LEVEL: 5

COURSE: Computer Organisation and Architecture COURSE CODE: COA511S
DATE: 10 May 2019 SESSION: THEORY
DURATION: 60 Min MARKS: 40

SUPP TEST- MEMO

EXAMINER(S): MR. JULIUS SILAA (Theory ALL, FT1 & FT6)
MS. ALBERTINA SHILONGO(FT2, FT9)
MS. JOVITA MATEUS (FT 3 & FT 10B)
MR. ELIEZER MBAEVA (4 )
MS. EUNICE MBASUVA( FT 8 & PT3 )
MR. VEERAB PADURI ( FT5 & FT 10)
MR. JEREMIAH LUMBASI ( PT 2)
MR.GABRIEL NHINDA ( PT1)
MS. IIPINGE , (FT 7)
MODERATOR: MR. SIMON MUCHINENYIKA
THIS MEMO CONSISTS OF 4 PAGES (INCLUDING THIS FRONT PAGE)

INSTRUCTIONS TO MODERATOR/SECOND EXAMINER

1. Please use the memorandum or sample solutions to guide your marking.
2. When marking questions, you should be guided by the allocation of marks.
3. Sample answers or solutions appear in bold.
4. Reasonable, in depth or innovative correct solutions provided by the students should be
allocated marks even though not provided in this memorandum

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SECTION A: Answer All Questions. Each Question weighs 1 Mark. [10 MARKS]
Circle the correct answer
1. The raw speed of the microprocessor will not achieve its potential unless it is fed a constant
stream of work to do in the form of computer instructions [True]/False].

2. Pipelining is a means of introducing parallelism into the essentially sequential nature of

machine-instruction program [True/False].
3. RISC processors are more responsive to interrupts because interrupts are checked
between rather elementary operations [True/False].
4. Machine parallelism exists when instructions in a sequence are independent and thus
can be executed in parallel by overlapping [True/False].
5. The __________ measures the ability of a computer to complete a single task.
A. clock speed B. Speed metric
C. execute cycle D. Cycle time

6. The most fundamental type of machine instruction is the _________ instruction.

A. conversion B. data transfer
C. arithmetic D. logical
7. For _________, the address field references a main memory address and the
Referenced register contains a positive displacement from that address.
A. indexing B. base-register addressing
C. relative addressing D. all of the them
8. The ________ determines the opcode and the operand specifiers.
A. decode instruction B. fetch operands
C. calculate operands D. execute instruction

9. Which of the following interrelated factors go into determining the use of the
addressing bits?
A. number of operands B. number of register sets
C. address range D. all of the above

10. The situation where the second instruction needs data produced by the first
instruction to execute is referred to as __________.
A. True data dependency B. Output dependency
C. Procedural dependency D. Antidependency

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SECTION B: Structured questions. Answer All Questions. [30 MARKS]

Question 1

i) Registers are fast stand-alone storage locations that hold data temporarily in CPU.
List any three types of registers and explain their functions. [6 Marks]
Instruction Register -Store the instruction currently being executed [2]
Data Registers- Hold data before it can be processed [2]
Program counter(PC)- indicates where a computer is in its program [2]
Memory buffer register(MBR) stores the data being transferred to and from[2]
Accumulator(AC) Data Register(DR) Memory data Register (MDR) e.t.c
(Any 3 Registers and function)

ii) Explain what is instruction set architecture [2 Marks]

– Instruction set architecture is the structure of a computer that a machine
language programmer (or a compiler) must understand to write a correct
(timing independent) program for that machine
– The collection of different instructions that the processor can execute is
referred to as the processor’s instruction set
Question 2

i) Explain with the aid of examples the four important features a machine’s
instruction must specify [8 marks]
1) Which operation to perform: example add r0, r1, r3
Other Op codes are : add, load, branch, etc.
2) Where to find the operands: example In CPU registers, memory cells, I/O
locations, or part of instruction
(add r0, r1, r3 )
3) Place to store result: examples-again CPU register or memory cell
add r0, r1, r3

4) Location of next instruction : example -almost always memory cell pointed to by

program counter—PC
ii) Compare immediate addressing and direct addressing modes. You may explain or use
a well labelled diagram(s) or both [ 3marks]
immediate addressing
If data is present in the instruction itself, it is called immediate addressing mode.
For example,
ADD AL, 01H
SUB BL, 04H
• the data 01H or 04H (in Hex) is directly present in the instruction itself.
• Effective Address calculation is not applicable

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Direct addressing modes

• If data is present at the 16-bit address mentioned in the instruction, it is called direct
addressing mode.
• For example,
ADD AX, [0101H]
Here, effective address is ;
10H * DS + 1111H for the first example and

Question3

i) Differentiate between the structure of a CISC processor and a RISC processor.[4 Marks]
i) CISC tend to use fewer registers in comparison to RISC [2]
ii) CISC has fewer execution cycles[2]
iii) CISC processors are more complex hence they can’t be easily fabricated [2]
iv) CISC uses variable length instructions [2]
v) Other differences ( see the table below)

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 [Any two points explained]

ii) List the basic five instruction pipeline stages (3 Marks)

Instruction Fetch (FI)
Instruction Decode (DI)
Memory Access (MEM)
Execute(EX)
Write back (WB)
[Award full marks If all are listed, 1 mark for incomplete list or zero for none ;
Alternatively award 1.5 mark for each correct diagram ]

iii) An 8086 CPU contains an Accumulator(AC) register used for holding data during basic
arithmetic and other operations. Explain the step by step process of performing the
following operation using one address instruction (reference lecture 8-slide#16)

Page 5 of 6
Y = _ A-B___
C +(D*E). [4 Marks]

One-address instruction- For this to work, a second address must be implicit. This was
common in earlier machines, with the implied address being a processor register known as
the accumulator (AC). The accumulator contains one of the operands and is used to store the
result. In our example, eight instructions are needed to accomplish the task

*****END OF SUPP TEST MEMO*****

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