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Xiaomi Redmi Note 8 (LLDM516) Schematic Diagram

Diagram
Schematic
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

o m
C

.c C

c h
[17] LN_BB_CLK1
Note:

AB34 AB34
U0501-A
CPU_SM6125_822NSP
C32 C32
TP0508 TP0507

T
[20]

e
1
CXO SDC1_RCLK SDC1_RCLK
D32 D32 R0522 33R [20]
SDC1_CLK 0201 SDC1_CLK
D31 D31
AF24 SDC1_CMD SDC1_CMD [20]
[17,32] AF24
SLEEP_CLK SLEEP_CLK
C34 C34 SDC1_DATA_0 [20]
SDC1_DATA_0
B33 B33 [20]
SDC1_DATA_1 SDC1_DATA_1
D33 D33 [20]
SDC1_DATA_2 SDC1_DATA_2
[16,17] R0501 0R AH19 AH19 D34 D34 [20]
PM_PON_RESET_N 0201 RESIN_N SDC1_DATA_3 SDC1_DATA_3
47nF C33 C33

e
C0501 SDC1_DATA_4 SDC1_DATA_4 [20]
AE23 AE23 B34 B34 [20]
RESOUT_N SDC1_DATA_5 SDC1_DATA_5
A33 A33
[20]
[20] SDC1_DATA_6 SDC1_DATA_6
C31 C31
[20]
RESOUT_N SDC1_DATA_7 SDC1_DATA_7
TP0006

AG29 AG29

l
MODE_0
TP2005

TP0008

TP0501 TP0502 TP0503 TP0504 TP0505 TP0506 AF29 AF29


MODE_1

AH21 R0511 22R

i
SDC2_CLK 0201 SDC2_SDCARD_CLK [25]

[17] R0521 0R AG21 AG21 AJ22 AJ22 [25]


MSM_PS_HOLD 0201 PS_HOLD SDC2_CMD SDC2_SDCARD_CMD
AH22
AH22 [25]
SDC2_DATA_0 SDC2_SDCARD_D0
JTAG_RESOUT_N AC32 AC32 AH23 AH23 [25]
SRST_N SDC2_DATA_1 SDC2_SDCARD_D1
JTAG_TCK AC33 AC33 AJ24 AJ24 [25]
TCK SDC2_DATA_2 SDC2_SDCARD_D2
JTAG_TDI AA32 AA32 AH24 AH24

b
TDI SDC2_DATA_3 SDC2_SDCARD_D3 [25]
JTAG_TDO AD33 AD33
TDO
JTAG_TMS AB32 AB32 W33
TMS USB0_DP_AUX_M C0507
JTAG_TRST_N AD34 AD34 W34
TRST_N USB0_DP_AUX_P
33PF

B B

o
B30 P33 P33 [26]
UFS_RESET_N USB0_HS_DM USB_HS_D_M CAD NOTE:
A30 P34 P34 [26] 90ohm Diff Imp routing for USB2
UFS_REFCLK USB0_HS_DP USB_HS_D_P

USB0_HS_REXT: 6.04K on Internal test chip, 4.02K on SM6125


R34 R34 R0510 4.02K
USB0_HS_REXT 0201 R34 can connect to GND if USB0 is not used
D17 T34 T34
0201
UFS_L0_RX_M USB0_SS_REXT R0513 100R USB0_SS_REXT: 0OHM on Internal test chip, 100OHM on SM6125
E17
UFS_L0_RX_P T34 can float if DP/USB0 is not used
D16
UFS_L0_TX_M

M
E16 V33
UFS_L0_TX_P USB0_SS_RX0_M
V34
USB0_SS_RX0_P
T32
USB0_SS_TX0_M
UFS_REXT: DNI on Internal test chip, 100 OHM on SM6125 B16
USB0_SS_TX0_P
T31
UFS_REXT
Can float if UFS is not used AE13
AE13 U33
QPHY_TPA USB0_SS_RX1_M
U34
USB0_SS_RX1_P
R32
USB0_SS_TX1_M
R31
USB0_SS_TX1_P

AH27
PLL_TEST_SE
P32 P32
USB0_SS_TPA

AJ30 AJ30
ATEST0
AH18
AE29 AE29
ATEST1
AH18 [16,17]
PMIC_SPMI_CLK SPMI_CLK
AJ19 AJ19
[16,17]
PMIC_SPMI_DATA SPMI_DATA
NC

C0503
C0504

NC

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 5OF 34
6 5 4 3 2 1

D D

U0501-B
CPU_SM6125_822NSP
TP0010
ESE_SPI_MISO L33 AH17
GPIO_0 GPIO_65
ESE_SPI_MOSI L34 AG16 BOOT_CONFIG[9] DRX_TUNER_SW1 [30]
NFC eSE SPI TP0011 GPIO_1 GPIO_66

TP0013
ESE_SPI_SCLK L32 AG15 DRX_TUNER_SW2 [30]
GPIO_2 GPIO_67

TP0014
ESE_SPI_CS_N L31 AH16 RFFE5_DATA [29,31]
GPIO_3 GPIO_68
[6,21,24] APPS_I2C_SDA AG34 AJ16 RFFE5_CLK [29,31]
GPIO_4 GPIO_69
[6,21,24] APPS_I2C_SCL AD32 AH15
GPIO_5 GPIO_70
[21] TS_SPI_2_MISO SPI_MISO N34 AJ15 BOOT_CONFIG[7]
GPIO_6 GPIO_71
TOUCH I2C [21] [25]
TS_SPI_2_MOSI SPI_MOSI M33
GPIO_7 GPIO_72
AJ21 UIM2_DATA
TOUCH SPI [21] TS_SPI_CLK SPI_SCLK N33 AG19 UIM2_CLK [25]
GPIO_8 GPIO_73
TS_SPI_CS_N SPI_CS_N M31 AH20 UIM2_RESET [25]
[21] GPIO_9 Y GPIO_74
[32] WCN_UART_CTS_N L4 AE18 UIM2_PRESENT [25]
GPIO_10 GPIO_75
[32] WCN_UART_RFR_N K1 AF18 UIM1_DATA [25]
GPIO_11 GPIO_76

m
[32] WCN_UART_TX_N K2 AE17 UIM1_CLK [25]
GPIO_12 GPIO_77
[32] WCN_UART_RX_N L5 AG18 UIM1_RESET [25]
GPIO_13 GPIO_78
TP0009 UART_TX I2C_SDA AF34 AE16 UIM1_PRESENT [25]
RCM_MARKER1 GPIO_14 GPIO_79
TP0002 UART_RX I2C_SCL AE33 AH29 ACCEL_INT [23]
RCM_MARKER2 GPIO_15 GPIO_80
TP0003 UART_TX I2C_SDA AF33 AG28 GYRO_INT [23]
GPIO_16 GPIO_81

o
DBG_UART_TX
TP0012 UART_RX I2C_SCL AE32 AH28 VCM_2M_AFVDD_EN [22]
DBG_UART_RX GPIO_17 GPIO_82
WSA_CLK I2S2_SCK SPI_MISO AH1 AE22 NFC_EN TP0015
GPIO_18 GPIO_83
IR_LED_EN
WSA_DATA I2S2_WS SPI_MOSI AG1 AE21 NFC_DWL_REQ TP0016
[23] GPIO_19 GPIO_84
I2S2_DATA0 SPI_SCLK AF2 AJ28 NFC_INT_N TP0017
GPIO_20 GPIO_85
I2S2_DATA1 SPI_CS_N AF1 AG27 REAR48M_AFVDD_EN [22]
GPIO_21 GPIO_86

c
[6,23,29] SNS_I3C_SDA
I3C_SDA SPI_MISO AH34 AH32 BOOT_CONFIG[1] TS_RESET_N [21]
GPIO_22 GPIO_87
[6,23,29] SNS_I3C_SCL
I3C_SCL SPI_MOSI AG33 AG31 TS_INT_N [21]
GPIO_23 GPIO_88
SPI_CLK

.
VLED_3.3V_EN AF32 AH31 LCD_TE0 [21]
[23] GPIO_24 GPIO_89
[21] LCM_IDO
SPI_CS_N AH33 AJ31 LCD_RESET_N [21]
GPIO_25 GPIO_90
[21] LCM_ID1
SPI1_CS1 AJ33 AG30 ALSP_INT_N [23]
GPIO_26 GPIO_91
[24] AUDIO_PA_RST
SPI1_CS2 AG32 AF30 FP_INT_N [23]
GPIO_27 GPIO_92
[6,23] SNS_I2C_SDA
SDA AE31 AH30 FP_RST_N [23]
GPIO_28 GPIO_93
SCL

h
[6,23] SNS_I2C_SCL AC31 AJ9 LCD_ERR_INT_N [21]

C [23] FP_SPI_MISO AB31


GPIO_29

GPIO_30
GPIO_94

GPIO_95
AE9 NFC_CLK_REQ NFC_CLK_REQ
TP0007
C
[23] FP_SPI_MOSI AB30 AJ8 WCN_SW_CTRL [32]
GPIO_31 GPIO_96
[23] FP_SPI_SCLK AC30 AH9 FM_ANT_CHECK [33]
GPIO_32 GPIO_97
[23] FP_SPI_CS_N AD30 AF19 SD_CARD_DET_N [25]
GPIO_33 GPIO_98

c
[22] CAM_MCLK0 R0601 0R AH5 AF25 FORCED_USB_BOOT [26]
0402 GPIO_34 GPIO_99
[22] CAM_MCLK1 R0602 0R AG6 AF27 BOOT_CONFIG [4] GPIO100 [22]
0402 GPIO_35 GPIO_100
[22] CAM_MCLK2 R0603 0R AD7 AF28 BOOT_CONFIG [5] GPIO101 [22]
0402 GPIO_36 GPIO_101
[6,22] CCI_I2C_SDA0 AE7 AF9 USB_PHY_PS [15]
GPIO_37 GPIO_102
C0601 C0602 C0603 C0605 [6,22] CCI_I2C_SCL0 AE6 AG9 WMSS_RESET [27]
GPIO_38 GPIO_103
Force USB boot pol sel

e
NC NC NC 33pF_NC [6,22] CCI_I2C_SDA1 AF6 L2 R0616 2.2K_NC VREG_L9A_1P8 [6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]
GPIO_39 GPIO_104 0201
[6,22] CCI_I2C_SCL1 AG5 L3 MSS_LTE_COXM_RXD [32]
GPIO_40 GPIO_105
[22] 48M_AVDD_2P85_EN AH4 N3 SWR_TX_CLK [24] FORCE_USB_BOOT FORCE_USB_POLARITY_SEL FORCE_USB_BOOT FUNCTION
GPIO_41 GPIO_106
[22] CAM2_RST_N FrontCam AJ3 N4 SWR_TX_DATA0 [24]
GPIO_42 GPIO_107
[16] AH3 N5 [24] GND GND Normal Boot -Legacy
FL_STROBE_TRIG GPIO_43 GPIO_108 SWR_TX_DATA1

[22] CAM_MCLK3 R0604 0R TP0601 T3's BOOT_CONFIG[2], unuseful for customer and they can remove it AH8 M1 R0621 0R MSS_LTE_COXM_TXD [32]

T
0402 GPIO_44 GPIO_109 0201
PULLED UP GND EDL Mode -Legacy
[22] CAM4_8M_RST_N RearCam8M AG8 M2 SWR_RX_CLK [24]
GPIO_45 GPIO_110
[22] CAM1_2MA_RST_N RearCam2M_A AH7 L1 SWR_RX_DATA0 [24]
GPIO_46 GPIO_111 PULLED UP PULLED UP Normal Boot -Polarity Inversion
C0604 [22] RearCam2M_B [24]
CAM3_2MB_RST_N AE8 M5 SWR_RX_DATA1
GPIO_47 GPIO_112
NC [22] CAM0_48M_RST_N RearCam48M AD8
GPIO_48 GPIO_113
AF3 PRI_MI2S_SCK AUDIO_MI2S_SCK [24] GND PULLED UP EDL Mode -Polarity Inversion

[22] FRONTCAM_DVDD_EN AG7 AJ2 PRI_MI2S_WS AUDIO_MI2S_WS [24]

1
GPIO_49 GPIO_114
[27] QLINK_REQUEST AG20 AH2 PRI_MI2S_DATA0 AUDIO_MI2S_D0 [24]
GPIO_50 GPIO_115
[27] QLINK_ENABLE AE19 AG2 PRI_MI2S_DATA1 AUDIO_MI2S_D1 [24]
GPIO_51 GPIO_116
AG26 AH6 CAM8M_AVDD_EN [22]
TP0603 T3's MODEM_FROM_BOOT , unuseful for customer and they can remove it GPIO_52 GPIO_117
reserve R0611 PU circuit for eMCP/uMCP campatible design
PRX_TUNER_SW1 AF21 AJ6 BOOT_CONFIG[3] R0611 10K_NC VREG_L9A_1P8
[26] GPIO_53 GPIO_118 0201 [6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]
AG22 AJ5 REAR48M_DVDD_EN [22]
PRX_TUNER_SW2

e
[26] GPIO_54 GPIO_119

[26] PRX_TUNER_SW3
BOOT_CONFIG[55] AJ27 AF7 WCD_RESET_N [24]
GPIO_55 GPIO_120
[26] PRX_TUNER_SW4 BOOT_CONFIG[0] AE20 P5 QCA_SB_CLK [32]
GPIO_56 GPIO_121

l
AH26 P4 QCA_SB_DATA [32]
[28] LNA_PRX_B3_EN GPIO_57 GPIO_122
AH25 N1 MIPI_SEL [22]
[29] LNA_PRX_B41_EN GPIO_58 GPIO_123
AJ25 N2 MIPI_OE_N [22]

i
[29] LNA_PRX_B40_EN GPIO_59 GPIO_124
[27] RFFE1_DATA BOOT_CONFIG[10] AF16 AG4
GPIO_60 GPIO_125
[27] RFFE1_CLK AG17 AF5 SAR_CAP_RDY [29]
GPIO_61 GPIO_126
[30] RFFE2_DATA BOOT_CONFIG[11] AE15 AG3
GPIO_62 GPIO_127
[30] RFFE2_CLK AD15 AE4 ANT_CHECK [26]
GPIO_63 GPIO_128
[26] PRX_TUNER_SW5 BOOT_CONFIG[8] AJ18 AF22

b
GPIO_64 GPIO_129
AG23 VCM_2MB_AVDD_2P8_EN [22]
GPIO_130
AG24 CAM1_AVDD_2P85_EN [22]
GPIO_131
AG25 CAM_GPIO_2MFF_ID [22]
GPIO_132

o
B B

M
*

A_G_M-SENSOR
TOUCHSCREEN VREG_L9A_1P8 VREG_L9A_1P8
[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32] [6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]
2.2K_NC

2.2K_NC
2.2K

2.2K

0201

0201

DNI in default
0201

0201

R0724

R0725
R0701

R0702

[6,23,29] SNS_I3C_SCL

[6,21,24] APPS_I2C_SCL [6,23,29] SNS_I3C_SDA

[6,21,24] APPS_I2C_SDA

Reserve I3C bus pull up for I3C backwards compatible case

VREG_L12A_1P8
VREG_L9A_1P8
PL-SENSOR VREG_L12A_1P8 [6,19,21,22]
[6,19,21,22]
[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]

CAMERAS
A CAMERAS A
2.2K

2.2K
2.2K

2.2K

2.2K
2.2K

0201

0201
0201

0201

0201

R0710

R0709
0201
R0705

R0708

R0707
R0706

[6,23] SNS_I2C_SCL
[6,22] CCI_I2C_SCL1
[6,23] SNS_I2C_SDA [6,22] CCI_I2C_SCL0
[6,22] CCI_I2C_SDA1
[6,22] CCI_I2C_SDA0

<Company Name>

DRAWING NO: REV:

<Drawing Number><Revision>
6 5 4 3 2 1

D D

U0501-C
[20] EBI0_CA_CS_0 D8 CPU_SM6125_822NSP
EBI0_LP4X_CS0_LP3_CA0

m
[20] EBI0_CA_CS_1 D9
EBI0_LP4X_CS1_LP3_CA2
F15 R0801 240R/1% VREG_L6A_0P6
EBI0_CAL 0201
[8,13,19,20]
[20] EBI0_CA_CK_C E11
EBI0_LP4X_CLK_C

[20] EBI0_CA_CK_T D11


EBI0_LP4X_CLK_T

o
[20] EBI0_CA_CKE_0 E9
EBI0_LP4X_CKE0_LP3_CKE0

[20] EBI0_CA_CKE_1 E10


EBI0_LP4X_CKE1

[20] EBI0_DMI_0 D6
EBI0_LP4X_DMI0_LP3_DQ21

[20] EBI0_DMI_1 A12 A6 EBI0_DQ_0 [20]


EBI0_LP4X_DMI1_LP3_DQ2 EBI0_LP4X_DQ0_LP3_DQ20

c
B6 EBI0_DQ_1 [20]
EBI0_LP4X_DQ1_LP3_DQ19
[20] EBI0_DQS_C_0 D7 B7 EBI0_DQ_2
EBI0_LP4X_DQS0_C_LP3_DQS2_C EBI0_LP4X_DQ2_LP3_DQ23 [20]
E7 A8

.
[20] EBI0_DQS_T_0 EBI0_LP4X_DQS0_T_LP3_DQS2_T EBI0_LP4X_DQ3_LP3_DMI2 EBI0_DQ_3 [20]
E5 EBI0_DQ_4 [20]
EBI0_LP4X_DQ4_LP3_DQ18
B8 EBI0_DQ_5 [20]
EBI0_LP4X_DQ5_LP3_DQ22

[20] EBI0_DQS_C_1 E13 E6 EBI0_DQ_6 [20]


EBI0_LP4X_DQS1_C_LP3_DQS0_C EBI0_LP4X_DQ6_LP3_DQ16

C [20] EBI0_DQS_T_1 D13


EBI0_LP4X_DQS1_T_LP3_DQS0_T
EBI0_LP4X_DQ7_LP3_DQ17
D5 EBI0_DQ_7 [20] C
E14

h
EBI0_LP4X_DQ8_LP3_DQ7 EBI0_DQ_8 [20]
D14 EBI0_DQ_9 [20]
EBI0_LP4X_DQ9_LP3_DMI0
B14 EBI0_DQ_10 [20]
EBI0_LP4X_DQ10_LP3_DQ3
[20] EBI0_CA_CA_0 D10
EBI0_LP4X_CA0_LP3_CS0
B12 EBI0_DQ_11 [20]
EBI0_LP4X_DQ11_LP3_DQ1
[20] EBI0_CA_CA_1 B11
EBI0_LP4X_CA1_LP3_CS1
B13 EBI0_DQ_12 [20]
EBI0_LP4X_DQ12_LP3_DQ4
[20] EBI0_CA_CA_2 A9
EBI0_LP4X_CA2
A11

c
EBI0_LP4X_DQ13_LP3_DQ0 EBI0_DQ_13 [20]
[20] EBI0_CA_CA_3 B9
EBI0_LP4X_CA3_LP3_CA3
E12 EBI0_DQ_14 [20]
EBI0_LP4X_DQ14_LP3_DQ5
[20] EBI0_CA_CA_4 B10
EBI0_LP4X_CA4_LP3_CA4
D12 EBI0_DQ_15 [20]
EBI0_LP4X_DQ15_LP3_DQ6
[20] EBI0_CA_CA_5 E8
EBI0_LP4X_CA5_LP3_CA1

T e
e 1
l
R0802 240R/1%_NC
VREG_L6A_0P6

i
0201
[8,13,19,20]

0201
U0501-D R0803
1K/1%_NC
CPU_SM6125_822NSP
[20] EBI1_CA_CS_0 E25
EBI1_LP4X_CS0_LP3_CA7
F18

b
EBI1_TEST
[20] EBI1_CA_CS_1 E24
EBI1_LP4X_CS1_LP3_CA6

[20] EBI1_CA_CK_C D22


EBI1_LP4X_CLK_C_LP3_CLK_C
B29 DDR_RESET_N [20]
DDR_RESET_N
[20] EBI1_CA_CK_T E22
EBI1_LP4X_CLK_T_LP3_CLK_T

B B

o
[20] EBI1_CA_CKE_0 D24
EBI1_LP4X_CKE0
[20] EBI1_CA_CKE_1 D23
EBI1_LP4X_CKE1_LP3_CKE1

[20] EBI1_DMI_0 E27


EBI1_LP4X_DMI0_LP3_DQ26
[20] EBI1_DMI_1 A20
EBI1_LP4X_DMI1_LP3_DQ14 [20]
A26 EBI1_DQ_0
EBI1_LP4X_DQ0_LP3_DQ27
B26 EBI1_DQ_1 [20]
[20] EBI1_LP4X_DQ1_LP3_DQ28
EBI1_DQS_C_0 E26
EBI1_LP4X_DQS0_C_LP3_DQS3_C [20]
B25 EBI1_DQ_2

M
[20] EBI1_LP4X_DQ2_LP3_DQ24
EBI1_DQS_T_0 D26
EBI1_LP4X_DQS0_T_LP3_DQS3_T [20]
A24 EBI1_DQ_3
EBI1_LP4X_DQ3_LP3_DMI3
D28 EBI1_DQ_4 [20]
[20] EBI1_LP4X_DQ4_LP3_DQ29
EBI1_DQS_C_1 D20
EBI1_LP4X_DQS1_C_LP3_DQS1_C [20]
B24 EBI1_DQ_5
[20] EBI1_LP4X_DQ5_LP3_DQ25
EBI1_DQS_T_1 E20
EBI1_LP4X_DQS1_T_LP3_DQS1_T [20]
D27 EBI1_DQ_6
EBI1_LP4X_DQ6_LP3_DQ31
E28 EBI1_DQ_7 [20]
EBI1_LP4X_DQ7_LP3_DQ30
D19 EBI1_DQ_8 [20]
EBI1_LP4X_DQ8_LP3_DQ8
[20] EBI1_CA_CA_0 E23 E19 EBI1_DQ_9 [20]
EBI1_LP4X_CA0_LP3_CA5 EBI1_LP4X_DQ9_LP3_DMI1
[20] EBI1_CA_CA_1 B21 B18 EBI1_DQ_10 [20]
EBI1_LP4X_CA1 EBI1_LP4X_DQ10_LP3_DQ12
[20] EBI1_CA_CA_2 A23 B20 EBI1_DQ_11 [20]
EBI1_LP4X_CA2_LP3_CA8 EBI1_LP4X_DQ11_LP3_DQ13
[20] EBI1_CA_CA_3 B23 B19 EBI1_DQ_12 [20]
EBI1_LP4X_CA3 EBI1_LP4X_DQ12_LP3_DQ11
[20] EBI1_CA_CA_4 B22 A21 EBI1_DQ_13 [20]
EBI1_LP4X_CA4 EBI1_LP4X_DQ13_LP3_DQ15
[20] EBI1_CA_CA_5 D25 D21 EBI1_DQ_14 [20]
EBI1_LP4X_CA5_LP3_CA9 EBI1_LP4X_DQ14_LP3_DQ10
E21 EBI1_DQ_15 [20]
EBI1_LP4X_DQ15_LP3_DQ9

A A

<Company Name>

DRAWING NO: REV:

<Drawing Number><Revision>
6 5 4 3 2 1

D D

o m
C

. c C

[22] MIPI_CSI0_CLK_P

c h
e
[22] MIPI_CSI0_CLK_N
[22] MIPI_CSI0_LANE0_P
[22] MIPI_CSI0_LANE0_N
[22] MIPI_CSI0_LANE1_P
REAR CAMERA
[22] MIPI_CSI0_LANE1_N

T
[22]
MIPI_CSI0_LANE2_P
[22] MIPI_CSI0_LANE2_N U0501-E

[22] CPU_SM6125_822NSP
MIPI_CSI0_LANE3_P
R4
CSI0_NC_CLK_P
R3 F33 MIPI_DSI0_CLK_N [21]
[22] MIPI_CSI0_LANE3_N CSI0_A0_CLK_M DSI0_CLK_M
R2
CSI0_B0_LN0_P
R1 F34 MIPI_DSI0_CLK_P [21]
CSI0_C0_LN0_M DSI0_CLK_P
T4

1
CSI0_A1_LN1_P
T3 G33 MIPI_DSI0_LANE0_N [21]
CSI0_B1_LN1_M DSI0_LN0_M
U4
[22] MIPI_CSI1_CLK_P CSI0_C1_LN2_P
U3 G34 MIPI_DSI0_LANE0_P [21]
CSI0_A2_LN2_M DSI0_LN0_P
[22] MIPI_CSI1_CLK_N U2
CSI0_B2_LN3_P
U1 J33 MIPI_DSI0_LANE1_N [21] DISPLAY
[22] MIPI_CSI1_LANE0_P CSI0_C2_LN3_M DSI0_LN1_M
[22] MIPI_CSI1_LANE0_N J34 MIPI_DSI0_LANE1_P [21]
DSI0_LN1_P
MIPI_CSI1_LANE1_P V1 G31 MIPI_DSI0_LANE2_N [21]
CSI1_NC_CLK_P DSI0_LN2_M
V2

e
CSI1_A0_CLK_M
MIPI_CSI1_LANE1_N V3 G32 MIPI_DSI0_LANE2_P [21]
CSI1_B0_LN0_P DSI0_LN2_P
V4
CSI1_C0_LN0_M
W3 H32 MIPI_DSI0_LANE3_N [21]
CSI1_A1_LN1_P DSI0_LN3_M
W4
CSI1_B1_LN1_M
Y1 H31 MIPI_DSI0_LANE3_P [21]

l
[22] RDP0_A_R CSI1_C1_LN2_P DSI0_LN3_P
[22] Y2
RDN0_A_R CSI1_A2_LN2_M
[22] Y3
CAM_CLKP_F CSI1_B2_LN3_P
[22] Y4
CAM_CLKN_F CSI1_C2_LN3_M R0901
K34 0201
DSI0_REXT_PLL

i
1.4K/1%
AA3
AA4
CSI2_NC_CLK_P MIPI_DSI0_REXT_PLL: DNI on Internal test chip, 1.4K on SM6150
CSI2_A0_CLK_M
AB1 J31
CSI2_B0_LN0_P DSI1_CLK_M
AB2
CSI2_C0_LN0_M
AB3 J32
CSI2_A1_LN1_P DSI1_CLK_P
AB4
CSI2_B1_LN1_M
[22] AC3
MIPI_CSI2_CLK_P CSI2_C1_LN2_P
AC4
[22] CSI2_A2_LN2_M
AD1

b
MIPI_CSI2_CLK_N CSI2_B2_LN3_P
AD2
CSI2_C2_LN3_M
[22] MIPI_CSI2_LANE0_P
[22] MIPI_CSI2_LANE0_N

[22] MIPI_CSI2_LANE1_P
FRONT CAMERA [22] MIPI_CSI2_LANE1_N

o
B [22] MIPI_CSI2_LANE2_P B
[22] MIPI_CSI2_LANE2_N

[22] MIPI_CSI2_LANE3_P

[22] MIPI_CSI2_LANE3_N

M
A A

<Company Name>

DRAWING NO: REV:

<Drawing Number><Revision>
5
6 5 4 3 2 1

D D

o m
. c
U0501-F
CPU_SM6125_822NSP
[32] WLAN_BT_COEX_CLK H1
WLAN_CXM_CLK

[32] WLAN_BT_COEX_DATA J1
WLAN_CXM_DATA
E1 WLAN_XO_CLK [17]
WLAN_XO_CLK

C C

h
[32] WL_CMD_CLK F1
WLAN_BBD_CLK
[32] WL_CMD_DATA G1 AA33 R1004 3K
WLAN_BBD_DATA QREFS_CXO_REXT 0201
3.01K_1%

R1003 6.04K/1% G2
0201 WLAN0_REXT
AF11 QPHY_CLK_M [27]
QLINK_CLK_M

c
AG11 QPHY_CLK_P [27]
QLINK_CLK_P
[32] WL_RX_BB_I_N B2
WLAN_RX_I_M
[32] WL_RX_BB_I_P A2
WLAN_RX_I_P
[32] WL_RX_BB_Q_N B1
WLAN_RX_Q_M
[32] WL_RX_BB_Q_P C1
WLAN_RX_Q_P

e
AH13 QPHY_DL0_M [27]
QLINK_DL0_M
C1004 C1003 C1002 C1001
AJ13 QPHY_DL0_P [27]
QLINK_DL0_P
NC NC NC NC AG12
QLINK_DL1_M QPHY_DL1_M [27]
AF12 QPHY_DL1_P [27]
QLINK_DL1_P
[32] WL_TX_BB_I_N J4
WLAN_TX_I_M AJ11 QPHY_DL2_M [27]
QLINK_DL2_M
[32] WL_TX_BB_I_P H4 AH11 QPHY_DL2_P [27]

T
WLAN_TX_I_P QLINK_DL2_P
[32] WL_TX_BB_Q_N H3 AG13 QPHY_UL0_M [27]
WLAN_TX_Q_M QLINK_UL0_M
[32] WL_TX_BB_Q_P J3 AF13 QPHY_UL0_P [27]
WLAN_TX_Q_P QLINK_UL0_P

C1008 C1007 C1006 C1005

NC NC NC NC

e 1
i l
o b
B B

M
A A

<Company Name>

21_LTE_B7

CODE: SIZE: DRAWING NO: REV:

DRAWN: DATED:

LiuMengya <Drawn Date> <Code> A0 <Drawing Number><Revision>


6 5 4 3 2 1

D D

o m
c
U0501-G
CPU_SM6125_822NSP

[11,13,18,19] VREG_S5A AA19 L28 VREG_L10A_1P8 [12,13,17,19]


VDDMX_1 VDD_QFPROM

.
AA20
VDDMX_1
AA28
VDDMX_1
AB28
VDDMX_1
J12
VDDMX_1
J26
VDDMX_1 [12,17]
L11 AC18 VREF_MSM
VDDMX_1 VDDPX_VBIAS_SDC
L12
VDDMX_1
L13
VDDMX_1
L15
C L16
VDDMX_1
VDDMX_1 C

h
L17
VDDMX_1 C1101 C1103
L19
VDDMX_1
L20
VDDMX_1
L21 1.0uF 100nF
VDDMX_1
L22 AA25
VDDMX_1 VDD_APC0
L23 AA26
VDDMX_1 VDD_APC0
L24 AB25
VDDMX_1 VDD_APC0
L26 AB26
VDDMX_1 VDD_APC0
N9 AC25
VDDMX_1 VDD_APC0
T24 AC26
VDDMX_1 VDD_APC0

c
U11 AD25
VDDMX_1 VDD_APC0
U12 AD26
VDDMX_1 VDD_APC0
U13 U24
VDDMX_1 VDD_APC0
U14 U26
VDDMX_1 VDD_APC0
U15 V25
VDDMX_1 VDD_APC0
U16 V26
VDDMX_1 VDD_APC0
U17 W20
VDDMX_1 VDD_APC0
U18 W21
VDDMX_1 VDD_APC0
U19 W22
VDDMX_1 VDD_APC0
U20 W25
VDDMX_1 VDD_APC0

e
U22 Y20
VDDMX_1 VDD_APC0
U23 Y21
VDDMX_1 VDD_APC0
U28 Y22
VDDMX_1 VDD_APC0
V10 Y23
VDDMX_1 VDD_APC0
W28 Y24
VDDMX_1 VDD_APC0
Y18 Y25
VDDMX_1 VDD_APC0 [11,18]
Y26 VREG_S1A_S2A
VDD_APC0

1 T
i l e VREG_S5A_SNS
[18]

b
BULK CAPS
[11,13,18,19] VREG_S5A
MX

o
B C1427 C1430 C1433 C1435 C1437 C1440 C1477 C1488 C1487 C1450 C1452 C1454
B
1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 10uF 10uF 10uF

M
RMT_VREG_S1A_S2A_P
[18]

BULK CAPS
VREG_S1A_S2A
APC
[11,18]

C1489 C1490 C1491 C1492 C1447 C1448 C1449 C1451 C1453 C1456
C1459 C1462 C1465 C1468 C1471 C1472

2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF
10uF 10uF 10uF 10uF 10uF 10uF

RMT_VREG_S1A_S2A_M
[18]

A A

<Company Name>

DRAWING NO: REV:

<Drawing Number><Revision>
6 5 4 3 2 1

D D

U0501-H

o m
c
CX MODEM CPU_SM6125_822NSP

VREG_S3A_S4A K13 AC14 VIO_OUT [16,17]


VDDCX_1 VDDPX_0
K14

.
[12,18] VDDCX_1
K15
VDDCX_1
K16 F11
VDDCX_1 VDDPX_1_A
K17 F14 VREG_S8A_VDD2 [20]
VDDCX_1 VDDPX_1_B
K18 F19
VDDCX_1 VDDPX_1_C
K19 F22
VDDCX_1 VDDPX_1_D
K20 G26
VDDCX_1 VDDPX_1_E
K24
VDDCX_1
K25
R1203 is compatible design for no SD card using case
C N10
N12
VDDCX_1
VDDCX_1 C

h
VDDCX_1
N14
VDDCX_1
N16 AC19 VREG_L5A_2P96 [19,25]
VDDCX_1 VDDPX_2
N18
VDDCX_1
N20
VDDCX_1
N22
VDDCX_1
N24
VDDCX_1
N26 AA6 VREG_L9A_PX3_1P8 [12]
VDDCX_1 VDDPX_3
R8 AC10
VDDCX_1 VDDPX_3
R10 AC29
R11
VDDCX_1 VDDPX_3
AD17 MSM PX_3

c
VDDCX_1 VDDPX_3 C1210 C1211 C1212 C1201
R12 AD20
VDDCX_1 VDDPX_3
R13 F29
VDDCX_1 VDDPX_3
R14 L30 1.0uF 1.0uF 1.0uF 1.0uF
VDDCX_1 VDDPX_3
R15 P6
VDDCX_1 VDDPX_3
R16 W30
VDDCX_1 VDDPX_3
R17 F12
VDDCX_1 VDDPX_3
R18 F21
VDDCX_1 VDDPX_3
R19
VDDCX_1 Passive_BB
R20
VDDCX_1
R21

e
VDDCX_1
R22
R23
VDDCX_1
AC16 UIM1 VREG_L19A_1P8 [19,25]
VDDCX_1 VDDPX_5
R24
R25
VDDCX_1
AC17 UIM2 VREG_L20A_1P8 [19,25]
VDDCX_1 VDDPX_6
W8
W10
VDDCX_1
G29 eMMC VREG_L9A_1P8 [6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]
VDDCX_1 VDDPX_7
W12
W14
VDDCX_1
G28 UFS G28 can float if UES is not used VREG_L18A_1P232 [13,19]
VDDCX_1 VDDPX_10
W16
W17
VDDCX_1
V30 CXO VREG_L10A_1P8 [11,13,17,19]
VDDCX_1 VDDPX_11

T
Y8
VDDCX_1
Y10 AB16 VREF_MSM [11,17]
VDDCX_1 VDDPX_VBIAS_UIM
Y14
VDDCX_1

J10 WCSS CX VREG_L8A_0P736 [19]


VDD_WCSS_CX
J11
VDD_WCSS_CX

1
C1202 C1203 C1204 C1205 C1206 C1207 C1213 C1208 C1209

100nF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 4.7uF

Passive_BB
Passive_BB

i l e RTM_VREG_S3A_S4A_P
[18]

b
BULK CAPS
[12,18] VREG_S3A_S4A
CX MODEM

B B

o
C1428 C1431 C1434 C1436 C1439 C1442 C1444 C1446 C1455 C1458 C1461 C1464 C1467 C1470

1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 10uF 10uF 10uF 10uF 10uF 10uF

RTM_VREG_S3A_S4A_M
[18]

M
[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32] VREG_L9A_1P8
MSM PX_3 J40
VREG_L9A_PX3_1P8 [12]

C1408 C1412 C1415 C1418 C1421

1.0uF 1.0uF 1.0uF 1.0uF 1.0uF

A A

<Company Name>

DRAWING NO: REV:

<Drawing Number><Revision>
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

o m
. c
h
C C

c
U0501-I VREG_L4A_0P928 [13,19]
CPU_SM6125_822NSP

C1319 C1323 C1353 C1349


VREG_S5A V23 AC12
VDDA_APC0_PLL VDDA_QLINK_LV_CK

e
[11,13,18,19] 1.0uF 1.0uF 2.2uF 2.2uF
AB12
C1345 C1339 C1340 VDDA_QLINK_LV
H10
VDDA_EBI0_A
H12 F17
VDDA_EBI0_B VDDA_UFS_CORE
1.0uF 1.0uF 1.0uF H14
VDDA_EBI0_C
H19
VDDA_EBI1_A
H21
VDDA_EBI1_B
H23
VDDA_EBI1_C
G17 eMMC compatible UFS soltion VREG_L10A_1P8 [11,12,13,17,19]
VDDA_UFS_1P8
VREG_L4A_0P928 G16

T
VDDA_EBI_PLL
[13,19]
F13 VREG_L6A_0P6 [8,13,19,20]
VDDIO_CK_EBI0
C1308 F20
VDDIO_CK_EBI1

1.0uF
R28 VREG_L7A_0P928 [19]
VDDA_USB_SS_DP_CORE
T8
VDDA_CSI0_1P2
U8 P30
VDDA_CSI1_1P2 VDDA_USB_SS_DP_1P8
VREG_L18A_1P232 V8

1
VDDA_CSI2_1P2
[12,13,19] N28
VDD_USB_HS_CORE C1326 C1331 C1335 C1346 C1351
K29
C1306 C1309 C1312 C1315 VDDA_DSI_PLL
H28 1.0uF 1.0uF 1.0uF 1.0uF 2.2uF
VDDA_DSI_1P2
1.0uF 1.0uF 1.0uF 1.0uF

VREG_S5A J29
VDDA_DSI_0P9 [11,12,13,17,19]
[11,13,18,19] N30 VREG_L10A_1P8

e
VDDA_USB_HS_1P8
L10
VDDA_AUDIO_PLL
N29 VREG_L15A_3P104 [19]
VDDA_USB_HS_3P1
VREG_L10A_1P8 T17
VDDA_CAMSS_PLL
[11,12,13,17,19] F16 VREG_L18A_1P232 [12,13,19]
VDDA_PLL_HV_CC_EBI

l
C1302 C1305 C1314 K8 VREG_L17A_1P304 [19,32]
VDDA_WCSS_ADCDAC_0
J8
VDDA_WCSS_ADCDAC_1
L7
1.0uF 1.0uF 1.0uF VDDA_WCSS_PLL

i
H16 C1318 C1322 C1325 C1330
VDDA_CC_EBI
G10 100nF 1.0uF 1.0uF 1.0uF
VDDIO_EBI_A
VREG_L16A_1P8 G11
VDDIO_EBI_A
[19,32] G14
VDDIO_EBI_B
G25 G15
VDDA_QREFS_0P9_4 VDDIO_EBI_B
AD28 G18
VDDA_QREFS_0P9_5 VDDIO_EBI_C
VREG_S5A AD22 G19
VDDA_QREFS_0P9_6 VDDIO_EBI_C
[11,13,18,19] AB13 G22

b
VDDA_QREFS_0P9_7 VDDIO_EBI_D
G23 VREG_L6A_0P6 [8,13,19,20]
VDDIO_EBI_D
VREG_L4A_0P928
[13,19] C1355
C1327 C1341 C1344

C1307 C1311 C1316 C1317 10uF


1.0uF 1.0uF 1.0uF

1.0uF 1.0uF 1.0uF 1.0uF

o
B B

M
A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 13
OF 34
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

o m
. c
h
C C

e c
T
U0501-J
CPU_SM6125_822NSP

A5 AD9
VSSX_0 VSSX_0
A14 AD11
VSSX_0 VSSX_0
A15 AD13
VSSX_0 VSSX_0
A17 AD16
VSSX_0 VSSX_0
A18 AD19
VSSX_0 VSSX_0
A27 AD23

1
VSSX_0 VSSX_0
A29 AD24 U0501-K
VSSX_0 VSSX_0
A32 AD27
VSSX_0 VSSX_0 CPU_SM6125_822NSP
A34 AD29
VSSX_0 VSSX_0
AA1 AD31
VSSX_0 VSSX_0
AA2 AE1 AJ29 C24
VSSX_0 VSSX_0 VSSX_0 VSSX_0
AA5 AE2 AJ32 C25
VSSX_0 VSSX_0 VSSX_0 VSSX_0
AA7 AE3 AJ34 C26
VSSX_0 VSSX_0 VSSX_0 VSSX_0
AA8 AE5 B5 C27
VSSX_0 VSSX_0 VSSX_0 VSSX_0
AA21 AE10 B15 C28 U0501-L
VSSX_0 VSSX_0 VSSX_0 VSSX_0
AA22 AE11 B17 C29

e
VSSX_0 VSSX_0 VSSX_0 VSSX_0 CPU_SM6125_822NSP
AA24 AE12 B27 D1
VSSX_0 VSSX_0 VSSX_0 VSSX_0
AA27 AE14 B28 D2
VSSX_0 VSSX_0 VSSX_0 VSSX_0
AA29 AE24 B31 D15 M22 T20
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AA30 AE25 B32 D18 M24 T21
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AA31 AE26 C5 D29 M26 T22

l
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AA34 AE27 C6 D30 M29 T23
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AB5 AE28 C7 E2 M30 T25
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AB7 AE30 C8 E15 M32 T26
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AB9 AE34 C9 E18 M34 T29
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AB11 AF4 C10 E29 N6 T33

i
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AB14 AF8 C11 E30 N7 U5
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AB23 AF10 C12 E33 N31 U6
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AB24 AF14 C13 E34 N32 U7
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AB29 AF15 C14 F2 P1 U10
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AB33 AF17 C15 F3 P2 U21
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AC1 AF20 C16 F6 P3 U25
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AC2 AF23 C17 F7 P7 U30
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AC5 AF26 C18 F8 P11 U31
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AC6 AF31 C19 F9 P12 U32
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AC7 AG10 C20 F10 P13 V7

b
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AC8 AG14 C21 F23 P14 V12
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AC9 AH10 C22 F24 P15 V14
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AC11 AH12 C23 F25 P17 V16
VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0 VSSX_0
AC13 AH14 G3 F26 P18 V19
VSSX_0 VSSX_0 VSSA_WCSS_ADCDAC_0 VSSX_0 VSSX_0 VSSX_0
AC21 AJ1 G4 F27 P19 V20
VSSX_0 VSSX_0 VSSA_WCSS_ADCDAC_0 VSSX_0 VSSX_0 VSSX_0
AC22 AJ4 H5 F28 P20 V21
VSSX_0 VSSX_0 VSSA_WCSS_ADCDAC_0 VSSX_0 VSSX_0 VSSX_0
AC23 AJ7 J5 F31 P21 V24
VSSX_0 VSSX_0 VSSA_WCSS_ADCDAC_0 VSSX_0 VSSX_0 VSSX_0
AC24 AJ10 K4 F32 P23 V28
VSSX_0 VSSX_0 VSSA_WCSS_ADCDAC_0 VSSX_0 VSSX_0 VSSX_0
AC27 AJ12 K5 G7 P24 W1
VSSX_0 VSSX_0 VSSA_WCSS_ADCDAC_0 VSSX_0 VSSX_0 VSSX_0
AC28 AJ14 K7 G12 P25 W2

o
VSSX_0 VSSX_0 VSSA_WCSS_ADCDAC_0 VSSX_0 VSSX_0 VSSX_0
AC34 AJ17 A1 H2 P31 W5
VSSX_0 VSSX_0 VSSA_WCSS_ADCDAC_1 VSSX_0 VSSX_0 VSSX_0
B AD3
AD4
VSSX_0
VSSX_0
VSSX_0
VSSX_0
AJ20
AJ23
A3
B3
VSSA_WCSS_ADCDAC_1
VSSA_WCSS_ADCDAC_1
VSSX_0
VSSX_0
H8
H30
R5
R6
VSSX_0
VSSX_0
VSSX_0
VSSX_0
W6
W7 B
AD5 AJ26 B4 H33 R7 W24
VSSX_0 VSSX_0 VSSA_WCSS_ADCDAC_1 VSSX_0 VSSX_0 VSSX_0
C2 H34 R29 W26
VSSA_WCSS_ADCDAC_1 VSSX_0 VSSX_0 VSSX_0
C3 J2 R30 W31
VSSA_WCSS_ADCDAC_1 VSSX_0 VSSX_0 VSSX_0
C4 J13 R33 W32
VSSA_WCSS_ADCDAC_1 VSSX_0 VSSX_0 VSSX_0
E3 J14 T1 Y7
VSSA_WCSS_ADCDAC_1 VSSX_0 VSSX_0 VSSX_0
E4 J15 T2 Y11
VSSA_WCSS_ADCDAC_1 VSSX_0 VSSX_0 VSSX_0
F4 J16 T7 Y15
VSSA_WCSS_ADCDAC_1 VSSX_0 VSSX_0 VSSX_0
F5 J18 T10 Y16
VSSA_WCSS_ADCDAC_1 VSSX_0 VSSX_0 VSSX_0
H6 J19 T11 Y17
VSSA_WCSS_ADCDAC_1 VSSX_0 VSSX_0 VSSX_0
H7 J20 T12 Y19
VSSA_WCSS_ADCDAC_1 VSSX_0 VSSX_0 VSSX_0
J7 J21 T13 Y28

M
VSSGR_WCSS_ADC_1 VSSX_0 VSSX_0 VSSX_0
V22 J22 T14 Y32
VSSA_APC0_PLL VSSX_0 VSSX_0 VSSX_0
M8 J24 T15 Y33
VSSA_AUDIO_PLL VSSX_0 VSSX_0 VSSX_0
T16 J25 T18 Y34
VSSA_CAMSS_PLL VSSX_0 VSSX_0 VSSX_0
M7 J30
VSSA_WCSS_PLL VSSX_0
K3
VSSX_0
K10
VSSX_0
K11
VSSX_0
K21
VSSX_0
K22
VSSX_0
K31
VSSX_0
K32
VSSX_0
K33
VSSX_0
L6
VSSX_0
L29
VSSX_0
M4
VSSX_0
M6
VSSX_0
M12
VSSX_0
M14
VSSX_0
M16
VSSX_0
M18
VSSX_0
M20
VSSX_0

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 14
OF 34
Use C1301= 4.7uF for Single Charging Config
Use C1301 = 2.2uF for Parallel Charging Config

PMI632 VIN limit 10V U1502-A

PMI632

[26] USB_VBUS

C1505

16V 4.7uF/35V

27pF
C1513
1 USB_IN_0 USB_IN_MID_0 19 USB_IN_MID [16]
10 USB_IN_1 USB_IN_MID_1 20
C1507 C1503
11 USB_IN_2 USB_IN_MID_2 21
via directly to GND 4.7uF/35V NC
Place C1303 close to
boot_cap and vsw_chg

[6] USB_PHY_PS 41 CC_OUT BOOT_CAP 40

[26] USB_CC1 46 CC1_ID C1501


25v
[26] USB_CC2 47 CC2 VSW_CHG_0 28 via directly to GND

29 27nF
VSW_CHG_1
Isat depends on the different applications: charging current/flash current
C1511 C1512 30 L1501 1uH
VSW_CHG_2 VPH_PWR
220pF 220pF 49 [16,17,18,19,21,22,23,24,29,31]
[26] USB_PMI_DP USB_DP

USB_PMI_DM 58 USB_DM FV1501


[26] C1509 C1506
PGND_CHG_0 37

m
10uF/10V 10uF/10V
PGND_CHG_1 38

[26] 74 VBAT_SNS_P PGND_CHG_2 39


VBATT_CONN_VSENSE_P
[26] 75 VBAT_PACK_SNS_M
VBATT_CONN_VSENSE_M
Layout Note : PACK_SNS_M should have a dedicated route to battery connector negative sense
NOTE: recommand to use battery NTC values 100K, B=4250 55 via directly to GND
VPH_PWR_0

o
BAT_THERM 76 BAT_THERM VPH_PWR_1 56
[26]
BAT_ID 67 BAT_ID VPH_PWR_2 57
[26]

BAT_THERM have the internal pull-up resistor


The pull up options are 30K,100K,400K 50 GND_CHG

c
48 REF_GND_CHG

VBATT_PWR_0 64 VBAT [26]

.
VBATT_PWR_1 65 C1510

VBATT_PWR_2 66 10uF/10V
via directly to GND VBATT_PWR_3 73

h
VARB 32 BOOT_PWR net is 5VDC,cap is 0603. Do not use 0402 as may derate to -80%.
via directly to GND
C1508
<???>
BOOT_PWR 22
10V 100nF

C1502

c
GND_PSUB_CHG 12 4.7uF/35V

PMI632
PMI_VDD_CAP net is 5VDC,cap is 0603. Do not use 0402 as may derate to -80%
via directly to GND

U1502-F

T e
1
PMI632

25 CMN_GND_1
33

e
CMN_GND_2
42 CMN_GND_3
51 CMN_GND_4

l
59 CMN_GND_5
60 CMN_GND_6
PMI632

b i
o
M
A

NOT TO BE USED, COPIED, REPRODUCED IN WHOLE OR IN PART, NOR


ITS CONTENTS REVEALED IN ANY MANNER TO OTHERS WITHOUT THE
EXPRESS WRITTEN PERMISSION OF QUALCOMM.

PMI8952 Charger
QUALCOMM Technologies,Inc.
5775 Morehouse Drive
San Diego, CA 92121-1714
U.S.A.

Title
Sheet
Size Name Rev

Date: Sheet of

1
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U1502-B

PMI632 AVDD_BYP should be routed away from noisy traces


U1502-E
Trace fronpin to cap and ONE dedicated via fron cap to main groung plane.
D C1604
PMI632 D
C/0201/100/NF/6.3V/10%
Dedicated trace from REF_BYP REF_GND to cap
100nF
REF_BYP and REF_GND should be routed away from noisy trace LCD_VSP

10uF_NC
VPH_PWR [21]
[12,17] 35 63

10uF
VIO_OUT VDD_MSM_IO AVDD_BYP [15,16,17,18,19,21,22,23,24,29,31]
C1606

1.0uF/10V 6 VDD_DISP VDISP_P_OUT 36


[17,26] 2

C1617

C1609
KYPD_PWR_N1 KYPDPWR_N
C1613 C1612 NC1_VDISP_P_OUT 9
REF_BYP 54

REF_GND 53 100nF 1.0uF


L1601 4.7uH 26 VSW_DISP

10uF
[5,17] PM_PON_RESET_N 45 PS_HOLD VPH_PWR
[15,16,17,18,19,21,22,23,24,29,31] 8
VDISP_M_OUT LCD_VSN [21]
FAULT_N will be NC on Shanti, SDM450 and Hathi chipsets.
4.7uH use MPH201610S4R7NT

10uF
10uF_NC
[17] FAULT_N 44 3
This pin is required for interfacing with future PMICs FAULT_N SYS_OK

C1607
18 VDISP_MID
16

C1602

C1605
GND_DISP_M

10uF

10uF
[5,17] SPMI_CLK 43 SPMI_CLK
R1611
0201
0R
PMI632_SYS_OK [17]
10uF 10V
[5,17] SPMI_DATA 34 SPMI_DATA
15 DISP_HW_EN

C1616

C1601
R1603 NC
R1601 390K 52 0201 VREG_L9A_1P8
0201 OPTION
[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32] 17
VDISP_CAP1
R1601 need confrim again with Qual 27
24 TEST_EN_VPP
PGND_DISP Layout Note:VDISP_CAPx
7 C1603 10uF
PD Resistance R1601 VDISP_CAP2 Place fly cap as close to the pin as possible.
OPTION PON Configuration

100K
PMI632
31 NC2_TST 10uF 10V Avoid routing VDISP_CAP1 trace under VDISP_M_OUT.
1 SPMI, Micro USB, FMB_DIS R = (Ground, 1K, 1.2K, 1.5K, 1.8K, and 2.2K) PMI632

R1602 0201
2 SPMI, Micro USB, FMB_EN R = (3.3K, 3.9K, 4.7K, and 5.6K)
Layout Note:DISP_HW_EN

m
3 I2C, Micro USB, FMB_DIS R = (8.2K, 10K, 12K, and 15K)
This signal is used for "Display Tap to Wake"
4 I2C, Micro USB, FMB_EN R = (22K, 27K, 33K, and 39K) If unused in HW, this pin should be connected to GND
I2C, Type-C, FMB_DIS R = (56K, 68K, 82K, and 100K Bench DC - Connect to a DIO for testability
5

6 I2C, Type-C, FMB_EN R = (150K, 180K, and 220K)

o
7 SPMI, Type-C, FMB_DIS R = (330K, 390K, and 470K)

8 SPMI, Type-C, FMB_EN R = (820K, 1M, 1.2M, and Open) U1502-D

PMI632

.c
U1502-C 71 72
[15] USB_IN_MID VIN_FLASH_0 F_LED1 F_LED1 [22]
PMI632 23 80
VPH_PWR PVDD F_LED2 1
[15,16,17,18,19,21,22,23,24,29,31] C1614
Note: place RT6 close to Hot spot between PMI632 and SMB1355
C1615 120pF
C1610 2

C 1.0uF/10V C

h
[16] 70 1uF_35V
[16] CHARGER_SKIN_THERM BOARD_ID2_NTC GPIO1 MV 81 13 CHG_LED [16]
VIN_FLASH_1 RGB_RED
[16] 79
MV
2

BOARD_ID0_PMI GPIO2
RGB_GRN 4
R1604

[16] CHARGER_SKIN_THERM 69 GPIO3 MV 14


[16] RGB_BLU
BOARD_ID1_NTC 78 GPIO4 MV
1

[6] FL_STROBE_TRIG R1613 0R 62


0201 GPIO5 LV

c
61
[21] WLED_EN GPIO6 LV PVDD is supply for RGB only 5
VIB_DRV_LDO_P VIB_DRV [16]
68 GPIO7 MV VDD_DISP is supply for VIB_DRV_LDO_P also along with LCDB PMI632
77 C1611
GPIO8 MV
PMI632 1.0uF

VREG_L9A_1P8
[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]

e
0201

R1612
NC

[16] BOARD_ID0_PMI

[16] BOARD_ID2_NTC

T
[16] BOARD_ID1_NTC
0201

0201

R1605 R1606
0201

24K 24K R1607


NC

e 1
i l
b
MOTO

1
J1601

1
ANT_CC0043-0054A J1602

o
ANT_CC0043-0054A
B B
[16] R1608 0R
VIB_DRV 0402

R1609
FV1601

1
C1619

0402
1
C1618 D1602
0201
0201

2
33pF

0R
2
DIODE-DFN0603_WSB5557Z-2/TR

M
WSB5557Z-2/TR
LESD8D5.0CAT5G

LED
10R
[16] CHG_LED 0402
R1610

C1608
D1601
100nF
WHITE,0603

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 16
OF 34
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

o m
. c
h
C C

c
Pls near the rear0 camera Pls near to the memory
Place near to the SDM about 1cm and put ino the shielding D

e
[17] CAM_THERM
[17] QUIET_THERM [17] EMMC_UFS_THERM

2
C1713

2
R1709
C1705 C1714

R1707

R1711
NC

T
NC

1
NC

1
Layout Note:
No trace shall be present in at-least two immediate layers below XTAL.

X1701 Route XTAL IN/OUT trace with

1
OW38477001
length between 3mm and 10mm

1 H1 H2 3

C1709 1.0uF

THRMSTR 4 PM_XO_THERM [17]

e
THRMSTR_GND 2 GND_XOADC [17]
C1703 1.0uF
U1701-B
PM6125 VPH_PWR

l
133 73
XTAL_IN AVDD_BYP
134 74
XTAL_IN DVDD_BYP
2
Note: XO GND should connect to XOADC_GND pin TEST_EN_VPP
121 102
using thin trace, then via to main ground plane XTAL_OUT VPH_PWR
77
VIO_IN VREG_L9A_1P8

i
under the XO_THERM cap ground 135
VCOIN [6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]
C1702

22uF

[16] PMI632_SYS_OK
116 87
[16,26] KYPD_PWR_N1 CBL_PWR_N VIO_OUT VIO_OUT [12,16]
C1712

115
KPD_PWR_N
10uF

[5,16] PM_PON_RESET_N 62
VREF_MSM VREF_MSM [11,12]
92
PON_RESET_N
[5] MSM_PS_HOLD R1704 C1716 100nF
127 51
0201 PS_HOLD VREF_LPDDR3

b
0R
[26] PM_RESIN_N1 103 R1705
RESIN_IN
55 [5,32]
SLEEP_CLK 0201 SLEEP_CLK
[16] FAULT_N 107 U1701-C
FAULT_N 0R
TP1702

C1708 PM6125
C1704

10uF

NC 109 44
VREG_RF_CLK GPIO_01
104 110 30
SPMI_CLK GND_RF GPIO_02

o
91 [17] CAM_THERM 15
[5,16] SPMI_CLK SPMI_DATA GPIO_03
C1707
1.0uF

[5,16] SPMI_DATA 47
GPIO_04
B VREG_L9A_1P8
111
VDD_LDO_XO_RF
VREG_XO
123
[26] KYPD_VOLP_N
21
GPIO_05
B
122
[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32] GND_XO
[17] EMMC_UFS_THERM 106
GPIO_06
[27] R1712 22R 100 [21] LCM_NTC 10
RF_CLK1 0201 RF_CLK1 GPIO_07

RF_CLK2 R1713 22R 88 101 [11,12,13,19] [21] 22


[32] 0201 RF_CLK2 BREG_BB VREG_L10A_1P8 BL_PWM_OUT GPIO_08
18
GPIO_09

M
75 C1706 100nF
REF_BYP C1701
R1702 0R 112
[5] LN_BB_CLK1 0201 0R LN_BB_CLK1
R1703 89 76
[10] WLAN_XO_CLK 0201 LN_BB_CLK2 REF_GND
99 100nF
C1710 NC LN_BB_CLK3 To GND at pin76
TP0018 NFC_CLK
[17] PM_XO_THERM 97 86 [29]
XO_THERM AMUX_1 PA_THERM0
98
AMUX_2 QUIET_THERM [17]
85 124
GND_XOADC OPTION 0201
C1711 R1701
75K_1%
1nF

GND_XOADC
[17] ×¢ÒâR5 Öµ
SG1704

NOTE: GND_XOADC MUST connect directly to C1510


and then to main GND with dedicated vias.

U1701-A
PM6125

53
CMN_GND1
65
CMN_GND2
66
CMN_GND3
NOTE: Connect GND_XO_ISO to main GND plane using dedicated via. 67
CMN_GND4
Do not share this GND with other grounds.
78
CMN_GND5
79
CMN_GND6
90
CMN_GND7

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 17
OF 34
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

o m
.c
h
VPH_PWR
U1701-D
C PM6125
C
58 [11]
VREG_S1 RMT_VREG_S1A_S2A_P
48
VDDD_S1

3A [11]
59 L1803 0.47uH

c
VSW_S1 VREG_S1A_S2A
FV1801 60
VSW_S1
C1821
C1811
10V
10V
10uF 71
1.0uF GND_S1
46 [11]
RMT_GND_S1 RMT_VREG_S1A_S2A_M
72
GND_S1

e
70
VREG_S2

VPH_PWR
95 L1812 0.47uH
VSW_S2
108 96
VDD_S2 VSW_S2

T
C1820
10V 82
RMT_GND_S2
1.0uF
4A
83
GND_S2
84 142 [12]
GND_S2 VREG_S3 RTM_VREG_S3A_S4A_P

1
120 0.47uH
VPH_PWR VDD_S3
119 L1805 [12]
VSW_S3 VREG_S3A_S4A
C1819 132
VSW_S3
144
10V VSW_S3
1.0uF

131
GND_S3
130
RMT_GND_S3 RTM_VREG_S3A_S4A_M [12]
143
GND_S3

e
118
VREG_S4

l
139
VPH_PWR VDD_S4
0.47uH
128 L1801
VSW_S4

i
C1810 140
VSW_S4
10V
10uF

129
GND_S4
141 117
GND_S4 RMT_GND_S4

VPH_PWR
36
VDDD_S5
U1701-E
PM6125

o b
VREG_S5
34
VREG_S5A_SNS [11]
B

M
0.47uH
L1813
12
VSW_S5 VREG_S5A [11,13,19]
11 24
GND_S5 VSW_S5
23 35
GND_S5 VSW_S5

25
VPH_PWR VDD_S6
52 VREG_S6A [19]
VREG_S6
C1801 0.47uH
10V L1811
10uF 13
VSW_S6 C1824 C1814
1 26
GND_S6 VSW_S6
14 10uF 10uF
GND_S6

54 [19,22]
VERG_S7 VREG_S7A
VPH_PWR 8
VDD_S7 0.47uH
L1802
7 C1838 C1822
VSW_S7
19
C1806 VSW_S7
10V 10uF 10uF
1.0uF
6
GND_S7

28 RTM_VREG_S8A_P [20]
VREG_S8

VPH_PWR 3 0.47uH
VDD_S8
L1814
4
VSW_S8 VREG_S8A [19,20]
16
C1813 VSW_S8
10V
1.0uF

5
GND_S8
29
RMT_GND_S8 RTM_VREG_S8A_M [20]
17
GND_S8

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 18
OF 34
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

o m
.c
h
C C

e c
U1701-F
PM6125

1 T
e
61 VREG_L1A_1P2
VREG_L1
50
VREG_S6A VDD_L1_L7_L17_L18
63
VREG_L2
VREG_L2A_1P0
64

l
VREG_L3
VREG_L3A_1P0
39
VREG_L4
27 VREG_L4A_0P928
VREG_S8A VDD_L2_L3_L4
113
VREG_L5
40 VREG_L5A_2P96

i
VDD_L2_L3_L4
9
C1902 VREG_L6
VREG_L6A_0P6
49
VREG_L7
10uF VREG_L7A_0P928
33
VREG_L8
VREG_L8A_0P736
43
VREG_L9
VREG_L9A_1P8
125 32
VPH_PWR VDD_L5_L15_L19_L20_L21_L22 VREG_L9_LVS VREG_L9_LVS

b
81
VREG_L10 VREG_L10A_1P8
45
C1909 VREG_L11 VREG_L11A_1P8

VREG_S5A 20 69
VDD_L6_L8 VREG_L12 VREG_L12A_1P8
10uF
105
VREG_L13 VREG_L13A_1P8
93
VREG_L14
VREG_L14A_1P8

o
56 94
VREG_S7A VDD_L9_L11 VREG_L14
80 114
VDD_L10_L13_L14 VREG_L15 VREG_L15A_3P104
B 68
VDD_L12_L16 VREG_L16
57
VREG_L16A_1P8
B
38
VREG_L17 VREG_L17A_1P304
37
VREG_L18
VREG_L18A_1P232
126
VREG_L19 VREG_L19A_1P8
138
VREG_L20 VREG_L20A_1P8

M
136
VREG_L21
VREG_L21A_2P704
42 137
VDD_L23_L24 VREG_L22
VREG_L22A_2P96
41
VREG_L23 VREG_L23A_3P304
31
VREG_L24 VREG_L24A_2P96

PM8953 LDO23=1.15V

C1901 C1914
C1912 C1923
C1903
C1904 C1925 C1926 C1927
10uF/NC 10uF
10uF/NC 10uF/NC
10uF/NC
10uF 10uF 10uF 10uF

C1907 C1915 C1919 C1916 C1906


C1917 C1922 C1911 C1905 C1910 C1921
C11924 C1918
1.0uF 1.0uF 1.0uF/NC 1.0uF 1.0uF/NC
1.0uF/NC 1.0uF/NC 1.0uF/NC 1.0uF/NC 1.0uF 1.0uF
1.0uF/NC 1.0uF/NC

C1908 C1913 C1920

2.2uF 2.2uF 2.2uF

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 19
OF 34
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D
U2001-C

[8] AA16
DDR_RESET_N RST_N_2

R2001
[8,13,19,20] B16
VREG_L6A_0P6 0201 ZQ0
240R/1%
R2002
C16
0201 ZQ1
240R/1%

[8] E15
EBI0_CA_CS_0 CS0_A
[8] F15 A3
EBI0_CA_CS_1 CS1_A DQ0_A EBI0_DQ_0 [8]
H14
CS2_A B3 EBI0_DQ_1 [8]
DQ1_A

[8] H16 C3 EBI0_DQ_2 [8]


EBI0_CA_CK_T CLK_T_A DQ2_A
D3 EBI0_DQ_3 [8]
[8] EBI0_CA_CK_C G16 DQ3_A
CLK_C_A
B7 EBI0_DQ_4 [8]
DQ4_A
U2001-B [8] EBI0_CA_CKE_0 E16 C6
R2005 CKE0_A DQ5_A EBI0_DQ_5 [8]
VREG_L9A_1P8 [8] EBI0_CA_CKE_1 F16
[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32] 0201 CKE1_A D7 EBI0_DQ_6 [8]
10K J14 DQ6_A
U2001-A CKE2_A
C8 EBI0_DQ_7 [8]
M3 DQ7_A
VSF1 [12,20] VREG_S8A_VDD2 J13
N3 A1 ODT_A K5 EBI0_DQ_8 [8]
VSF2 DNU_1 DQ8_A
[5] RESOUT_N N9 M4 A2 [8] EBI0_DQS_T_0 C9
RST_N_1 VSF3 DNU_2 DQS0_T_A K6 EBI0_DQ_9 [8]
DQ9_A
N4 [8] EBI0_DQS_T_1 K9
[5] SDC1_CMD M9 VSF4 DQS1_D_A K3 EBI0_DQ_10 [8]
CMD A17 DQ10_A
M5 DNU_3
VSF5 [8] D9 J3
[5] P12 EBI0_DQS_C_0 DQS0_C_A DQ11_A EBI0_DQ_11 [8]
SDC1_CLK CLKM N5 A18
VSF6 DNU_4 [8] J9
EBI0_DQS_C_1 DQS1_C_A J7 EBI0_DQ_12 [8]
M6 DQ12_A
M12 VSF7 B1

m
[5] SDC1_RCLK DS DNU_5 G3 EBI0_DQ_13 [8]
N6 DQ13_A
VSF8 [8] G14
B18 EBI0_CA_CA_0 CA0_A
M7 DNU_6 H6 EBI0_DQ_14 [8]
P16 VSF9 [8] F13 DQ14_A
[5] SDC1_DATA_0 DAT0 AC1 EBI0_CA_CA_1 CA1_A
M15 DNU_7 H8 EBI0_DQ_15 [8]
[5] SDC1_DATA_1 DAT1 [8] EBI0_CA_CA_2 C13 DQ15_A
CA2_A
AC18
SDC1_DATA_2 N13 DNU_8 [8] D13
****DATA0 need TEST POINT [5]
P15
DAT2 D16
NC_1
AD1 [8]
EBI0_CA_CA_3
E13
CA3_A
[5] SDC1_DATA_3 DAT3 DNU_9 EBI0_CA_CA_4 CA4_A
K17
[5] SDC1_DATA_4 M16 NC_2 AD2 [8] C15
DAT4 EBI0_CA_CA_5

o
DNU_10 CA5_A
[5] SDC1_DATA_5 N14 N7
DAT5 NC_3 AD17
DNU_11
[5] SDC1_DATA_6 L14 T17
DAT6 NC_4 D5
AD18 [8] EBI0_DMI_0 DMI0_A
[5] SDC1_DATA_7 L13 DNU_12
DAT7 AB16 H3
NC_5 [8] EBI0_DMI_1 DMI1_A

AC16
NC_6
LDDR4_254BALL_FBGA LDDR4_254BALL_FBGA

c
LDDR4_254BALL_FBGA

.
C C

c h
T e
1
U2001-F

U2001-D

e
U2001-E G13
VSS_18
K13 G15
VSSM_1 VSS_19
K14 H4

l
VSSM_2 VSS_20

C2031
[8] Y15

1.0uF
EBI1_CA_CS_0 CS0_B K16
VSSM_3 H7
[8] EBI1_CA_CS_1 W15 VSS_21
CS1_B L17 L12
VDDI VSSM_4 H13
U14 VSS_22
CS2_B L15
VSSM_5 H15

i
VSS_23
L16 J6
U16 [19] M17 VSSM_6 VSS_24
[8] EBI1_CA_CK_T CLK_T_B VREG_L24A_2P96 VCC_1
A4 VREG_L9A_1P8 M8 K4
V16 AD3 EBI1_DQ_0 [8] N17 VDD1_1 VSSM_7 VSS_25
[8] EBI1_CA_CK_C CLK_C_B DQ0_B VCC_2
1.0uF A9 [6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32] M13
AC3 EBI1_DQ_1 [8] P17 VDD1_2 VSSM_8 K7
DQ1_B VCC_3 VSS_26
Y16 C2019 C2049 A15 C2046 C2054 C2034 C2011 M14
[8] EBI1_CA_CKE_0 CKE0_B AB3 EBI1_DQ_2 [8] C2048 VDD1_3 VSSM_9 K8
DQ2_B VSS_27
[8] EBI1_CA_CKE_1 W16 A16 N8 R4
CKE1_B AA3 EBI1_DQ_3 [8] 2.2uF 2.2uF VDD1_4 1.0uF 1.0uF VSSM_10 VSS_28
DQ3_B 1.0uF 1.0uF
T14 B15 N12 R7
CKE2_B AC7 EBI1_DQ_4 [8] VDD1_5 VSSM_11 VSS_29
VREG_S8A_VDD2

b
DQ4_B [12,20]
AC15 N15 R8
AB6 EBI1_DQ_5 [8] VDD1_6 VSSM_12 VSS_30
DQ5_B
T13 AD4 N16 T6
[12,20] VREG_S8A_VDD2 ODT_B AA7 EBI1_DQ_6 [8] VDD1_7 VSSM_13 VSS_31
DQ6_B [19] VREG_L11A_1P8 J15 AD9 P13 U4
AB8 EBI1_DQ_7 [8] VCCQ_1 VDD1_8 VSSM_14 VSS_32
DQ7_B
J16 AD15 P14 U7
R5 EBI1_DQ_8 [8] VCCQ_2 VDD1_9 VSSM_15 VSS_33
AB9 DQ8_B
[8] EBI1_DQS_T_0 DQS0_T_B J17 AD16 R15 U13
R6 EBI1_DQ_9 [8] C2018 C2028 VCCQ_3 VDD1_10 VSSM_16 VSS_34
R9 DQ9_B C2010
[8] EBI1_DQS_T_1 DQS1_T_B K15 R16 U15
R3 EBI1_DQ_10 [8] VCCQ_4 VSSM_17 VSS_35
B DQ10_B 2.2uF
B

o
2.2uF 100nF R13 R17 V4
[8] AA9 T3 EBI1_DQ_11 [8] VCCQ_5 VSSM_18 VSS_36
EBI1_DQS_C_0 DQS0_C_B DQ11_B
R14 SG5 Power_PAD V5
[8] T9 T7 EBI1_DQ_12 [8] VCCQ_6 A5 VREG_S8A VSS_37
EBI1_DQS_C_1 DQS1_C_B DQ12_B VDD2_1
T15 [18,19] V6
V3 EBI1_DQ_13 [8] VCCQ_7 A8 VSS_38
DQ13_B VDD2_2 B4
T16 VSS_1 V13
[8] EBI1_CA_CA_0 V14 U6 EBI1_DQ_14 [8] VCCQ_8 B9 VSS_39
CA0_B DQ14_B VDD2_3 B6
VSS_2 V15
[8] EBI1_CA_CA_1 W13 U8 EBI1_DQ_15 [8] B13 VSS_40
CA1_B DQ15_B VDD2_4 B8
C2014 C2053 C2033 SG6 [18] VSS_3
[8] EBI1_CA_CA_2 AB13 [8,13,19,20] B14 C2044 C2015 C2001 C2002 C2003 C2004 RTM_VREG_S8A_P W14
CA2_B VREG_L6A_0P6 A6 VDD2_5 C4 VSS_41
VDDQ_1 VSS_4
[8] EBI1_CA_CA_3 AA13 G7 4.7uF 4.7uF Y14
CA3_B A7 VDD2_6 1.0uF 1.0uF 1.0uF 10uF 10uF 10uF 10uF C5 VSS_42
VDDQ_2 SG7 VSS_5
[8] EBI1_CA_CA_4 Y13 G8 RTM_VREG_S8A_M [18] AA4
CA4_B C2029 C2051 A13 VDD2_7 C7 VSS_43
C2047 C2012 VDDQ_3 VSS_6
[8] EBI1_CA_CA_5 AB15 C2016 C2021 G9 AA6
CA5_B A14 C14 VSS_44

M
VDDQ_4 VDD2_8 VSS_7
2.2uF 2.2uF 1.0uF 1.0uF K2 AA8
B5 VDD2_9 D4 VSS_45
22uF 22uF VDDQ_5 VSS_8
L7 AA14
H5 VDD2_10 D6 VSS_46
AA5 VDDQ_6 VSS_9
[8] EBI1_DMI_0 DMI0_B L8 AA15
H9 VDD2_11 D8 VSS_47
U3 VDDQ_7 VSS_10
[8] EBI1_DMI_1 DMI1_B L9 AB4
J4 VDD2_12 D14 VSS_48
VDDQ_8 VSS_11
P7 AB5
LDDR4_254BALL_FBGA J5 VDD2_13 D15 VSS_49
VDDQ_9 VSS_12
P8 AB7
J8 VDD2_14 E14 VSS_50
VDDQ_10 VSS_13
P9 AB14
T4 VDD2_15 F14 VSS_51
VDDQ_11 VSS_14
R2 AC4
T5 VDD2_16 G4 VSS_52
VDDQ_12 VSS_15
V7 AC6
T8 VDD2_17 G5 VSS_53
VDDQ_13 VSS_16
V8 AC8
U5 VDD2_18 G6 VSS_54
VDDQ_14 VSS_17
U9 V9
VDDQ_15 VDD2_19
AC5 AC9
VDDQ_16 VDD2_20
AD6 AC13
VDDQ_17 VDD2_21 LDDR4_254BALL_FBGA
AD7 AC14
VDDQ_18 VDD2_22
AD13 AD5
VDDQ_19 VDD2_23
AD14 AD8
VDDQ_20 VDD2_24

LDDR4_254BALL_FBGA

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 20
OF 34
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

LCM
D [17] LCM_NTC 0201 D
0R R2108
1K
[6,21] TS_RESET_N 0201
R2115

LCM_IOVCC R2102 NC
0201

1K

41
42
[6,21] TS_INT_N 0201 J2101
R2104
1:LCD_THERMAL 1 40 2:GND
3:TP_RST_N 2 39 4:MIPI_D0P
TDP0_LCM [21]
5:TP_INT_N 3 38 6:MIPI_D0N [21]
TDN0_LCM
R2122 0R 7:SCLK 4 37 8:GND VREG_L12A_1P8 R2110 NC
[6] TS_SPI_CLK 0201 0201
9:MISO 5 36 10:MIPI_D1P [6,19,22]
R2123 0R TDP1_LCM [21]
[6] TS_SPI_2_MISO 0201
0R 11:MOSI 6 35 12:MIPI_D1N R2109
[6] TS_SPI_2_MOSI R2124 0R
0201 TDN1_LCM [21] LCM_IOVCC [21]
0R 13:CS 7 34 14:GND VREG_L9A_1P8 0201
[6] TS_SPI_CS_N R2125
0201 [6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]
15:GND 16:MIPI_CLK_P
8 33 [21]
R2107 TCP_LCM

BTB-40F_5052704010
[6,21] 1K 17:LCD_RST_N 9 32 18:MIPI_CLK_N [21]
LCD_RESET_N 0201 TCN_LCM
R2105 19:LCD_TE 20:GND
10 31 C2107 C2147
[6] LCD_TE0 0201
1K 21:CABC/PWM 11 30 22:MIPI_LANE2_P
[21] LCM_CABC TDP2_LCM [21] 1.0uF NC
[6] 1K
LCD_ERR_INT_N 23:ERR_INT_N 12 29 24:MIPI_LANE2_N [21]
0201 TDN2_LCM
R2121 1K 13 28
25:LCD_ID1 26:GND
[6] LCM_IDO 0201
1K
R2118 27:LCD_ID2 14 27 28:MIPI_LANE3_P [21]
LCM_ID1 0201 TDP3_LCM
[6] R2113 29:NC 15 26 30:MIPI_LANE3_N
TDN3_LCM [21]
31:NC 16 25 32:GND
33:WLED_SINK2 17 24 34:LCD_VDDIO_1P8
[21] LED2- LCM_IOVCC
[21] 35:WLED_SINK1 18 23 36:VSP
LED1-
LCD_VSP [16,21]
37:NC 19 22 38:GND

m
39:WLED 20 21 40:VSN
[21] LCD_BL_LED_A LCD_VSN [16,21]

43
44
[21] [21] [21]
LCD_BL_LED_A LED2-
[6,21] LED1-
LCD_RESET_N [16,21] [16,21]
LCD_VSN LCD_VSP

o
NTC for BL LED thermal detect

C2104 C2122 C2141

c
NC

1
NC

1
NC 10V 10V

1
4 1 C2117 C2154 C2113 C2144 120pF
[9] MIPI_DSI0_LANE0_P TDP0_LCM [21] 120pF 120pF
3 2 [21]
[9] MIPI_DSI0_LANE0_N TDN0_LCM

.
EMI2101 120pF/10V 120pF/10V
FV2109

2
1.0uF/10V FV2110

2
1.0uF/10V

2
FV2107

4 1 TDP1_LCM [21]
[9] MIPI_DSI0_LANE1_P
3 2
[9] MIPI_DSI0_LANE1_N TDN1_LCM [21]

h
EMI2102

C C
TS_RESET_N TS_INT_N
[6,21] [6,21]
4 1
[9] MIPI_DSI0_LANE2_P TDP2_LCM [21]
3 2
[9] MIPI_DSI0_LANE2_N TDN2_LCM [21]
EMI2103

c
[9] MIPI_DSI0_LANE3_P 4 1
TDP3_LCM [21]

1
[9] MIPI_DSI0_LANE3_N 3 2
TDN3_LCM [21]
EMI2104

e
FV2103 FV2102

2
[9] MIPI_DSI0_CLK_P 4 1
TCP_LCM [21]
3 2
[9] MIPI_DSI0_CLK_N TCN_LCM [21]
EMI2105

1 T
i l e LCM Black Light
B

o b VPH_PWR
B

M
D2101
PSBD2FD40V1H
B2102 L2101 B2101
10uH 2520 2 1
LCD_BL_LED_A [21]
600ohm;1000mA;0.2ohm;0603;0.95mm;ROHS 0R
C/0603/1/UF/50V/X5R/
R2112 10R
0402 C2118 C2119 C2101

Back Light Driver for 16LEDs In 2Series 8 P C2109 120PF/50V 47pF/50V


C2112 1uF

10uF/10V
1.0uF/10V

D3
B3
APPS_I2C_SDA U2103
[6,24]

IN

SW
[6,24] APPS_I2C_SCL
A2 D2
SDA OVP

B2 B1 R2119 0R [21]
SCL HVLED1 0402 LED1-
[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32] VREG_L9A_1P8 R2106 100K_NC
0201
R2101 0R A3 C1 R2117 0R
[16] WLED_EN 0201 HWEN HVLED2 0402 LED2- [21]

R2103 0R A1 D1
[21] LCM_CABC 0201 PWM HVLED3

PGND

PGND
R2120 NC
[17] BL_PWM_OUT 0201
routing should directly from BUCK S1 LM3697YFQR

C2

C3
1 : LM3697

2 : KTD3136

GND Together

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 21
OF 34
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

Main Camera A Main Camera B 2M Main Camera C 2M Main Camera D 8M


2M FF 2M AF

22uF
C2202

27pF
C2217

C2254
27pF
1.0uF

C2204
1.0uF C2252

D [22]
D
TP2202

VCM_2MB_AVDD_2P8
C2203 27pF

C2244

C2243
B2208 B2203

1.0uF

10uF
0R_0402 GATE_CAM_MCLK2_Y0 [22]

32
31
J2202 TP0028 TP0029 TP0030 TP0031
C2224

27pF

TP1
C2261
1:MDP3 2:AVDD_2.8v 0R_0402

25

26
1 2 B2204 J2203

TP5
TP2203
[9,22] [22]

27pF

27pF
MIPI_CSI0_LANE3_P VCM_48M_AVDD_2.8

C2263

C2264
3:MDN3 4:AGND
[9,22] 3 4 27pF
MIPI_CSI0_LANE3_N
5:GND 5 6 6:GND
CAM1_2MA_RST_N [6]
[9,22]MIPI_CSI0_LANE2_P 7:MDP2 7 BTB-30F_BM20B(0.8)-30DS-0.4V(51)_R 8 8:MCP [9,22] 1:DGND 1 2 2:DOVDD1.8V [6,19,21,22]
MIPI_CSI0_CLK_P VREG_L12A_1P8

25

26
J2204 [22] [22] CSI2_8M_LANE3_N 3:MDN3 3 4 4:DVDD1.2V
9:MDN2 9 10 10:MCN SYNC 5 6 VCM_8M_DVDD_1P2 [22]
[9,22] [9,22] [22] CSI2_8M_LANE3_P 5:MDP3 6:DGND
MIPI_CSI0_LANE2_N MIPI_CSI0_CLK_N

25

26
11:GND 12:GND J2201 [22] 7:MDN0 7 8 8:SDA [6,22]
11 12 TP0020 TP0021 TP0022 TP0023 TP0024 TP0025 TP0026 TP0027 CSI2_8M_LANE0_N CCI_I2C_SDA1
[22] 9:MDP0 9 10 10:SCL [6,22]
CSI2_8M_LANE0_P 11 12 CCI_I2C_SCL1
[9,22]MIPI_CSI0_LANE1_P 13:MDP1 13 14 14:MDP0 [9,22] 1 2 11:DGND 12:RESET [6]
MIPI_CSI0_LANE0_P 1:DGND 2:SCL [6,22] 13 14 CAM4_8M_RST_N
3 4 CCI_I2C_SCL0 13:MDN1 14:VSYNC-OUT
[9,22]MIPI_CSI0_LANE1_N 15:MDN1 15 16 16:MDN0 3:NC 4:SDA [6,22] [22] CSI2_8M_LANE1_N 15 16
[9,22]
MIPI_CSI0_LANE0_N 5 6 CCI_I2C_SDA0 1 2 CSI2_8M_LANE1_P 15:MDP1 16:MDN2 [22]
5:NC 6:DGND 1:DGND 2:AVDD [22] 17 18 CSI2_8M_LANE2_N
17:GND 17 18 18:GND 7 8 3 4 17:MCP 18:MDP2 [22]
7:DGND 8:MCLK 3:NC 4:AGND [22] CSI2_8M_CLK_P CSI2_8M_LANE2_P

TP4
19:MCN 19 20 20:DGND
[22] 19:VSYNC 19 20 20:MCLK 0R_0402 B2201 [9] 9 : MCN 9 10 10:DGND 5:NC 5 6 6:DGND [22] CSI2_8M_CLK_N
SYNC [6] MIPI_CSI1_CLK_N B2206 21:DGND 21 22 22:AGND
CAM_MCLK0 [9] 11:MCP 11 12 12:AVDD2.8 2.2R +/-5% VCM_F_AVDD_2P8 7:DGND 7 8 8:RSTN CAM3_2MB_RST_N [6]
22:GND MIPI_CSI1_CLK_P 23:MCLK 23 24 24:AVDD2.8
CAM0_48M_RST_N 21:RESET 21 22 13:DGND 13 14 14:AGND [9] 9:MCN 9 10 10:NC
[6] 15 16 CAM_CLKN_F 11 12
24:SCL 15:MDN0 16:RST R2207 [9] 11:MCP 12:SDA
23:GND 23 24 CCI_I2C_SCL0 [6,22] [9] MIPI_CSI1_LANE0_N 17 18 CAM_CLKP_F 13 14 CCI_I2C_SDA1 [6,22]
MIPI_CSI1_LANE0_P 17:MDP0 18:VSYNC
0201 1.0uF 13:DGND 14:SCL
CCI_I2C_SCL1 [6,22]
26:SDA [9] 19 20 15 16 BTB-24F_BAF04-24083-0500_M516 TP0038 TP0039
VCM_48M_DVDD_1P05 25:DVDD_1.05V 25 26 CCI_I2C_SDA0 [6,22] 19:DGND 20:DGND 0R 10uF C2258 [9] 15:MDN0 16:DGND
RDN0_A_R B2209
[22] 27:DVDD_1.05V VREG_L12A_1P8 21:DOVDD1.8V 21 22 22:DGND [9] 17:MDP0 17 18 18:MCLK 0R_0402 [6] TP0032 TP0033 TP0034 TP0035 C2249
27 28 28:AFGND RDP0_A_R CAM_MCLK3 C2248

27

28
[6,19,21,22] 23:DGND 23 24 24:DGND 19:DGND 19 20 20:DGND 2.2R +/-5%
27pF B2202 [22]

C2222
29:DOVDD_1.8V 30:AFVDD C2223 21:AFGND 21 22 22:DOVDD 1.0uF VCM_8M_AVDD_2P8

1.0uF
VREG_L12A_1P8 29 30 VREG_L12A_1P8 1.0uF
VCM_48M_AFVDD_2P8 [22] C2225 23:AFVDD 23 24 24:DGND
[6,19,21,22] C2257 BTB-24F_BAF04-24083-0500_M516 [22] VCM_2MB_AFVDD_2P8 [6,19,21,22] 27pF C2247

C2241
C2246

1.0uF
33
34

BTB-24F_BAF04-24083-0500_M516

C2242
C2206 27pF

1.0uF
27

28

27pF
C2262
C2218 1.0uF 22uF
C2211
27pF

27

28
C2256

1.0uF

27pF
C2260
27pF

27pF
C2255

C2259
1.0uF B2210

VPH_PWR
AFVDD VCM_48M_AFVDD_2P8 [6] CAM_MCLK1 0R_0402

27pF
U2204
R2223
CAM_GPIO_2MFF_ID 2 1 R/0201/0/R/5%
0201 C2245

m
4 1 [6]
IN OUT 10K R2216
[22] VCM_F_AVDD_2P8 0201
[6] 3 R/0201/0/R/5%
REAR48M_AFVDD_EN EN 0R

GND

GND
R2215
2 [22] VCM_F_AVDD_2P8 VPH_PWR
0201
2 0R VCM_8M_AVDD_2P8

5
1.0uF
AVDD
0201

R2201 1.0uF
100K C2227 VPH_PWR AVDD U2208
C2226 VCM_2MB_AVDD_2P8
1 4 1

o
IN OUT
1 U2207
NC
3
CAM8M_AVDD_EN EN

GND

GND
[6]
4 1 C2235
IN OUT
NC

5
3
TP0042 TP0043 VCM_2MB_AVDD_2P8_EN EN 1.0uF/10V 2.2uF

GND

GND
[6]

0201
VCM_48M_AVDD_2.8 R2210
VPH_PWR 100K
AVDD : RearCam48M C2231
C2234

5
c
U2203 1.0uF/10V 2.2uF

0201
[9,22] MIPI_CSI0_CLK_N MIPI_CSI0_CLK_N [9,22] R2208
100K

Front & Rear 2MCamera clk buffer


[9,22] MIPI_CSI0_CLK_P MIPI_CSI0_CLK_P [9,22]
4
IN OK OUT
1
C2230
TP0044 TP0045
[6] 3
48M_AVDD_2P85_EN EN

.
GND

GND

R2221 0R
0201
2

1.0uF/10V R2204 C2215 VPH_PWR


[9,22] MIPI_CSI0_LANE1_P [9,22]
0201

MIPI_CSI0_LANE1_P R2222 0R
[9,22] MIPI_CSI0_LANE1_N [9,22] 100K 0201
MIPI_CSI0_LANE1_N C2212
TP0046 TP0047 2.2uF
R/0201/0/R/5%
R2214
[22] VCM_48M_AFVDD_2P8 0201
A1 A2 GATE_CAM_MCLK2_Y1 0R

h
MIPI_CSI0_LANE0_P [9,22] VBATT CLK_OUT1 VCM_8M_DVDD_1P2
[9,22] MIPI_CSI0_LANE0_P [22]

C [9,22] MIPI_CSI0_LANE0_N
TP0048 TP0049
MIPI_CSI0_LANE0_N [9,22]
VREG_L9A_1P8
R2220
0201
0R B1
VLDO CLK_REQ1
B2 [6] GPIO100 VCM_2MB_AFVDD_2P8 C
VREG_S7A : 2.04V VREG_S7A
VCM_48M_DVDD_1P05
C1 C2 [6] GPIO101
VPH_PWR
AFVDD
[22] VCM_F_DVDD_1P2 R2217 0R
[6] CAM_MCLK2 MCLK_IN CLK_REQ2 0402
MIPI_CSI0_LANE2_P [9,22] U2206
[9,22] MIPI_CSI0_LANE2_P
[9,22] MIPI_CSI0_LANE2_N MIPI_CSI0_LANE2_N U2205 D1 D2 GATE_CAM_MCLK2_Y0
[9,22] GND CLK_OUT2 4 1
TP0050 TP0051 [22] IN OUT

c
U2220
4 1 NC
IN OUT CDC3RL02BYFPR [6] 3
VCM_2M_AFVDD_EN EN

GND

GND
[6] 3 2
REAR48M_DVDD_EN EN
GND

GND

MIPI_CSI0_LANE3_P [9,22] 2
[9,22] MIPI_CSI0_LANE3_P C2265 C2208

5
C2266 1.0uF

0201
[9,22] MIPI_CSI0_LANE3_N MIPI_CSI0_LANE3_N [9,22] 2 C2229 R2209 1.0uF
2

2.2uF 100nF 100K C2233


0201

R2205 1.0uF 2.2uF


100K C2232
2.2uF 1
C2228

e
1
1

MIPI SW
1 T Main FLASHLIGHT

e
Front Camera

i l
AVDD:Front-Cam&RearCam2MA
VPH_PWR
VCM_F_AVDD_2P8
VREG_S7A : 2.04V VREG_S7A
VCM_F_DVDD_1P2

b
U2202 U2201

4 1 4 1
IN OUT IN OUT
OK
[6] 3 [6] 3
CAM1_AVDD_2P85_EN EN FRONTCAM_DVDD_EN EN
GND

GND

GND

GND

C2214
2 C2205
2

5
0201

1.0uF/10V 2.2uF R2203 1.0uF


0201

R2206

o
100K 2.2uF
100K
C2209
C2207 VPH_PWR
B [15,16,17,18,19,21,22,23,24,29,31]
B

C2238

C2239

C2240
1

2.2R +/-5% B2205 [22]

100nF

100pF
VCM_F_AVDD_2P8

2.2uF
C2221
27pF

Front Camera
Cool white
C2220

22uFC2253

M
1.0uF

A1

A2
U2210
F4 [22] [16] F_LED1

VDD

GND
TP0052 TP0053 CLKAP F13_CSI2_CLK_P
[9] MIPI_CSI2_CLK_N F5 F2
25

26

J2205 CLKN CLKBP [22]


[9] MIPI_CSI2_CLK_P F6 F13_CSI2_CLK_N
CLKP

2
TS5MP646 F3
CLKAN
F1
CLKBN

1
1
E5
F13_CSI2_CLK_P [22] [9] MIPI_CSI2_LANE0_N D1N LED2201
[22] F13_CSI2_CLK_P [6,22] CCI_I2C_SCL1 1:SCL 1 2 2:AVDD 2.8V TP2201 E4 [22] 1
DA1P F13_CSI2_LANE0_P C2236
[22] F13_CSI2_CLK_N F13_CSI2_CLK_N [22] [6,22] CCI_I2C_SDA1 3:SDA 3 4 4:AGND E6 E2
[9] MIPI_CSI2_LANE0_P D1P DB1P
TP0054 TP0055 5:NC 5 6 6:RESET CAM2_RST_N [6] F13_CSI2_LANE0_N [22]
7:DGND 7 8 8:DGND E3 120pF
DA1N
[22] F13_CSI2_CLK_P 9:MCP 9 10 10:MDP3 [22] D5 E1 2 FV2201

2
F13_CSI2_LANE3_P [9] MIPI_CSI2_LANE1_N D2N DB1N
[22] F13_CSI2_CLK_N 11:MCN 11 12 12:MDN3 [22]
13 14 F13_CSI2_LANE3_N D6 D4
F13_CSI2_LANE1_P 13:MDP1 14:MDP2 F13_CSI2_LANE2_P [22] [9] MIPI_CSI2_LANE1_P D2P DA2P F13_CSI2_LANE1_P [22]
[22] [22] 15 16 D2
F13_CSI2_LANE0_N F13_CSI2_LANE0_N F13_CSI2_LANE1_N 15:MDN1 16:MDN2 F13_CSI2_LANE2_N [22] DB2P
[22] 17 18 F13_CSI2_LANE1_N [22]
[22] F13_CSI2_LANE0_P F13_CSI2_LANE0_P [22] F13_CSI2_LANE0_P 17:MDP0 18:DNGD
[22] 19:MDN0 19 20 20:DOVDD 1.8V
[6,19,21,22] D3
[22] F13_CSI2_LANE0_N VREG_L12A_1P8 DA2N
TP0056 TP0057 [22] 21:DGND 21 22 22:DVDD 1.2V C5 D1
[9] MIPI_CSI2_LANE2_N D3N DB2N
23:MCLK 23 24 24:DVDD 1.2V VCM_F_DVDD_1P2 [22]
[9] MIPI_CSI2_LANE2_P C6 B4
D3P DA3P F13_CSI2_LANE2_P [22]
C2
DB3P
F13_CSI2_LANE2_N [22]
BTB-24F_BAF04-24083-0500_M516 B3
F13_CSI2_LANE1_N F13_CSI2_LANE1_N [22] DA3N
[22] 27pF 27pF 1.0uF 1.0uF B5 C1
27

28

F13_CSI2_LANE1_P F13_CSI2_LANE1_P [22] [9] MIPI_CSI2_LANE3_N D4N DB3N


[22] TP0058 TP0059 [22] GATE_CAM_MCLK2_Y1
B2207 0R_0402 A4
C2250 C2251 C2216 C2213 DA4P F13_CSI2_LANE3_P [22]
[9] MIPI_CSI2_LANE3_P B6 B2
D4P DB4P
27pF F13_CSI2_LANE3_N [22]
A3
DA4N
B1
C2201 DB4N
F13_CSI2_LANE2_N F13_CSI2_LANE2_N [22]
[22] [22]
F13_CSI2_LANE2_P F13_CSI2_LANE2_P
[22]
TP0060 TP0061 CSI2_8M_CLK_P [22]
CSI2_8M_CLK_N [22]
/OE

SEL

NC

NC

CSI2_8M_LANE0_P [22]
[22]
A5

A6

C3

C4

CSI2_8M_LANE0_N
[22] F13_CSI2_LANE3_P [22] CSI2_8M_LANE1_P [22]
F13_CSI2_LANE3_P
[22] F13_CSI2_LANE3_N F13_CSI2_LANE3_N [22] [6] MIPI_OE_N CSI2_8M_LANE1_N [22]

CSI2_8M_LANE2_P
[22]
[6] MIPI_SEL CSI2_8M_LANE2_N
[22]

CSI2_8M_LANE3_P
[22]
CSI2_8M_LANE3_N
[22]
0201

0201

R2212 R2213
NC NC

Rear Camera_8M
Schematic design notice of "63_PERI_CAMERA_KEYPAD" page.
A Note 62-1: The VCC of I2C_0 is pulled to "VCAM_IO_PMU".
A

Note 62-2: I2C control interface of front camera (with AF) must be assigned to I2C-2 I2C ADDRESS 2M 0X7a(wite) 0x7b(read)
bus when PIP/VIV feature be supported.

Note 62-3: Reserve a capacitor (27pF) on camera's MCLK and shunt it to GND to prevent GPS de-sense.
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 22
OF 34
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

M-Sensor
M-Sensor I2C Address: 0x0C
PL_SENSOR
[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32] VREG_L9A_1P8 U2301

D A1 VSS SCL A2 SNS_I3C_SCL [6,23,29] D


J2306 J2307 J2308 J2309 J2311 J2312

B1 VDD SDA B2 SNS_I3C_SDA [6,23,29]


VDD1.8V
VLED_3.3V
AK09918C SDA
C2305 SCL
INT_Lsensor R2338 0R_NC VREG_L9A_1P8
0201
INT_Psensor [6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]
100nF $$$3092

22uF
GND
VDD1.8V 22R
R2311 0402 VLED_VFP_3.3V
[23]

C2313
[6] SNS_I2C_SDA R2313 0R C2306 C2330
0201
4.7uF 100nF
[6] SNS_I2C_SCL R2314 0R
0201

C2316 C2317

NC NC
VLED_3.3V 0R [23]
R2305 0402 VLED_VFP_3.3V

VREG_L9A_1P8
[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32] C2333

27pF
C2334
10uF

0201
R2310
100K_1%

m
[6] ALSP_INT_N

co
.
ACC-Sensor

h
SNS_I3C_SDA [6,23,29]

SNS_I3C_SCL [6,23,29]
IR
VPH_PWR
SH2301 SH2303
C VREG_L9A_1P8
[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]
C

c
M516-BOT-PMU-CASE
M516-TOP-BB-CASE
VREG_L9A_1P8
R1405 : 10R to 33 R
14

13

12

[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]
U2303 B2301 R2308 SH2304
SH2302
SDX

SCX

CSB

C2301 0402
1 11 100nF
SDO OSDO(GND) 33R
R2302 M516-BOT-WCN-CASE
M516-TOP-RFPA-CASE
NC 2 10
0201 ASDX OSCB(GND)
NC 3 9 C2337 C2336 SH2305
ASCX INT2 GYRO_INT [6]

e
0201
R2304
VDDIO

4 8 VREG_L9A_1P8 NC 4.7uF
INT1 VDD IR
GND

GND

[6] ACCEL_INT M516-BOT-RFTR-CASE


[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]
BMI120 LED2301
5

C2303 C2307

VREG_L9A_1P8 1.0uF 100nF


[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]

1
Q2301

T
C2304

1
WNM2046-3/TR
100nF
PWM 38KHZ D 3

R2312 0R 1 G

2
[6] IR_LED_EN 0201
FV2314

2
S 2
FV2313

e 1
i l
B

FingerPrint-Sensor
o b B

[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]
[6]

[23]
FP_INT_N

VLED_VFP_3.3V

VREG_L9A_1P8
1-IRQ
2-GND_HOST
3-GND_HOST
4-2.8V
5-VDD1.8V
1
2
3
4
5
J2301

BTB-10F_BB2R4-10KBJ13
M 10
9
8
7
6
10-RST_N
9-MOSI
8-MISO
7-CS_N
6-SCLK
FP_RST_N

FP_SPI_MOSI
FP_SPI_MISO
FP_SPI_CS_N
FP_SPI_SCLK
[6]

[6]
[6]
[6]
[6]
Default: I3C for Mag sensor + ACCEL/GYRO, I2C for the PL Sensor

1.0uF 1.0uF FV2307 FV2308 FV2309 FV2310 FV2311 FV2312


VPH_PWR
U2305 C2311
C2310

4 1 VLED_VFP_3.3V [23]
IN OUT
3
[6] VLED_3.3V_EN EN
GND

GND

1.0uF
2

C2302 C2308
0201

R2309
100K

BAD MARK POINT


1.0uF/10V

GND GND

MARK POINT
A LDO 3.3V or 3.0V for FP & VLEDA M2305 M2306
1
M2301

MARKD2MM
1
M2302

MARKD2MM
1
M2303

MARKD2MM
1
M2304

MARKD2MM
A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 23
OF 34
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

J1

REC
J4
REC_PAD_L1
REC_PAD_R1
1

Audio Codec
REC_L
1
REC_PAD
J3

J5 REC_PAD_L2

REC_PAD_R2 1
REC_PAD
1
REC_PAD
J2402
REC_PAD_L3

J2401 1
REC_PAD
REC_PAD_R3
B2401
1
REC_PAD
0R_0402
D C2434
EAR_OUT_M [24] D
U2401 WCD_BUCK_FLYB_GND 100pF/25V
[24] EAR_OUT_P [24]
WCD9370 B2412
4.7uF
0R_0402
C2429
[6] WCD_RESET_N 39 35 VREG_L14A_1P8 [19]

1
RESET_N VDD_BUCK C2449 1.0uF
11
VDD_CX
5 R2410 0R VPH_PWR C2431 C2447
GND 0201
37 4 [15,16,17,18,19,21,22,23,24,29,31]
GND VDD_MIC_BIAS
31 1 VREG_L9A_1P8 33pF/25V
GND VDD_PX 33pF/25V
33
VDD_TXRX

2
C2407 1.0uF 7 FV2410 FV2407
CCOMP C2426 C2454 C2430
SG2402 17
CCIMP_REF
47
AUX_OUT_M 100nF 100nF 100nF
51
C2422 100pF C2442 100pF C2445 100pF AUX_OUT_P
[26] AMIC1_INP 3
AMIC1_INP SG2406
[26] AMIC1_INM 9
AMIC1_INM
[24,26] AMIC2_INP 19 41 EAR_OUT_M [24]
AMIC2_INP EAR_OUT_M
[24,26] AMIC2_INM 14 46 EAR_OUT_P [24]
AMIC2_INM EAR_OUT_P
[24] AMIC3_INP 8
AMIC3_INP
[24] AMIC3_INM 13 B2406
AMIC3_INM
18 BLM18AG102SN1D
GND
TP2405 TP2406 TP2402 TP2410 TP2403 TP2408 23 30
GND BUCK_VSW B2405
34 PA_VPOS [24]
BUCK_OUT
BLM15AG121SN1
[6] SWR_RX_CLK 16 C2421
SWR_RX_CLK
[6] SWR_TX_DATA0 12
SWR_TX_DATA1
[6] SWR_RX_DATA0 6 470nF
SWR_RX_DATA1
26
GPO0 C2446
[6] SWR_RX_DATA1 22
SWR_RX_DATA2
36
GPO1
[6] SWR_TX_DATA1 27 1.0uF
SWR_TX_DATA2
[6] SWR_TX_CLK 32
SWR_TX_CLK
B2409 [24]
BLM18AG102SN1D WCD_BUCK_FLYB_GND
[24,26] HPH_L 53
HPH_L 45 FLYB_VSW
[24,26] HPH_R 48 FLYB_VSW
HPH_R 50 PA_VNEG [24]
[24,26] HPH_REF 38 FLYB_VNEG_OUT
HPH_REF 54 FLYB_VNEG_DAC BLM15AG121SN1
FLYB_VNEG_DAC
C2413 B2402 C2424
C2425 C2433 C2420
0201

2
INTR1 55

m
NC DNC
470nF
NC NC NC C2414 C2423

Sub MIC
C2401 100nF 10
SG2403 LDO_H
470nF 1.0uF
28
MBHC_HSDET_G
[26] HS_DET 44
MBHC_HSDET_L
WCD_BUCK_FLYB_GND [24]
[26] MIC_BIAS1 15
MIC_BIAS1

o
[24] MIC_BIAS2 24
MIC_BIAS2
[24] MIC_BIAS3 25
MIC_BIAS3
52 WCD_GND_A
GND_A
C2452 C2412 C2410 SG2405 20 40 [24]
MICB_CFILT_REF GND_BUCK WCD_BUCK_FLYB_GND

100nF 100nF 100nF 42 21


GND GND_D
29
GND_RXTX
49
PA_VNEG

c
43 MIC_BIAS3
PA_VPOS
SG2404
[24] PA_VNEG SG2401 Power_PAD
[24] PA_VPOS

.
MIC2401
B2411
SM0103B-RFS381-X01 AMIC3_INP [24]
C POWER
1
B2414 180nH
C2457
C
180nH

h
100pF
B2404
2 [24]
SIGNAL_GND AMIC3_INM
180nH

0R
3 NC

1
OUTPUT C2555 C2456

0201
C2458 C2404 33pF 33pF

R2409
c
100nF 33pF
FV2401

2
4
CASE_GND

T e
e 1
l
Audio PA

i
GND

nokia,L-R-MIC-GND HPH_R

default Iphone,L-R-GND-MIC

Earphone Audio
HS_DET

HPH_L

b
MIC_IN

B B

o
TP0037
Note: Ferrite beads and their corresponding bypass capacitors on
TP0036
on CDC_HPH_L_P, CDC_HPH_L_M and CDC_HPH_REF
TP0041
AUDIO_MI2S_SCK
TP0040
are needed to reduce noise generated by audio/FM concurrency
[6,24]

AUDIO_MI2S_WS
[6,24] B2415

AUDIO_MI2S_D1 [24] SPKR_M UPZ1608U601-1R3TF


SPKR_OUT_M [26]
[6,24] 100pF
R2408 51R

M
0201
AUDIO_MI2S_D0
[6,24] 51R HS_DET
R2413 C2441
0201
[24] SPKR_P SPKR_OUT_P [26] HPH_R
B2416
HPH_L
UPZ1608U601-1R3TF

47pF
47pF C2402 C2403
[24,26] HPH_R
C2453 120pF 120pF
C2415
[24,26] HPH_L

[24] R2401 2.2K


MIC_BIAS2 0201
R2402 2.2K
VPH_PWR 0201
U2440
C2460
L2440 1uH
A1
F1 LX1 33pF/25V
MLK/PDMRXCLK B2
LX2
F5 A2

C2448

C2406
ICC/PDMTXCLK LX3 10uF 10uF
E3 B1 C2472
PDMRXDAT LX4
C2470 C2471
A5 100nF
[6,24] AUDIO_MI2S_D1 R2404 0R E2 OUTP1 SPKR_M [24] 33pF/25V
0201 DOUT/PDMTXDAT A6 PGND [24] 33pF/25V
E1 OUTP2
[6,24] AUDIO_MI2S_SCK BCLK D5
OUTN1 SPKR_P [24]
F2 D6
[6,24] AUDIO_MI2S_WS CRCLK OUTN2
R2407 0R D2
[6,24] AUDIO_MI2S_D0 0201 DIN
B6 VSENSE_M [26] [24,26] AMIC2_INP
VSNSP
F6 C6 VSENSE_P [26] [24,26] AMIC2_INM
[6] AUDIO_PA_RST RST VSNSN
E6
IRQ
C1
VBAT

[6,21] APPS_I2C_SCL E4 E5
SCL ADDR
[6,21] APPS_I2C_SDA F4 D3 C2461 C2439
SDA GND1

0201
D4 R2403 HPH_REF [24,26]
VREG_L9A_1P8
GND2 10V 33pF/25V NC 33pF/25V
A3 D1 C2473 1.0uF

C2432
PGND1 VREFC
C2
PGND2 C2:ADDR2
F3
C4 DVDD
PGND3
B3
PGND4

NC
C3 A4 C2474
PGND5 PVDD1
B4 25V
[24] PGND C5 PVDD2
PGND6 B5 100nF
PVDD3
C2476

A Note: Place B202,B203,C216,C217 close to headset jack connector A


C2475

MAX98927EWX C2477

100nF_25V_0201
Note: For Cable detection
10uF
10uF

PGND
[24]

NOTE:PN
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 24
OF 34
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

T-Card SIM1
D D
[19] VREG_L22A_2P96 R2530 0R
0402

[12,19] VREG_L5A_2P96 NC R2515 [12,19]


0201 VREG_L19A_1P8

R2522 0R 1
J2501 0201 VCC
2
VCC
3
VCC
[6] UIM1_RESET

R2502
R2512 100R 4

0201
RST

10K
0201 5
[5] R2523 22R 16 RST
SDC2_SDCARD_D1 0201 DATA1 6
8 RST
DATA1 J2503
[5] SDC2_SDCARD_D0 R2524 22R 15 [6] UIM1_CLK R2510 51R 7
0201 DATA0 0201 CLK
7 8
DATA0 CLK
14 9
VSS CLK
6
[5] VSS
SDC2_SDCARD_CLK R2525 0R 13 10
0201 CLK GND
5 [6] UIM1_DATA R2511 100R 11
CLK 0201 GND
12 12
VDD GND
4
[5] VDD
SDC2_SDCARD_CMD R2526 22R 11 13
0201 CMD VPP
3 14
[5] CMD VPP
SDC2_SDCARD_D3 R2527 22R 10 15
0201 CD/DATA3 VPP
2
CD/DATA3
9 16
DATA2 I/O
[5] SDC2_SDCARD_D2 R2528 22R 1 17
0201 DATA2 I/O
18
I/O
C2502
TF_CAF11-08136-151901
FV2506 FV2507 FV2508 1.0uF

m
SIM_CAF99-06033-1505

1
NC

1
C2505

100nF

4.7uF
C2504

2
FV2512
3

3
ESD5302N ESD5302N ESD5302N

c o
h .
C C

e c
T
INT SIM2

e1
l
[12,19] VREG_L20A_1P8

b i
[6,12,16,17,19,20,21,22,23,24,26,29,30,31,32] VREG_L9A_1P8 R2508 100K_1%
0201

R2521 0R 1
0201 VCC
J2505 2
VCC
3
1 VCC

o
1K 2 33R 4
[6] UIM2_RESET R2518
14 3 0201 RST
[6] SD_CARD_DET_N 0201 DECT 5
B R2509
4
5
6
6
RST
RST
J2502
B
7
[6] UIM2_CLK R2519 33R CLK
[6] 0201 8
13
12

UIM1_PRESENT CLK
9
11
10
9
8
7

C2503 NC CLK

10K
[6] UIM2_PRESENT
10
[6] UIM2_DATA GND
11
GND

0201
12
100nF GND
FV2516 13

R2501
SIM_CAF00-21134-1523 VPP
14
VPP

M
15
VPP
R2520 33R 16
0201 I/O
17
I/O
18
I/O

SIM_CAF99-06033-1505

C2501

1.0uF

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 25
OF 34
SUB_FPC GND

42

41
FM_EARPHONE_ANT
[33]

[24]
[24]
[24]
FM_EARPHONE_ANT

HPH_R
HPH_REF
HPH_L
1
2
3
4
5
BTB-40F_WP27D-SX40VA3_R

40
39
38
37
36
AMIC2_INP
AMIC2_INM
MIC_CASE_GND
AMIC1_INP
AMIC1_INM
[26]
[24]
[24]

[24,26]
[24,26]
Power Key
VREG_L21A_2P704 6 35 [24,26]
MIC_BIAS1
PRX_TUNER_SW1 7 34
PRX_TUNER_SW2 [15,26] USB_CC1
8 J2607 33 PRX_SAR_SENSOR [29]
PRX_TUNER_SW3 [15,26] USB_CC2
VREG_L21A_2P704 9 32 NCCAPSENSOR [29]
[19,26,28,29,30,33]
[6] PRX_TUNER_SW1 10 31
PRX_TUNER_SW2 11 30 HS_DET [24]
[6]
[6] PRX_TUNER_SW3 12 29 [6]
PRX_SAR_SENSOR 13 28 ANT_CHECK
VREG_L9A_1P8 [6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]
NCCAPSENSOR [5,26] USB_HS_D_P 14 27
PRX_TUNER_SW4 [6]
[5,26] USB_HS_D_M 15 26
PRX_TUNER_SW5 [6]
16 25
17 24 VSENSE_M [24]
[24,26] SPKR_OUT_P 18 23 VSENSE_P [24]
19 22
[24,26] SPKR_OUT_M 20 21
KYPD_PWR_N1 : POWER ON
SPKR_OUT_P [24,26]
SPKR_OUT_M [24,26] J2606 J2604 J2602 J2601 KYPD_VOLP_N : +

TP2607

TP2606

TP2603
PM_RESIN_N1 : -

43

44
VBUS

N21078821
1K R2605 [16,17]
0201 KYPD_PWR_N1
1K R2604 KYPD_VOLP_N [17]
0201
1K 0201 R2601
PM_RESIN_N1 [17]

1
VBUS_IN

1
C2604 C2614 C2615

NC NC NC

2
FV2606 FV2608

2
FV2603

[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32] VREG_L9A_1P8

m
[19,26,28,29,30,33] VREG_L21A_2P704

[24,26] AMIC1_INM
[24,26] AMIC1_INP
[24,26] MIC_BIAS1

o
Schematic design notice of "65_PERI_Dual_SIM_ICUSB_KEYPAD" page.
C2612 C2613
C2609 C2610 C2611

c
NC NC NC
NC NC Note 65-1: DO NOT put pull-up resistor on PWRKEY

Note 65-2: Volume Up : HOME Key / GND

.
Volume Down : (KPROW0/KPCOL0) or KPCOL0 / GND

h
Test point

c
PRX_TUNER_SW1
PRX_TUNER_SW2
PRX_TUNER_SW3

[5,26] TP2601 GND


USB_HS_D_P
PRX_SAR_SENSOR [15,26]
TP2605 ID USB_CC1

e
NCCAPSENSOR
USB_HS_D_M [5,26]
TP2602 DP USB_HS_D_P [5,26]
ANT_CHECK
VREG_L9A_1P8 VREG_L21A_2P704 TP2604 DM USB_HS_D_M [5,26]
R2607 0R VREG_L9A_1P8
U2601 0603 TP2609 VBUS VBUS_IN [26]
OVP_FPF2281
R2608 0R USB_VBUS
0603 [15] TP2612 BAT_CON_THERM [26]
FM_EARPHONE_ANT NTC
VBUS_IN R2611 1K/1% USB_PMI_DM
B3 A2 0201 [15]
[26] IN OUT TP2613 ID BAT_CON_ID [26]
C2 A3
IN OUT ANT_CHECK

T
C3 B2
IN OUT C2608 R2602 1K/1% USB_PMI_DP [15]
R2606 0201
C2607 C2601 C2603
0201

TP2614
1

0201

R2613 NC
FV2607 1uF_35V NC
1uF_35V
NC R1 NC ID
2

USB_CC2 [15,26]
A1
EN
C1
OVLO
B1 0R R2603
ACOK 0201 MIC_CASE_GND
GND
GND
GND

[26]

1
R2
A4
B4
C4
0201

OVP
R2614

0R

e
Vovp=1.2*(1+R1/R2)

i l
BAT
o b Force USB boot
VBATT_CONN_VSENSE_P [15]
TP2611

Battery Connector Note

Wide trace to RF PA

VBAT
VBAT

M
NC
10V
C2602 C2606
FV2613

10uF 33pF
J2603

TP2608
TP2610
FV2609

BAT_CON_THERM [26]
14

13

BAT_CON_ID [26]
7 6

NC
1K

1K
8 5

0201

0201

0201
ID R2612 100R [15]
4 1 0201 BAT_ID

R2616

R2610

R2618
3 2
NTC R2617 100R [6] FORCED_USB_BOOT
0201 BAT_THERM [15]

12 9 100R VREG_L9A_1P8
11 BM25-4S 10
R2609
0201
16

15

FV2611 NC
VBATT_CONN_VSENSE_M [15] FV2612

GND GND
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U3101-E

SDR-660-0-180WLPSP-TR-03-0

[30] DRX_HB1_B38_B41 141 46 PRX_HB1_B38_B41 [29]


DRX_HB1 PRX_HB1
D [30] DRX_HB2_B7 133 DRX_HB2 PRX_HB2 54 PRX_HB2_B7 [28] D
[30] DRX_HB3_B40 126 63 PRX_HB3_B40 [29]
DRX_HB3 PRX_HB3

[30] 117 DRX_HB4 PRX_HB4 71 PRX_HB4_B1_B4 [28]


DRX_HB4_B1_B4

U3101-B
110 DRX_UHB PRX_UHB 80
SDR-660-0-180WLPSP-TR-03-0

[30] DRX_MB1_B3 171 16 PRX_MB1_B3 [28]


DRX_MB1 PRX_MB1

[30] DRX_MB2_B34 164 25 PRX_MB2_B34 [28] GND_19 41


DRX_MB2 PRX_MB2

[30] DRX_MB3_B2 156 32 PRX_MB3_B2 [28] 99 21


DRX_MB3 PRX_MB3 GND_44 GND_9

[30] DRX_MB4_B39 148 38 [28] GND_10 22


DRX_MB4 PRX_MB4 PRX_MB4_B39

179 DRX_LB1 PRX_LB1 7


PRX_LB1_B28A [28]

[30] DRX_LB2_B28A_B 170 15 GND_17 36


DRX_LB2 PRX_LB2 PRX_LB2_B28B [28]

[30] 178 6 49 GND_24


DRX_LB3_B20 DRX_LB3 PRX_LB3 PRX_LB3_B20 [28]

[30] DRX_LB4_B8 169 14 PRX_LB4_B8 [28] 58 GND_29 GND_20 42


DRX_LB4 PRX_LB4

[30] DRX_LB5_B5_B26 177 DRX_LB5 PRX_LB5 5


PRX_LB5_B5 [28]

101 86 67 GND_32 GND_28 56


DRX_LTEU_UHB PRX_LTEU_UHB

m
84 GND_36 GND_42 97

GND_54 128
51R
C3127 98 134
0201 68 TX_FBRX_M TX_CH0_HB1 26 [29] GND_43 GND_57
TX_CH0_HB1_LTE_B7_B38_B40_B41

[29] TX_FBRX_P 60 TX_FBRX_P

o
33 TX_CH0_MB1_B1_B2_B3_B4_B34_B39 [29] 89 GND_37
TX_CH0_MB1
5.1nH
161 10 TX_CH0_MB2_DCS_PCS [29] 158 GND_66
[33] GPS_SDR660 GNSS_IN TX_CH0_MB2
C3126
TX_CH0_LMB 18

138 GND_58
C3125

c
2 [29] 116 GND_51
2.4nH TX_CH0_LB1 TX_CH0_LB1_G850_G900

27 GND_56 131
TX_CH0_LB2 TX_CH0_LB2_W5_W8_LTE_B5_B8_B20_B28 [29]
C3101

.
61 GND_30
22pF

TX_CH1_UHB 168

GND_59 139

167 34 GND_16
TX_CH1_HB

h
159 40 GND_18 GND_39 92
TX_CH1_MB
C 129 GND_55 GND_14 30 C
176 105 GND_47
TX_CH1_LTEU

GND_35 79

c
109 GND_49 GND_31 62

125 GND_53 GND_22 45

140 GND_60 GND_15 31

155 GND_65 GND_12 24

e
163 GND_69

GND_6 17

172 GND_70

GND_11 23

12 GND_5

T
U3101-A
GND_61 145
SDR-660-0-180WLPSP-TR-03-0

19 GND_7

48 GND_23 GND_63 151


U3101-C
28 GND_13

1
SDR-660-0-180WLPSP-TR-03-0

GND_25 51

RFFE1_CLK 166 RFFE1_CLK [6] 20 GND_8 GND_33 76


C3171
VDDA_1P2_RX1 108 VREG_L1A_1P2 [19] [17] RF_CLK1 114 XO_IN RFFE1_DATA 149 RFFE1_DATA [6]
0201
0R
VDDA_1P2_RX2 70 C3119
C3159 GND_26 52

e
0201
VREG_L2A_1P0 77 VDDA_1P0_RX1 VDDA_1P2_ANA0 75 120 W_GRFC_6 DNC_3 173
100nF NC 175
[19] VDD_ANALOG_1P0 C3164 GND_72
37 VDDA_1P0_RX2 VDDA_1P2_ANA0 90 157 W_GRFC_7
C3120 160 GND_67
4.7uF

l
Pin 43,37,107within one group
4.7uF 107 VDDA_1P0_XO VDDA_1P2_FBRX 85 136 W_GRFC_5
GND_62 147
C3104
[29] GRFC1_DPDT_SWITCH0 GPIO78
165 DNC_2 WMSS_RESETN 83 [6]
C3150 C3188 WMSS_RESET 162
C3161 GND_68

i
100nF
43 VDDA_1P0_RX2
100nF 100nF 100nF 153 GND_64 GND_34 78
GPIO100
95 VDDA_1P0_RX [6] QLINK_ENABLE 143 QLINK_EN
GND_40 93

53 VDDA_1P0_RX2_1
GPIO99
VDDA_1P2_TX0 29 [6] QLINK_REQUEST 73 QLINK_REQ 100 GND_45 GND_21 44

b
C3151
144 VDDA_1P0_TX1
100nF
[33] GNSS_ELNA_CTRL 150 GNSS_ELNA_CTRL 4 GND_2
C3152 C3162
W_GRFC_0 57 DRX_TUNER_SW3 [30]
100nF 100nF 174 GND_71
154 VDDA_1P0_RX0 66 DNC_1 W_GRFC_1 65 DRX_TUNER_SW4 [30]
55 94

o
GND_27 GND_41
C3153 146 VDDA_1P0_GNSS VDDA_1P2_RX0 130 W_GRFC_2 74 DRX_TUNER_SW5 [30]
180 GND_73 GND_46 102
B 100nF 132 VDDA_1P0_RX0_1 VDDA_1P2_RX0 137
8
B
GND_3
13 VDDA_1P0_TX0_1

C3154

100nF

3 123 C3163

M
VDDA_1P0_TX0 VDDA_1P2_RX0_1 U3101-D

100nF SDR-660-0-180WLPSP-TR-03-0

C3155

100nF

1 GND_1 QLINK_CLK_M 81 QPHY_CLK_M [10]

9 GND_4 QLINK_CLK_P 96 QPHY_CLK_P [10]


Pin 152,121,122within one group 152 VDDA_1P8_TX1
C3129 0R
121 VDDA_1P8_ANA2 VDDD_1P0_QLINK 118 0201 VREG_L3A_1P0 [19]
QLINK_UL0_M 87 QPHY_UL0_M [10]
C3165
QLINK_UL0_P 72
QPHY_UL0_P [10]
C3156 100nF C3170

100nF 4.7uF
QLINK_DL0_M 88 QPHY_DL0_M [10]
VDDD_1P0 64
QLINK_DL0_P 103 QPHY_DL0_P [10]
11 VDDA_1P8_TX0 VDDD_1P0 82 C3166

35 142 100nF
VDDA_1P8_ANA1 VDDD_1P0
115 GND_50 QLINK_DL1_M 111 QPHY_DL1_M [10]
C3157
124 GND_52 QLINK_DL1_P 127 QPHY_DL1_P [10]
100nF C3168 0R
VDDD_1P8 112 VREG_L9_LVS [19]
0201
106 GND_48

91 GND_38 QLINK_DL2_M 135 QPHY_DL2_M [10]


C3169
VREG_L13A_1P8 122 C3167
VDDA_1P8_ANA2
[19,33] VDD_ANALOG_1P8 4.7uF QLINK_DL2_P 119 QPHY_DL2_P [10]
100nF
69 VDDA_1P8_RX2
C3160 C3158
50 VDDA_1P8_FBRX Each QPHY pair shall be routed in a channel together
4.7uF 100nF ETDAC_CH0_M 47
59 VDDA_1P8_FBRX
ETDAC_CH0_P 39
isolated from other QPHY pairs with surrounding gnd
ETDAC_CH1_M 113

ETDAC_CH1_P 104

QPHY_ETDAC_TEST
A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 27
OF 34
6 5 3 2 1

TRX_B7 TX_B7
[29]

D
TRX_B1_B3_B4 [29]
TRX_B7
L3212 33pF
6
ANT
FL3205

TX
3
1 33pF L3201 1.0nH [27] D
RX L3224 PRX_HB2_B7

GND
GND
GND
GND
GND
C3235
C3236
[27] 33pF C3229
L3214 SAYEY2G53BA0F0A

8
7
5
4
2
PRX_HB4_B1_B4 1.2nH L3211 NC
2.2nH
2.4nH
close to SDR close to SDR
GND
GND

C3254

FL3212
C3205
C3287 SAPRY1G74BA0B0A
2.7nH C3286 C3285 22pF

0201
NC
NC
NC
C3206
33pF L3286
22pF 6 5
B1_RX B3_ANT TRX_B1_B3_B4 [29]
2
B3_TX

7
B3_RX
33pF L3229
3 8

TRX_B1
[29] TRX_B1 B1_ANT GND

C3239 4
C3238 GND

1
NC B1_TX

TRX_B8
2.4nH

GND GND

[29]
L3215 3.3nH TX_B1

m
L3226 1.0nH TX_B8 [29]
NC
C3245

NC

C3256
C3207
NC
[29] L3216 1.2nH
TX_B3_B4

C3255
o

NC
C3247
C3246

NC 6.8nH FL3209
S3232 close to SDR [29] L3209 33pF 6 3

L3285
TRX_B8 ANT TX 18nH
1 L3231 PRX_LB4_B8 [27]

NC
[27] RX

C3243
C3244

L3210
4 3 L3227 1.2nH PRX_MB1_B3 L3266 33pF
GND RFOUT

GND
GND
GND
GND
GND
NC
2.8V

c
5 2
RFIN VDD VREG_L21A_2P704 [19,26,29,30,33]
close to SDR

8
7
5
4
2
6 1 6.8nH
EN GND
C3233 C3208

NC
GND
GND

L3249

.
C3259 2.4nH
NC
NC
NC 33pF
L3246
L3236 33pF
C3210

22pF

[6]

h
LNA_PRX_B3_EN

C L3202
C
NC

PRX_B34_B39

c
TRX_B2
1.2nH [29]
TX_B2

C3251
L3218 SAWFD1G90KE0F0A close to SDR

C3250

e
[27]
1.5nH L3263 PRX_MB4_B39

0201
L3278 33pF

NC

NC
L3267
[29]
PRX_B34_B39 R3210 0R 1 9
0201 UNBAL3 UNBAL1
FL3210 close to SDR 2.2nH
C3212

33pF

UNBAL2 6
6 3

T
[29] TRX_B2 ANT TX 33pF L3204 1.5nH L3230 [27]
1 C3288
RX PRX_MB3_B2 5 GND4
C3277
GND
GND
GND
GND
GND

C3216
C3249 33pF
C3237 7 GND5 GND1 2
NC
8
7
5
4
2

NC
8 GND6 GND2 3 close to SDR
NC [27]
GND
2.4nH 1.5nH C3293 PRX_MB2_B34
10 4
GND

GND7 GND3
C3292 33pF

1
L3241
C3203
FL3211
FL3204
22pF 2.4nH
3 6
IN1 OUT1
GND

GND

GND
GND

R3206

e
SAFEL1G96AA0F0A
1

4
5

33pF

l
GND

b i TRX_B28A L3219 6.2nH


TX_B28A
[29]

o
C3226
C3260
NC
B NC
B

TRX_B5
FL3220 close to SDR
[29] [29] L3255 1.2nH
TX_B5 TRX_B28A 6 3 15nH L3257
ANT TX
L3217 6.2nH 1 PRX_LB1_B28A [27]
RX
C3227 L3265 33pF

GND
GND
GND
GND
GND
C3257

M
C3252 C3253
NC C3261

8
7
5
4
2
7.5nH
NC 1.2pF GND

NC

FL3206 close to SDR


[29] L3235 0R
6 3 18nH L3228
TRX_B5 0201 ANT TX
1 PRX_LB5_B5 [27]
RX
L3288 33pF
GND
GND
GND
GND
GND

C3248
C3201
C3234
8
7
5
4
2

NC
NC 5.6nH
GND

TRX_B20 TRX_B28B
[29]
TX_B20
L3277 6.2nH [29]
TX_B28B
L3221 6.2nH
C3282 C3283

NC C3223 C3224
NC

NC NC

FL3221
[29]
close to SDR
0R L3275 6 3
TRX_B20 0201 ANT TX 18nH L3223 FL3201 close to SDR
1 L3232 0R
RX PRX_LB3_B20 [27] [29]
TRX_B28B 6 3 18nH L3220
L3284 33pF 0201 ANT TX
GND
GND
GND
GND
GND

C3280 C3281 1
RX PRX_LB2_B28B [27]
C3215 L3264 33pF

GND
GND
GND
GND
GND
NC C3225
8
7
5
4
2

7.5nH
C3284
A

8
7
5
4
2
A
GND

NC 8.2nH
C3204
NC GND

NC

COMPANY:

<Company Name>
TITLE:

20_LTE_DUPLEXER

CODE: SIZE: DRAWING NO: REV:

DRAWN: DATED:

LiuMengya <Drawn Date> <Code> A0 <Drawing Number><Revision>


CHECKED: DATED:

LiLi <Checked Date> SCALE: <Scale> SHEET: 28 34


OF
6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

TXM-RF5212A
TO_DPDT [28] TRX_B1_B3_B4
[30] L3314 1.8nH L3323 1.8nH
TO_DRX_ANT 0R R3301
[30] [28]
2 TRX_B1 0201
1
NC C3310
NC R3302
C3313 NC [28] TRX_B28A [28]
0201 TRX_B2
2
1 GND TRX_B7 [28]
GND [28] TRX_B5
D 0R R3375
TRX_B40 [29] D
[28] PRX_B34_B39 0201
TRX_B41 [29]
NC R3376
[28] TRX_B28B 0201
GND L3367
GND R3377 [27]
0R TX_CH0_LB1_G850_G900

1
3
[29] TX_B34_B39 0201

C3375
VREG_L21A_2P704 1.2nH 3.3nH

RF3

GND
GND
QM11022

NC
RF1 [19,26,28,29,30,33]
4 C3345
[28] TRX_B20
S3308 C3368
100nF
GND
5
GND GND [28] TRX_B8
RF2 L3368
6
2.8V

GND
VDD

CTL
RF4
10 TX_CH0_MB2_DCS_PCS [27]
1.2nH

9
7

TRX6 31
TRX5 32

TRX4 33

TRX3 34

TRX2 35

TRX1 36

NC 37

GND 38

GND 39
NC
GND GRFC1_DPDT_SWITCH0 L3312 L3313 0R
0R 0201
J3309 [27] 0201
C3369
LB_SWOUT 1
C3321 FL3306 30 TRX7
2 L3343 LB_IN 2
NC 29 TRX8

GND
GND L3315 NC 1 3 0201
3 1 L3303 0R 0201 IN OUT
GND RF 0201
4 100pF HB_IN 3
GND 28 TRX9

68nH

2
GND HB_SWOUT 4
27 TRX10

NC
GND R3322 0R
C3324 RFFE5_CLK [6,29,31]
SCLK 5 0201
C3307 C3322 26 NC U3303
NC SDATA 6 RFFE5_DATA [6,29,31]
L3328 2.0nH 25 NC

C3353
NC NC

C3366
SKY77912-61C [6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]
0201 VIO 7 VREG_L9A_1P8
GND 24 NC
GND GND C3303
VRAMP 8 0201 NC
23 GND R3311
1 100K
C3314 VCC 9 NC
22 ANT C3302 C3372
1
NC GND VBATT 10
L3301 21
2 100nF
GND 11

GND
GND GND

18 GND

16 GND

15 GND

14 GND

13 GND
20

17 CPL
19 NC
NC C3301
2

12
NC

[15,16,17,18,19,21,22,23,24,29,31]
VPH_PWR
FV3301

1
C3309 4.7uF

o
C3342

100nF
L3329 36R
TX_FBRX_P 0201

2
[27]

L3331 L3330

0201

0201
c
150R 150R [15,16,17,18,19,21,22,23,24,29,31]
VPH_PWR

C3340 C3343 C3312

.
2.2uF
100nF 100pF

C C

h
MMMB_PA

c
L3310
33pF

PRX_B41 SAR_SENSOR

e
PRX_HB1_B38_B41 [27]
1.5nH
L3346

C3359

T
22pF
U3302
SX9325

[6,23] SNS_I3C_SDA B1 A1
SDA SCL SNS_I3C_SCL[6,23]

22uF
B2 A2
[6] SAR_CAP_RDY NIRQ VDD
1.8V VREG_L9A_1P8 [6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32]

1
R3316 B3 A3 L3311 1.0uF
33pF

100nF
0201

L3349
L3309 [6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32] VREG_L9A_1P8 CS2 CS0
PRX_HB3_B40 [27] 2.2K
B4 A4

C3311
470R L3350 CS1 GND
[26] NCCAPSENSOR 0201
1.8nH

PRX_B40 [30] DRX_SAR_SENSOR L3369 68nH L3344


0201
470R

e
L3345

FV3305

1
L3348 470R
C3357 0201 PRX_SAR_SENSOR [26]

l
22pF

2
TVS-DFN1006_ES05DUCFM

i
S3335

1 6 LNA_PRX_B40_EN [6]
GND EN
VREG_L21A_2P704 2 5
2.8V

b
VDD RFIN
[19,26,28,29,30,33]
3 4 L3306
RFOUT GND NC
L3379 NC C3378

TX_B7
C3379
NC
NC

o
33pF
33pF

TX_B7 [28]
B C3376 C3377 L3316 10pF
B

NC NC
C3339

TRX_B40
C3323 C3326
S3334 NC

1 6 LNA_PRX_B41_EN [6] L3307


GND EN

M
[19,26,28,29,30,33] VREG_L21A_2P704 2 5
2.8V 3
VDD

RFOUT
RFIN

GND
4
NC
L3388 NC
C3325 QM23040T
5

3
G

L3317 G
100pF 1 L3318
IN 1.5nH
4
1.2nH OUT TRX_B40 [29]
33pF

G
33pF

C3371
C3373
2

FL3305
C3350

C3327
NC
1pF C3348
C3349
4.7nH

TRX_B41
NC

A
50
49
48
47
46
45
44
43

42

41

40

39

38

37
GND
GND
GND
GND
GND
GND
GND
GND

HBRX2

HBRX1

GND

GND

GND

HB3

36
GND FL3322
1
GND
35
HB2 B39262B8870L210
2
GND
34
L3340 0R GND
33pF L3308 3 L3356 L3391
[27] TX_CH0_HB1_LTE_B7_B38_B40_B41 0201 RFIN_H 1 4
33 IN OUT TRX_B41 [29]
HB1
4
NC 1.5nH 2 1.2nH
C3331 32 GND
GND NC
5
[6,29,31] RFFE5_DATA SDATA 3 C3390
31 GND
NC GND C3374
6
SCLK C3389 5 2.4nH
[6,29,31] RFFE5_CLK 30 [29,31] GND
VCC2 VPA_APT NC
NC 7 U3304
NC VIO
29 NC
VCC1 VPA_APT [29,31]
8 SKY77638-21 C3358
C3334 VBATT 100nF
C3332 28 C3330
VCC2_2
9 C3317 1.0uF
NC C3335 FV3302
27
GND C3318 C3362 4.7uF
10
1

NC
26 100pF
VREG_L9A_1P8 MB4 TX_B2 [28] 100pF
11
NC
[6,12,16,17,19,20,21,22,23,24,25,26,29,30,31,32] 25 TX_B1 [28]
MB3

TX_B34_B39
C3315 12
RFIN_M
24
GND
13
2

100pF RFIN_L
23 TX_B3_B4 [28]
MB2
VPH_PWR 14
NC
22
[15,16,17,18,19,21,22,23,24,29,31] GND
15
FV3304 GND
MB1
LB4

LB3

LB2

LB1

LB5
1

4.7uF C3316 100pF


16

17

18

19

20

21

C3328 100nF C3329


2

PA_THERM0 [17]
5

33pF
A L3333 L3320 L3321
A
NC GND

NC GND

TX_CH0_MB1_B1_B2_B3_B4_B34_B39 0R L3322 33pF


0201 6 FL3307
4
IN OUT TX_B34_B39 [29]
[27]

100K/1%_NTC
2
TX_B5 [28] 3.6nH C3333
0R C3355
L3332 NC NC
3

TX_CH0_LB2_W5_W8_LTE_B5_B8_B20_B28 0201 TX_B8 [28]

PA_THERMO
NC NC
L3304 33pF NC
NC

NC

[27] C3304
1

[28] C3336
TX_B20 C3337
C3305
TX_B28B [28]
C3347

C3346

TX_B28A [28]

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 29
OF 34
6 5 4 3 2 1

J3405 J3402 J3406 J3407

J3423

C3477

NC
DRX_SAR_SENSOR [29]
100nF
100nF
C3489
C3476

33pF
C3467

33pF
C3402
DRX_SW NC
0R
L3452
0201L3454 DRX_B20 [30]
0201 DRX_B34_B39 [30]

[19,26,28,29,30,33] VREG_L21A_2P704 17 15
VDD TRX1
[6,12,16,17,19,20,21,22,23,24,25,26,29,31,32] 14
C3478 VREG_L9A_1P8 18 TRX2 DRX_B2 [30]
VIO
13
TRX3 DRX_B41 [30]
C3424 27pF J3404 12
33pF C3406 68nH L3435 0R [29] [29] TO_DPDT TRX4 DRX_B7 [30]
C3438 33pF TO_DRX_ANT L3405 33pF C3423 33pF 11
0201 9 TRX5 DRX_B40 [30]
2 1 0201 ANT
D 3 4 0R L3432 TRX6
6
5
DRX_B5 [30] D
DRX_B8 [30]
L3468 C3437 C3457 C3403 MXD86A0S TRX7
TRX8
4

NC NC NC 3 [30]
TRX9 DRX_B28A_B
68nH 2
1 TRX10
C3468 [6] 19
1 RFFE2_DATA SDATA
C3401
20 1
NC [6] RFFE2_CLK SCLK NC
7 DRX_B1_B3_B4 [30]
2 NC GND
8
2 GND

ANT_SW
L3447 10
GND
R3478 16
GND
0201 NC U3418 GND
21
56nH

11
RF1694

10
RFC
R3479 0R 0R R3481 R3406

RFC
1 10 0201 0R 0R R3407
0201 RF1 RF3 0201 1 9
RF1 RF3 0201
R3480 0R 2 R3409 0R 0R R3408
0201 RF2 2 8 0201
0201 RF2 RF4
9 0R
RF4 0201 R3482 3 7
GND GND
3
GND 4 6
VDD CTL2

CTL1
8
[19,26,28,29,30,33] VREG_L21A_2P704
2.85V
4
VDD GND
2.85V
CTL1

CTL0
CTL2

5
[19,26,28,29,30,33] VREG_L21A_2P704
C3480 U3402
S3414
5

7
6

QM13119 C3407

100pF DRX_TUNER_SW1 [6]


DRX_TUNER_SW3 [27] 100pF

[27] DRX_TUNER_SW2 [6]


DRX_TUNER_SW4

DRX_TUNER_SW5 [27]

C3408 C3409

100pF 100pF

B7_DRX

m
C3481 C3482 C3436

100pF 100pF 100pF


FL3410

2
5
L3433 0R 3

G
G
G
[30] DRX_B7 1 L3421 33pF
0201 IN L3401 1.2nH
OUT 4 DRX_HB2_B7 [27]

NC

NC

NC
SFHG56BA002
C3419

2.4NH

C3441

C3425

C3426
GND

C3420

c
33pF

.
C C

h
33pF L3402 1.5nH
L3422 DRX_MB4_B39 [27]

C3435

FL3407 2.4nH

c
SAWFD1G90KE0F0A

DRX_B34 C3421

33pF

B1_B3_B4_DRX

e
L3430 0R 1 9
[30]DRX_B34_B39 0201 UNBAL3 UNBAL1

C3418
L3403 33pF L3423 1.2nH
UNBAL2 6 DRX_MB2_B34 [27]
FL3414 B39212B9926P810
5 GND4

6 7 2

NC
L3407 33pF HB L3414 33pF 1.5nH GND5 GND1
[30] DRX_B1_B3_B4 1 L3427 DRX_HB4_B1_B4 [27]
IN C3434
LB 9 8 3
GND6 GND2 2.4nH

T
G
G
G
G
G
G
G

C3410 C3444
10 4
2
3
4
5
7
8
10

GND7 GND3
NC 3.3nH C3422
GND
22pF

C3411

1
33pF

B40_DRX

e
L3417 FL3406
33pF
L3426 1.5nH DRX_MB1_B3 [27]

l
L3437 0R L3420
L3425 33pF
1 4 1.0nH
C3445 [30] DRX_B40 0201 INPUT OUTPUT DRX_HB3_B40 [27]

GND

GND

GND
2.4nH

NC

NC
NC
C3446

2
1.8nH

C3427

C3428
C3412

C3442
C3415
33pF
33pF

b
GND

B28 A+B DRX FL3420

o
L3440 33pF
B [30] DRX_B28A_B 1 IN OUT 4 18nH L3441
DRX_LB2_B28A_B [27] B
2 GND
C3460 3 SAFFB942MAN0F0AR15 L3409
GND
NC GND 5
NC

M
DRX_B41_120M
33pF

2
C3495
L3491 0R 4 1.0nH

G
OUT L3419
[30] 1 DRX_HB1_B38_B41 [27]
DRX_B41 0201

NC
IN
3

NC
G

G
C3486 2.4NH

5
FL3411
C3447
NC

C3430
C3429
C3414

33pF

B2_DRX
FL3419

L3448
L3444 33pF 33pF
1 4 L3442 1.5nH DRX_MB3_B2 [27]
[30] DRX_B2 IN1 OUT1

GND

GND
GND
C3465
C3464
SAFFB1G96AB0F0A

3
5
NC 2.4nH

B5_DRX FL3415
SAFFB876MAA0F0A
33pF C3466
L3408 L3424 18nH
[30] DRX_B5 1 IN1 OUT 4 DRX_LB5_B5_B26
GND
GND
GND

[27]
33pF
2
5
3

C3413

NC L3416

A NC
A
B8 DRX B20 DRX FL3408
FL3413

G 2
G 5
L3411 33pF G 3
33pF [30] 1 IN
L3415 15nH L3410 [27] DRX_B20 18nH
[30] DRX_B8 1 IN OUT 4 DRX_LB4_B8 OUT 4 L3413 [27]
DRX_LB3_B20
2 GND SFH806BA002
C3416
C3405 3 L3418
GND
L3412 NC
NC GND 5
NC COMPANY:

NC <Company Name>
SAFFB942MAN0F0AR15
TITLE:

21_LTE_B7

CODE: SIZE: DRAWING NO: REV:

DRAWN: DATED:

LiuMengya <Drawn Date> <Code> A0 <Drawing Number><Revision>


6 5 4 3 2 1

D D

m
APT

U3501

co
.
QET4101

QFE4101

[15,16,17,18][19,21,22,23][24,29]
1 10
VPH_PWR VDD_BATT DNC1
C C

h
9
DNC2

c
11 L3501 1uH
VSW

5 [29]
VOUT_LDO

e
VPA_APT

C3503

4.7uF
12
VBAT_SW

C3501

T
10uF

8
GND_SW

[6,12,16,17][19,20,21,22][23,24,25,26][29,30,32]
4
VREG_L9A_1P8 VDD_1P8

1
C3502

1.0uF
6
USID

e
2
[6,29] RFFE5_DATA SDATA
3

l
[6,29] RFFE5_CLK SCLK

7
GND

b i
o
B B

M
A A

COMPANY:

<Company Name>
TITLE:

22_DRX

CODE: SIZE: DRAWING NO: REV:

DRAWN: DATED:

LiuMengya <Drawn Date> <Code> A0 <Drawing Number><Revision>


CHECKED: DATED:

LiLi <Checked Date> SCALE: <Scale> SHEET: 31 OF34


6 5 4 3 2 1

D D

m
VREG_L17A_1P304 [13,19]
1.3V_RFA

o
10nF
C3648
C3649 10nF
2.2uF C3658
100pF
C3656

U3601 C3657 4.7uF


NC C3601
WCN3950

c
27
VDD13_PM
54
100pF C3607 VDD13_FM
38
[17] RF_CLK2 CLK_IN
16

.
VDD11D_PM
33 VREG_L16A_1P8 [13,19]
VDD18_XTAL
12,17
[33] WL_RFIO_5G 32 21
WL_RFIO_5G VDD33_WL_PA C3617
[33] WL_BT_RFIO_2G 11
WL_BT_RFIO_2G VDD33_WL_5G_DRV
25 [19,33]
VREG_L23A_3P304
C3654
1.8V XO
470nF 2.2uF
30
VDD13_WL_BT_GPS 3.3V CH0
35 4 C3659

h
C C
GP_EN VDD33_WL_BT_2G_DRV_PM_LDO
GPS_L1_IN 53 48 10uF
GP_IN VDD13_BT_FM_BBPLL_A 10nF C3651 C3660 C3655 C3662
52
GP_OUT
C3653 10nF 3.0pF 10nF 4.7uF

51

c
[10] WL_TX_BB_I_P WL_BB_IP_TX

[10] WL_TX_BB_I_N 56
WL_BB_IN_TX
55 [6,12,16,17,19,20,21,22,23,24,25,26,29,30,31]
[10] WL_TX_BB_Q_P WL_BB_QP_TX
6
VDD18_IO VREG_L9A_1P8
[10] WL_TX_BB_Q_N 50
WL_BB_QN_TX C3681
42 0R XPST_CTRL [33]
GND_SEALRING1 0201
46 C3652
[10] WL_RX_BB_I_P WL_BB_IP_RX
17
C3650 1.8V_IO
GND_DIG_IO
45

e
[10] WL_RX_BB_I_N WL_BB_IN_RX 470nF 4.7uF
[10] WL_RX_BB_Q_P 39
WL_BB_QP_RX

[10] WL_RX_BB_Q_N 44
WL_BB_QN_RX
36
GND_WL_5G_DRV
31
GND_WL_5G_PA
26
[33] FM_LANT_P 68nH GND_WL_5G_BALUN
C3635 58
FM_RX_HEADSET

T
41
GND_WL_DPD
NC
37
GND_WL_5G_RXFE
C3670 [10] 1 40
WL_CMD_CLK WL_CMD_CLK GND_WL_BT_BB
WL_CMD_DATA [10] 7 34
WL_CMD_DATA GND_WL_BT_SYNTH_XTAL
15
GND_WL_BT_DRV

1
QCA_SB_CLK [6] 12 20
SB_CLK GND_WL_BT_2G_PA
QCA_SB_DATA [6] 22 5
SB_DATA GND_WL_BT_2G_RXFE
57
GND_FM_RXFE

e
WLAN_BT_COEX_CLK [10] 2
COEX_CLK
WLAN_BT_COEX_DATA [10] 8 29
COEX_DATA GND_ISO
MSS_LTE_COXM_TXD [6] 24 43
COEX_RXD GND_BT_FM_BBPLL_A

l
MSS_LTE_COXM_RXD [6] 23 49
COEX_TXD GND_FM_VCO

i
SLEEP_CLK [5,17] 13
LF_CLK_IN
10
GND_BT_DA
47
GND_GPS
WCN_UART_RX_N [6] 18
TXD
9
GND_PMU
WCN_UART_TX_N [6] 14
RXD

b
WCN_UART_CTS_N [6] 19
RTS
WCN_UART_RFR_N [6] 3
CTS

WCN_SW_CTRL [6] 28
SW_CTRL

o
B B

M
A A

COMPANY:

<Company Name>
TITLE:

24_WCN3680B

CODE: SIZE: DRAWING NO: REV:

DRAWN: DATED:

LiuMengya <Drawn Date> <Code> A0 <Drawing Number><Revision>


CHECKED: DATED:

LiLi <Checked Date> SCALE: <Scale> SHEET: 32 OF34


6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

High rejection saw J3701

C3745
FM_EARPHONE_ANT [26]

GPS
C3756 47nF 120nH

C3702

47nF
47nF
33pF C3772 47nF
C3765 33pF C3767 C3759 27pF
C3758 L3768 100nH FM_LANT_P [32]

47nF
FL3723

F6QA1G582H2JM
S3715

L3711
L3712
C3769
FL3707 L3702 33pF
2.8V L3760 100nH 27pF

NC
NC
1 6 1 4 GPS_SDR660 [27] R3701 0R 4 3
F6QA1G582H2JM GND RFOUT UNB UNB [19,26,28,29,30] VREG_L21A_2P704 0201 VCC RFOUTP
C3757 47nF
2 5 5 2
GND EN GND RFOUTN
C3736 0R 1 4 C3742 9.1nH 3 4 NC 2 5 33nH C3724 47nF 6 1 [6]
[33] GPS_IN 0201 UNB UNB RFIN VDD GND GND L3758 68nH L3761 RFIN EN FM_ANT_CHECK

C3701 3 L3710
GND 100nH

FM
S3735

27pF
2 5 AW5005DNR
GND GND C3719 C3787
NC NC
NC 3 NC
NC GND
C3732 33pF C3770 47nF
C3737 C3704

C3718
C3733
GNSS_ELNA_CTRL [27]

m
C3766 0R
0201 VREG_L13A_1P8 [19,27]

NC NC
1.8V or 2.8V
C3725 C3750

c o
C

For 5G wifi GPS_2G_5G_ANT


h . C

c
J3708 J3716 J3707
J3721

e
1

J3703
ANT_CC0043-0054A
C3729

NC

TP2012-A1255BA
TRIP_2G_ANT [33]
2

4
C3705
NC
C3774

MB
C3728 3 5
GND GND
C3707
C3706

33pF J3705
33pF
33pF

NC C3708 0R
1 2 6 TRIP_5G_ANT [33]
1

0201 COM HB
2 1
3 4 C3731
C3752 C3730 1 7
C3751 GND GND
C3746

LB
NC

1
NC NC
NC

8
NC FL3706
C3721

[33]
33pF

GPS_IN
2

i l e
b
2G_5G_WLAN

o
B B

M
S3709
FL3710
4.3pF MXD8721
1.5nH C3735 51R
C3775 18pF 4 TRIP_2G_ANT [33] C3710
OUT 2 1
[32] WL_BT_RFIO_2G 1 GND P1 0201
IN 3
C3739 G C3716 C3712 0R C3720 1.0nH TRIP_5G_ANT [33]
VREG_L23A_3P304 6 P2 0201
G
G

C3726 CTRL1 3
885067 C3715 [19,32]
3.3V
2
5

NC
XPST_CTRL 4 CTRL2 PC 5
NC NC [32] C3711
9.1nH

0201
NC

C3714
[32] WL_RFIO_5G C3717 1.0nH C3761 0R
0201

C3727 C3713 NC
0201

NC

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number>
<Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 33
OF 34

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