$lea~urement Techniques'. Vol. 4I. No. 1.

1998

EFFECT OF ELECTROSTATIC DISCHARGE ON

SEMICONDUCTOR DEVICES AND SUBSEQUENT

ANNEALING OF ELECTROSTATIC DEFECTS

M. I. Gorlov, I. V. Vorontsov, and A. V. Andreev UDC 621.38.002.4

The effect of electrostatic discharge on semiconductor devices and of subsequent annealing of electrostatic
defects by electrical loading and (or) at high temperatures is discussed. The effect of electrostatic discharge
has been described in terms of the human body phantom.

It is well known that electrostatic discharge can cause "catastrophic" and "latent" defects in semiconductor devices and
integrated circuits (ICs). Catastrophic defects are easily detected since the faulty device does not perform as required [ 1]. Latent
defects are much more difficult to detect. Most frequently they consist in minor structural damages, e.g., at the input of the
circuit, which however continues to function [2]. In addition, latent defects change the original circuit characteristics that,
nevertheless, may remain within admissible tolerances. Defective devices frequently fail only after several hundreds of operating
hours, which must be considered when using the equipment containing them.
Here we describe the results of investigation of such latent defects in semiconductor devices and their subsequent
reduction by annealing.
In all investigations of the effect of electrostatic discharge, we have used the concept of the human body phantom. We
have built a setup for testing the sensitivity of semiconductor devices and ICs to the effects of electrostatic discharge that
complies with the standard demands. The block diagram of the setup is shown in Fig. 1.
The setup operates as follows. In position 1 of the selector switch SA, the storage capacitor C s charges to the desired
level from a regulated high-voltage power supply; in position 2 of the switch, the storage capacitor discharges through the
circuit composed of R 2, the tested device, and R 3. The discharge parameters are monitored on an oscilloscope connected in
parallel with R 3. For human body phantom C s = 100 pF and R 1 = 1500 ~.
The electrostatic discharge polarity" used in the experiments is shown in Fig. 1, and the voltage has been chosen so that
no catastrophic failure of the tested semiconductor device or IC occurs.
The results of tests of KR142EN12 ICs (adjustable voltage stabilizer made by bipolar technology with p - n junction
isolation) preliminarily exposed to the effects of electrostatic discharges at 2000 V are described in [3]. Fifteen ICs were
selected by random sampling. During the investigations we have monitored the most critical parameter of this IC, the minimum
output voltage Uout,min, which must lie between 1.2 and 1.3 V. The measurements were taken before tests, after the effect of
electrostatic discharge, and after 500 h of reliability tests.
It has been found that after the effect of five discharges, the parameters of all ICs slightly deteriorated. After reliability
tests (at 70~ Usup = 45 V, It. = 53 mA), the parameter Uout,mi n r e c o v e r s its former value in practically all ICs. It has been
suggested that annealing at high temperatures and with electrical loading reduces damages in the semiconductor device structure
and, consequently, also recovery of electric parameters.
It was interesting to find out if the effect of heat alone can produce similar results.
The experiments were carried out with two batches of KR142EN12 ICs of 10 pieces each. These ICs were subjected
to 5 electrostatic discharges at 2000 V. The ICs of the first batch were then annealed at 125~ while the second batch of ICs
was stored in normal conditions. The parameter Uout,mi n w a s monitored throughout the experiment. The results are shown in
Fig. 2. Curves I and 2 correspond to Uout,mi n before tests and after the discharge. Curves 3 and 4 in Fig. 2a show Uout,min

Translated from Izmeritel'naya Tekhnika, No. 1, pp. 45-46, January, 1998.

0543-1972/98/4101-0065520.00 9 Plenum Publishing Corporation 65

 R1 SA R2

-1 _ Ra
q
2
Fig. 1. Block diagram of test setup: I) adjustable high-
voltage supply; 2) kilovoltmeter; 3) tested device.

|
100- , I00"I N, %

I
i

40- 40
//4
20- 2 0 ~
Uoutm mV
0 0 tin'
1230 1245 1260 1275 1200 1215 1230 1245 1 2 6 0 1275

Fig. 2. Integral Uout,mi n distribution curves for ICs of the fftrst (a) and second (b) batch.

after 10 and 50 h of annealing at 125~ and in Fig. 2b, after 1000 and 2000 h of storage in normal conditions. However, as
seen in Fig. 2b, they changed less than the ICs of the fin:st batch.
To reveal the dynamics of the reduction of electrostatic defects at high temperature in bipolar semiconductor devices,
we have investigated KT315B transistors. The electrostatic discharge acted upon the most sensitive transistor region, the
emitter-base junction. The change of parameters was observed from the volt-ampere characteristics (VAC). The measured
parameter was hi2 e. The annealing temperature was 125~ The obtained results show that the recovery of semiconductor
device parameters depends on the degree of damage caused by the discharge: the greater the damage, the lower the effect of
annealing; and if the damage is very great, the effect of annealing is practically zero. The rate of parameter recovery is highest
during the first 10 hours after which the process becomes saturated.
Also investigated was the effect on type KP301 MOS transistors of electrostatic discharge followed by annealing at
125 ~ During experiments, we have plotted the high-frequency volt-farad characteristics (VFC) and VACs. The capacitance
and oxide current at different gate biases were chosen as the informative parameters. High-frequency VFCs and VACs were
plotted with a E7-12 digital impedance meter. This experiment revealed the following effects. After the discharge, KP301
transistors with a positive gate bias show an abrupt rise of capacitance and gate-substrate current. With negative gate bias, the
capacitance is doubled while the gate-substrate current remains unchanged. Subsequent heat treatment of MOS transistors
causes 50% annealing of capacitance with negative gate bias and almost no annealing with positive gate bias.
The described experiments show that semiconductor devices acted upon by electrostatic discharges of a voltage below
critical can recover their former electrical parameters. Usually, electric overloading results in the appearance of "hot spots"
in the active device region since increasing the load causes local growth of temperature at these points. Low-resistance regions
form as soon as critical temperature is reached. This lowers the emitter efficiency. Some parameter degradation can be
associated with trap density changes at the interface and with the formation of new traps in the active area, which affects the
number of free carriers participating in conduction.

66
 Annealing can reduce electrostatic damage in the semiconductor device structure. Most frequently, the parameters
recover by 15-20% but if the damage is low their full recovery is most probable. The reduction of defects is more efficient
when increased electrical load and temperature act simultaneously.

REFERENCES

1, M. M. Gorlov, Review of Electronic Engineering. Microelectronics [in Russian], Issue 2, TsNII l~lektronika, Moscow
(1988), p. 45.
2. H. Sax, Electronic Industrie, No. 2, 30 (1991).
3. I. V. Vorontsov and A. V. Andreev, Noise and Degradation Processes in Semiconductor Devices. Reports of Scientific
and Technical Seminar [in Russian], MIni, Moscow (1966), p. 261.

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